A method for traffic scheduling in a time-sensitive network and related devices

By modeling the TSN scheduling problem as a problem of finding the maximum independent set on a dynamic conflict hypergraph, and employing a sparsity strategy and a flow-aware greedy algorithm, the problem of insufficient scheduling scalability in large-scale TSN networks is solved, and efficient scheduling computation is achieved.

CN121334078BActive Publication Date: 2026-05-15SOUTH CHINA UNIV OF TECH
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Patent Information

Application Number
CN202511527304.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-10-24
Publication Date
2026-05-15
Estimated Expiration
2045-10-24

AI Technical Summary

Technical Problem

Existing TSN scheduling methods lack scalability in large-scale scenarios. Traditional methods such as ILP and SMT have exponentially increased computation time, making them difficult to apply to large-scale network environments.

Method used

The TSN scheduling problem is modeled as a problem of finding the maximum independent set on a dynamic conflict hypergraph. By maintaining a bigraph structure of a baseline hypergraph and a sparse working hypergraph, a sparsity strategy combining global reconstruction using semidefinite programming and heuristic local updates is adopted to dynamically maintain the quality of the working hypergraph. Near-linear incremental construction of the conflict hypergraph is achieved using resource occupancy indexes, and a flow-aware parallel greedy algorithm is used to quickly solve the near-optimal scheduling problem.

Benefits of technology

It significantly improves computational efficiency while ensuring scheduling quality, solves the scalability bottleneck in large-scale TSN network scheduling, and is suitable for scenarios with strict requirements for deterministic communication, such as industrial IoT and vehicle networking.

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Abstract

The embodiment of the application provides a traffic scheduling method in a time sensitive network and related equipment, and belongs to the technical field of communication networks. The method models the TSN scheduling problem as a maximum independent set solving problem on a dynamic conflict hypergraph, and realizes decoupling of accurate constraints and efficient solving by maintaining a double-graph structure of a reference hypergraph and a sparse working hypergraph. A semi-static sparsification strategy combining global reconstruction based on semi-definite programming and heuristic local update is adopted to dynamically maintain the quality of the working hypergraph. The resource occupation index is used to realize near-linear incremental construction of the conflict hypergraph, and a flow-aware parallel greedy algorithm is used to quickly solve the approximate optimal scheduling on the working hypergraph. Finally, the verification repair mechanism ensures the feasibility of the scheduling scheme under accurate constraints. The application solves the scalability bottleneck in large-scale TSN network scheduling, improves the calculation efficiency while ensuring the scheduling quality, and is suitable for industrial Internet of Things, Internet of Vehicles and other scenes with strict deterministic communication requirements.
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Description

Technical Field

[0001] This application relates to the field of communication network technology, and in particular to a traffic scheduling method and related equipment in Time-Sensitive Networking (TSN). Background Technology

[0002] The deep integration of the Industrial Internet of Things (IIoT) and smart manufacturing places stringent requirements on communication networks for low latency, high reliability, and deterministic quality of service. Traditional Ethernet, due to its inherent nondeterministic queuing delays and collision mechanisms, cannot meet the stringent constraints on end-to-end latency and jitter in mission-critical scenarios such as industrial control, vehicle-to-everything (V2X) communication, and smart grids.

[0003] To address these challenges, the IEEE 802.1 TSN standard suite was developed to provide deterministic communication services for standard Ethernet. The Time-Aware Shaper (TAS) is the core mechanism for scheduling periodically time-triggered (TT) traffic. However, finding a conflict-free joint routing and scheduling scheme for all TT flows in the network is a proven NP-hard combinatorial optimization problem.

[0004] In existing technologies, methods such as integer linear programming (ILP) or satisfiability modular theory (SMT) are commonly used for solving these problems. However, as network size and traffic increase, the computation time of these methods grows exponentially, facing the "curse of dimensionality" and making them difficult to apply in real-world large-scale network environments.

[0005] Therefore, there is an urgent need in this field for a TSN scheduling solution that can guarantee scheduling quality and has good scalability. Summary of the Invention

[0006] The purpose of this application is to overcome the shortcomings of existing TSN scheduling methods in terms of insufficient scalability in large-scale scenarios, and to provide a scheduling method and related device based on Dynamic Hypergraph Sparsification and Iterative Search (DHSS), which can significantly improve computational efficiency while ensuring scheduling quality.

[0007] To achieve the above objectives, one aspect of this application proposes a traffic scheduling method in a time-sensitive network, the method comprising:

[0008] S1: Construct the initial conflict hypergraph HCG, where each vertex represents a flow configuration, which includes a routing path and an initial sending offset, and the hyperedges represent intra-flow conflict constraints and resource contention conflict constraints.

[0009] S2: Maintaining the baseline hypergraph and working super map The reference hypergraph The working hypergraph accurately stores all flow configurations and their conflict relationships. The reference hypergraph sparse approximation;

[0010] S3: Based on the aforementioned working hypergraph An approximate algorithm is used to solve for the maximum independent set MIS in order to generate candidate scheduling schemes;

[0011] S4: Verify and repair the candidate scheduling scheme to ensure its suitability for the benchmark supergraph. The feasibility;

[0012] S5: Iterate through steps S2 to S4 until a feasible scheduling scheme is generated or the termination condition is met.

[0013] In some embodiments, the step of constructing the conflict hypergraph HCG includes:

[0014] Use resource usage index and flow superedge index Perform incremental construction, wherein the resource consumption index The flow hyperedge index maps spatiotemporal resource units to the set of vertices that occupy those resources. Map each stream to its set of all configured vertices.

[0015] In some embodiments, the complexity of the incremental construction is related to the baseline hypergraph. It is independent of the size, and only related to the amount of resources occupied by the newly configured vertices.

[0016] In some embodiments, maintenance hypergraph The steps employ a semi-static sparsity strategy, including:

[0017] The global reconstruction phase is triggered periodically, and the baseline hypergraph is reconstructed using semidefinite programming (SDP). Perform sparsification to generate the working hypergraph ;as well as

[0018] During the non-global reconstruction phase, a local incremental update strategy is used to update the baseline hypergraph. The changes are approximately synchronized to the working hypergraph. .

[0019] In some embodiments, the global reconstruction phase includes:

[0020] The conflict hypergraph HCG is converted into a simple graph by clique expansion;

[0021] Solve the vector coloring SDP relaxation of the simple graph to obtain the vector representation of each vertex;

[0022] Consistency score based on hyperedge internal constraints Filter out superedges, keeping only those with scores higher than the threshold.

[0023] In some embodiments, the local incremental update strategy includes:

[0024] Add the newly introduced configuration vertices to the working hypergraph. ;

[0025] The changing hyperedges are approximated as paired conflicting edges and added to the working hypergraph. middle.

[0026] In some embodiments, the periodically triggered conditions include at least one of the following:

[0027] The benchmark hypergraph The number of vertices has increased beyond the proportional threshold since the last reconstruction. ;

[0028] The performance improvement of the scheduling scheme in multiple iterations did not meet the preset standard.

[0029] In some embodiments, the solution for the maximum independent set MIS uses the flow-aware greedy heuristic algorithm H-GreedyMIS, which employs vertex selection via... The heuristic function selects an optimal vertex; the selection is based on a scoring mechanism designed to balance topology costs and scheduling benefits, namely, selecting the vertex that minimizes the following scores.

[0030] In some embodiments, the vertex score The calculation formula is:

[0031]

[0032] in, It is the degree of the vertex in the current induced subgraph; It is set as To ensure its dominant role; It is an indicator function, when the vertex The corresponding stream has not yet been The value is 1 when any vertex is covered, and 0 otherwise.

[0033] In some embodiments, the verification and repair steps include:

[0034] The candidate scheduling scheme is examined in the baseline supergraph. Does it violate any hyperedge constraints?

[0035] If a violation occurs, a greedy repair strategy is used to iteratively remove conflicting vertices until a valid independent set is obtained.

[0036] To achieve the above objectives, another aspect of this application provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the method described above.

[0037] To achieve the above objectives, another aspect of the embodiments of this application proposes a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described above.

[0038] To achieve the above objectives, another aspect of this application provides a computer program product, including a computer program that, when executed by a processor, implements the method described above.

[0039] The embodiments of this application include at least the following beneficial effects: This application provides a traffic scheduling method, electronic device, storage medium, and program product in Time-Sensitive Networks (TSNs). This scheme models the TSN scheduling problem as a maximum independent set problem on a dynamic conflict hypergraph. By maintaining a bigraph structure of a baseline hypergraph and a sparse working hypergraph, it achieves decoupling between precise constraints and efficient solution. Furthermore, a semi-static sparsity strategy combining global reconstruction based on semidefinite programming and heuristic local updates is adopted to dynamically maintain the quality of the working hypergraph. Near-linear incremental construction of the conflict hypergraph is achieved using a resource occupancy index, and a flow-aware parallel greedy algorithm is used to quickly solve for near-optimal scheduling on the working hypergraph. Finally, a verification and repair mechanism ensures the feasibility of the scheduling scheme under precise constraints. This application effectively solves the scalability bottleneck in large-scale TSN network scheduling, significantly improving computational efficiency while ensuring scheduling quality, and is suitable for scenarios with strict deterministic communication requirements, such as the Industrial Internet of Things (IIoT) and the Internet of Vehicles (IoV). Attached Figure Description

[0040] Figure 1 This is a flowchart illustrating the steps of a traffic scheduling method in a time-sensitive network according to an embodiment of this application;

[0041] Figure 2 This is a schematic diagram illustrating the transformation from a TSN scheduling scenario to a conflict hypergraph model in an embodiment of this application; wherein (a) depicts a physical scenario of multiple time-triggered (TT) flows competing for a shared link. (b) shows the corresponding HCG model, where each scheduling configuration is mapped to a vertex, and scheduling constraints are encoded as two types of hyperedges: intra-flow conflict (red) and resource contention (gray).

[0042] Figure 3 This is a flowchart of Algorithm 1 in the embodiments of this application;

[0043] Figure 4 This is a flowchart of Algorithm 2 in the embodiments of this application;

[0044] Figure 5 This is a flowchart of the efficient incremental construction process of the conflict hypergraph based on index assistance in the embodiments of this application;

[0045] Figure 6 This is a flowchart of Algorithm 3 in the embodiments of this application;

[0046] Figure 7 This is a flowchart of Algorithm 4 in the embodiments of this application;

[0047] Figure 8 This is a flowchart of Algorithm 5 in the embodiments of this application;

[0048] Figure 9 This is a flowchart of Algorithm 6 in the embodiments of this application;

[0049] Figure 10 This is a schematic diagram of the hardware structure of the electronic device in the embodiments of this application. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit it. In the following description, when referring to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this application; they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this application as detailed in the appended claims.

[0051] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0052] Before providing a detailed description of the embodiments of this application, some of the nouns and terms involved in the embodiments of this application will be explained first. The nouns and terms involved in the embodiments of this application are subject to the following interpretations.

[0053] 1) Time-Sensitive Networking (TSN) generally refers to time-sensitive networks. TSN is a series of standards developed by the TSN working group within the IEEE 802.1 working group.

[0054] 2) The Time-Aware Shaper (TAS) is a core technology defined in the IEEE 802.1Qbv standard and is part of the Time-Sensitive Networking (TSN) protocol suite. It aims to provide deterministic low-latency communication capabilities for Ethernet. Its core function is to dynamically control the opening and closing of the switch's egress queues through a gated list (GCL), allocating predetermined time slots for high-priority data streams, thereby avoiding network congestion and ensuring the timeliness of critical data transmission. .

[0055] The deep integration of the Industrial Internet of Things (IIoT) and smart manufacturing has presented unprecedented challenges to modern communication networks in terms of low latency, high reliability, and deterministic Quality of Service (QoS). Against this backdrop, traditional Ethernet, due to its inherent non-deterministic queuing delays and collision mechanisms, can no longer meet the stringent constraints of end-to-end latency and jitter in mission-critical scenarios such as industrial control, connected vehicles, and smart grids, posing a severe challenge to the effective transmission of real-time data.

[0056] To address these challenges, the IEEE 802.1 working group developed the Time-Sensitive Networking (TSN) standard suite, aiming to endow standard Ethernet with the ability to provide deterministic communication services. For periodically time-triggered (TT) traffic, which has the most stringent deterministic requirements, TSN provides core scheduling mechanisms such as the Time-Aware Shaper (TAS). By precisely controlling the gating state of switch port queues, TAS reserves a dedicated collision-free transmission window for TT flows, theoretically guaranteeing their end-to-end latency. However, while TSN supports the converged transmission of heterogeneous traffic such as TT, Audio / Video Bridging (AVB), and Best-effort (BE) and reduces network deployment costs, it also makes the routing and scheduling planning of critical TT flows increasingly complex and crucial. Finding a collision-free joint routing and scheduling scheme for all TT flows in the network is a proven NP-hard combinatorial optimization problem. As network size and traffic increase, the solution space expands exponentially, causing a sharp increase in computation time for traditional exact methods such as Integer Linear Programming (ILP) or Satisfiability Modular Theory (SMT), which lose their practical feasibility when dealing with large-scale problems due to the "curse of dimensionality".

[0057] To accurately characterize the multidimensional constraints in this scheduling problem within a unified mathematical framework, this application innovatively models the joint routing and scheduling problem of large-scale TT flows as a problem of solving for the maximum independent set (MIS) on a hyperconflict graph (HCG). In this model, each vertex represents a feasible flow configuration (i.e., a combination of routing and transmission start times), while hyperedges precisely represent two types of core constraints: first, intra-flow conflict, ensuring that each flow selects at most one configuration; and second, resource contention conflict, meaning that multiple configurations cannot occupy the same link at the same time. We prove that there is a strict one-to-one correspondence between the optimal scheduling solution of the original problem and the maximum independent set on the HCG.

[0058] Despite the powerful expressive power of the HCG model, its application faces two major challenges. First, the candidate configuration space is extremely large, resulting in an astronomical vertex set for the HCG, making it computationally infeasible to construct a complete HCG at once. Second, even on dynamically generated HCGs, solving the MIS problem remains NP-hard, and for large-scale graphs, the computational cost is prohibitive.

[0059] In view of this, this application provides a traffic scheduling method, electronic device, storage medium, and program product in time-sensitive networks. This solution innovatively transforms the scheduling problem into solving the maximum independent set (MIS) problem on a dynamically constructed conflict hypergraph (HCG). To address the NP-hard nature of this problem, this application designs a novel semi-static sparsity architecture. This architecture maintains a baseline hypergraph for precise constraint verification (…). ) and a sparse working hypergraph for efficient computation ( This application achieves decoupling between problem accuracy and solution efficiency. It dynamically maintains the quality of the working hypergraph through a strategy combining periodic global semidefinite programming (SDP) reconstruction with low-overhead local updates, thus achieving an effective balance between solution quality and computational complexity. Comprehensive experimental evaluations under various network topologies and traffic loads demonstrate that the DHSS framework significantly outperforms state-of-the-art methods in both schedulability and scalability, providing an efficient and feasible solution for automated planning of large-scale industrial networks.

[0060] This application provides a traffic scheduling method in a time-sensitive network, relating to the field of communication network technology. This traffic scheduling method in a time-sensitive network can be applied to a terminal, a server, or software running on a terminal or server. In some embodiments, the terminal can be a smartphone, tablet, laptop, desktop computer, smart speaker, smartwatch, or in-vehicle terminal, but is not limited thereto; the server can be configured as an independent physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN, and big data and artificial intelligence platforms. The server can also be a node server in a blockchain network; the software can be an application implementing a traffic scheduling method in a time-sensitive network, but is not limited to the above forms.

[0061] This application can be used in a wide variety of general-purpose or special-purpose computer system environments or configurations. Examples include: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, and distributed computing environments including any of the above systems or devices. This application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform specific tasks or implement specific abstract data types. This application can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0062] Figure 1 This is an optional flowchart of a traffic scheduling method in a time-sensitive network provided in an embodiment of this application. Figure 1 The method may include, but is not limited to, steps S101 to S105.

[0063] Step S101: Construct the initial conflict hypergraph HCG, where each vertex represents a flow configuration, the flow configuration includes a routing path and an initial sending offset, and the hyperedge represents intra-flow conflict constraints and resource contention conflict constraints.

[0064] Step S102, maintain the baseline hypergraph and working super map The reference hypergraph The working hypergraph accurately stores all flow configurations and their conflict relationships. The reference hypergraph sparse approximation;

[0065] Step S103, based on the working hypergraph An approximate algorithm is used to solve for the maximum independent set MIS in order to generate candidate scheduling schemes;

[0066] Step S104: Verify and repair the candidate scheduling scheme to ensure its suitability in the benchmark supergraph. The feasibility;

[0067] Step S105: Iteratively execute steps S102 to S104 until a feasible scheduling scheme is generated or the termination condition is met.

[0068] The embodiments of the present invention will now be described in detail and explained with reference to the accompanying drawings and specific implementation details.

[0069] (1) TSN system modeling

[0070] 1.1) Network Model

[0071] The physical topology of the TSN network studied in this embodiment can be abstracted as a directed graph. , where the node set It consists of a set of terminal systems (ES) and a set of TSN switches (SW), namely edge set This represents a directed physical link between nodes.

[0072] All links in the network are full-duplex, which means that from the node to Link Its reverse link These are independent communication resources. Each TSN switch's output port is equipped with multiple First-In-First-Out (FIFO) queues. Data frame transmission is precisely controlled by a Time-Aware Shaper (TAS) based on a global synchronization clock provided by the IEEE 802.1AS protocol. The TAS achieves deterministic traffic scheduling by opening and closing the exit gates of each queue at precise times using a predefined gated list (GCL).

[0073] The core scheduling strategy in this embodiment is no-wait scheduling. This strategy allocates all time-triggered (TT) traffic to the highest priority queue and permanently opens the egress gate of this queue. This ensures that TT frames are forwarded immediately after being processed internally by the switch without any queuing wait. The no-wait scheduling strategy has two major advantages: First, it eliminates the need for complex GCL configuration, reducing the dependence on the storage capacity of the switch's hardware scheduling table; second, this strategy inherently eliminates queuing latency, making it a key technology for meeting the ultra-low end-to-end latency requirements of industrial applications.

[0074] 1.2) Flow Model

[0075] This embodiment aims to solve the joint routing and scheduling problem of TT flows. The set of TT flows to be scheduled is denoted as . Each stream Its characteristics are described by a set of static parameters, and its scheduling scheme is characterized by a tuple of decision variables.

[0076] a) Static parameters: tuples ,in These are the source and destination nodes of the stream, respectively. For transmission period; The transmission delay of a single data frame in this stream (determined by the load size and link rate, and considered a constant in this paper); It is the maximum tolerable end-to-end delay, which typically satisfies .

[0077] b) Decision variables: tuples ,in This is called flow The selected transmission path, and Its first frame is at the source node The initial transmission offset.

[0078] All flow scheduling schemes are within a global supercycle. The process is planned internally and executed cyclically within that cycle. For flow... The frame( Its transmission time at the source node is And must be completed by the deadline. Previously reached the destination node. Path It is an ordered link sequence, denoted as ,in This represents the number of hops in the path.

[0079] Definition 1 (No-Wait Scheduling Timing): Under the no-wait scheduling policy, the timing of TT frames being forwarded hop-by-hop in the network is completely determined. 。 set up The processing latency of the switch (the time from receiving a frame to being ready to forward it). For link The propagation delay. For a path chosen... and initial offset flow The start time of transmission of any frame on each link The following recurrence relation is satisfied:

[0080] a) First hop (source node):

[0081] b) Subsequent jump ( ):

[0082] For simplicity, this embodiment defines these timing sequences using the first frame; the transmission time of subsequent frames can be determined by the period. This is achieved through translation. This definition ensures that data frames are immediately sent to the next-hop switch after arrival and processing, without any queuing delay.

[0083] (2) Conflict hypergraph modeling for the wait-free scheduling problem

[0084] 2.1) Formal description of the problem

[0085] Based on the system model defined above, the core of the wait-free flow scheduling (WFS) problem is to address the issue of waiting for each flow. From its candidate path set Choose a path (Indexed by path) Identify and assign it an appropriate initial transmission offset. This embodiment formalizes such a complete scheduling decision into a configuration, denoted as . .

[0086] A valid global scheduling scheme requires that all scheduled flows do not conflict with each other in terms of spatiotemporal resources. This leads to the core constraint of configuration conflict.

[0087] Definition 2 (Configuration Conflict): Two configurations and A relationship is mutually exclusive if and only if at least one of the following conditions is met:

[0088] a) Intra-flow conflict: Two configurations belong to the same flow, i.e. This constraint ensures that each flow can choose at most one scheduling scheme.

[0089] b) Resource Conflict: Two configurations belong to different flows ( However, its planned transmission occupies the same time period of a certain physical link.

[0090] An effective scheduling scheme is essentially a set of configurations that do not conflict with each other.

[0091] Definition 3 (Feasible Schedule): A feasible schedule It is a set of configurations that satisfy any two distinct configurations. None of them constitute a conflict. Due to the constraint of intra-flow conflict, each flow can occur at most once in a feasible schedule, therefore the size of the schedule is... It accurately represents the number of flows that were successfully scheduled.

[0092] The WFS problem studied in this embodiment aims to find a feasible schedule with the largest possible scale. ,Right now:

[0093]

[0094] 2.2) Conflict Hypergraph (HCG) Model

[0095] To accurately model and solve the WFS problem within a unified mathematical framework, this embodiment innovatively transforms it into a Hyper Conflict Graph (HCG). This method addresses the problem of finding specific structures within a graph. Its core advantage lies in its ability to accurately encode complex scheduling constraints (especially multi-party resource contention) as graph topologies.

[0096] The construction of HCG involves two core steps: defining the vertex set and the hyperedge set. First, the entire decision space of the problem is mapped to a vertex set. Every possible configuration Each corresponds to an independent vertex in HCG. ,therefore Secondly, the two types of conflict relations in Definition 2 are encoded as hyperedge sets. .

[0097] See Figure 2 , Figure 2 A typical scheduling scenario and its corresponding HCG model are described. Figure 1 In the physical domain shown in (a), three time-triggered streams ( Because it needs to pass through the same shared link This leads to competition. Each stream may have multiple scheduling configurations due to its different send offsets (e.g., streams). have When different stream configurations (such as...) Its transmission window is in time When overlap occurs, it constitutes a resource conflict.

[0098] This physical conflict is Figure 2 The model domain shown in (b) is precisely represented. HCG represents each configuration as a vertex, while scheduling constraints are encoded as hyperedges. For example: (i) intra-flow conflicting hyperedges (such as the red hyperedge). (ii) Connects all configuration vertices of the same stream, ensuring that each stream selects at most one configuration; This connects all resources in the same spacetime. The configuration vertices where transmissions occur are used to model the contention for resources among multiple parties.

[0099] Definition 4 (HCG Hyperedgeset): The hyperedgeset of HCG It consists of the following two types of hyperedges:

[0100] a) Intraflow conflict superedge ( For each stream All possible configurations of the vertices together form a hyperedge. This type of hyperedge precisely encodes intra-flow conflict constraints. .

[0101] b) Resource competition beyond the periphery ( For any discrete-time-space resource unit All vertices corresponding to the configurations that occupy this resource together form a hyperedge. This type of hyperedge can natively model multi-party resource conflicts. To ensure that a hyperedge represents a real resource competition, it must contain at least two vertices (i.e., It is only when this condition is met that it is added to the hyperedge set. middle. .

[0102] 2.3) Equivalence Proof

[0103] The core argument of this embodiment is: a feasible schedule for the WFS problem and HCG There is a strict one-to-one correspondence between independent sets. According to hypergraph theory, vertex subsets... It is an independent set if and only if for any superedge All satisfy .

[0104] This section will rigorously prove this equivalence.

[0105] Theorem 1 (Equivalence between WFS and MIS): A configuration set A feasible schedule for the WFS problem is one that is possible if and only if its corresponding vertex set is... It's HCG An independent set.

[0106] prove( Necessity: Feasible scheduling Contains independent sets

[0107] Assumption It is a feasible schedule, according to definition 3. Any two configurations in the given configuration do not conflict. Proof by contradiction: If If a set is not independent, then there must exist some superedge. Make Take two distinct vertices from the intersection. Its corresponding configuration is .

[0108] a) If ,but Belonging to the same category Intra-flow conflict beyond the border This means configuration Both belong to flow This constitutes an intra-flow conflict, and This contradicts the definition of feasibility.

[0109] b) If ,but Both belong to the same resource competition super-border This means configuration exist The link was occupied at the same time. This constitutes a resource conflict, and is also related to This contradicts the definition of feasibility.

[0110] Both scenarios lead to a contradiction, therefore the assumption is false. Therefore, It must be An independent set.

[0111] ( Sufficiency: Independent sets Construct feasible schedule

[0112] Assumption yes An independent set. Construct a configuration set. Proof by contradiction: If If it is not feasible, then there must be two different configurations. They conflict with each other.

[0113] a) If it is an intra-flow conflict, then Its corresponding vertex Must both belong to the superedge ,lead to ,and This contradicts the definition of an independent set.

[0114] b) If it is a resource conflict, then there are spatiotemporal resources. It is shared by both. Its corresponding vertex. Must both belong to the superedge ,lead to Similarly with This contradicts the definition of an independent set.

[0115] Both scenarios lead to a contradiction, therefore the assumption is false. Therefore, It must be a feasible scheduling.

[0116] The above theorem reveals the intrinsic connection between the solution to the scheduling problem and the graph structure. Based on this, a corollary regarding optimality can be immediately derived.

[0117] Corollary 1 (Optimality Equivalence): Due to the one-to-one correspondence between feasible schedules and independent sets of HCGs that preserves size, the WFS problem of maximizing the number of schedulable flows is completely equivalent to the WFS problem of maximizing the number of schedulable flows in the conflict hypergraph. Solve the Maximum Independent Set (MIS) problem. .

[0118] (3) Algorithm design

[0119] To effectively solve the aforementioned large-scale TSN traffic planning model and overcome its inherent scalability challenges, this embodiment proposes an innovative algorithmic framework called Dynamic Hypergraph Sparsity and Search (DHSS). The core strategy of this framework is to transform the original problem into finding the maximum independent set (MIS) on a dynamically evolving conflict hypergraph. To address the combinatorial explosion of hypergraph size and the NP-hard nature of the MIS problem, the DHSS framework introduces a novel semi-static sparsity mechanism. This mechanism achieves a delicate balance between solution quality and computational cost by combining periodic global reconstruction with conventional incremental updates.

[0120] 3.1) Overall Algorithm Framework

[0121] The joint routing and scheduling problem of TT flows in large-scale TSNs has been formalized into a problem in the conflict hypergraph. The problem of finding the maximum independent set (MIS) on a complete conflict hypergraph is presented. While this transformation provides a clear graph theory perspective, any approach attempting to solve the problem directly on a complete conflict hypergraph faces two major engineering challenges that together constitute a fundamental scalability bottleneck. First, the vast number of routing and scheduling options for each flow necessitates configuring the vertex set. The scale of hypergraphs grows in a combinatorial manner, making it possible to pre-build complete hypergraphs. It is computationally infeasible. Secondly, the NP-hard nature of the MIS problem itself means that even if the size of the graph is controllable, high-quality solution algorithms still require an unbearable computational cost.

[0122] To overcome the aforementioned bottlenecks, the DHSS framework proposed in this embodiment employs a dynamic iterative solution strategy based on the semi-static sparsity concept. The core idea of ​​this framework is to fundamentally circumvent the challenge of performing high-cost solution operations on complete and accurate conflict hypergraphs by introducing an innovative dual-graph separation mechanism. Specifically, we maintain two functionally distinct hypergraphs in parallel:

[0123] a) Ground-Truth Hypergraph As a true benchmark of constraints, this graph accurately and incrementally stores all generated configurations and their complete conflict relationships, faithfully reflecting the actual constraint space of the problem.

[0124] b) Working Hypergraph ): As a computing platform for algorithms, yes It is a highly sparse approximate proxy. All computationally intensive MIS solving tasks are performed on it, thus significantly reducing complexity.

[0125] This embodiment refers to this sparsity strategy as "semi-static," the essence of which lies in its dynamic balance between approximate accuracy and maintenance overhead. Unlike purely static methods, it does not dynamically adjust the approximation accuracy in each iteration. Complete reconstruction (too costly), and not the real-time, precise synchronization of purely dynamic methods. Every tiny change (too complex to implement). Instead, it maintains the system through a combination of periodic, high-quality global refactoring and regular, low-overhead incremental updates, ensuring continuous performance throughout the iteration process. Its high efficiency and compactness.

[0126] See Figure 3 Algorithm 1 fully describes the overall workflow of the DHSS framework. The algorithm first enters the initialization phase (lines 1-7): creating an empty baseline hypergraph. An empty current optimal solution And two indexes for efficient graph construction, namely the resource consumption index. With flow superedge index Subsequently, the algorithm constructs the initial configuration based on a set of initial settings. and .

[0127] The algorithm then enters its core iterative loop (lines 8-24). In each iteration, the algorithm first checks the current optimal solution. Check if all flows have been covered; if so, terminate the loop early (lines 9-11). Otherwise, the algorithm will generate a new set of configurations for the unscheduled flows. And using the efficient method detailed in Section 3.2, these new configurations and their associated conflict relationships are incrementally incorporated. (Lines 12-13). Next is the core decision-making process: based on preset triggering conditions (see Section 3.3.1.2), the algorithm chooses to perform either a high-cost global reconstruction (line 15) or a low-cost incremental update (line 17) to maintain... In the updated The algorithm uses a fast approximation MIS algorithm (see Section 3.3.3) to obtain a candidate solution. (Line 19). The candidate solution must pass through the baseline hypergraph. Rigorous testing and repair (see Section 3.3.4) are required to ensure its feasibility, thereby obtaining an effective solution. (Line 20). Finally, the algorithm updates and retains the best solution found so far. (Lines 21-23). ​​The loop terminates when a solution covering all flows is found or a preset constraint (such as a timeout) is reached. If the solution is complete, then the algorithm derives a scheduling scheme. Conversely, if the solution is not found, it is returned as the optimal partially feasible solution (lines 25-29).

[0128] 3.2) Efficient incremental construction of conflict hypergraphs

[0129] In the DHSS framework, the baseline hypergraph As the system dynamically grows with each iteration, the efficiency of its incremental construction is a core factor determining the overall framework's performance and scalability. A naive approach, which involves configuring each newly introduced vertex... traverse all existing vertices To check for conflicts, the complexity of a single vertex insertion is as high as [missing information]. As the graph size continues to increase, this overhead will quickly evolve into a performance bottleneck, severely restricting the overall scalability of the framework.

[0130] To overcome this bottleneck, this embodiment proposes an efficient incremental construction paradigm. Its core idea is to shift from a vertex-centric pairwise inspection to a resource-centric direct query. To achieve this shift, we designed a key data structure—a resource occupancy index—to establish a reverse mapping from spatiotemporal resources to the set of vertices occupying those resources. This design reduces the time complexity required to discover all conflicts of new vertices to the overall size of the graph. Complete decoupling, making it depend only on the amount of resources occupied by the vertex itself—which is typically much smaller. .

[0131] 3.2.1) Resource Usage Index

[0132] To achieve the shift from exhaustive searching to direct querying, the core data structure designed in this embodiment is the Resource Occupation Index, denoted as... This index establishes a reverse mapping from each spatiotemporal resource unit to the set of vertices that occupy it.

[0133] Definition 5 (Resource Consumption Index, ).: Resource usage index It is an associative array that maps spatiotemporal resource units to vertex sets, and its formal definition is as follows: Where the key is a tuple It uniquely identifies a physical link and discrete time slice The spatiotemporal resource unit constitutes this. Its corresponding value is... A subset containing all those that use the resource. The configuration corresponds to the vertices. In practice, Hash tables are typically used to ensure efficient query and update performance.

[0134] For example, when a representative configuration is introduced New peak Furthermore, this configuration consumes resources. and At that time, the vertex They will be added to the index entries respectively. and The corresponding vertex set. Subsequently, if another new configuration... It also requires the use of resources The algorithm does not require traversing the entire graph, only querying... You can get it immediately including This involves identifying all conflict vertices, thereby efficiently constructing resource competition superedges.

[0135] This resource-centric query mechanism is the cornerstone of achieving efficient incremental construction algorithms. Similarly, this embodiment also maintains a flow hyperedge index. Used to quickly locate each stream All corresponding configuration vertices.

[0136] 3.2.2) Incremental Collision Detection and Hyperedge Generation

[0137] See Figure 4 Based on resource usage index This embodiment designs an efficient incremental algorithm, as shown in Algorithm 2, for dynamically updating the conflict hypergraph. The algorithm takes the current baseline hypergraph, a new batch of configurations, and the corresponding indices as input.

[0138] The core logic of the algorithm is to iterate through each new configuration. (Line 4) Create a new vertex for it. (Lines 5-6), and update the associated superedges in two steps.

[0139] a) The first step is to update the resource contention superedges (lines 8-18). Algorithm traversal All spacetime resources occupied For each resource, it first queries... Get the old vertex set that already occupies the resource. (Line 10). Then it will... Add to this set to form the updated vertex set. and update the resource index immediately. Make it point to (Lines 11-12). Finally, the algorithm performs an atomic update on the graph's topology: if the old vertex set... If a valid hyperedge (i.e., its size is not less than 2) is formed, then remove it from the hyperedge set. Remove from the middle (lines 13-15); if the new vertex set If the conditions are met, add it. And recorded in the change set (Lines 16-18)

[0140] b) The second step is to update the in-flow conflicting superedges (lines 20-27). The algorithm utilizes the flow index. position Belonging stream Corresponding old superedge (Line 21) and using the same logic as the resource superedge, the graph structure is updated to include the new superedge through atomic removal and addition operations. The state is updated synchronously with the stream index and change set. Figure 5 This visually demonstrates the efficient incremental construction process of Algorithm 2. The process begins with... Figure 5 The scenario shown in (a) is: a newly configured vertex in an HCG that already contains several vertices and hyperedges. Introduced. This example is carefully selected to clearly demonstrate the algorithm's logic. Its attribute: It belongs to an existing stream. And plans to occupy a resource that is already being contested. And a brand new resource .then, Figure 5 Figure (b) demonstrates the core efficiency advantage of this method. The algorithm does not traverse all existing vertices in the graph (a process with a time complexity of O(n log n)). Instead of inefficient operations, it utilizes Use its own attributes (to which stream, resources used) as the query key to directly access... and Index. Through almost A hash lookup of shortest complexity allows the algorithm to instantly locate the set of all relevant conflicting vertices—those that conflict due to shared resources. Conflicts due to being of the same first-class nature Ultimately, as Figure 5 As shown in (c), HCG and the two major indexes are updated synchronously: the original resource superedges and flow super edge All were expanded to include ,at the same time, Zhongye is also a new resource A new entry has been created. This resource-centric update paradigm has a complexity that is only proportional to the amount of resources occupied by the new vertex itself. (Right now This relates to the overall size of the graph, thus linking the update cost to the graph's overall size. Complete decoupling ensures the framework's scalability.

[0141] 3.2.3) Complexity Analysis

[0142] Algorithm 2's efficiency advantage is significant. Suppose we add a new [something] to the graph. Each configuration has an average usage of [number] units. Each spatiotemporal resource unit. Due to resource usage index. Both the stream index and the hash table are implemented using hash tables, and their amortized time complexity for query and update operations is O(n log n). Therefore, for a single new vertex, the time complexity of handling all its resource conflicts (lines 9-19 in Algorithm 2) is O(log n). The complexity of updating its in-flow conflicting superedges (lines 21-31) is O(n). .

[0143] In summary, The new vertex is fully integrated into The total time complexity is Crucially, this complexity is related to... Total number of existing vertices Completely unrelated. This has nothing to do with the naive method. This contrasts sharply with the complexity of the DHSS framework. This characteristic ensures that the basic graph construction steps remain efficient at all times, maintaining excellent scalability even in the later stages of iteration when dealing with ultra-large-scale graphs containing massive configurations.

[0144] 3.3) Semi-static sparse iterative solution framework

[0145] Although the efficient construction paradigm proposed in Section 3.2) solves the problem of the benchmark hypergraph The problem of dynamic maintenance exists, but this does not eliminate its inherent complexity. As iterations proceed, As the scale of graphs continues to grow, directly solving the MIS problem on them will inevitably encounter the dual computational bottlenecks brought about by the NP-hard nature of the problem and the explosive growth in graph size. To overcome this core challenge, this embodiment designs a semi-static sparse iterative solution framework. The basic idea of ​​this framework is to transform the computationally intensive MIS solution task from precise but massive... Transfer to a significantly smaller and simpler working hypergraph ( On. As The key to computational agents lies not in seeking real-time, precise synchronization between the two, but in achieving a dynamic balance between approximate fidelity and maintenance overhead.

[0146] To achieve this balance, the framework periodically switches between two phases: a high-cost, high-quality global refactoring phase and a low-cost, heuristic incremental update phase. This "semi-static" strategy ensures... It can evolve rapidly with minimal overhead for most of the time, while controlling accumulated approximation errors through periodic recalibration. This chapter will elaborate on the various components of the framework, including the algorithmic design of its two core stages, and the verification and remediation mechanisms necessary to ensure the validity of the final solution under real constraints.

[0147] 3.3.1) Global Restructuring Phase

[0148] The goal of the global reconstruction phase is, under specific conditions, to employ high-quality methods with a solid theoretical foundation to reconstruct large-scale and accurate baseline hypergraphs. A new highly sparse working hypergraph is extracted from the data. This stage is the cornerstone of the overall framework's stability because it periodically "resets" the approximation errors accumulated in the incremental update stage, ensuring that the iterative solution process is always anchored within a high-quality solution space.

[0149] The methodology of this embodiment is rooted in a profound concept in combinatorial optimization: by solving the semidefinite programming (SDP) relaxation of the primal problem, a geometric embedding of the discrete structure can be obtained in a continuous vector space. This embedding contains a global quantitative evaluation of the constraint strength of the primal problem. Compared to methods such as random sampling, which may destroy the key conflict structure, SDP-based sparsification can intelligently identify and preserve the most critical constraints in the problem.

[0150] To apply this method to conflict hypergraphs This embodiment first transforms the cluster into a simple graph equivalent to the independent set definition using the standard cliqueexpansion operation. This operation will Each hyperedge in the graph is replaced with a cluster of its internal vertices, allowing us to directly apply the SDP algorithm designed for graph models. Subsequently, we... Construct and solve a vector coloring SDP relaxation problem.

[0151] Definition 6 (vector) -Coloring(Vector -Coloring): A picture vector - Coloring is done for each vertex Assign one 1D unit vector (in ), such that for any edge All satisfy the following constraints: picture vector chromatic number This refers to the existence of a smallest real number that has such a coloring. .

[0152] Vector chromatic number and graph independence number There is a profound theoretical connection between them, a connection established by Lovász's pioneering work.

[0153] Theorem 2 (Lovász Sandwich Theorem): For any graph Its independent number Lovász -function value and its vector chromatic number satisfy:

[0154] This theorem bridges the theoretical gap between the Maximum Independent Set (MIS) problem and solving its SDP relaxation. More importantly, it obtains the vector set by solving the vector coloring SDP. The geometric configuration of the graph is itself a precise encoding of the conflict structure. In order to satisfy all edge constraints, the SDP solver forces the vectors corresponding to conflicting vertices to be "pushed apart" in geometric space through a global optimization process. Therefore, the inner product value between vectors in the final solution becomes a continuous global index for measuring the "conflict intensity" between vertices: the closer the inner product is to -1, the more "critical" or "rigid" the conflict is in the entire constraint network.

[0155] See Figure 6 This embodiment utilizes this valuable information extracted from SDP relaxation to guide the sparsification process, as shown in Algorithm 3. Its key is to... Each hyperedge in Calculate the Intra-hyperedge Constraint Coherency Score, denoted as... The score is defined as the minimum conflict strength between all pairs of vertices inside the hyperedge, designed to measure the "rigidity" of the hyperedge as a collective constraint. A high score indicates a high degree of rigidity. This means that all vertex pairs constituting the hyperedge exhibit strong repulsion in the vector embedding, indicating that This represents a requirement that must be met in a sparse working hypergraph. The "hard constraints" are retained in the middle. Conversely, low scores indicate that the hyperedge has a "weak link" and can be preferentially pruned when constructing the approximate graph. Through this principled pruning, we ensure that... Despite being smaller in scale, it retains the maximum amount of The most important conflict structure in it.

[0156] 3.3.1.1) Computational complexity considerations

[0157] Global reconstruction is the most computationally expensive stage in the DHSS framework, and its cost mainly stems from solving the expanded cluster graph. The SDP relaxation is performed. Although costly, this step can theoretically be solved in polynomial time. Classical results of combinatorial optimization show that the vector coloring problem can be solved using the "ellipsoid method" with respect to the number of vertices. and accuracy The solution time is polynomial. In the DHSS framework, the goal of solving the SDP is not to obtain a numerically accurate solution, but rather to derive a global geometric embedding that effectively measures the intensity of conflicts between vertices to guide sparsification. Therefore, in practice, more efficient modern interior-point methods can be used, or approximation algorithms such as first-order methods can be used for ultra-large-scale instances to balance computational efficiency and sparsification quality. This design, which treats high-cost, high-quality global analysis as a periodic "calibration" step, is key to the DHSS framework's high performance and scalability.

[0158] 3.3.1.2) Reconstruction Triggering Conditions

[0159] Given the computational cost of global reconstruction, its invocation must be controlled by a prudent strategy. We designed the following composite triggering condition:

[0160] a) Scale growth: when Number of vertices in Since the last restructuring, the growth has exceeded the preset percentage threshold. Triggered when (e.g., 25%).

[0161] b) Performance stagnation: If the algorithm finds a valid independent set The size, in a continuous Triggered when no significant improvement is achieved in the next iteration.

[0162] 3.3.2) Incremental Update Phase

[0163] Between the two global reconstructions, this embodiment employs a low-overhead heuristic method to... The dynamic changes in the middle are approximately synchronized with The design philosophy at this stage is speed-first: its goal is to allow... It can respond quickly to the introduction of new configuration vertices and their core conflicts with minimal computational overhead, thus providing timely guidance for the next round of MIS solving. Since the robustness of the framework is guaranteed by periodic global reconstruction—a process that systematically corrects accumulated biases—we can tolerate the approximation errors generated at this stage.

[0164] See Figure 7 Specifically, when a new configuration vertex and its associated changed hyperedge set are... Integrated into In this embodiment, a local constraint relaxation strategy is adopted to update... As shown in Algorithm 4. For Each hyperedge in We do not copy it directly. Instead of focusing on the middle part, it decomposes its higher-order overall constraints. Through... Internally, we perform a local cluster unrolling, which we approximate as a set of pairwise conflicting relations, i.e., standard edges (2-uniform hyperedges), and incrementally add these edges to the cluster. middle.

[0165] The advantage of this method lies in its extremely high efficiency: updating The complexity is only related to the variation of the hyperedge set. Related to the size, and with The total number of existing edges is irrelevant. The cost is a controllable loss of information: it relaxes a strong constraint ("choose at most one from a set of configurations") into multiple weak constraints ("do not choose any two configurations at the same time"). This continuous accumulation of approximation error is the fundamental reason for periodically performing global reconstruction, thus forming the inherent, dynamically balanced logical closed loop of our semi-static framework.

[0166] 3.3.3) Solving for the approximate maximum independent set

[0167] In the working supermap The core engine of the entire iterative framework is the efficient solution of high-quality independent sets. Considering The graph itself is a dynamically evolving approximation and needs to be processed quickly in each iteration. Therefore, using a computationally expensive, exact MIS solver (such as an integer linear programming-based method) is impractical. For this purpose, see [link to relevant documentation]. Figure 8 This implementation presents a flow-aware greedy heuristic algorithm (H-GreedyMIS). The algorithm constructs the final independent set by iteratively selecting the "optimal" vertex and removing its conflict set. The detailed process of the algorithm is shown in Algorithm 5.

[0168] The core of the algorithm lies in its iterative loop (lines 5-8 of Algorithm 5). In each iteration, two main steps are executed: first, through a heuristic function... From the current remaining vertex set Select the optimal vertex The selection of this function is based on a scoring mechanism designed to balance topology costs and scheduling benefits, namely, selecting vertices that minimize the following scores:

[0169]

[0170] in, It is the degree of the vertex in the current induced subgraph; It is set as To ensure its dominant role, it has a high weighting; It is an indicator function, when the vertex The corresponding stream has not yet been The value is 1 when any vertex is covered, and 0 otherwise. Next, the selected vertices... and its neighborhood in the hypergraph from Remove from the middle (Algorithm 5, line 8). The hypergraph neighborhood here... Defined as all with The set of vertices that share at least one superedge. This process is repeated until all vertices have been processed.

[0171] 3.3.4) Solution Verification and Repair Mechanism

[0172] Since the MIS solution is based on an approximate working hypergraph The candidate solutions generated by the above execution. It must be in a precise baseline hypergraph Rigorous verification was performed to ensure the correctness of the entire framework. Since some conflicting hyperedges may have been removed or simplified during the sparsification process, therefore... An independent set on a given set does not guarantee that on a given set, the set will be independent of the set on the given set. The same applies. Therefore, the verification and repair mechanism is an indispensable bridge connecting the approximate solution domain and the exact constraint domain.

[0173] The verification process strictly follows the definition of an independent set in a hypergraph. Given a candidate set... This embodiment checks whether... Each hyperedge in ,condition If both are true, then we can determine whether it is true. An independent set. If all superedges satisfy this condition, then If it passes verification; otherwise, it is considered invalid and a repair procedure is initiated.

[0174] Simply discard when verification fails. This will result in the loss of valuable information, because it is usually already very close to a high-quality feasible solution. For this, see... Figure 9 This embodiment designs a greedy repair strategy, as shown in Algorithm 6. The goal of this program is to... The goal is to remove the minimum number of vertices to eliminate all conflicts. This problem is equivalent to finding a minimum hitting set for the family of sets consisting of all conflicting superedges, a classic NP-hard problem. Therefore, employing an efficient greedy heuristic algorithm is reasonable and necessary.

[0175] The repair algorithm in this embodiment is iterative: in each round, it first identifies the set of all violated conflicting superedges. Then, based on the maximum conflict participation heuristic, a vertex is selected and removed. The vertex is at The vertex that appears most frequently in the hyperedge is removed, which resolves the maximum number of conflicts at once. This process is repeated until no conflicts remain in the solution. Final result. It is guaranteed to be A valid independent set on.

[0176] The collection obtained after verification and repair , is a solution that has been proven feasible under the constraints of the original problem. Although it may be locally optimal due to the greedy nature of the repair process, it provides solid feedback for each iteration of the DHSS framework: it can be used to update the current record of optimal solutions and serves as a key criterion for determining whether all flows have been successfully scheduled, thus deciding whether the algorithm should terminate.

[0177] (4) Advantages and beneficial effects

[0178] This embodiment proposes and elaborates on the DHSS framework, aiming to address the scalability bottleneck faced by the scheduling problem in large-scale time-sensitive networks (TSNs). The core contributions of this embodiment are reflected in two aspects: First, it innovatively formalizes the scheduling problem as a task of solving for the maximum independent set (MIS) on a dynamic conflict hypergraph (HCG), and designs a near-linear time increment construction algorithm based on resource occupancy indexes to support it; Second, it pioneers a semi-static sparsity architecture, which maintains a baseline and a working dual hypergraph (… and By combining periodic global SDP reconstruction with low-overhead local updates, efficient iterative solutions are achieved. Comprehensive experimental evaluations fully demonstrate the significant advantages of the DHSS framework in terms of schedulability and scalability.

[0179] In summary, compared with the prior art, the method of this embodiment has at least the following advantages and beneficial effects:

[0180] 1) High scalability: Through dynamic sparsification and dual-graph mechanism, computational complexity is decoupled from network size, making it suitable for large-scale TSN networks.

[0181] 2) High scheduling success rate: Based on the precise modeling and verification and repair mechanism of the conflict hypergraph, the feasibility of the scheduling scheme is effectively guaranteed.

[0182] 3) High computational efficiency: The incremental construction, approximate solution and local update strategies are adopted to significantly reduce computational overhead.

[0183] 4) Good practicality: It can be directly integrated into existing TSN switches, network controllers or SDN architectures, and has good engineering applicability.

[0184] This application also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the above-described method. This electronic device can be any smart terminal, including tablet computers, in-vehicle computers, etc.

[0185] It is understood that the content of the above method embodiments is applicable to this device embodiment. The specific functions implemented by this device embodiment are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0186] Please see Figure 10 , Figure 10 The hardware structure of an electronic device according to another embodiment is illustrated. The electronic device includes:

[0187] The processor 1001 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application.

[0188] The memory 1002 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 1002 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 1002 and is called and executed by the processor 1001 using the methods described in the embodiments of this application.

[0189] Input / output interface 1003 is used to implement information input and output;

[0190] The communication interface 1004 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.).

[0191] Bus 1005 transmits information between various components of the device (e.g., processor 1001, memory 1002, input / output interface 1003, and communication interface 1004);

[0192] The processor 1001, memory 1002, input / output interface 1003 and communication interface 1004 are connected to each other within the device via bus 1005.

[0193] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method.

[0194] It is understood that the content of the above method embodiments is applicable to this storage medium embodiment. The specific functions implemented in this storage medium embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0195] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0196] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0197] It is understood that the content of the above method embodiments is applicable to the embodiments of this program product. The specific functions implemented in the embodiments of this program product are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments. The executable computer program code or "code" used to perform the various embodiments can be written in high-level programming languages ​​such as C, C++, Python, Smalltalk, Java, JavaScript, Visual Basic, Structured Query Language (e.g., Transact-SQL), Perl, or in various other programming languages.

[0198] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0199] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0200] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0201] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0202] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0203] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0204] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0205] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0206] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0207] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0208] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. A traffic scheduling method in time-sensitive networks, characterized in that, The method includes the following steps: S1: Construct the initial conflict hypergraph HCG, where each vertex represents a flow configuration, which includes a routing path and an initial sending offset, and the hyperedges represent intra-flow conflict constraints and resource contention conflict constraints. S2: Maintaining the baseline hypergraph and working super map The reference hypergraph The working hypergraph accurately stores all flow configurations and their conflict relationships. The reference hypergraph sparse approximation; S3: Based on the aforementioned working hypergraph An approximate algorithm is used to solve for the maximum independent set MIS in order to generate candidate scheduling schemes; S4: Verify and repair the candidate scheduling scheme to ensure its suitability for the benchmark supergraph. The feasibility; S5: Iteratively execute steps S2 to S4 until a feasible scheduling scheme is generated or the termination condition is met; the feasible scheduling scheme refers to a set of flow configurations in which there are no intra-flow conflicts or resource contention conflicts between any two different flow configurations in the set; the termination condition includes finding a scheduling scheme that covers all flows or reaching a preset computation time limit.

2. The method according to claim 1, characterized in that, The steps for constructing a conflict hypergraph (HCG) include: Use resource usage index and flow superedge index Perform incremental construction, wherein the resource consumption index The spatiotemporal resource unit is mapped to the set of vertices that occupy that resource, and the flow hyperedge index... Map each stream to its set of all configured vertices.

3. The method according to claim 1, characterized in that, Maintenance work SuperMap The steps employ a semi-static sparsity strategy, including: The global reconstruction phase is triggered periodically, and the baseline hypergraph is reconstructed using semidefinite programming (SDP). Sparsification is performed to generate the working hypergraph. ;as well as During the non-global reconstruction phase, a local incremental update strategy is used to update the baseline hypergraph. The changes are approximately synchronized to the working hypergraph. .

4. The method according to claim 3, characterized in that, The global reconstruction phase includes: The conflict hypergraph HCG is converted into a simple graph by clique expansion; Solve the vector coloring SDP relaxation of the simple graph to obtain the vector representation of each vertex; Consistency score based on hyperedge internal constraints Filter out superedges, keeping only those with scores higher than the threshold.

5. The method according to claim 3, characterized in that, The local incremental update strategy includes: Add the newly introduced configuration vertices to the working hypergraph. ; The changing hyperedges are approximated as paired conflicting edges and added to the working hypergraph. middle.

6. The method according to claim 3, characterized in that, The conditions for periodic triggering include at least one of the following: The benchmark hypergraph The number of vertices has increased beyond the proportional threshold since the last reconstruction. ; The performance improvement of the scheduling scheme in multiple iterations did not meet the preset standard.

7. The method according to claim 1, characterized in that, The solution for the maximum independent set MIS uses the flow-aware greedy heuristic algorithm H-GreedyMIS, which selects vertices through... A heuristic function selects an optimal vertex; where, The selection of the heuristic function is based on a scoring mechanism aimed at balancing topology costs and scheduling benefits, namely, selecting the vertex that minimizes the following score: in, It is the degree of the vertex in the current induced subgraph; It has a high weight; It is an indicator function, when the vertex The value is 1 if the corresponding flow has not yet been covered by the selected vertex, and 0 otherwise.

8. The method according to claim 1, characterized in that, The verification and remediation steps include: The candidate scheduling scheme is examined in the baseline supergraph. Does it violate any hyperedge constraints? If a violation occurs, a greedy repair strategy is used to iteratively remove conflicting vertices until a valid independent set is obtained.

9. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method according to any one of claims 1 to 8.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 1 to 8.