Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel comprises a plurality of pixel circuits and a light-emitting element, wherein the pixel circuits comprise a first pixel circuit and a second pixel circuit which are arranged along a first direction; the first electrode is electrically connected with the light-emitting element, and the first electrode comprises a first sub-electrode and a second sub-electrode; the first connecting electrode comprises a first sub-connecting electrode and a second sub-connecting electrode; the first sub-connection electrode is electrically connected with the first sub-electrode and the output end of the first pixel circuit, and the second sub-connection electrode is electrically connected with the second sub-electrode and the output end of the second pixel circuit; the first sub-connection electrode is at least partially located on the side, close to the second pixel circuit, of the first pixel circuit, and the second sub-connection electrode is at least partially located on the side, close to the first pixel circuit, of the second pixel circuit. According to the display panel, the overlapping area of part of the first connecting electrode and other metal layers in the pixel circuit is reduced, the stray capacitance on the pixel circuit is reduced, and the display performance of the display panel is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] Micro LED or Mini LED display panel is provided with pixel units arranged periodically, each pixel unit usually includes two or more LED light emitting elements, and pixel circuits corresponding to the LED light emitting elements are electrically connected, and the pixel circuits are used to drive the LED light emitting elements electrically connected to emit light.

[0003] In the prior art, the output end of the pixel circuit in the same pixel unit on the layout is located on the same side of the pixel circuit, which causes the output end of a pixel circuit to be far away from the anode end of the LED light emitting element, so that an extension line and a connection metal layer are needed to be set, the extension line is used to extend the output end of the pixel circuit, and the connection metal layer is used to connect the extension line and the anode of the LED light emitting element. However, the extension of the extension line will increase the parasitic capacitance on the pixel circuit, thereby affecting the transmission of the signal; the connection metal layer is arranged in the same layer as the first power electrode, and the lengthening of the connection metal layer will damage the integrity of the first power electrode, thereby affecting the transmission of the first power signal. Therefore, the setting of the pixel circuit in the prior art will affect the display effect of the display panel. SUMMARY

[0004] In view of the problems in the prior art, the purpose of the present application is to provide a display panel and a display device to improve the display effect of the display panel.

[0005] In a first aspect, the embodiments of the present application provide a display panel, a plurality of pixel circuits and light emitting elements, the pixel circuits include a first pixel circuit and a second pixel circuit, the first pixel circuit and the second pixel circuit are arranged along a first direction; the display panel further includes:

[0006] a first electrode, the first electrode is electrically connected with the light emitting element, the first electrode includes a first sub-electrode and a second sub-electrode;

[0007] a first connection electrode, the first connection electrode includes a first sub-connection electrode and a second sub-connection electrode;

[0008] the first sub-connection electrode is electrically connected with the first sub-electrode and the output end of the first pixel circuit, and the second sub-connection electrode is electrically connected with the second sub-electrode and the output end of the second pixel circuit;

[0009] The first sub-connection electrode is at least partially located at a side of the first pixel circuit close to the second pixel circuit, and the second sub-connection electrode is at least partially located at a side of the second pixel circuit close to the first pixel circuit.

[0010] In a second aspect, the embodiments of the present application provide a display device, comprising the display panel of the first aspect.

[0011] The display panel and the display device provided by the present application have the following advantages.

[0012] The present application shortens the distance between one of the pixel circuits and the corresponding sub-electrode in the first direction by setting the first sub-connection electrode at a side of the first pixel circuit close to the second pixel circuit and setting the second sub-connection electrode at a side of the second pixel circuit close to the first pixel circuit, thereby reducing the overlapping area of the first connection electrode and other metal layers in the pixel circuit, reducing the parasitic capacitance on the pixel circuit, improving the stability of signal transmission when the pixel circuit works, and improving the display performance of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0013] Other characteristics, objects and advantages of the present application will become more apparent from the following detailed description of non-restrictive embodiments with reference to the attached drawings.

[0014] Figure 1 is a partial layout structure schematic diagram of a display panel of the prior art;

[0015] Figure 2 is Figure 1 is an enlarged schematic diagram of the area shown by the small square in

[0016] Figure 3 is Figure 2 is a partial layout structure schematic diagram of the metal layer where the second connection electrode and the first power electrode in

[0017] Figure 4 is a partial layout structure schematic diagram of a display panel provided by an embodiment of the present application;

[0018] Figure 5 is Figure 4 is a layout structure schematic diagram of the metal layer where the first electrode, the metal layer where the first connection electrode, and the metal layer where the second connection electrode in

[0019] Figure 6 is Figure 4 is a partial layout structure schematic diagram of the metal layer where the first connection electrode and the metal layer where the pixel circuit in

[0020] Figure 7 is Figure 4A partial layout diagram of the metal layer where the first connecting electrode is located and the metal layer where the second connecting electrode is located.

[0021] Figure 8 yes Figure 4 A schematic diagram of the layout structure of the metal layer where the second connecting electrode is located;

[0022] Figure 9 This is a schematic diagram of the layout structure of the metal layer where the first electrode is located and the metal layer where the second connecting electrode is located, according to another embodiment of this application.

[0023] Figure 10 yes Figure 8 The diagram shows the layout structure of the metal layer where the second connecting electrode is located.

[0024] Figure 11 yes Figure 8 The diagram shows the layout structure of the metal layer where the first connecting electrode is located and the metal layer where the second connecting electrode is located.

[0025] Figure 12 yes Figure 8 The diagram shows a partial layout of the metal layer where the second connecting electrode is located.

[0026] Figure 13 This is a circuit diagram of the pixel circuit provided by related technologies;

[0027] Figure 14 This is a partial cross-sectional structural diagram of the pixel circuit provided by related technologies;

[0028] Figure 15 This is a partial layout schematic diagram of a display panel provided in another embodiment of this application;

[0029] Figure 16 This is a schematic diagram of a display device provided in an embodiment of this application;

[0030] Figure 17 This is a schematic diagram of a display device provided in another embodiment of this application. Detailed Implementation

[0031] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that the invention will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore repeated descriptions of them will be omitted. The words “or” and “or” in the specification may mean “and” or “or”.

[0032] In the description of the present application, the expressions of "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like mean that the specific features, structures, materials or characteristics represented in connection with the embodiment or example are included in at least one embodiment or example of the present application. Moreover, the specific features, structures, materials or characteristics represented can be combined in any appropriate manner in any one or more embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples represented in the present application and the features of the different embodiments or examples without contradiction.

[0033] As shown in Figures 1 to 3 , the display panel includes a plurality of pixel circuits 10' and light emitting elements 20', one light emitting element 20' corresponding to one pixel circuit 10' electrically connected. The pixel circuit 10' includes pixel circuits 10a', pixel circuits 10b' and pixel circuits 10c' arranged along the first direction X, and the output ends of the pixel circuits 10a' to the pixel circuits 10c' are located on the right side of the pixel circuit where they are located.

[0034] Further, the display panel further includes a first electrode 30', a first connecting electrode 40' and a second connecting electrode, the first connecting electrode 40' is used to extend the output end of the pixel circuit, the second connecting electrode is electrically connected with the corresponding first connecting electrode 40' and the first electrode 30' respectively, so that the first electrode 30' is electrically connected with the corresponding pixel circuit 10'; wherein the first electrode 30', the first connecting electrode 40' and the second connecting electrode are located on different three layers of metal.

[0035] Specifically, please continue to refer to Figures 1 to 3 , the first electrode 30' includes electrodes 30a', 30b' and 30c', the first connecting electrode 40' includes first connecting electrodes 40a', 40b' and 40c', and the second connecting electrode includes second connecting electrodes 50a', 50b' and 50c'. The second connecting electrode 50a' connects the pixel circuit 10a' and the first electrode 30a', the second connecting electrode 50b' connects the pixel circuit 10b' and the first electrode 30b', and the second connecting electrode 50c' connects the pixel circuit 10c' and the first electrode 30c'.

[0036] Further, as shown in Figure 2 , compared with the first connecting electrode 40a' and the first connecting electrode 40b', the length of the first connecting electrode 40c' in the transverse direction of the paper (the length of the transverse dotted line frame) is the longest; as shown in Figure 3As shown, the length of the second connection electrode 50c' in the transverse direction of the paper is the longest compared with the second connection electrodes 50a' and 50b'. If the length of the first connection electrode 40c' in the transverse direction of the paper is too long, the overlapping area between the first connection electrode 40c' and other metal layers in the pixel circuit 10' will be increased, and the parasitic capacitance in the pixel circuit will be increased, which will further affect the signal transmission stability in the working process of the pixel circuit and affect the display effect of the display panel.

[0037] Further, the increase of the length of the second connection electrode 50c' will destroy the integrity of the remaining area of the metal layer where the second connection electrode 50c' is located. As shown, Figure 3 As shown, the second connection electrode and the first power electrode 53' are insulated and arranged on the same metal layer, and the area occupied by the second connection electrode is large, and accordingly the area occupied by the first power electrode 53' is small. The first power electrode 53' is used to transmit the first power signal (positive power voltage signal) in the pixel circuit, and when the area occupied by the first power electrode 53' is small, the stability of the first power signal transmission will be affected, and the display effect of the display panel will be affected.

[0038] To solve the problems in the prior art, an embodiment of the present application provides a display panel, comprising a plurality of pixel circuits and a light emitting element, the pixel circuits comprising a first pixel circuit and a second pixel circuit, the first pixel circuit and the second pixel circuit being arranged along a first direction; the display panel further comprising:

[0039] a first electrode, the first electrode being electrically connected with the light emitting element, the first electrode comprising a first sub-electrode and a second sub-electrode;

[0040] a first connection electrode, the first connection electrode comprising a first sub-connection electrode and a second sub-connection electrode;

[0041] the first sub-connection electrode being electrically connected with the first sub-electrode and an output terminal of the first pixel circuit, and the second sub-connection electrode being electrically connected with the second sub-electrode and an output terminal of the second pixel circuit;

[0042] the first sub-connection electrode being at least partially located on a side of the first pixel circuit close to the second pixel circuit, and the second sub-connection electrode being at least partially located on a side of the second pixel circuit close to the first pixel circuit.

[0043] The application shortens the distance between one of the pixel circuits and the corresponding sub-electrode in the first direction by setting the first sub-connection electrode on the side of the first pixel circuit close to the second pixel circuit and setting the second sub-connection electrode on the side of the second pixel circuit close to the first pixel circuit, thereby reducing the overlapping area of the first connection electrode and other metal layers in the pixel circuit, reducing the parasitic capacitance on the pixel circuit, improving the stability of signal transmission when the pixel circuit works, and improving the display performance of the display panel.

[0044] The above is the core idea of the application. The technical solutions in the embodiments of the application will be described clearly and completely in combination with the drawings in the embodiments of the application. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the application.

[0045] As shown in the drawings, Figures 4 to 9 An embodiment of the application provides a display panel, which comprises a plurality of pixel circuits 10 and light emitting elements 20, the pixel circuits 10 comprise a first pixel circuit 11 and a second pixel circuit 12, and the first pixel circuit 11 and the second pixel circuit 12 are arranged along a first direction X. In the embodiment, the first direction X is the left-right direction as viewed along the paper. It should be noted that the arrangement of the first pixel circuit 11 and the second pixel circuit 12 is not limited to the example in Figure 4 , but can also be other arrangement forms, which are not limited here.

[0046] The display panel further comprises a first electrode 30 and a first connection electrode 40. Specifically, the first electrode 30 is electrically connected with the light emitting element 20, the first electrode 30 comprises a first sub-electrode 31 and a second sub-electrode 32; the first connection electrode 40 comprises a first sub-connection electrode 41 and a second sub-connection electrode 42; the first sub-connection electrode 41 is electrically connected with the first sub-electrode 31 and an output end of the first pixel circuit 11, and the second sub-connection electrode 42 is electrically connected with the second sub-electrode 32 and an output end of the second pixel circuit 12; the first sub-connection electrode 41 is at least partially located on the side of the first pixel circuit 11 close to the second pixel circuit 12, and the second sub-connection electrode 42 is at least partially located on the side of the second pixel circuit 12 close to the first pixel circuit 11.

[0047] By setting the first sub-connection electrode 41 on the side of the first pixel circuit 11 close to the second pixel circuit 12, and setting the second sub-connection electrode 42 on the side of the second pixel circuit 12 close to the first pixel circuit, compared with the pixel circuit arrangement in the prior art, the distance between one of the pixel circuits and the corresponding sub-electrode in the first direction X is shortened, and the length of the first connection electrode extending to the corresponding sub-electrode in the first direction X is reduced, further reducing the overlapping area of the first connection electrode and other metal layers in the pixel circuit, reducing the parasitic capacitance on the pixel circuit, improving the stability of signal transmission when the pixel circuit is working, and improving the display performance of the display panel.

[0048] Further, please refer to Figure 5 and 6 In the embodiment, the output end of the first pixel circuit 11 is located on the side of the first pixel circuit 11 close to the second pixel circuit 12, and the output end of the second pixel circuit 12 is located on the side of the second pixel circuit 12 close to the first pixel circuit 11. By setting the output end of the first pixel circuit 11 on the side of the first pixel circuit 11 close to the second pixel circuit 12, the part of the structure of the first sub-connection electrode 41 is located on the side of the first pixel circuit 11 close to the second pixel circuit 12; by setting the output end of the second pixel circuit 12 on the side of the second pixel circuit 12 close to the first pixel circuit 11, the part of the structure of the second sub-connection electrode 42 is located on the side of the second pixel circuit 12 close to the first pixel circuit 11.

[0049] Further, in some preferred embodiments, at least part of the structure of the first pixel circuit 11 and at least part of the structure of the second pixel circuit 12 are symmetrically arranged. As shown in Figures 4 to 7 The output end of the first pixel circuit 11 and the output end of the second pixel circuit 12 are mirror-symmetric, and the output end of the first pixel circuit 11 is located on the side of the first pixel circuit 11 close to the second pixel circuit 12, and the output end of the second pixel circuit 12 is located on the side of the second pixel circuit 12 close to the first pixel circuit 11. The output end of the first pixel circuit 11 and the output end of the second pixel circuit 12 are arranged to be mirror-symmetric, which is simple and less prone to errors when the layout is changed. Alternatively, the first pixel circuit 11 and the second pixel circuit 12 can be arranged as a whole mirror-symmetric, which can further simplify the layout change and is less prone to errors.

[0050] Further, please refer to Figure 6 and 7, the first sub-connection electrode 41 comprises a first part 411 extending along the first direction X and a second part 412 extending along the second direction Y, the second sub-connection electrode 42 comprises a third part 421 extending along the first direction X and a fourth part 422 extending along the second direction Y, the first direction X and the second direction Y intersect and are both parallel to the plane on which the display panel is located. Further, referring to Figures 5 to 7 , the second part 412 is electrically connected with the output end of the first pixel circuit 11, the first part 411 is electrically connected with the first sub-electrode 31, the fourth part 422 is electrically connected with the output end of the second pixel circuit 12, and the third part 421 is electrically connected with the second sub-electrode 32. In the embodiment, the second direction Y is the up-down direction as viewed along the paper.

[0051] By setting the first sub-connection electrode 41 as the first part 411 extending along the first direction X and the second part 412 extending along the second direction Y, the first pixel circuit 11 is electrically connected with the first sub-electrode 31; by setting the second sub-connection electrode 42 as the third part 421 extending along the first direction X and the fourth part 422 extending along the second direction Y, the second pixel circuit 12 is electrically connected with the second sub-electrode 32.

[0052] Further, specifically, the first part 411 comprises a first end 411a and a second end 411b, the first end 411a is electrically connected with the second part 412, and the second end 411b is located on the side of the first end 411a away from the second sub-connection electrode 42; the third part 421 comprises a third end 421a and a fourth end 421b, the third end 421a is electrically connected with the fourth part 422, and the fourth end 421b is located on the side of the third end 421a away from the first sub-connection electrode 41. Since the output ends of the pixel circuits in the embodiment are mirror-symmetrically arranged, the first part 411 and the third part 421 are mirror-symmetrically arranged, and the second part 412 and the fourth part 422 are mirror-symmetrically arranged, which can reduce the overlapping area of the first sub-connection electrode 40 and other metal layers in the pixel circuit, reduce the parasitic capacitance on the pixel circuit, and improve the display performance of the display panel.

[0053] Further, as Figure 4 , Figure 5 , Figure 7 and Figure 8As shown, the display panel further comprises a second connection electrode, the second connection electrode comprises a third sub-connection electrode 51 and a fourth sub-connection electrode 52, the third sub-connection electrode 51 is electrically connected with the first sub-connection electrode 41 and the first sub-electrode 31 respectively, and the fourth sub-connection electrode 52 is electrically connected with the second sub-connection electrode 42 and the second sub-electrode 32 respectively. The second connection electrode is used to connect the first electrode 30 and the first connection electrode 40, so that the first electrode 30 and the output end of the corresponding pixel circuit can be smoothly electrically connected; and the setting of the second connection electrode can avoid the direct via connection of the first electrode 30 and the pixel circuit, and avoid the excessively deep via depth required between the first electrode 30 and the pixel circuit, thereby increasing the difficulty of hole etching.

[0054] Further, as shown in Figure 4 、 Figure 5 、 Figure 7 and Figure 8 , along the first direction X, the third sub-connection electrode 51 is located on the side of the first pixel circuit 11 close to the second pixel circuit 12, and the fourth sub-connection electrode 52 is located on the side of the second pixel circuit 12 close to the first pixel circuit 11. By setting the positions of the third sub-connection electrode 51 and the fourth sub-connection electrode 52, the first sub-connection electrode 41 is electrically connected with the third sub-connection electrode 51 along the first direction X and has a short extension length, and the second sub-connection electrode 42 is electrically connected with the fourth sub-connection electrode 52 along the first direction X and has a short extension length, thereby improving the overlapping area of the first sub-connection electrode 41 and the second sub-connection electrode 42 with other layers in the pixel circuit, and reducing the parasitic capacitance on the pixel circuit.

[0055] Further, as shown in Figures 9 to 12 , the length of the third sub-connection electrode 51 along the first direction X is less than the length thereof along the second direction Y, and the length of the fourth sub-connection electrode 52 along the first direction X is less than the length thereof along the second direction Y, the first direction X and the second direction Y intersect and are both parallel to the plane on which the display panel is located. In this embodiment, the third sub-connection electrode 51 and the fourth sub-connection electrode 52 are arranged to extend along the longitudinal direction, which reduces the opening of the third sub-connection electrode 51 and the fourth sub-connection electrode 52 in the transverse direction, reduces the design length of the first connection electrode 40 in the transverse direction, and improves the display performance.

[0056] Further, as shown in Figure 4 、 Figure 5 、 Figures 7 to 12As shown, the display panel also includes a first power electrode 53, which is on the same layer as and insulated from the third sub-connection electrode 51 and the fourth sub-connection electrode 52. The first power electrode 53 is used to provide a positive power supply voltage signal to the pixel circuit 10. In this embodiment, the first power electrode 53 is a large-area metal. It should be noted that the positive power supply voltage signal is usually provided to the first power electrode 53 from the lower edge of the display panel. When the third sub-connection electrode 51 and the fourth sub-connection electrode 52 are configured to extend in the longitudinal direction, the current flowing into the first power electrode 53 is equivalent to being parallel to the extension direction of the third sub-electrode 51 and the fourth sub-electrode 52, which does not increase the path length of the current flow. This allows the planar sheet resistance of the large-area first power electrode 53 to be as small as possible.

[0057] like Figure 13 As shown, in some embodiments, the pixel circuit 10 includes a PWM (Pulse Width Modulation) control circuit and a PAM (Pulse Amplitude Modulation) control circuit to optimize the luminous efficiency and viewing angle performance of the driven light-emitting element 20. The PWM control circuit includes six thin-film transistors (M1-M6) and a capacitor (Cst_1), receiving data signals PWM_DATA, scan signals PWM_Scan1, PWM_Scan2, and PWM_Emit, an initialization signal PWM_Vref, a fixed voltage signal VH, and a sweep frequency signal SWEEP, used to control the LED's light-emitting duration. The PAM control circuit includes seven thin-film transistors (T1-T7) and a capacitor (Cst_2), receiving data signals PAM_DATA, scan signals PAM_Scan1, PAM_Scan2, and PAM_Emit, initialization signals PAM_Vref and PAM_INIT, a positive power supply voltage signal PAM_VDD, and a negative power supply voltage signal VEE, used to control the LED's luminous intensity. The connection method and input signals of each thin-film transistor in the pixel circuit are as follows: Figure 13 As shown, no further details will be provided.

[0058] It should be noted that, Figure 13 The pixel circuit shown is just one type of pixel circuit in a light-emitting diode (LED) display panel. In practical applications, the implementation method of the pixel circuit can be selected based on requirements and is not limited to this. Figure 13 The circuit structure shown is shown.

[0059] Furthermore, such as Figure 13 As shown, the pixel circuit 10 includes multiple transistors and capacitors; correspondingly, combined with Figures 4 to 14In the layout design of the pixel circuit, the pixel circuit arranged on the substrate sub includes an active layer q, a first metal layer Me1, a second metal layer Me2, a third metal layer Me3 and a fourth metal layer Me4 arranged in sequence. The active layer q is a semiconductor layer of a transistor (for example Figure 13 , a transistor in the pixel circuit), the first metal layer Me1 can form a gate of the transistor and a signal line extending along a first direction X, the second metal layer Me2 can form a source or a drain of the transistor and a signal line extending along a second direction Y, the third metal layer Me3 can form a second connection electrode and a first power electrode 53, and the fourth metal layer Me4 can form a first electrode 30.

[0060] Further, in combination with Figure 12 , it can be obtained that the first power electrode 53 is used to provide a positive power voltage signal PAM_VDD to the pixel circuit; the third sub-connection electrode 51, the fourth sub-connection electrode 52 and the first power electrode 53 are formed in the third metal layer Me3 as shown in Figure 7 , Figure 8 and Figure 12 . When the first power electrode 53 is a large area on the third metal layer Me3, the voltage drop of the positive power voltage signal PAM_VDD transmitted by the first power electrode 53 can be reduced, thereby improving the display uniformity of the panel.

[0061] Further, in the embodiment, as shown in Figure 5 and Figure 9 , the display panel further includes a second electrode 33 which is arranged in the same layer and insulated from the first electrode 30. In combination with Figure 13 and Figure 14 , the second electrode 33 is located on the fourth metal layer Me4 together with the first sub-electrode 31 and the second sub-electrode 32, and the second electrode 33 is used to provide a negative power voltage signal VEE to the pixel circuit. When the second electrode 33 is a large area, the voltage drop of the negative power voltage signal VEE transmitted by the second electrode 33 can be reduced, thereby improving the display uniformity of the panel.

[0062] Further, along the thickness direction of the display panel, the first power electrode 53 overlaps with the first pixel circuit 11 and the second pixel circuit 12. Specifically, as shown in Figure 4 , the first power electrode 53 overlaps with the first pixel circuit 11 and the second pixel circuit 12, and when the first power electrode 53 is electrically connected to the first pixel circuit 11 and the second pixel circuit 12 through a via, the first power electrode 53 can provide a positive power voltage signal (PAM_VDD) to the first pixel circuit 11 and the second pixel circuit 12.

[0063] It should be noted that the number of pixel circuits is not limited to the number of pixel circuits shown in the above embodiments. For example, as shown in Figure 15As shown, in another embodiment, the display panel includes two pixel units arranged along the second direction Y, the pixel unit includes the first pixel circuit 11, the second pixel circuit 12 and the third pixel circuit 13, the first power electrode 53 overlaps with the two first pixel circuits 11, the two second pixel circuits 12 and the two third pixel circuits 13, and the first power electrode 53 is electrically connected with the two first pixel circuits 11, the two second pixel circuits 12 and the two third pixel circuits 13 to provide the positive power voltage signal PAM_DD to the two first pixel circuits 11, the two second pixel circuits 12 and the two third pixel circuits 13 respectively.

[0064] Further, referring to Figures 4 to 12 , the first sub-connection electrode 41, the third sub-connection electrode 51 and the first sub-electrode 31 are located in different layers.

[0065] The second sub-connection electrode 42, the fourth sub-connection electrode 52 and the second sub-electrode 32 are located in different layers.

[0066] Specifically, the first sub-connection electrode 41 and the second sub-connection electrode 42 are located in the second metal layer Me2, the third sub-connection electrode 51 and the fourth sub-connection electrode 52 are located in the third metal layer Me3, and the first sub-electrode 31 and the second sub-electrode 32 are located in the fourth metal layer Me4.

[0067] The display device provided by the embodiment of the present application also includes the display panel as described above, and thus can achieve all the technical effects of the display panel as described above, which will not be repeated here. As Figure 16 shown, the display device 1000 includes the display panel as described above, and specifically, the display device 1000 can be a mobile phone, a wireless device, a personal data assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a video camera, a game console, a watch, a clock, a calculator, a television monitor, a flat panel display, a computer monitor, an automobile display, an electronic photo, a projector, a package and an aesthetic structure, etc. Further, as Figure 17 shown, the display device 1000 can also be a spliced screen spliced by the display panel as described above, and specifically, for example, the display device 1000 can be an electronic billboard, a signboard, a building structure, etc.

[0068] In summary, the display panel and the display device provided by the present application have the following advantages:

[0069] The application shortens the distance between one of the pixel circuits and the corresponding sub-electrode in the first direction by setting the first sub-connection electrode on the side of the first pixel circuit close to the second pixel circuit and setting the second sub-connection electrode on the side of the second pixel circuit close to the first pixel circuit, thereby reducing the overlapping area of the first connection electrode and other metal layers in the pixel circuit, reducing the parasitic capacitance on the pixel circuit, improving the stability of signal transmission when the pixel circuit works, and improving the display performance of the display panel.

[0070] The above is a further detailed description of the application in combination with specific preferred embodiments, and the specific implementation of the application should not be limited to these descriptions. For ordinary skilled persons in the technical field of the application, some simple deductions or replacements can be made without departing from the concept of the application, and all of them should be considered as falling within the protection scope of the application.

Claims

1. A display panel, characterized by, A plurality of pixel circuits and light emitting elements, the pixel circuits comprising a first pixel circuit and a second pixel circuit, the first pixel circuit and the second pixel circuit being arranged along a first direction; The display panel further comprises: A first electrode, the first electrode being electrically connected with the light emitting element, the first electrode comprising a first sub-electrode and a second sub-electrode; A first connecting electrode, the first connecting electrode comprising a first sub-connecting electrode and a second sub-connecting electrode; The first sub-connecting electrode is electrically connected with the first sub-electrode and an output terminal of the first pixel circuit, and the second sub-connecting electrode is electrically connected with the second sub-electrode and an output terminal of the second pixel circuit; The first sub-connecting electrode is at least partially located on a side of the first pixel circuit close to the second pixel circuit, and the second sub-connecting electrode is at least partially located on a side of the second pixel circuit close to the first pixel circuit.

2. The display panel of claim 1, wherein, The output terminal of the first pixel circuit is located on a side of the first pixel circuit close to the second pixel circuit, and the output terminal of the second pixel circuit is located on a side of the second pixel circuit close to the first pixel circuit.

3. The display panel of claim 2, wherein, At least part of the structure of the first pixel circuit is symmetrically arranged with at least part of the structure of the second pixel circuit.

4. The display panel of claim 1, wherein, The first sub-connecting electrode comprises a first part extending along the first direction and a second part extending along a second direction, and the second sub-connecting electrode comprises a third part extending along the first direction and a fourth part extending along the second direction, the first direction and the second direction intersecting and both being parallel to the plane on which the display panel is located; The second part is electrically connected with the output terminal of the first pixel circuit, the first part is electrically connected with the first sub-electrode, the fourth part is electrically connected with the output terminal of the second pixel circuit, and the third part is electrically connected with the second sub-electrode.

5. The display panel of claim 4, wherein, The first part comprises a first end and a second end, the first end is electrically connected with the second part, and the second end is located on a side of the first end away from the second sub-connecting electrode; the third part comprises a third end and a fourth end, the third end is electrically connected with the fourth part, and the fourth end is located on a side of the third end away from the first sub-connecting electrode.

6. The display panel of claim 1, wherein, The second connecting electrode comprises a third sub-connecting electrode and a fourth sub-connecting electrode, the third sub-connecting electrode is electrically connected with the first sub-connecting electrode and the first sub-electrode respectively, and the fourth sub-connecting electrode is electrically connected with the second sub-connecting electrode and the second sub-electrode respectively.

7. The display panel of claim 6, wherein, Along the first direction, the third sub-connecting electrode is located on a side of the first pixel circuit close to the second pixel circuit, and the fourth sub-connecting electrode is located on a side of the second pixel circuit close to the first pixel circuit.

8. The display panel of claim 6, wherein, The length of the third sub-connecting electrode along the first direction is less than its length along a second direction, and the length of the fourth sub-connecting electrode along the first direction is less than its length along the second direction, the first direction and the second direction intersecting and both being parallel to the plane on which the display panel is located.

9. The display panel of claim 8, wherein, The display panel further comprises a first power supply electrode, which is arranged in the same layer and insulated from the third sub-connection electrode and the fourth sub-connection electrode.

10. The display panel of claim 9, wherein, The first power supply electrode overlaps the first pixel circuit and the second pixel circuit in the thickness direction of the display panel.

11. The display panel of claim 6, wherein, The first sub-connection electrode, the third sub-connection electrode, and the first sub-electrode are located in different layers. The second sub-connection electrode, the fourth sub-connection electrode, and the second sub-electrode are located in different layers.

12. A display device comprising: The display panel as claimed in any one of claims 1 to 11.

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