Circuit board manufacturing method and circuit board

Abstract

This invention discloses a method for manufacturing a circuit board and the circuit board itself. The method includes the following steps performed sequentially: taking a core board with an inner patterned circuit layer on its surface; installing a chip: machining a recessed groove at a predetermined position on the core board and inserting the chip into the recessed groove; laminating: laminating and fixing a layer board onto the surface of the core board to drive the chip to be hidden inside the layer board; conducting: setting patterned circuits and connecting holes on the surface of the layer board, with the connecting holes corresponding to the chip, and the hole walls of the connecting holes being able to be copper-clad to drive the patterned circuits to connect with the chip, thereby forming a multilayer board; taking a copper block with a thickness matching the thickness of the multilayer board; installing the copper block: embedding and installing the copper block into the multilayer board; surface circuit processing: machining an outer patterned circuit layer on the surface of the multilayer board. This method can achieve efficient circuit connection, shorten the signal transmission path, reduce delay and reflection loss, and solve the problem of copper block lamination, thereby improving quality and efficiency.

Description

Technical Field

[0001] This invention relates to the field of circuit board manufacturing technology, and in particular to a method for manufacturing circuit boards, and a circuit board manufactured using the method. Background Technology

[0002] With the rapid development of emerging industries such as 5G communication, artificial intelligence, the Internet of Things, and new energy vehicles, electronic devices are evolving towards higher performance and greater integration, significantly increasing the functional demands on printed circuit boards (PCBs), which serve as the core carriers. Modern PCBs not only need to accommodate a large number of high-density electronic components but also need to meet complex requirements such as high-frequency signal transmission, heat dissipation for high-power devices, and integration of multiple circuit functions. Traditional PCB manufacturing technologies are gradually becoming inadequate for the needs of such high-end applications.

[0003] In existing technologies, press-fit copper block technology is one of the main ways to achieve heat dissipation in printed circuit boards. By pressing copper blocks such as phosphor bronze and beryllium copper into the printed circuit board, the high thermal conductivity of copper is used to quickly conduct heat to the outside of the printed circuit board, avoiding performance degradation or damage caused by overheating.

[0004] However, traditional press-fit copper block technology primarily focuses on heat dissipation, lacking targeted optimization for core indicators such as circuit connection efficiency and signal transmission performance. For example, it cannot shorten the signal transmission path between the chip and surrounding circuits, and it is difficult to reduce the transmission delay and reflection loss of high-frequency signals. In some related technologies, when pressing the copper block into the metallized holes of the printed circuit board, uneven copper layer thickness on the hole wall, fluctuations in electroplating quality, or concentrated pressing stress can easily lead to damage such as cracks and peeling of the copper layer on the hole wall. This can result in poor contact between the copper block and the printed circuit board, such as increased connection resistance and loose pressing, directly affecting the electrical performance and long-term reliability of the product. In other related technologies, to achieve functions other than heat dissipation, such as signal optimization and multi-circuit interconnection, traditional solutions require additional heat dissipation layers, signal transmission layers, or dedicated connection structures, resulting in an increase in the overall thickness of the PCB board, a larger footprint, and a significant increase in manufacturing costs. Summary of the Invention

[0005] This invention aims to solve at least one of the technical problems existing in the prior art. To this end, this invention proposes a circuit board manufacturing method that can achieve efficient circuit connection, shorten signal transmission path, reduce delay and reflection loss, and solve the problem of copper block crimping, thereby improving quality and efficiency.

[0006] The present invention also proposes a circuit board manufactured using the above-described circuit board manufacturing method.

[0007] The circuit board manufacturing method according to the present invention includes the following steps: Core board extraction: Extract the core board with an inner patterned circuit layer on the surface; Chip installation: After the core board is extracted, an embedding groove is machined at a preset position on the core board and the chip is installed in the embedding groove; Lamination and bonding: After the chip is installed, a layer plate is laminated and fixed to the surface of the core board to drive the chip to be hidden inside the layer plate; Conductive processing: Before or after lamination, patterned circuits and vias are provided on the surface of the layer board. The vias are arranged corresponding to the chips. The walls of the vias can be copper-clad and drive the patterned circuits to connect with the chips to form a multilayer board. Take a copper block: Take a copper block with a thickness matching that of the multilayer board. Installing copper blocks: After the conduction process and copper block removal, the copper blocks are embedded and installed in the multilayer board; Surface circuit processing: After installing the copper block, an outer layer of patterned circuitry is processed on the surface of the multilayer board.

[0008] The circuit board manufacturing method of the present invention has at least the following beneficial effects: by processing embedded grooves at preset positions on the core board and installing chips, the chips are embedded inside the circuit board to form a three-dimensional integrated structure, which significantly shortens the signal transmission path between the chips and surrounding circuits, reduces high-frequency signal transmission delay and reflection loss, and improves circuit connection efficiency; furthermore, by laminating and pressing the chips into the layers and combining the graphic circuits and via designs in the subsequent conduction processing, the chips are protected from external damage, and a multi-layer circuit structure is constructed to enhance product functionality; furthermore, after pressing copper blocks of matching thickness onto the multi-layer board, an outer graphic circuit layer is processed on the surface of the multi-layer board to enhance the connection strength between the copper blocks and the multi-layer board, ensuring that the circuit board achieves low impedance and high reliability connection, and ultimately simultaneously achieving multiple technical effects such as heat dissipation, signal optimization, multi-circuit integration and high reliability pressing, significantly improving the overall performance and manufacturing quality of the circuit board.

[0009] According to some embodiments of the present invention, in the circuit board manufacturing method, the layer board in the lamination process is a multi-layer circuit structure, and the layer board is provided with an interlayer patterned circuit layer.

[0010] According to some embodiments of the present invention, the circuit board manufacturing method is a single-layer circuit structure in the lamination process, and a conductivity treatment is performed after lamination; it also includes the following steps: multi-layer lamination: before installing the copper block, lamination and conductivity treatment are performed in several cycles, and in each conductivity treatment before the last one, the patterned circuit can be electroplated with copper to form an interlayer patterned circuit layer.

[0011] According to some embodiments of the circuit board manufacturing method of the present invention, the shortest distance between the copper block and the chip is A, which satisfies: 0.1mm≤A≤1mm.

[0012] According to some embodiments of the present invention, in the circuit board manufacturing method, the multilayer board is provided with a through-type copper embedding groove, the shape of the copper block matches the shape of the copper embedding groove, and in the installation of the copper block, the copper block is pressed into the copper embedding groove.

[0013] According to some embodiments of the present invention, in the circuit board manufacturing method, after the conduction process, the copper embedding groove is processed on the multilayer board, and the groove wall of the copper embedding groove can be coated with copper.

[0014] According to some embodiments of the present invention, in the circuit board manufacturing method, before lamination, the core board is processed with a first embedded copper segment and the layer board is processed with a second embedded copper segment. During lamination, the first embedded copper segment and the second embedded copper segment overlap in position and are combined to form the embedded copper groove.

[0015] The circuit board manufacturing method according to some embodiments of the present invention further includes the following step: edge trimming: before installing the copper block, the periphery of the copper embedding groove is trimmed.

[0016] According to some embodiments of the present invention, the circuit board manufacturing method further includes the following steps: chamfering: before installing the copper block, chamfers are machined on both the upper and lower circumferential edges of the copper block in the thickness direction of the multilayer board.

[0017] The circuit board according to the present invention is manufactured using the circuit board manufacturing method described in the present invention.

[0018] The circuit board according to the present invention has at least the following beneficial effects: the circuit board can achieve efficient circuit connection, shorten the signal transmission path, reduce delay and reflection loss, and solve the problem of copper block crimping, improve quality and efficiency, and its comprehensive performance is significantly better than that of traditional printed circuit boards, which can meet the stringent requirements of emerging industries such as 5G communication, artificial intelligence, and new energy vehicles for high-performance and highly integrated electronic carriers.

[0019] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0020] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a schematic flowchart of a circuit board manufacturing method according to an embodiment of the present invention; Figure 2 This is a schematic cross-sectional view of the circuit board manufacturing method of the present invention, showing the embedded groove being processed in the core board; Figure 3This is a schematic cross-sectional view of the circuit board manufacturing method according to an embodiment of the present invention after lamination. Figure 4 This is a schematic cross-sectional view of the circuit board manufacturing method according to an embodiment of the present invention after the conduction process; Figure 5 This is a schematic cross-sectional view of the circuit board manufacturing method according to an embodiment of the present invention after multilayer lamination; Figure 6 A cross-sectional schematic diagram of a copper embedding groove on a multilayer board, as shown in an embodiment of the present invention, for the circuit board manufacturing method. Figure 7 This is a cross-sectional schematic diagram of the circuit board manufacturing method of the present invention after copper plating in the copper embedding tank; Figure 8 This is a cross-sectional schematic diagram of the circuit board manufacturing method according to an embodiment of the present invention after the copper block is installed; Figure 9 A schematic cross-sectional view of a circuit board manufactured using the circuit board fabrication method of an embodiment of the present invention; Figure 10 This is a schematic flowchart of a circuit board manufacturing method according to another embodiment of the present invention.

[0021] Explanation of icon numbers: Core board 100; Embedded groove 101; First embedded copper section 102; Inner layer pattern circuit layer 110; Chip 200; Layer 300; Through-hole 301; Second embedded copper section 302; Interlayer patterned circuit layer 310; Multilayer board 400; Embedded copper channel 401; Outer pattern circuit layer 410; 500 copper blocks. Detailed Implementation

[0022] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0023] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., are based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0024] In the description of this invention, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0025] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0026] In the description of this invention, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0027] With the rapid development of emerging industries such as 5G communication, artificial intelligence, the Internet of Things, and new energy vehicles, electronic devices are evolving towards higher performance and greater integration, significantly increasing the functional demands on printed circuit boards (PCBs), which serve as the core carriers. Modern PCBs not only need to accommodate a large number of high-density electronic components but also need to meet complex requirements such as high-frequency signal transmission, heat dissipation for high-power devices, and integration of multiple circuit functions. Traditional PCB manufacturing technologies are gradually becoming inadequate for the needs of such high-end applications.

[0028] In existing technologies, press-fit copper block technology is one of the main ways to achieve heat dissipation in printed circuit boards. By pressing copper blocks such as phosphor bronze and beryllium copper into the printed circuit board, the high thermal conductivity of copper is used to quickly conduct heat to the outside of the printed circuit board, avoiding performance degradation or damage caused by overheating.

[0029] However, traditional press-fit copper block technology primarily focuses on heat dissipation, lacking targeted optimization for core indicators such as circuit connection efficiency and signal transmission performance. For example, it cannot shorten the signal transmission path between the chip and surrounding circuits, and it is difficult to reduce the transmission delay and reflection loss of high-frequency signals. In some related technologies, when pressing the copper block into the metallized holes of the printed circuit board, uneven copper layer thickness on the hole wall, fluctuations in electroplating quality, or concentrated pressing stress can easily lead to damage such as cracks and peeling of the copper layer on the hole wall. This can result in poor contact between the copper block and the printed circuit board, such as increased connection resistance and loose pressing, directly affecting the electrical performance and long-term reliability of the product. In other related technologies, to achieve functions other than heat dissipation, such as signal optimization and multi-circuit interconnection, traditional solutions require additional heat dissipation layers, signal transmission layers, or dedicated connection structures, resulting in an increase in the overall thickness of the PCB board, a larger footprint, and a significant increase in manufacturing costs.

[0030] Therefore, such as Figures 1 to 9 The diagram shows a circuit board manufacturing method proposed in this invention, which includes the following steps: S100, Core board: Take the core board 100 with the inner pattern circuit layer 110 on the surface; S200, Installing the chip: After the core board is removed, a embedding groove 101 is machined at a preset position on the core board 100 and the chip 200 is installed in the embedding groove 101. S300, Lamination and lamination: After the chip is installed, the core board 100 is laminated and fixed with the laminate 300 to drive the chip 200 to be hidden inside the laminate 300. S400, Conductive processing: Before or after lamination, patterned circuits and connecting holes 301 are provided on the surface of the layer board 300. The connecting holes 301 are arranged corresponding to the chip 200. The hole walls of the connecting holes 301 can be coated with copper and drive the patterned circuits to connect with the chip 200 to form a multilayer board 400. S500, Take copper block: Take a copper block 500 with a thickness matching that of the multilayer board 400; S600, Install copper block: After the conductivity treatment and copper block removal, copper block 500 is embedded and installed on multilayer board 400; S700, Surface circuit processing: After installing the copper block, an outer patterned circuit layer 410 is processed on the surface of the multilayer board 400.

[0031] It should be noted that by processing embedded grooves 101 at preset positions on the core board 100 and installing chips 200, the chips 200 are embedded inside the circuit board to form a three-dimensional integrated structure. This significantly shortens the signal transmission path between the chips 200 and the surrounding circuits, reduces high-frequency signal transmission delay and reflection loss, and improves circuit connection efficiency. Furthermore, by laminating and pressing the chips 200 into the layer board 300 and combining this with the subsequent design of patterned circuits and vias 301 in the conduction process, the chips 200 are protected from external damage, and a multi-layer circuit structure is constructed to enhance product functionality. Further, after pressing copper blocks 500 of matching thickness onto the multi-layer board 400, an outer patterned circuit layer 410 is processed on the surface of the multi-layer board 400 to enhance the connection strength between the copper blocks 500 and the multi-layer board 400, ensuring that the circuit board achieves low impedance and high reliability connection. Ultimately, this achieves multiple technical effects simultaneously, including heat dissipation, signal optimization, multi-circuit integration, and high-reliability pressing, significantly improving the overall performance and manufacturing quality of the circuit board.

[0032] Reference Figure 5 In some embodiments of the present invention, the layer 300 in the lamination process is a multi-layer circuit structure, and an interlayer patterned circuit layer 310 is provided within the layer 300. The multi-layer circuit structure layer 300 is combined with the core board 100 through lamination, allowing direct utilization of the interlayer patterned circuit layer 310 within the layer 300 to achieve signal interconnection and functional integration between multiple layers. Compared to a single-layer circuit structure layer 300, the multi-layer circuit structure can simultaneously construct complex vertical interconnect channels during lamination, reducing subsequent additional wiring steps and increasing the functional density of the circuit board. Simultaneously, the interlayer patterned circuit layer 310 is directly connected to the chip 200 through a via 301, which is subsequently processed for conductivity, further shortening the signal transmission path, reducing transmission delay and reflection loss of high-frequency signals, and enhancing the overall mechanical strength and heat dissipation uniformity of the circuit board, providing a more stable three-dimensional integration environment for the chip 200. In some applications, a multilayer circuit board, whether semi-finished or finished, can be directly used as a layer board 300. It can be laminated with the core board 100 in a single press to produce a multilayer circuit board containing the chip 200. This minimizes the frequency of lamination with the core board 100, which can improve production efficiency and reduce the damage to the chip 200 that may be caused by multiple laminations.

[0033] Reference Figure 4In some embodiments of the present invention, the layer 300 in the lamination process is a single-layer circuit structure. After lamination, a conductive process is performed. It is understood that when the layer 300 adopts a single-layer circuit structure, by first completing the lamination of the core board 100 and the single-layer circuit layer 300, the chip 200 is securely hidden inside the layer 300. Then, after lamination, a conductive process is performed, which allows for precise control of the correspondence between the connecting hole 301 and the chip 200, ensuring that the connecting hole 301 directly penetrates to the chip 200 to achieve efficient electrical connection. It is understood that the layer 300 is a PP prepreg commonly used in multilayer boards 400. Connecting holes 301 are laser-drilled on the laminated PP prepreg. Patterned circuits are fabricated on the surface of the PP prepreg using common steps such as exposure and development. Then, copper is plated on the hole walls of the connecting hole 301 through copper plating, and copper is deposited on the patterned circuits through surface plating to form a patterned circuit layer.

[0034] Furthermore, to construct a more complex multilayer board 400 circuit structure, a multilayer lamination step is included: before installing the copper block, several cycles of lamination and conduction processing are performed. During the final conduction processing, the patterned circuit can be electroplated with copper to form an interlayer patterned circuit layer 310. This allows for the gradual stacking of new circuit layers in each lamination, thus flexibly constructing a multilayer circuit structure. This solution avoids the limitations of single-layer circuit structures and, through the synergy of step-by-step lamination and conduction processing, solves problems such as poor uniformity of the copper layer on the hole walls and fluctuations in electroplating quality caused by stacking too many layers at once in traditional multilayer lamination. This significantly improves the connection reliability between the copper block 500 and the circuit board while reducing manufacturing process complexity.

[0035] Reference Figure 6 In some embodiments of the present invention, the multilayer board 400 is provided with a through-type copper embedding groove 401. The shape of the copper block 500 matches the shape of the copper embedding groove 401. During the installation of the copper block, the copper block 500 is pressed into the copper embedding groove 401. By utilizing the precise positioning of the copper embedding groove 401 and the embedded structure of the copper block 500, the bonding strength between the copper block 500 and the multilayer board 400 can be significantly enhanced, avoiding the problem of copper layer cracking or peeling on the hole wall caused by stress concentration in traditional pressing technology. At the same time, the shape matching design allows the copper block 500 to be tightly pressed into the copper embedding groove 401, reducing additional fixing steps, improving production efficiency, and ensuring that the copper block 500 and the graphic circuit achieve a stable electrical connection through the connecting hole 301, thereby comprehensively improving the mechanical stability and electrical reliability of the circuit board.

[0036] In some applications, refer to Figure 7After the conductivity treatment, a copper-buried groove 401 is fabricated on the multilayer board 400. The walls of the copper-buried groove 401 can be copper-clad. That is, the copper-buried groove 401 is fabricated on the multilayer board 400 after all the layers 300 are laminated, the connecting holes are filled with copper, and the interlayer patterned circuit layer 310 is fabricated. This avoids the influence of the lamination process on the dimensions of the copper-buried groove 401. It should be noted that after the copper-clad layer on the walls of the copper-buried groove 401, if the walls of the copper-buried groove 401 are copper-clad through electroless copper plating, on the one hand, the mechanical strength of the groove wall is enhanced, ensuring that the copper block 500 is firmly pressed into the copper-buried groove 401; on the other hand, the conductivity of the groove wall is enhanced, ensuring the electrical connection consistency between the copper block 500, the interlayer patterned circuit layer 310, and the outer patterned circuit layer 410. To address this, the copper cladding layer on the wall of the buried copper trench 401 provides a low-impedance conductive path for the copper block 500, reducing signal transmission delay and reflection loss. Furthermore, the subsequent processing steps of the buried copper trench 401 can flexibly adjust the trench size and position according to actual needs, adapting to copper blocks 500 of different specifications, thus enhancing the flexibility of circuit board design. Further, referring to... Figure 10 In some embodiments of the present invention, the following steps are also included: S520. Trimming: Before installing the copper block, trim the periphery of the copper embedding groove 401. For example, trimming the periphery of the copper embedding groove 401 after it is machined can remove burrs, ensure the dimensional accuracy and surface smoothness of the groove opening, provide a flat copper-coating plane for the subsequent copper plating of the groove wall of the copper embedding groove 401, and thus provide a smooth entry interface for the subsequent embedding of the copper block 500, avoiding scratches, stress concentration or crimping misalignment of the copper block 500 due to sharp or rough edges during the crimping process.

[0037] In other applications, refer to Figure 6 and Figure 7Before lamination, the core board 100 is fabricated with a first embedded copper section 102, and the layer board 300 is fabricated with a second embedded copper section 302. During lamination, the first embedded copper section 102 and the second embedded copper section 302 overlap, and the first embedded copper section 102 and the second embedded copper section 302 combine to form a copper embedding groove 401. Therefore, by utilizing the original structural foundation of the core board 100 and the layer board 300 to construct the copper embedding groove 401, no additional grooving process is required, simplifying the manufacturing process, reducing scrap caused by processing failures, lowering production costs, and, more importantly, reducing the impact of subsequent processing steps on the integrity of the pattern circuit layer, avoiding the impact on the multilayer board 400 during grooving processing that would cause a decline in the quality of the multilayer board 400. Furthermore, due to the coordinated circuit structures of the inner layer patterned circuit layer 110 of the core board 100 and the interlayer patterned circuit layer 310 of the layer board 300, the combination of the first buried copper segment 102 and the second buried copper segment 302 has a pre-positioning function, ensuring precise alignment between the embedded position of the copper block 500 and the internal circuitry, thus better designing the optimal electrical connection path between the copper block 500 and the chip 200. It is understandable that after lamination, the first buried copper segment 102 and the second buried copper segment 302 combine to form a buried copper trench 401. During the conduction process after lamination, the buried copper trench 401 will be plated with copper layer by layer. Similarly, referring to... Figure 10 In some embodiments of the present invention, the following steps are also included: S520. Trimming: Before installing the copper block, the periphery of the copper immersion tank 401 is trimmed. Since uneven areas or electroplating defects are prone to occur after each layer of copper plating, and the thickness of each copper layer is difficult to be completely consistent, trimming the periphery of the copper immersion tank 401 optimizes the continuity of the copper plating layer on the tank wall. This ensures the consistency of the copper layer thickness on the tank wall of the copper immersion tank 401 after the first copper immersion section 102 and the second copper immersion section 302 are combined. It also improves the dimensional accuracy and surface finish of the copper immersion tank 401 after copper plating, allowing the copper block 500 to be pressed more tightly into the copper immersion tank 401. This enhances the reliability of the electrical connection between the copper block 500 and the copper layer on the tank wall, reduces contact resistance, improves the electrical performance and long-term stability of the circuit board, and reduces the scrap rate caused by assembly errors, thereby improving manufacturing efficiency.

[0038] Refer to Figure 8In some embodiments of the present invention, the shortest distance A between the copper block 500 and the chip 200 satisfies: 0.1mm ≤ A ≤ 1mm. By precisely controlling the distance between them, it is possible to avoid the copper block 500 being too close, which could cause mechanical compression or thermal stress concentration on the chip 200. If the distance is too small, it may cause damage to the chip 200 package or local overheating. On the other hand, it is also possible to prevent the copper block 500 from being too far away, which would cause redundancy in the signal transmission path. If the distance is too large, it would increase the delay and reflection loss of high-frequency signals. This distance range ensures that the copper block 500 provides effective heat dissipation support for the chip 200 while ensuring that the electrical connection path between the via 301 and the chip 200 is minimized, thereby optimizing signal transmission efficiency, taking into account the safety and electrical performance of the chip 200, and improving the overall reliability and functionality of the circuit board.

[0039] Refer to Figures 8 to 10 In some embodiments of the present invention, the following steps are included: S510, Chamfering: Before installing the copper block, chamfers are machined on both the upper and lower circumferential edges of the copper block 500 in the thickness direction of the multilayer board 400. This chamfering reduces the sharp edges of the copper block 500, acting as a guide when pressed into the copper embedment groove 401, reducing pressing resistance and preventing cracking of the copper layer in the groove 401 wall or delamination of the circuit board due to stress concentration. Further, refer to... Figure 9 After the copper block 500 is pressed into the copper embedding groove 401, resin is applied to the chamfered area of ​​the copper block 500 on the board surface to fill the chamfered recess. After filling, copper plating is applied. After the copper plating is completed, the board surface is flat and all the inner and outer layers of the circuit board are fully connected to the copper block 500. In addition, the interface of the copper block 500 on the finished circuit board is flat, which meets the requirements for subsequent normal SMT pad manufacturing.

[0040] Refer to Figure 9 and Figure 10 The circuit board according to an embodiment of the present invention is manufactured using the circuit board manufacturing method according to an embodiment of the present invention.

[0041] According to the circuit board of the present invention, by adopting the circuit board manufacturing method of the present invention, the circuit board can achieve efficient circuit connection, shorten the signal transmission path, reduce delay and reflection loss, and solve the problem of copper block 500 crimping, improve quality and efficiency, and its comprehensive performance is significantly better than that of traditional printed circuit boards. It can meet the stringent requirements of emerging industries such as 5G communication, artificial intelligence, and new energy vehicles for high-performance and highly integrated electronic carriers.

[0042] Other configurations and operations of the circuit board according to embodiments of the present invention are known to those skilled in the art and will not be described in detail here.

[0043] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention.

Claims

1. A method for manufacturing a circuit board, characterized in that, Includes the following steps: Core board extraction: Extract the core board with an inner patterned circuit layer on the surface; Chip installation: After the core board is extracted, an embedding groove is machined at a preset position on the core board and the chip is installed in the embedding groove; Lamination and bonding: After the chip is installed, a layer plate is laminated and fixed on the surface of the core board to drive the chip to be hidden inside the layer plate. The layer plate is a single-layer circuit structure. Conductive processing: After lamination, the surface of the layer board is provided with patterned circuits and connecting holes. The connecting holes are arranged correspondingly to the chip. The hole walls of the connecting holes can be copper-clad and drive the patterned circuits to connect with the chip to form a multilayer board. The multilayer board is provided with through-arranged buried copper trenches. Before lamination, the core board is processed with a first embedded copper section, and the layer board is processed with a second embedded copper section. During lamination, the first and second embedded copper sections overlap, and the first and second embedded copper sections combine to form the embedded copper groove. During the conductive process, the groove wall of the embedded copper groove can be coated with copper. Take a copper block: Take a copper block with a thickness matching that of the multilayer board. Installing copper blocks: After the conduction process and copper block removal, the copper blocks are embedded in the copper embedding groove of the multilayer board; Multilayer lamination: Before installing the copper block, the lamination and conduction processes are repeated multiple times. The walls of the copper burial tank can be coated with copper layer by layer. In each conduction process before the last one, the patterned circuit can be electroplated with copper to form an interlayer patterned circuit layer. Trimming: Before installing the copper block after multi-layer lamination, the periphery of the copper embedding groove is trimmed. Surface circuit processing: After installing the copper block, an outer layer of patterned circuitry is processed on the surface of the multilayer board.

2. The circuit board manufacturing method according to claim 1, characterized in that: The shortest distance between the copper block and the chip is A, which satisfies: 0.1mm≤A≤1mm.

3. The circuit board manufacturing method according to claim 1, characterized in that: The shape of the copper block matches the shape of the copper embedding groove.

4. The circuit board manufacturing method according to claim 1, characterized in that, It also includes the following steps: Chamfering: Before installing the copper block, chamfers are machined on both the upper and lower edges of the copper block in the thickness direction of the multilayer board.

5. A circuit board, characterized in that: It is manufactured using the circuit board manufacturing method as described in any one of claims 1 to 4.

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