Graphics Processing Unit Package and its Secure Boot Method

Abstract

This disclosure provides a graphics processing unit (GPU) package and its secure boot method. A first non-volatile storage area containing immutable basic functional firmware, a second non-volatile storage area containing updatable full-functional firmware, a firmware verification module, and a system management module are all encapsulated within the GPU chip. This ensures that the basic and full-functional firmware are physically inaccessible from outside the GPU chip, guaranteeing physical security. The basic functional firmware implements the GPU's fundamental functions and cannot be modified externally, further ensuring its physical security. The full-functional firmware enables the GPU's hardware acceleration, 3D display rendering, and other complete functions. During GPU boot, the firmware verification module verifies the full-functional firmware. If verification fails, the system management module can at least load and execute the basic functional firmware, which is sufficient to guarantee the GPU's basic display functions.

Description

Technical Field

[0001] This disclosure relates to the field of computer technology, and in particular to a graphics processing unit package and its secure boot method. Background Technology

[0002] The Graphics Processing Unit (GPU) is an indispensable component of modern computing systems, responsible for handling complex graphics rendering and parallel computing tasks. GPU operation relies on firmware stored in non-volatile memory. Currently, there are two main GPU firmware boot schemes:

[0003] One approach is to store the GPU firmware in Serial Peripheral Interface (SPI) Flash memory external to the GPU chip. Each time the graphics card boots and loads the firmware, the GPU or system CPU performs a signature verification. However, because the firmware storage is physically located external to the chip, attackers can physically access and corrupt the external Flash chip or modify the data stored therein, thus preventing the graphics card from booting.

[0004] Another approach is to encrypt the firmware or sign and verify it as a complete, single image file. With this holistic firmware signing and verification mechanism, even the slightest damage will cause the signature verification to fail, resulting in the GPU failing to boot at all. The GPU may even be unable to provide the most basic display functions, severely impacting the availability of the graphics card's fundamental features.

[0005] Therefore, existing GPU secure boot solutions struggle to achieve both physical security and functional robustness, presenting a pressing technical challenge. Summary of the Invention

[0006] This disclosure provides a graphics processing unit package and a secure boot method thereof, which can ensure the normal boot of the GPU while ensuring the physical security of the GPU firmware.

[0007] The technical solution disclosed herein is implemented as follows:

[0008] In a first aspect, this disclosure provides a graphics processing unit package, comprising:

[0009] The first non-volatile memory area stores the immutable basic function firmware;

[0010] The second non-volatile storage area stores updatable, fully functional firmware;

[0011] The firmware verification module is used to verify the signature of fully functional firmware.

[0012] The system management module is used to execute basic functional firmware, as well as complete functional firmware verified by the firmware verification module.

[0013] Secondly, this disclosure provides a secure boot method for a graphics processing unit, implemented based on the graphics processing unit package described in the first aspect, the method comprising:

[0014] The firmware verification module performs signature verification on the updatable, fully functional firmware stored in the second non-volatile storage area.

[0015] The system management module executes the immutable basic function firmware stored in the first non-volatile storage area, as well as the complete function firmware verified by the firmware verification module.

[0016] Thirdly, this disclosure provides a computer-readable storage medium storing at least one instruction, which is executed by a processor to implement the secure startup method for a graphics processing unit as described in the second aspect of this disclosure.

[0017] This disclosure provides a graphics processing unit (GPU) package and its secure boot method. A first non-volatile storage area containing immutable basic functional firmware, a second non-volatile storage area containing updatable full-functional firmware, a firmware verification module, and a system management module are all encapsulated within the GPU chip. This ensures that the basic and full-functional firmware are physically inaccessible from outside the GPU chip, guaranteeing physical security. The basic functional firmware implements the GPU's basic functions and cannot be modified externally, further ensuring its physical security. The full-functional firmware enables the GPU's hardware acceleration, 3D display rendering, and other complete functions. During GPU boot, the firmware verification module verifies the full-functional firmware. If verification fails, the system management module can at least load and execute the basic functional firmware, which is sufficient to guarantee the GPU's basic display functions. If verification succeeds, both the basic and full-functional firmware can be loaded and executed simultaneously, enabling the GPU's full functionality. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of a graphics processing unit package provided in this disclosure.

[0019] Figure 2 A flowchart of a secure startup method for a graphics processing unit provided in this disclosure.

[0020] Figure 3 A detailed flowchart of the startup process of a graphics processing unit provided in this disclosure.

[0021] Figure 4This is a flowchart illustrating a host driver processing logic provided in this disclosure. Detailed Implementation

[0022] The technical solutions in this disclosure will now be clearly and completely described with reference to the accompanying drawings.

[0023] Figure 1 This is a schematic diagram of the structure of a graphics processing unit package provided in this disclosure. Figure 1 As shown, the package includes:

[0024] The first non-volatile memory area 101 stores immutable basic function firmware;

[0025] The second non-volatile storage area 102 stores updatable, fully functional firmware.

[0026] Firmware verification module 103 is used to verify the signature of a fully functional firmware.

[0027] The system management module 104 is used to execute basic functional firmware and complete functional firmware verified by the firmware verification module 103.

[0028] In this disclosure, the first non-volatile memory area 101 and the second non-volatile memory area 102 are packaged in the same package as the graphics processing unit (GPU) die 105. The basic functional firmware in the first non-volatile memory area 101 can be a read-only memory (mask ROM) die, which is fixed at the GPU chip factory and cannot be modified. Furthermore, the capacity of the basic functional firmware can be very small, for example, containing only code sufficient to power up the GPU and provide the most basic functions.

[0029] The full-function firmware stored in the second non-volatile memory area 102 can be a bare SPI Flash (Serial Peripheral Interface Flash) die, which is updatable and can fix vulnerabilities or add new functions according to the upgrade tool software authorized by the GPU manufacturer. The full-function firmware is not physically accessible directly from outside the GPU chip.

[0030] Firmware verification module 103 and system management module 104 can be integrated inside the GPU die 105. The GPU die 105 contains the main GPU core (e.g., rendering pipeline, computing units, etc.). Firmware verification module 103 and system management module 104 can be implemented by the same separate processor core independent of the GPU core, such as a RISC-V core, or by different processor cores. The processor core is directly connected to the first non-volatile memory area 101 and the second non-volatile memory area 102 via a dedicated data interface; and interconnected with other modules within the GPU core via a network-on-chip (NoC). The firmware verification module 103 and system management module 104 are fixed at the time of GPU chip manufacturing and cannot be modified externally.

[0031] The firmware verification module 103 is responsible for verifying whether the full-function firmware of the second non-volatile storage area 102 is damaged or tampered with. If the full-function firmware is not damaged or tampered with, the verification is considered successful, and the system management module 104 is notified to load the basic function firmware from the first non-volatile storage area 101 and the full-function firmware from the second non-volatile storage area 102. If the full-function firmware is damaged or tampered with, the verification is considered unsuccessful. In this case, the system management module 104 can load the basic function firmware from the first non-volatile storage area 101 to implement the basic functions of the GPU, enabling the GPU to be powered on.

[0032] In this disclosure, the basic functional firmware is used to implement the minimum functionality of the graphics processing unit, including:

[0033] General Purpose Input / Output (GPIO) initialization, Double Data Rate (DDR) video memory configuration, High-Speed ​​Peripheral Component Interconnect (PCIe) configuration, and Framebuffer display.

[0034] Among them, GPIO initialization refers to configuring the basic state of the pins; DDR memory configuration refers to minimizing and initializing the GPU's onboard memory to make it usable; PCIe configuration refers to initializing the PCIe endpoints so that they can be recognized and enumerated by the host processor on the bus; and Framebuffer display refers to setting up a simple, unaccelerated display mode so that a basic image can be output to the monitor.

[0035] In this disclosure, the graphics processing unit package also includes a one-time programmable (OTP) memory area 106, which stores a public key for verifying the firmware signature for full functionality.

[0036] The firmware verification module 103 is used to read the corresponding public key from the one-time programmable storage area and use the public key to perform signature verification on the complete functional firmware.

[0037] The OTP storage area 106 has the characteristic of being unmodifiable after being programmed at the factory, for example, it is programmed based on fuse or anti-fuse technology. In this disclosure, since the public key is fixed in the unmodifiable OTP storage area 106, attackers cannot tamper with the public key, thereby ensuring the legitimacy and credibility of the verification process itself.

[0038] OTP storage area 106 is directly connected to the processor core equipped with firmware verification module 103 via a dedicated interface. When the GPU starts up, firmware verification module 103 first reads the basic function firmware from the first non-volatile storage area 101 for pre-processing, and at the same time accesses OTP storage area 106 to read the corresponding public key. It uses the public key to verify the signature of the complete function firmware stored in the second non-volatile storage area 102. If the verification is successful, it notifies the system management module 104 to load and execute the basic function firmware and the complete function firmware.

[0039] In this disclosure, the complete functional firmware stored in the second non-volatile memory area 102 includes multiple functional modules;

[0040] Firmware verification module 103 is used to perform independent signature verification for each functional module.

[0041] The complete firmware includes, but is not limited to, the following functional modules: a 3D rendering module, a video encoding module, a video decoding module, a general computing module, and an image (JPEG) decoding module. The 3D rendering module is responsible for hardware acceleration of APIs such as DirectX and Vulkan; the video encoding module is responsible for hardware encoding of formats such as H.264, HEVC, and AV1; the video decoding module is responsible for hardware decoding of formats such as H.264, HEVC, and AV1; the general computing module is responsible for GPGPU computing tasks such as CUDA and OpenCL; and the image decoding module is responsible for hardware image decoding.

[0042] In this disclosure, the system management module 104 is used to execute basic function firmware and functional modules in the second non-volatile storage area 102 that have been verified by the firmware verification module 103.

[0043] The second non-volatile storage area 102 may store the firmware partition table or other metadata. The firmware verification module 103 can read the firmware partition table or other metadata to identify all independent functional modules. For each functional module, the OTP storage area 106 stores the corresponding public key.

[0044] After the firmware verification module 103 identifies all functional modules, the specific process of performing independent signature verification on each functional module is as follows:

[0045] Read the header information of the functional module and obtain its signature (e.g., RSA signature).

[0046] Calculate the target hash value of the code ontology of this functional module (e.g., using the SHA-256 or SHA-3 algorithm).

[0047] Obtain the public key corresponding to the functional module from OTP storage area 106, and use the public key to decrypt or verify the previously obtained signature to obtain a current hash value.

[0048] The current hash value is compared with the target hash value. If they match, the functional module is considered to have passed verification; if they do not match or the signature itself is invalid, the functional module is considered to have failed verification.

[0049] For all functional modules in the second non-volatile storage area 102, the firmware verification module 103 repeats the above process and records the verification status of each functional module, i.e., verification passed or verification failed.

[0050] After verification by the firmware verification module 103, if all functional modules pass verification, the system management module 104 is notified to execute the basic functional firmware in the first non-volatile storage area 101 and all functional modules in the second non-volatile storage area 102; if some functional modules pass verification, the system management module 104 is notified to execute the basic functional firmware in the first non-volatile storage area 101 and the verified functional modules in the second non-volatile storage area 102, and enter the hybrid operation mode.

[0051] In this disclosure, one or more firmware status registers can be maintained on the GPU die 105, and the firmware verification module 103 writes the verification status of each functional module. For example, the register can be a 32-bit bitmask, where each bit corresponds to a functional module, with 1 representing verification success and 0 representing verification failure. The system management module 104 can read the verification status stored in the register to determine whether to load the corresponding functional module.

[0052] The above process ensures the robustness of GPU startup. Even if the full functionality of the firmware in the second non-volatile memory area 102 fails verification due to an attack or corruption, the GPU will not become unusable, ensuring it always boots into basic display mode. Furthermore, if other functional modules remain intact, it can even provide some hardware acceleration capabilities.

[0053] This disclosure provides a specific scenario for a hybrid operation mode. For example, during GPU startup, the firmware verification module 103 discovers the following during verification:

[0054] The 3D rendering module signature verification failed (possibly due to tampering or data corruption) and the general computing module signature verification failed. The video encoding module signature verification passed. The video decoding module signature verification passed.

[0055] The firmware verification module 103 then writes the verification result into the status register, for example: {3D:FAIL,GPGPU:FAIL,VID_ENC:PASS,VID_DEC:PASS}.

[0056] The system management module 104 executes the basic function firmware in the first non-volatile memory area 101. At this point, the GPU already has PCIe enumeration and framebuffer display capabilities.

[0057] Meanwhile, the system management module 104 skips the 3D rendering module and the general computing module, and only loads the code of the video encoding module and the video decoding module from the second non-volatile storage area 102 and initializes them.

[0058] The final result achieves a hybrid operation mode. This hybrid operation mode has the following functions:

[0059] Basic functions (such as PCIe, framebuffer display) are provided by the first non-volatile storage area 101.

[0060] The second non-volatile storage area 102 provides verified advanced features such as video codec hardware acceleration.

[0061] Figure 2 This is a flowchart of a secure startup method for a graphics processing unit provided in this disclosure, implemented based on the graphics processing unit package provided in this disclosure, such as... Figure 2 As shown, the method includes:

[0062] Step S201: The signature verification module is used to verify the signature of the updatable, fully functional firmware stored in the second non-volatile storage area.

[0063] Step S202: The immutable basic function firmware stored in the first non-volatile storage area and the complete function firmware verified by the firmware verification module are executed through the system management module.

[0064] In this disclosure, the first non-volatile memory area 101 and the second non-volatile memory area 102 are packaged in the same package as the GPU die 105. The firmware verification module 103 and the system management module 104 can be integrated inside the GPU die 105. The basic functional firmware, firmware verification module 103, and system management module 104 in the first non-volatile memory area 101 are all fixed at the time of GPU chip manufacturing and cannot be modified externally. The complete functional firmware stored in the second non-volatile memory area 102 can be used to fix vulnerabilities or add new functions according to the upgrade tool software authorized by the GPU manufacturer, and is physically inaccessible from outside the GPU chip.

[0065] The firmware verification module 103 is responsible for verifying whether the full-function firmware of the second non-volatile storage area 102 is damaged or tampered with. If the full-function firmware is not damaged or tampered with, the verification is considered successful, and the system management module 104 is notified to load the basic function firmware from the first non-volatile storage area 101 and the full-function firmware from the second non-volatile storage area 102. If the full-function firmware is damaged or tampered with, the verification is considered unsuccessful. In this case, the system management module 104 can load the basic function firmware from the first non-volatile storage area 101 to implement the basic functions of the GPU, enabling the GPU to be powered on.

[0066] In this disclosure, the complete functional firmware stored in the second non-volatile memory area 102 includes multiple functional modules;

[0067] The firmware verification module 103 performs signature verification on the updatable, fully functional firmware stored in the second non-volatile storage area 102, including:

[0068] The firmware verification module 103 performs independent signature verification on each functional module in the second non-volatile storage area 102.

[0069] The system management module 104 executes the immutable basic function firmware stored in the first non-volatile storage area 101, as well as the complete function firmware verified by the firmware verification module 103, including:

[0070] The system management module 104 executes the basic function firmware, as well as the function modules in the second non-volatile storage area 102 that have been verified by the firmware verification module 103.

[0071] The above method ensures the robustness of GPU startup. Even if the full functionality of the firmware in the second non-volatile memory area 102 fails verification due to an attack or corruption, the GPU will not become unusable, ensuring that it can always boot into the basic display mode. Furthermore, if other functional modules remain intact, it can even provide some hardware acceleration functionality.

[0072] In this disclosure, the graphics processing unit package also includes a one-time programmable (OTP) memory area, which stores a public key for verifying the firmware signature for full functionality;

[0073] The firmware verification module 103 performs signature verification on the updatable, fully functional firmware stored in the second non-volatile storage area 102, including:

[0074] The firmware verification module 103 is used to read the corresponding public key from the one-time programmable storage area and use the public key to sign and verify the firmware with full functionality.

[0075] In this disclosure, a one-time programmable storage area stores the public key of each functional module in the second non-volatile storage area 102, which is used to verify the signature of each functional module individually.

[0076] Figure 3 A detailed flowchart of the startup process of a graphics processing unit provided in this disclosure is shown below. Figure 3 As shown, taking the example where both the firmware verification module 103 and the system management module 104 are integrated into the RISCV core, the steps for booting based on the RISCV core are as follows:

[0077] Step S301: Read the basic function firmware from the first non-volatile storage area, and at the same time access the OTP storage area to read the corresponding public key.

[0078] Step S302: Read each functional module from the second non-volatile storage area and verify the signature of each functional module using the corresponding public key.

[0079] Step S303: Determine whether the signature verification of each functional module passes; if all pass, proceed to step S304; if some fail, proceed to steps S305-S307; if all fail, proceed to steps S308-S309.

[0080] In step S304, the RISCV core loads all functional modules and proceeds to step S310.

[0081] Step S305: The RISCV core marking function module is in a verification failure state.

[0082] Step S306: The RISCV core loads the functional modules that have passed the verification of the second non-volatile memory area.

[0083] In step S307, the RISCV core selects a hybrid firmware mode consisting of partial functional modules and basic functional firmware, and proceeds to step S310.

[0084] In step S308, the RISCV core marks all functional modules as being in a verification failure state.

[0085] Step S309: RISCV core rollback selects basic function firmware.

[0086] Step S310: Execute firmware.

[0087] Figure 4 This is a flowchart illustrating a host driver processing logic provided in this disclosure. The process includes:

[0088] Step S401: The kernel driver initializes each functional module.

[0089] In step S402, the kernel driver reads the firmware status registers and marks whether each functional module is in a verification failure state.

[0090] Step S403: Wait for application layer / user-driven request; if the request is received, proceed to step S404.

[0091] Step S404: Determine the request type; if the request type is a non-hardware accelerated request, such as basic 2D display, proceed to step S405; if the request type is a hardware accelerated request, such as 3D rendering, audio and video, proceed to step S406.

[0092] Step S405: Process the basic 2D display normally, then proceed to step S409.

[0093] Step S406: Check if the corresponding functional module is in a verification failure state; if yes, proceed to step S407; otherwise, proceed to step S408.

[0094] Step S407: An error message appears indicating that the corresponding hardware acceleration is not supported. Then proceed to step S409.

[0095] Step S408: Process the hardware acceleration request normally, then proceed to step S409.

[0096] Step S409: After processing is complete, request the return result from the application layer / user driver.

[0097] By using the methods described above, system blue screens or crashes caused by application layer / user driver attempts to call unloaded hardware functions can be avoided.

[0098] This disclosure also provides a computer-readable storage medium storing at least one instruction that is executed by a processor to implement the secure startup method for a graphics processing unit as described in the various embodiments above.

[0099] This disclosure also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform the secure startup method for the graphics processing unit described in the above embodiments.

[0100] Those skilled in the art will recognize that the functions described in this disclosure in one or more of the examples above can be implemented using hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium accessible to a general-purpose or special-purpose computer.

[0101] It should be noted that the technical solutions described in this disclosure can be combined arbitrarily as long as they do not conflict.

[0102] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A graphics processing unit package, characterized in that, include: The first non-volatile memory area stores the immutable basic function firmware; The basic function firmware is used to implement the minimum functionality of the graphics processing unit; The second non-volatile storage area stores updatable, fully functional firmware; The firmware verification module is used to verify the signature of the complete functional firmware. The system management module is used to execute the basic functional firmware and the complete functional firmware verified by the firmware verification module.

2. The graphics processing unit package according to claim 1, characterized in that, The graphics processing unit package also includes a one-time programmable storage area, which stores a public key for verifying the signature of the full-function firmware. The firmware verification module is used to read the corresponding public key from the one-time programmable storage area and use the public key to perform signature verification on the complete functional firmware.

3. The graphics processing unit package according to claim 1, characterized in that, The complete functional firmware stored in the second non-volatile memory area includes multiple functional modules; The firmware verification module is used to perform independent signature verification on each of the functional modules.

4. The graphics processing unit package according to claim 3, characterized in that, The system management module is used to execute the basic function firmware and the function modules in the second non-volatile storage area that have been verified by the firmware verification module.

5. The graphics processing unit package according to claim 1, characterized in that, The minimum functionalities implemented by the basic functional firmware include: General purpose input / output port initialization, double data rate video memory configuration, high-speed peripheral component interconnect configuration, and frame buffer display.

6. The graphics processing unit package according to claim 3, characterized in that, The functional modules of the complete firmware include: 3D rendering module, video encoding module, video decoding module, general computing module, and image decoding module.

7. A method for securely starting a graphics processing unit, characterized in that, Based on the graphics processing unit package according to any one of claims 1-6, the method includes: The firmware verification module performs signature verification on the updatable, fully functional firmware stored in the second non-volatile storage area. The system management module executes the immutable basic function firmware stored in the first non-volatile storage area, as well as the complete function firmware verified by the firmware verification module.

8. The secure startup method for a graphics processing unit according to claim 7, characterized in that, The complete functional firmware stored in the second non-volatile memory area includes multiple functional modules; The signature verification of the updatable, fully functional firmware stored in the second non-volatile storage area via the firmware verification module includes: The firmware verification module performs independent signature verification on each of the functional modules in the second non-volatile storage area.

9. The secure startup method for a graphics processing unit according to claim 8, characterized in that, The execution of the immutable basic function firmware stored in the first non-volatile storage area by the system management module, and the complete function firmware verified by the firmware verification module, includes: The system management module executes the basic function firmware, as well as the function modules in the second non-volatile storage area that have been verified by the firmware verification module.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores at least one instruction, which is executed by a processor to implement the secure startup method for a graphics processing unit as described in any one of claims 7-9.

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