Display panel and display device

Abstract

The invention relates to a display panel and a display device. The display panel comprises a substrate, a pixel definition layer, a light-emitting function layer and a planarization structure. The pixel defining layer comprises a pixel defining part and a pixel opening defined by the pixel defining part. The light-emitting function layer comprises a plurality of light-emitting structures, and the light-emitting structures are located in the pixel openings. A first partition groove is formed in the pixel limiting part, at least part of the planarization structure is arranged in the first partition groove, and a second partition groove is defined by the planarization structure. The pixel limiting part comprises a first side face located on the peripheral side of the first partition groove, the planarization structure comprises a second side face located on the peripheral side of the second partition groove, and the surface roughness of the second side face is smaller than that of the first side face. According to the display panel and the display device provided by the embodiment of the invention, the thickness uniformity of related film layers can be improved, and the display effect of the display panel is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display device, and particularly relates to a display panel and a display device. BACKGROUND

[0002] The display panel is an indispensable key component in modern electronic devices, and is widely applied to various fields of consumer electronics, industrial equipment, automobile electronics, medical equipment and the like.

[0003] In the display panel, the thickness uniformity of the related film layer for transmitting signals can affect the display effect of the display panel. SUMMARY

[0004] The display panel and the display device provided by the embodiments of the present application can improve the thickness uniformity of the related film layer and improve the display effect of the display panel.

[0005] In a first aspect, the embodiments of the present application provide a display panel, which comprises a substrate, a pixel definition layer, a light-emitting functional layer and a planarization structure. The pixel definition layer is arranged on one side of the substrate along the thickness direction, and the pixel definition layer comprises a pixel limiting part and a pixel opening formed by the pixel limiting part. The light-emitting functional layer is arranged on one side of the substrate along the thickness direction, and the light-emitting functional layer comprises a plurality of light-emitting structures, and the light-emitting structures are located inside the pixel opening. The pixel limiting part is provided with a first partition groove, and the first partition groove is arranged by recessing inward along the thickness direction from the side surface of the pixel limiting part away from the substrate. At least part of the planarization structure is arranged inside the first partition groove, and the planarization structure forms a second partition groove. The pixel limiting part comprises a first side surface located on the periphery of the first partition groove, and the planarization structure comprises a second side surface located on the periphery of the second partition groove, and the surface roughness of the second side surface is smaller than the surface roughness of the first side surface.

[0006] In a second aspect, the embodiments of the present application provide a display device, which comprises the display panel provided by any one of the embodiments of the first aspect of the present application.

[0007] According to the display panel and the display device provided in the present application, the display panel comprises a substrate, a pixel definition layer and a light-emitting functional layer arranged on one side of the substrate. The substrate is used to carry other film layers in the display panel. The pixel definition layer comprises a pixel limiting portion and a pixel opening formed by the pixel limiting portion. The light-emitting structure is located inside the pixel opening. The pixel limiting portion can enclose the light-emitting structure located inside the pixel opening, so as to reduce the interference between adjacent light-emitting structures and improve the display effect of the display panel. In order to separate the adjacent light-emitting structures and reduce the probability of current leakage and optical crosstalk between the adjacent light-emitting structures, a first separation groove is arranged on the pixel limiting portion. The first separation groove is arranged in the thickness direction by recessing inward from the side surface of the pixel limiting portion away from the substrate. Further, the display panel further comprises a planarization structure. At least part of the planarization structure is arranged inside the first separation groove. The planarization structure encloses a second separation groove. The planarization structure comprises a second side surface located on the periphery of the second separation groove. The surface roughness of the second side surface is smaller than that of the first side surface. In the subsequent film layer preparation process, the surface of the planarization structure is used as a reference. When the subsequent film layer is formed on the second side surface, the thickness uniformity is better than that when the subsequent film layer is formed on the first side surface. The thickness difference of the subsequent film layer at different positions can be reduced, so as to ensure the realization of the related functions of the subsequent film layer and improve the display effect of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0008] The features, advantages, and technical effects of the exemplary embodiments of the present application will be described below with reference to the accompanying drawings.

[0009] Figure 1 A structural schematic diagram of a display panel provided for some embodiments of the present application; Figure 2 A structural schematic diagram of a display panel provided for some embodiments of the present application; Figure 1 A first cross-sectional structure of A-A in FIG. 2; Figure 3 A structural schematic diagram of a display panel provided for some embodiments of the present application; Figure 2 A structural schematic diagram of a display panel provided for some embodiments of the present application; Figure 4 A structural schematic diagram of a display panel provided for some embodiments of the present application; Figure 1 A second cross-sectional structure of A-A in FIG. 3; Figure 5 A structural schematic diagram of a display panel provided for some embodiments of the present application; Figure 4 A structural schematic diagram of a display panel provided for some embodiments of the present application Figure 6 A first top view structural schematic diagram of a display panel provided for some embodiments of the present application; Figure 7 A second top view structural schematic diagram of a display panel provided for some embodiments of the present application; Figure 8 A structural schematic diagram of a display device provided for some embodiments of the present application.

[0010] Label Description: 100, display panel; 200, display device; 10, substrate; 20, pixel definition layer; 21, pixel defining portion; 30, light-emitting functional layer; 31, light-emitting layer; 311, light-emitting structure; 32, connecting layer; 321, first connecting portion; 322, second connecting portion; 40, planarization structure; 50, cathode layer; 60, anode layer; 61, anode; 70, planarization layer; 80, encapsulation layer; C1, first partition groove; C11, first sub-groove; C12, second sub-groove; C2, second partition groove; M1, first side surface; M2, second side surface; M3, first surface; M4, second surface; M5, first bottom surface; M6, second bottom surface; X, first direction; Y, second direction; Z, thickness direction.

[0011] In the drawings, the same components are designated by the same reference numerals. The drawings are not drawn to scale. DETAILED DESCRIPTION

[0012] The features and exemplary embodiments of various aspects of the present application will be described in detail below with reference to the drawings. To make the purpose, technical solutions and advantages of the present application more clear, the present application will be further described in detail below with reference to the drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, but not to limit the present application. The present application can be implemented without some of these specific details by those skilled in the art. The following description of the embodiments is only intended to provide a better understanding of the present application by showing examples of the present application.

[0013] It should be noted that, in this document, relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action, without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises... " does not, without more constraints, preclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0014] In the display panel, the thickness uniformity of the film layer for transmitting a signal can affect the display effect of the display panel. Taking the cathode layer as an example, the cathode layer is used for transmitting a cathode signal and driving the light-emitting structure to emit light together with the anode. When the thickness of the cathode layer is different at different positions, the uniformity of electron transmission can be affected, thereby affecting the display uniformity of the display panel.

[0015] In view of this, in a first aspect, referring to Figure 1 、 Figure 2 and Figure 3 , the embodiment of the present application provides a display panel 100, which comprises a substrate 10, a pixel definition layer 20, a light-emitting functional layer 30 and a planarization structure 40. The pixel definition layer 20 is arranged on one side of the substrate 10 along the thickness direction Z, and the pixel definition layer 20 comprises a pixel limiting part 21 and a pixel opening formed by the pixel limiting part 21. The light-emitting functional layer 30 is arranged on one side of the substrate 10 along the thickness direction Z, and the light-emitting functional layer 30 comprises a plurality of light-emitting structures 311, and the light-emitting structure 311 is located inside the pixel opening. The pixel limiting part 21 is provided with a first partition groove C1, and the first partition groove C1 is arranged by recessing inward along the thickness direction Z from the side surface of the pixel limiting part 21 away from the substrate 10. At least part of the planarization structure 40 is arranged inside the first partition groove C1, and the planarization structure 40 forms a second partition groove C2. Wherein, the pixel limiting part 21 comprises a first side surface M1 located on the side of the first partition groove C1, and the planarization structure 40 comprises a second side surface M2 located on the side of the second partition groove C2, and the surface roughness of the second side surface M2 is smaller than the surface roughness of the first side surface M1.

[0016] The display panel 100 provided by the embodiment of the present application comprises a substrate 10, which is a structure for carrying other film layers of the display panel 100. The substrate 10 can comprise a plurality of film layer structures, for example, the substrate 10 can comprise a plurality of semiconductor layers, a plurality of conductor layers and an insulating layer located between adjacent different conductor layers or between adjacent conductor layers and semiconductor layers. The specific composition of the film layer structure inside the substrate 10 is not limited by the embodiment of the present application. Wherein, the plurality of film layer structures inside the substrate 10 and the plurality of film layer structures outside the substrate 10 are stacked along the thickness direction Z of the substrate 10. The thickness direction Z of different film layer structures, the thickness direction Z of the display panel 100 and the thickness direction Z of the substrate 10 can be arranged in parallel. In order to facilitate understanding, the thickness direction Z of different film layer structures, the thickness direction Z of the display panel 100 and the thickness direction Z of the substrate 10 are all shown in the same direction in the drawings.

[0017] The display panel 100 further includes a pixel definition layer 20 and a light emitting functional layer 30 disposed on one side of the substrate 10. The pixel definition layer 20 includes a pixel limiting portion 21 and a pixel opening formed by the pixel limiting portion 21. The light emitting structure 311 is located inside the pixel opening. The pixel limiting portion 21 can enclose the light emitting structure 311 inside the pixel opening to reduce interference between adjacent light emitting structures 311 and improve the display effect of the display panel 100.

[0018] The light emitting functional layer 30 is a functional film layer in the display panel 100 for realizing the display effect. The light emitting functional layer 30 can include a plurality of light emitting structures 311 of different colors. The plurality of light emitting structures 311 are all located inside the display area. The plurality of light emitting structures 311 are arranged in intervals in the orthographic projection on the substrate 10. At least part of the different light emitting structures 311 correspond to emit light of different colors to meet the multi-color display needs of the display panel 100. Optionally, the plurality of light emitting structures 311 include at least one of a red light emitting structure 311 for emitting red light, a blue light emitting structure 311 for emitting blue light, and a green light emitting structure 311 for emitting green light.

[0019] In order to separate adjacent light emitting structures 311 and reduce the probability of current leakage and optical crosstalk between adjacent light emitting structures 311, a first separation groove C1 is arranged on the pixel limiting portion 21. The first separation groove C1 is arranged inwardly recessed along the thickness direction Z from the side surface of the pixel limiting portion 21 away from the substrate 10.

[0020] In the related art, the formation of the first separation groove C1 needs to go through coating, exposure, etching and other process steps. The groove side wall of the first separation groove C1 often appears uneven. That is, the first side surface M1 on the pixel limiting portion 21 around the first separation groove C1 has a large surface roughness. When the subsequent film layer is formed on the first side surface M1, the thickness of the subsequent film layer at different positions on the first side surface M1 is different, and even in some positions with large unevenness, an ultra-thin film layer appears. The thickness uniformity of the subsequent film layer on the first side surface M1 is poor, which affects the realization of the related functions of the subsequent film layer and thus affects the display effect of the display panel 100.

[0021] In order to reduce the surface roughness of the first side M1, improve the thickness uniformity of the subsequent film layer on the first side M1, and ensure the related performance of the subsequent film layer, the display panel 100 provided in the embodiment of the present application further includes a planarization structure 40, at least part of the planarization structure 40 is arranged inside the first partition groove C1, the planarization structure 40 encloses to form a second partition groove C2, the planarization structure 40 includes a second side M2 located at the side of the second partition groove C2, and the surface roughness of the second side M2 is less than the surface roughness of the first side M1.

[0022] It can be understood that, in the preparation process, the first partition groove C1 is first formed on the pixel defining part 21, the first partition groove C1 is recessed inward along the thickness direction Z from the side surface of the pixel defining part 21 away from the substrate 10, and then the planarization structure 40 is prepared and formed inside the first partition groove C1, the planarization structure 40 is formed on the side wall of the first partition groove C1, the planarization structure 40 does not fill the first partition groove C1, and the planarization structure 40 encloses to form the second partition groove C2 based on the arrangement of the first partition groove C1, so that after the planarization structure 40 is arranged, the pixel defining part 21 still has a partition groove to partition the adjacent light emitting structure 311.

[0023] When the planarization structure 40 is inside the first partition groove C1, the planarization structure 40 is attached to and covers the side wall of the first partition groove C1. In the preparation process of the subsequent film layer, the subsequent film layer takes the surface of the planarization structure 40 as a reference, because the surface roughness of the second side M2 is less than the surface roughness of the first side M1, the degree of concave-convex on the second side M2 is less than the degree of concave-convex on the first side M1, when the subsequent film layer is formed on the second side M2, compared with when the subsequent film layer is formed on the first side M1, the thickness uniformity is better, the difference degree of the thickness of the subsequent film layer at different positions can be reduced, so as to ensure the realization of the related function of the subsequent film layer, and improve the display effect of the display panel 100.

[0024] In summary, in the embodiment of the present application, the display panel 100 comprises a substrate 10, a pixel definition layer 20 and a light-emitting functional layer 30 arranged on one side of the substrate 10. The substrate 10 is used to carry other film layers in the display panel 100. The pixel definition layer 20 comprises a pixel limiting portion 21 and a pixel opening formed by the pixel limiting portion 21. The light-emitting structure 311 is located inside the pixel opening. The pixel limiting portion 21 can enclose the light-emitting structure 311 inside the pixel opening to reduce the interference between adjacent light-emitting structures 311 and improve the display effect of the display panel 100. In order to separate the adjacent light-emitting structures 311 and reduce the probability of current leakage and optical crosstalk between the adjacent light-emitting structures 311, a first separation groove C1 is arranged on the pixel limiting portion 21 and recessed inward along the thickness direction Z from the side surface of the pixel limiting portion 21 away from the substrate 10. Further, the display panel 100 further comprises a planarization structure 40. At least part of the planarization structure 40 is arranged inside the first separation groove C1. The planarization structure 40 encloses a second separation groove C2. The planarization structure 40 comprises a second side surface M2 located on the side of the second separation groove C2. The surface roughness of the second side surface M2 is smaller than that of the first side surface M1. In the subsequent film layer preparation process, the surface of the planarization structure 40 is used as a reference. When the subsequent film layer is formed on the second side surface M2, the thickness uniformity is better than that when the subsequent film layer is formed on the first side surface M1. The thickness difference of the subsequent film layer at different positions can be reduced to ensure the realization of the related functions of the subsequent film layer and improve the display effect of the display panel 100.

[0025] In some embodiments, referring to Figure 1 、 Figure 4 and Figure 5 , the light-emitting functional layer 30 comprises at least two light-emitting layers 31 and a connecting layer 32 located between adjacent light-emitting layers 31. The light-emitting structure 311 comprises a light-emitting portion located in the light-emitting layer 31 and a first connecting portion 321 located in the connecting layer 32. The connecting layer 32 further comprises a second connecting portion 322 located between adjacent first connecting portions 321. Part of the structure of the second connecting portion 322 is located inside the second separation groove C2.

[0026] In order to improve the light-emitting efficiency of the display panel 100, the light-emitting functional layer 30 comprises at least two light-emitting layers 31 and a connecting layer 32 located between adjacent light-emitting layers 31. The adjacent light-emitting layers 31 are connected in series through the connecting layer 32. For a single light-emitting structure 311, the light-emitting structure 311 comprises a light-emitting portion located in the light-emitting layer 31 and a first connecting portion 321 located in the connecting layer 32. The first connecting portion 321 connects the adjacent light-emitting portions in series, thereby effectively improving the light-emitting efficiency of the light-emitting structure 311.

[0027] In order to ensure the uniformity of the charge transmission on the connecting layer 32, the connecting layer 32 further comprises a second connecting part 322 between the adjacent first connecting parts 321, the second connecting part 322 connects the adjacent first connecting parts 321, and the connecting layer 32 forms a full-surface structure. The connecting layer 32 covers the pixel defining part 21 in the thickness direction Z, and part of the structure of the second connecting part 322 is located inside the second partition groove C2. The light emitting part is inside the pixel opening, the first connecting part 321 in the connecting layer 32 is also inside the pixel opening, and the second connecting part 322 in the connecting layer 32 covers and spans the pixel defining part 21. Since the first isolation groove is arranged on the pixel defining part 21, the planarization structure 40 is arranged inside the first isolation groove, the planarization structure 40 forms the second isolation groove, and part of the structure of the second connecting part 322 is inside the second isolation groove during the process of the first connecting part 321 spanning the pixel defining part 21.

[0028] Inside the first isolation groove, at least part of the structure of the second connecting part 322 is on the side of the planarization structure 40 away from the pixel defining part 21, that is, at least part of the structure of the second connecting part 322 is in contact with the second side surface M2. Since the surface roughness of the second side surface M2 is smaller than that of the first side surface M1, when the second connecting part 322 is arranged on the second side surface M2, the thickness uniformity of the second connecting part 322 can be improved, and the thickness difference of the second connecting part 322 at different positions can be reduced, so that the second connecting part 322 can reliably connect between the adjacent first connecting parts 321.

[0029] Further, based on the second connecting part 322 being formed with the second side surface M2 as the reference, compared with the second connecting part 322 being formed with the first side surface M1 as the reference, the surface roughness of the side of the second connecting part 322 away from the pixel defining part 21 can be further reduced. For the subsequent film layer prepared after the connecting layer 32, the thickness uniformity of the subsequent film layer prepared after the connecting layer 32 can also be improved with the surface of the side of the second connecting part 322 away from the pixel defining part 21 as the reference.

[0030] In some embodiments, referring to Figure 1 , Figure 4 and Figure 5 , the ratio of the minimum thickness dimension of the part of the second connecting part 322 inside the second partition groove C2 to the average thickness dimension thereof is N1, and 0.3≤N1.

[0031] In the forming process of the planarization structure 40, the planarization structure 40 covers the first side surface M1 and forms the second side surface M2, and the second connecting portion 322 in the connecting layer 32 is formed with the second side surface M2 as a reference. In actual applications, the surface roughness of the second side surface M2 can be ensured to be smaller than the surface roughness of the first side surface M1 to improve the thickness uniformity of the connecting layer 32 inside the partition groove, but the second side surface M2 is not completely flat, and the second connecting portion 322 formed on the second side surface M2 is not completely uniform in thickness, and the second connecting portion 322 still has a certain thickness difference at different positions.

[0032] When the second side surface M2 has a certain degree of unevenness, the thickness of the second connecting portion 322 at the protruding position on the second surface M4 is smaller than the thickness of the second connecting portion 322 at the recessed position on the second side surface M2. However, compared with the second connecting portion 322 directly formed on the first side surface M1, the second connecting portion 322 formed on the second side surface M2 has better thickness uniformity. The ratio of the minimum thickness size of the second connecting portion 322 formed on the second side surface M2 to the average thickness size thereof is greater than or equal to 0.3, so as to reduce the thickness difference of the second connecting portion 322 at different positions, improve the thickness uniformity of the second connecting portion 322, and ensure the connection effect of the second connecting portion 322 on the adjacent first connecting portion 321.

[0033] Exemplarily, in order to ensure the performance of the connecting layer 32, it is necessary to ensure that the average thickness of the second connecting portion 322 inside the partition groove is 1 micrometer. When the second connecting portion 322 is directly formed on the first side surface M1, due to the large surface roughness of the first side surface M1, the degree of unevenness is large, at the protruding position of the first side surface M1, the second connecting portion 322 forms a relatively thin thickness, and the thickness of the second connecting portion 322 can be between 0.1 micrometer and 0.2 micrometer, which affects the performance of the second connecting portion 322. After the planarization structure 40 is arranged, the first side surface M1 is covered by the planarization structure 40, and the second side surface M2 is formed, and the second connecting portion 322 can be directly formed on the second side surface M2. Due to the small surface roughness of the second side surface M2, the degree of unevenness is small, at the protruding position of the second side surface M2, although the second connecting portion 322 forms a relatively thin thickness, the thickness of the second connecting portion 322 can be greater than 0.3 micrometer, which can still ensure that the second connecting portion 322 has a certain thickness and will not form an ultra-thin film layer, so as to ensure the performance of the second connecting portion 322.

[0034] In some embodiments, referring to Figure 1 , Figure 2 and Figure 3 , the display panel 100 further includes a cathode layer 50 arranged on the side of the light-emitting functional layer 30 away from the substrate 10, and part of the structure of the cathode layer 50 is located inside the second partition groove C2.

[0035] The cathode layer 50 is located on the side of the light-emitting structure 311 away from the substrate 10 and transmits a cathode signal to the light-emitting structure 311. The cathode layer 50 can also be provided as a full-area structure in the display panel 100, and part of the structure of the cathode layer 50 is located inside the second partition groove C2. The display panel 100 further comprises an anode layer 60, which comprises a plurality of anodes 61 arranged at intervals, and the anodes 61 are arranged in correspondence with the light-emitting structure 311 and are located on the side of the light-emitting structure 311 facing the substrate 10. The anode layer 60 cooperates with the cathode layer 50 to drive the light-emitting structure 311 to emit light. That is, the cathode layer 50 covers and spans the loudness limiting part. Since the first isolation groove is arranged on the pixel limiting part 21, the planarization structure 40 is arranged inside the first isolation groove, and the planarization structure 40 forms the second isolation groove. During the process in which the cathode layer 50 spans the pixel limiting part 21, part of the structure of the cathode layer 50 is located inside the second isolation groove.

[0036] Inside the first isolation groove, part of the structure of the cathode layer 50 is located on the side of the planarization structure 40 away from the pixel limiting part 21, that is, part of the structure of the cathode layer 50 is in contact with the second side surface M2. Since the surface roughness of the second side surface M2 is smaller than that of the first side surface M1, when the cathode layer 50 is arranged on the second side surface M2, the thickness uniformity of the cathode layer 50 can be improved, and the thickness difference of the cathode layer 50 at different positions can be reduced, so as to ensure the performance reliability of the cathode layer 50.

[0037] Further, the cathode layer 50 can be arranged simultaneously with the connecting layer 32, and inside the first isolation groove, the cathode layer 50 is located on the side of the connecting layer 32 away from the planarization structure 40. The planarization structure 40 is arranged based on the first side surface M1, and the planarization structure 40 does not bear a function in the display panel 100, but only serves to cover the first side surface M1 and form a surface roughness smaller than the second side surface M2. The connecting layer 32 is arranged based on the second side surface M2, which can reduce the surface roughness of the side of the second connecting part 322 away from the pixel limiting part 21. The cathode layer 50 is arranged based on the surface of the side of the second connecting part 322 away from the pixel limiting part 21, which can also improve the thickness uniformity of the cathode layer 50 and ensure the performance reliability of the cathode layer 50.

[0038] In some embodiments, the ratio of the minimum thickness dimension of the part of the cathode layer 50 inside the second partition groove C2 to the average thickness dimension thereof is N2, and 0.3≤N2.

[0039] Optionally, please refer to Figure 1 , Figure 2 and Figure 3The light emitting structure 311 in the display panel 100 includes only one light emitting part, and the cathode layer 50 is directly arranged on the second side surface M2 of the planarization structure 40. In the forming process of the planarization structure 40, the planarization structure 40 covers the first side surface M1 and forms the second side surface M2, and the cathode layer 50 is formed based on the second side surface M2. In actual application, the surface roughness of the second side surface M2 can be ensured to be less than that of the first side surface M1 to improve the thickness uniformity of the cathode layer 50 inside the isolation groove, but the second side surface M2 is not completely flat, and the cathode layer 50 formed on the second side surface M2 is also not completely uniform in thickness, and the cathode layer 50 still has a certain thickness difference at different positions.

[0040] When the second side surface M2 has a certain degree of unevenness, the thickness of the cathode layer 50 at the convex position on the second surface M4 is less than that of the cathode layer 50 at the concave position on the second side surface M2. However, compared with the cathode layer 50 directly formed on the first side surface M1, the cathode layer 50 formed on the second side surface M2 has better thickness uniformity. The ratio of the minimum thickness size of the cathode layer 50 formed on the second side surface M2 to the average thickness size thereof is greater than or equal to 0.3, so as to reduce the thickness difference of the cathode layer 50 at different positions, improve the thickness uniformity of the cathode layer 50, and ensure the performance reliability of the cathode layer 50.

[0041] Optionally, referring to Figure 1 , Figure 4 and Figure 5 , the display panel 100 includes at least two light emitting parts and the connecting layer 32, and the cathode layer 50 is located on the side of the connecting layer 32 away from the planarization structure 40 inside the first isolation groove. The cathode layer 50 is formed based on the side surface of the connecting layer 32 away from the planarization structure 40, and the cathode layer 50 formed on the side surface of the connecting layer 32 away from the planarization structure 40 is also not completely uniform in thickness, and the cathode layer 50 still has a certain thickness difference at different positions. The ratio of the minimum thickness size of the cathode layer 50 formed on the side surface of the connecting layer 32 away from the planarization structure 40 to the average thickness size thereof is greater than or equal to 0.3, so as to reduce the thickness difference of the cathode layer 50 at different positions, improve the thickness uniformity of the cathode layer 50, and ensure the performance reliability of the cathode layer 50.

[0042] For example, to form the second side M2 of the cathode layer 50, to ensure the performance of the cathode layer 50, the average thickness of the cathode layer 50 in the isolation groove is 1 micron, and the cathode layer 50 is directly formed on the first side M1. Because the surface roughness of the first side M1 is large, the concave-convex degree is large, and at the convex position of the first side M1, the cathode layer 50 has a relatively thin thickness, which may be between 0.1 micron and 0.2 micron, affecting the performance of the cathode layer 50. After the planarization structure 40 is arranged, the first side M1 is covered by the planarization structure 40, and the second side M2 is formed, so that the cathode layer 50 can be directly formed on the second side M2. Because the surface roughness of the second side M2 is small, the concave-convex degree is small, and at the convex position of the second side M2, although the cathode layer 50 has a relatively thin thickness, the thickness of the cathode layer 50 can be more than 0.3 micron, which can ensure that the cathode layer 50 has a certain thickness and does not form an ultra-thin film layer, thereby ensuring the performance of the cathode layer 50.

[0043] In some embodiments, referring to Figure 1 , Figure 3 and Figure 5 , the pixel defining portion 21 includes the first bottom surface M5 at the bottom of the first isolation groove C1 and the first surface M3 away from the substrate 10, and the planarization structure 40 further includes the second bottom surface M6 at the bottom of the second isolation groove C2. The distance between the first surface M3 and the second bottom surface M6 is greater than the distance between the second bottom surface M6 and the first bottom surface M5.

[0044] The first isolation groove C1 is recessed inward along the thickness direction Z from the first surface M3 of the pixel defining portion 21 to the first bottom surface M5, and the distance between the first surface M3 and the first bottom surface M5 in the thickness direction Z is the depth of the first isolation groove C1. In the embodiments of the present application, the first isolation groove C1 further includes the planarization structure 40, and the planarization structure 40 includes the second bottom surface M6. The distance between the first bottom surface M5 and the second bottom surface M6 in the thickness direction Z is the filling size of the planarization structure 40 to the first isolation groove C1, and the distance between the second bottom surface M6 and the first surface M3 in the thickness direction Z is the depth of the second isolation groove C2.

[0045] After the planarization structure 40 is set, the depth of the partition groove is the depth of the second partition groove C2, that is, the distance dimension of the first surface M3 and the second bottom surface M6 in the thickness direction Z. In order to reduce the influence of the planarization structure 40 on the partition effect of the partition groove on the adjacent light-emitting structures 311, the distance dimension between the second bottom surface M6 and the first bottom surface M5 is set to be smaller than the distance dimension between the first surface M3 and the second bottom surface M6, so that the second partition groove C2 has a certain depth and the partition effect of the partition groove is ensured. For example, the ratio of the distance dimension between the second bottom surface M6 and the first bottom surface M5 to the distance dimension between the second bottom surface M6 and the first surface M3 can be less than 0.2, so as to reduce the influence of the planarization structure 40 on the depth of the partition groove and ensure the partition effect of the partition groove.

[0046] In some embodiments, referring to Figure 1 , Figure 3 and Figure 5 , the pixel defining part 21 includes a first surface M3 away from the substrate 10, and the planarization structure 40 further includes a second surface M4 away from the substrate 10. The second surface M4 is located on the side of the first surface M3 facing the substrate 10, or the second surface M4 is flush with the first surface M3.

[0047] During the setting of the connection layer 32 and the cathode layer 50, part of the structure of the connection layer 32 and the cathode layer 50 is still outside the first partition groove C1, and the part of the pixel defining part 21 outside the first partition groove C1 itself has good flatness. In order to reduce the influence of the planarization structure 40 on the flatness of the pixel defining part 21 outside the first partition groove C1, the planarization structure 40 is only set inside the first partition groove C1.

[0048] Optionally, the planarization structure 40 includes a second surface M4 away from the substrate 10, and the second surface M4 is located on the side of the first surface M3 facing the substrate 10. That is, the part of the planarization structure 40 inside the first partition groove C1 covers only part of the region of the first side surface M1, and the end of the first side surface M1 facing the first surface M3 is not covered by the planarization structure 40. Optionally, the second surface M4 is flush with the first surface M3, that is, the planarization structure 40 covers the entire region of the first side surface M1.

[0049] In some embodiments, the thickness of the planarization structure 40 is N3, 30A≤N3≤3000A. Considering that the planarization structure 40 needs to be formed on the first side M1, in order to facilitate the formation of the planarization structure 40, it is necessary to control the thickness of the planarization structure 40 to be greater than a certain value, and further, in order to reduce the influence of the planarization structure 40 on the depth of the partition groove, it is necessary to control the thickness of the planarization structure 40 to be less than a certain value. By controlling the thickness of the planarization structure 40 to be between 30A and 3000A, both the formation of the planarization structure 40 and the influence of the planarization structure 40 on the depth of the partition groove can be reduced, and the partition effect of the partition groove can be ensured.

[0050] In some embodiments, the depth of the first partition groove C1 is H1, 0.5μm≤H1≤0.8μm. The depth of the second partition groove C2 is H2, 0.5μm≤H2≤0.8μm.

[0051] In the preparation process, the depth of the first partition groove C1 is set according to the original size, and the depth of the first partition groove C1 is controlled to be between 0.5μm and 0.8μm. The planarization structure 40 with a thin thickness is arranged in the first partition groove C1, and the thickness of the planarization structure 40 is controlled to be between 30A and 50A, so that the depth of the second partition groove C2 formed by the planarization structure 40 is between 0.5μm and 0.8μm, so as to ensure the partition effect of the partition groove.

[0052] In some embodiments, the depth of the first partition groove C1 is H1, 0.8μm≤H1≤1μm. The depth of the second partition groove C2 is H2, 0.5μm≤H2≤0.8μm.

[0053] In the preparation process, the depth of the first partition groove C1 is set according to the original size, and the depth of the first partition groove C1 is controlled to be between 0.5μm and 0.8μm. The planarization structure 40 with a thin thickness is arranged in the first partition groove C1, and the thickness of the planarization structure 40 is controlled to be between 30A and 50A, so that the depth of the second partition groove C2 formed by the planarization structure 40 is between 0.5μm and 0.8μm, so as to ensure the partition effect of the partition groove.

[0054] In some embodiments, please refer to Figure 1 , Figure 3 and Figure 5 , the pixel defining part 21 includes a first bottom surface M5 located at the bottom of the first partition groove C1 in the thickness direction Z, and the planarization structure 40 further includes a second bottom surface M6 located at the bottom of the second partition groove C2 in the thickness direction Z, and the surface roughness of the second bottom surface M6 is less than that of the first bottom surface M5.

[0055] The planarization structure 40 forms the second side surface M2 while covering the first side surface M1 on the pixel defining portion 21, and forms the second bottom surface M6 while covering the first bottom surface M5 on the pixel defining portion 21. In the preparation of the first partition groove C1, the first bottom surface M5 also has a large surface roughness. By covering the first bottom surface M5 with the planarization structure 40 and forming the second bottom surface M6, the surface roughness of the second bottom surface M6 is smaller than that of the first bottom surface M5, which can improve the thickness uniformity of the subsequent film layer at different positions on the first bottom surface M5.

[0056] In some embodiments, the surface roughness of the second side surface M2 is M1, and M1≤300A. And / or, the surface roughness of the second bottom surface M6 is M2, and M2≤300A. Controlling the surface size of the second side surface M2 and the second bottom surface M6 to be below 300A can form a good flatness on the second side surface M2 and the second bottom surface M6, which facilitates the preparation of the subsequent film layer.

[0057] In some embodiments, referring to Figure 1 , Figure 2 and Figure 6 , the first partition groove C1 includes a first sub-groove C11 extending along the first direction X and a second sub-groove C12 extending along the second direction Y, the first sub-groove C11 and the second sub-groove C12 are in communication with each other, and the first direction X and the second direction Y are both parallel to the plane in which the substrate 10 is located and are arranged to intersect each other. The planarization structure 40 includes a first sub-portion extending along the first direction X and a second sub-portion extending along the second direction Y, at least part of the first sub-portion is arranged inside the first sub-groove C11, and at least part of the second sub-portion is arranged inside the second sub-groove C12.

[0058] In the display panel 100, a plurality of light emitting structures 311 are arranged side by side along the first direction X and the second direction Y, and the pixel defining portion 21 has both a portion extending along the first direction X and a portion extending along the second direction Y to define and distinguish the plurality of light emitting structures 311. The first partition groove C1 is arranged on the pixel defining portion 21, and the first partition groove C1 includes a first sub-groove C11 extending along the first direction X and a second sub-groove C12 extending along the second direction Y, and the first sub-groove C11 and the second sub-groove C12 are in communication with each other.

[0059] The planarization structure 40 includes a first sub-portion located inside the first sub-groove C11 and a second sub-portion located inside the second sub-groove C12, the first sub-portion extends along the first direction X and covers the first sub-groove C11, and the second sub-portion extends along the second direction Y and covers the second sub-groove C12, so as to cover the first partition groove C1 and improve the thickness uniformity of the subsequent film layer.

[0060] In some embodiments, referring to Figure 1 , Figure 2 and Figure 7The first partition groove C1 includes a plurality of first sub-grooves C11 located on one side of the light emitting structure 311 along the first direction X and a plurality of second sub-grooves C12 located on one side of the light emitting structure 311 along the second direction Y. The first sub-grooves C11 extend along the second direction Y, and the second sub-grooves C12 extend along the first direction X. The first direction X and the second direction Y are both parallel to the plane in which the substrate 10 is located and are arranged to intersect each other. The planarization structure 40 includes a plurality of first sub-parts and a plurality of second sub-parts. At least part of the first sub-parts is arranged inside the first sub-grooves C11, and at least part of the second sub-parts is arranged inside the second sub-grooves C12.

[0061] The first sub-grooves C11 and the second sub-grooves C12 can also be spaced apart from each other. The first sub-parts extend along the first direction X and cover the first sub-grooves C11, and the second sub-parts extend along the second direction Y and cover the second sub-grooves C12, so as to cover the first partition groove C1 and improve the thickness uniformity of the subsequent film layer.

[0062] In some embodiments, the display panel 100 further includes a planarization layer 70 arranged between the substrate 10 and the pixel definition layer 20. The planarization structure 40 and the planarization layer 70 are made of the same material. Arranging the planarization structure 40 and the planarization layer 70 to be made of the same material can directly prepare the newly added film layer structure by using the material of the existing film layer structure, thereby simplifying the preparation process of the display panel 100 and improving the preparation efficiency of the display panel 100.

[0063] In some embodiments, the display panel 100 further includes an encapsulation layer 80 arranged on the side of the cathode layer 50 away from the light emitting structure 311. The encapsulation layer 80 is a film layer in the display panel 100 for realizing an encapsulation function. The encapsulation layer 80 is arranged on the side of the light emitting functional layer 30 away from the substrate 10. The encapsulation layer 80 can effectively block water and oxygen in the external environment from entering the light emitting functional layer 30, thereby improving the reliability and service life of the display panel 100.

[0064] In the second aspect, referring to Figure 8 The display device 200 includes all the technical features of the display panel 100 and has all the technical effects of the display panel 100, and details are not described herein.

[0065] Although the present application has been described with reference to the preferred embodiments, various modifications can be made to the application and equivalents thereof without departing from the scope of the application. In particular, the technical features mentioned in each embodiment can be combined in any manner as long as there is no structural conflict. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A display panel, characterized by, The application relates to a substrate, a pixel definition layer arranged on one side of the substrate along a thickness direction, the pixel definition layer comprising a pixel limiting part and a pixel opening formed by the pixel limiting part, a light-emitting functional layer arranged on one side of the substrate along the thickness direction, the light-emitting functional layer comprising a plurality of light-emitting structures located inside the pixel opening, a first partition groove arranged on the side surface of the pixel limiting part away from the substrate along the thickness direction, and a planarization structure, at least part of the planarization structure being arranged inside the first partition groove, the planarization structure forming a second partition groove. The pixel limiting part comprises a first side surface located on the periphery of the first partition groove, the planarization structure comprises a second side surface located on the periphery of the second partition groove, and the surface roughness of the second side surface is smaller than that of the first side surface. The light-emitting functional layer comprises at least two light-emitting layers and a connecting layer located between adjacent light-emitting layers, the light-emitting structure comprises a light-emitting part located in the light-emitting layer and a first connecting part located in the connecting layer, and the connecting layer further comprises a second connecting part located between adjacent first connecting parts. The ratio of the minimum thickness dimension of the second connecting part to the average thickness dimension thereof inside the second partition groove is N1, and 0.3<=N1. The application further comprises a cathode layer arranged on the side of the light-emitting functional layer away from the substrate, part of the structure of the cathode layer being located inside the second partition groove. The ratio of the minimum thickness dimension of the cathode layer to the average thickness dimension thereof inside the second partition groove is N2, and 0.3<=N2. The pixel limiting part comprises a first bottom surface located at the bottom of the first partition groove and a first surface away from the substrate, and the planarization structure further comprises a second bottom surface located at the bottom of the second partition groove.

2. The display panel of claim 1, wherein, The distance dimension between the first surface and the second bottom surface is greater than the distance dimension between the second bottom surface and the first bottom surface. The pixel limiting part comprises a first surface away from the substrate, and the planarization structure further comprises a second surface away from the substrate.

3. The display panel of claim 2, wherein, The second surface is located on the side of the first surface facing the substrate, or the second surface is arranged flush with the first surface.

4. The display panel of claim 1, wherein, The thickness dimension of the planarization structure is N3, and 30A<=N3<=3000A.

5. The display panel of claim 4, wherein, The depth of the first partition groove is H1, and 0.5um<=H1<=0.8um.

6. The display panel of claim 1, wherein, The depth of the second partition groove is H2, and 0.5um<=H2<=0.8um. The depth of the first partition groove is H1, and 0.8um<=H1<=1um.

7. The display panel of claim 1, wherein, The depth of the second partition groove is H2, and 0.5um<=H2<=0.8um. The pixel limiting part comprises a first bottom surface located at the bottom of the first partition groove along the thickness direction, and the planarization structure further comprises a second bottom surface located at the bottom of the second partition groove along the thickness direction, and the surface roughness of the second bottom surface is smaller than that of the first bottom surface.

8. The display panel of claim 1, wherein, ​ 9. The display panel of claim 8, wherein, ​ ​ 10. The display panel of claim 8, wherein, ​ ​ 11. The display panel of claim 1, wherein, ​ 12. The display panel of claim 11, wherein, A surface roughness of the second side is M1, M1≤300A; And / or, a surface roughness of the second bottom is M2, M2≤300A.

13. The display panel of claim 1, wherein, The first partition groove comprises a first sub-groove extending along a first direction and a second sub-groove extending along a second direction, the first sub-groove and the second sub-groove are in communication with each other, the first direction and the second direction are both parallel to the plane where the substrate is located and are arranged intersectingly; The planarization structure comprises a first sub-portion extending along the first direction and a second sub-portion extending along the second direction, at least part of the first sub-portion is arranged inside the first sub-groove, and at least part of the second sub-portion is arranged inside the second sub-groove; Or, the first partition groove comprises a plurality of first sub-grooves located on one side of the light-emitting structure along the first direction and a plurality of second sub-grooves located on one side of the light-emitting structure along the second direction, the first sub-grooves extend along the second direction, and the second sub-grooves extend along the first direction, the first direction and the second direction are both parallel to the plane where the substrate is located and are arranged intersectingly; The planarization structure comprises a plurality of first sub-portions and a plurality of second sub-portions, at least part of the first sub-portions is arranged inside the first sub-grooves, and at least part of the second sub-portions is arranged inside the second sub-grooves.

14. The display panel of claim 1, wherein, A planarization layer is further arranged between the substrate and the pixel definition layer; The planarization structure and the planarization layer comprise the same material.

15. A display device comprising: The display panel of any one of claims 1-14 is included.

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