Method for controlling bus capacitor ripple current and related device

Abstract

This application discloses a method and related apparatus for controlling the ripple current of a bus capacitor. The method is applied to a phase-shifted full-bridge DC-DC converter and includes: real-time acquisition of the output voltage of the phase-shifted full-bridge DC-DC converter and the capacitor temperature of the bus capacitor; calculation of the effective duty cycle under the current operating state based on the output voltage; determination of whether the effective duty cycle is in the high ripple current range; execution of a first control strategy when the effective duty cycle is in the high ripple current range; determination of whether the capacitor temperature is greater than a preset temperature when the capacitor temperature is greater than the preset temperature; and execution of a second control strategy to adjust the switching frequency when the effective duty cycle is in the high ripple current range. This reduces the ripple current of the bus capacitor, thereby reducing the number of bus capacitors used in the system, reducing costs, extending the service life of the bus capacitor, and improving the reliability of the charging module.

Description

Technical Field

[0001] This application relates to the field of charging technology, and in particular to a method and related apparatus for controlling bus capacitor ripple current. Background Technology

[0002] With the acceleration of global economic development and industrialization and urbanization, the demand for energy in various fields such as electricity, transportation and industry has surged. In addition, due to global climate change, the number and demand for electric vehicles and charging piles have increased dramatically every year. As the market develops and improves, users have higher and higher requirements for the experience of charging modules. The market needs more efficient and reliable charging modules, and the application scenarios of charging modules are becoming more and more severe.

[0003] The current charging pile market requires modules with higher power, smaller size, and higher efficiency. Therefore, while increasing the power of a single module, it is necessary to maintain a smaller size to save internal space in the charging pile. This requires reducing the heat dissipation area of ​​the internal components and the number of components in the module, which greatly challenges the lifespan of the components.

[0004] Current DC-DC charging modules use a phase-shifted full-bridge topology. To meet the current market demand for high power and small size, the current DC-DC topology has a large bus capacitor ripple current, so more bus capacitors are required, which makes it impossible to achieve the goal of reducing size and cost. Summary of the Invention

[0005] This application provides a method and related apparatus for controlling the ripple current of a bus capacitor, aiming to reduce the ripple current of the bus capacitor by controlling the switching frequency and duty cycle under different voltages, thereby reducing the number of bus capacitors used, reducing costs, extending the service life of the bus capacitors, and improving the reliability of the charging module.

[0006] In a first aspect, this application provides a method for controlling bus capacitor ripple current, applied to a phase-shifted full-bridge DC-DC converter, the method comprising:

[0007] The output voltage and bus capacitor temperature of the phase-shifted full-bridge DC-DC converter are collected in real time.

[0008] Calculate the effective duty cycle under the current operating state based on the output voltage;

[0009] Determine whether the effective duty cycle is in the high ripple current range. The high ripple current range is the duty cycle range that indicates that the ripple current of the bus capacitor is in the high value region.

[0010] When the effective duty cycle is in the high ripple current range, the first control strategy is executed;

[0011] If the effective duty cycle is still in the high ripple current range after the first control strategy is executed, then it is determined whether the capacitor temperature is greater than the preset temperature. The preset temperature is the rated temperature that represents the bus capacitor reaching the expected working life.

[0012] When the capacitor temperature is higher than the preset temperature, the second control strategy is executed to adjust the switching frequency in order to reduce the ripple current of the bus capacitor.

[0013] In one possible embodiment, determining whether the effective duty cycle is in the high ripple current range includes: within one switching cycle, determining the functional relationship between the effective value of the ripple current of the bus capacitor and the duty cycle; and selecting, based on the functional relationship, the duty cycle range in which the effective value of the ripple current of the bus capacitor is greater than a set threshold as the high ripple current range.

[0014] In one possible embodiment, executing the first control strategy includes: determining the magnitude of the effective duty cycle and the target duty cycle, wherein the target duty cycle refers to the duty cycle corresponding to the maximum effective value of the ripple current of the bus capacitor, and the target duty cycle is within the high ripple current range; if the effective duty cycle is greater than the target duty cycle, then reducing the bus voltage until the effective duty cycle is less than the minimum value of the high ripple current range; if the effective duty cycle is less than the target duty cycle, then increasing the bus voltage until the effective duty cycle is greater than the maximum value of the high ripple current range; and recalculating the effective duty cycle.

[0015] In one possible embodiment, the method further includes: when the bus voltage is reduced to the lower limit of the output or increased to the upper limit of the output, the effective duty cycle is in the high ripple current range, then it is determined whether the capacitor temperature is greater than the preset temperature, and a determination result is obtained; based on the determination result, it is determined whether to execute the second control strategy.

[0016] In one possible embodiment, the execution of the second control strategy to adjust the switching frequency includes: when the effective duty cycle is less than the target duty cycle, increasing the switching frequency according to a second functional relationship, the second functional relationship being a characterization of the relationship between the output voltage and the capacitor temperature and the switching frequency, the second functional relationship indicating that the switching frequency is positively correlated with the output voltage and positively correlated with the capacitor temperature; when the effective duty cycle is greater than the target duty cycle, increasing the switching frequency according to a third functional relationship, the third functional relationship indicating that the switching frequency is negatively correlated with the output voltage and positively correlated with the capacitor temperature.

[0017] In one possible embodiment, the method further includes: when the bus voltage is the rated voltage and the output current of the bus capacitor is the rated output current, changing the duty cycle and monitoring the effective value of the ripple current of the bus capacitor in real time; recording the duty cycle corresponding to when the effective value of the ripple current of the bus capacitor reaches its peak value, and determining it as the target duty cycle.

[0018] In one possible embodiment, before the real-time acquisition of the output voltage and bus capacitor temperature of the phase-shifted full-bridge DC-DC converter, the method further includes: initializing the received circuit parameters after detecting grid connection; upon receiving a power-on command, detecting whether an alarm signal is received; if no alarm signal is received, performing a sampling operation according to the power-on command, wherein the sampling operation refers to the operation of the phase-shifted full-bridge DC-DC converter acquiring the output voltage and the capacitor temperature.

[0019] Secondly, this application provides a bus capacitor ripple current control device applied to a phase-shifted full-bridge DC-DC converter. The device includes: an acquisition unit, a calculation unit, a first judgment unit, a first control unit, a second judgment unit, and a second control unit. Specifically, the acquisition unit is used to collect the output voltage and bus capacitor temperature of the phase-shifted full-bridge DC-DC converter in real time. The calculation unit is used to calculate the effective duty cycle under the current operating state based on the output voltage. The first judgment unit is used to determine whether the effective duty cycle is in a high ripple current range, where the high ripple current range is a characteristic of... The bus capacitor's ripple current is in the high-value duty cycle range; the first control unit is specifically used to execute a first control strategy when the effective duty cycle is in the high ripple current range; the second judgment unit is specifically used to determine whether the capacitor temperature is greater than a preset temperature if the effective duty cycle is still in the high ripple current range after executing the first control strategy, the preset temperature being the rated temperature representing the bus capacitor reaching its expected working life; the second control unit is specifically used to execute a second control strategy to adjust the switching frequency to reduce the bus capacitor's ripple current when the capacitor temperature is greater than the preset temperature.

[0020] Thirdly, embodiments of this application provide an electronic device, including a processor and a memory, wherein the memory is used to store one or more programs and is configured to be executed by the processor, and the programs include instructions for performing the steps in the first aspect of embodiments of this application.

[0021] Fourthly, embodiments of this application provide a computer-readable storage medium storing a computer program for electronic data interchange, wherein the computer program causes a computer to perform some or all of the steps described in the first aspect of embodiments of this application.

[0022] Fifthly, embodiments of this application provide a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps described in the first aspect of embodiments of this application. The computer program product may be a software installation package.

[0023] As can be seen, in the bus capacitor ripple current control method provided in this application embodiment, firstly, the output voltage of the phase-shifted full-bridge DC-DC converter and the capacitor temperature of the bus capacitor are collected in real time; secondly, based on the output voltage, the effective duty cycle under the current operating state is calculated; then, it is determined whether the effective duty cycle is in the high ripple current range, which is a duty cycle range that indicates the ripple current of the bus capacitor is in a high value region; when the effective duty cycle is in the high ripple current range, the first control strategy is executed; then, if the effective duty cycle is still in the high ripple current range after executing the first control strategy, it is determined whether the capacitor temperature is greater than the preset temperature, which is the rated temperature that indicates the bus capacitor reaches its expected working life; finally, when the capacitor temperature is greater than the preset temperature, the second control strategy is executed to adjust the switching frequency to reduce the ripple current of the bus capacitor. Thus, by controlling the switching frequency and duty cycle under different voltages, the ripple current of the bus capacitor is reduced, thereby reducing the number of bus capacitors used in the system, achieving the effect of reducing costs, while also extending the service life of the bus capacitor, improving the reliability and high power density of the charging module. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of the topology of a phase-shifted full-bridge circuit provided in an embodiment of this application;

[0026] Figure 2 This is a schematic flowchart of a method for controlling bus capacitor ripple current according to an embodiment of this application;

[0027] Figure 3This is a waveform diagram of the operation of a phase-shifted full-bridge circuit provided in an embodiment of this application;

[0028] Figure 4 This is a schematic diagram of the operation of a phase-shifted full-bridge circuit provided in an embodiment of this application;

[0029] Figure 5 This is a schematic diagram of another phase-shifted full-bridge circuit provided in an embodiment of this application;

[0030] Figure 6 This is a graph showing the functional relationship between ripple current and duty cycle provided in an embodiment of this application.

[0031] Figure 7 This is a schematic flowchart illustrating a method for controlling bus capacitor ripple current according to an embodiment of this application.

[0032] Figure 8 This is a functional unit block diagram of a bus capacitor ripple current control device provided in an embodiment of this application;

[0033] Figure 9 This is a structural block diagram of an electronic device provided in an embodiment of this application. Detailed Implementation

[0034] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0035] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but in some embodiments includes steps or units not listed, or in some embodiments includes other steps or units inherent to these processes, methods, products, or apparatuses.

[0036] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0037] In the embodiments of this application, "and / or" describes the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent the following three situations: A exists alone; A and B exist simultaneously; B exists alone. Among them, A and B can be singular or plural.

[0038] In this embodiment, the symbol " / " can indicate that the preceding and following objects are in an "or" relationship. Alternatively, the symbol " / " can also represent a division sign, i.e., performing a division operation. For example, A / B can mean A divided by B.

[0039] In the embodiments of this application, "at least one item" or its similar expression refers to any combination of these items, including any combination of a single item or a plurality of items. "One or more" means one or more, while "multiple" means two or more. For example, "at least one item" of a, b, or c can represent the following seven cases: a, b, c; a and b; a and c; b and c; a, b, and c. Each of a, b, and c can be an element or a set containing one or more elements.

[0040] In the embodiments of this application, "equal to" can be used with "greater than" and is applicable to technical solutions used when "greater than" is used; it can also be used with "less than" and is applicable to technical solutions used when "less than" is used. When "equal to" is used with "greater than", it is not used with "less than"; when "equal to" is used with "less than", it is not used with "greater than".

[0041] With the acceleration of global economic development and industrialization and urbanization, the demand for energy in various sectors such as electricity, transportation, and industry has surged. Coupled with global climate change, the number and demand for electric vehicles and charging piles have increased dramatically each year. As the market develops and matures, users have increasingly higher expectations and requirements for charging modules, demanding more efficient and reliable modules. The application scenarios for charging modules are also becoming increasingly demanding. The current charging pile market requires modules with higher power, smaller size, and higher efficiency. Therefore, while increasing the power of a single module, it is necessary to maintain a smaller size to save internal space in the charging pile. This requires reducing the heat dissipation area of ​​internal components and the number of components, significantly challenging the lifespan of the components. Existing DC-DC charging modules use a phase-shifted full-bridge topology. To meet the current market demand for high power and small size, the current DC-DC topology has a large ripple current in the bus capacitors, thus requiring a larger number of bus capacitors, failing to achieve the goals of reducing size and cost.

[0042] This application provides a method and related device for controlling bus capacitor ripple current. 1. The module calculates the corresponding duty cycle D, determines whether the duty cycle D is within the duty cycle interval [a, b], and adjusts the bus voltage to make the duty cycle D deviate from the interval [a, b]. 2. The temperature of the bus capacitor is sampled in real time. If the temperature T of the bus capacitor is higher than Ta, where Ta is the temperature corresponding to the module's set lifespan value, the switching frequency is adjusted based on the output voltage and the capacitor temperature T. This reduces the ripple current of the bus capacitor, decreases the number of bus capacitors, and increases the lifespan of the bus capacitors, thereby achieving high power density and high reliability of the charging module.

[0043] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0044] Please see Figure 1 , Figure 1 This is a schematic diagram of the topology of a phase-shifted full-bridge circuit provided in an embodiment of this application, as shown below. Figure 1 As shown, it includes Vbus+, Vbus-, bus capacitor C1, equivalent series resistance ESR1, and switching transistors Q1, Q2, Q3, and Q4.

[0045] Vbus is the bus voltage, also commonly referred to as the DC bus voltage. The positive and negative terminals of Vbus are connected to the two DC bus terminals of the full-bridge circuit: the positive terminal Vbus+ is connected to the upper transistor of the bridge arm, the drain or collector of switching transistors Q1 and Q3; the negative terminal Vbus-, usually ground (GND), is connected to the lower transistor of the bridge arm, the source or emitter of switching transistors Q2 and Q4. The bus capacitor C1 is connected in parallel between the input DC buses, acting as an energy pool to absorb power pulsations from the preceding stage and provide instantaneous power support for the pulsed power draw of the subsequent full-bridge stage, thus maintaining the stability of the bus voltage. The equivalent series resistance (ESR1) is used to represent the various parasitic resistances within a component as a resistor connected in series across an ideal component, accurately describing the non-ideal characteristics of the component under high-frequency operating conditions. Its core components include: the metal resistance of the component leads; the contact resistance between the electrodes and the dielectric; the internal resistance of the dielectric itself; and the additional resistance caused by the skin effect and proximity effect at high frequencies.

[0046] When switches Q1 and Q4 are on, the current path is from Vbus+ to switch Q1, then to switch Q4, and finally to Vbus-. During this time, energy flows from the bus capacitor C1 and the preceding stage to the load, and the bus capacitor C1 discharges. When switch Q1 is off, the preceding stage needs to replenish energy, and current flows into the bus capacitor C1 to charge it. Within one switching cycle, the bus capacitor C1 repeatedly undergoes charging and discharging, and its current ic(t) is bidirectionally pulsating. The effective value of this pulsating current is the ripple current Icrms.

[0047] Please see Figure 2 , Figure 2 This is a flowchart illustrating a method for controlling bus capacitor ripple current according to an embodiment of this application. Figure 2 The method shown is applied to Figure 1 The phase-shifted full-bridge circuit shown includes the following steps:

[0048] Step S210: Real-time acquisition of the output voltage of the phase-shifted full-bridge DC-DC converter and the capacitor temperature of the bus capacitor.

[0049] Step S220: Calculate the effective duty cycle under the current operating state based on the output voltage.

[0050] The effective duty cycle refers to the ratio of the time during which energy is effectively transferred from the primary winding to the secondary winding in a phase-shifted full-bridge DC-DC converter within one switching cycle to the switching cycle itself. Specifically, based on the energy transfer characteristics of the phase-shifted full-bridge topology, it is derived from the ratio of the output voltage Vo to the bus voltage Vbus of the phase-shifted full-bridge DC-DC converter, i.e., the effective duty cycle D = Vo / Vbus.

[0051] Specifically, please refer to Figure 3 , Figure 3This is a waveform diagram of the operation of a phase-shifted full-bridge circuit provided in an embodiment of this application, such as... Figure 3 As shown, D(t): effective duty cycle, I L : Average current of the output differential mode, Δi L (t): Amplitude of output differential-mode ripple current, i L (t): Ripple current on the output differential mode, ic(t): Current flowing through the bus capacitor.

[0052] When the transformer turns ratio is 1:1, the operating mode analysis is as follows:

[0053] Throughout the entire cycle, according to the law of power conservation: ,but:

[0054] Average input current: .

[0055] When [t0, t1]: Switches Q1 and Q4 are turned on, energy is transferred from the primary side to the secondary side, and bus capacitor C1 discharges. For details, please refer to [link to relevant documentation]. Figure 4 , Figure 4 This is a schematic diagram of the operation of a phase-shifted full-bridge circuit provided in an embodiment of this application, as shown below. Figure 4 As shown, the preamplifier of the phase-shifted full-bridge circuit is PFC (Power Factor Correction).

[0056] Assuming the current flowing out from the DC input side is Iin, the current flowing out of the bus capacitor is Ic, and the rated output current is Io, then:

[0057] ;

[0058] Consider the ripple current Δi on the differential mode inductor Lf. L Then the maximum ripple current of the bus capacitor is:

[0059] ;

[0060] Please see Figure 5 , Figure 5 This is a schematic diagram of another phase-shifted full-bridge circuit provided in the embodiments of this application, as shown below. Figure 5 As shown, at [t1, t2], switch Q1 is turned off, the primary side continues freewheeling, and the PFC side (same as above) continues freewheeling. Figure 4 The PFC side charges the bus capacitor C1; therefore, it can be concluded that:

[0061] ;

[0062] Effective value of bus capacitor ripple current within one cycle:

[0063] ,in, ;

[0064] Where Icrms is the effective value of the ripple current of the bus capacitor C1, reflecting the average fluctuation intensity of the ripple current, and is used for power demand; D is the effective duty cycle of the phase-shifted full-bridge topology; Δi L is the current ripple amplitude of the primary resonant inductor (or energy storage inductor), reflecting the magnitude of the inductor current fluctuation within one switching cycle; Vin is the bus voltage output from the preceding PFC stage, i.e., the DC input voltage of the phase-shifted full-bridge topology; Lf is the primary resonant inductor or energy storage inductor; T is the switching period, T=1 / , This refers to the switching frequency.

[0065] set up: ;

[0066] Where k is a coefficient defined in the derivation process, reflecting Vin, Lf, The combined effect of the ripple is summarized into the following formula:

[0067] ;

[0068] In one possible embodiment, the method further includes: when the bus voltage is the rated voltage and the output current of the bus capacitor is the rated output current, changing the duty cycle and monitoring the effective value of the ripple current of the bus capacitor in real time; recording the duty cycle corresponding to when the effective value of the ripple current of the bus capacitor reaches its peak value, and determining it as the target duty cycle.

[0069] Specifically, please refer to Figure 6 , Figure 6 This is a graph illustrating the functional relationship between ripple current and duty cycle provided in an embodiment of this application, such as... Figure 6 As shown, when the duty cycle D varies in the interval [0, 1], the effective value of the ripple current flowing through the bus capacitor has a maximum value Icrms_max, at which point the duty cycle is the target duty cycle dm. Furthermore, according to the expression for Icrms, when the duty cycle D is fixed, the ripple current flowing through the bus capacitor has a maximum value Icrms_max. As the current increases, the effective value of the ripple current gradually decreases.

[0070] Step S230: Determine whether the effective duty cycle is in the high ripple current range.

[0071] The high ripple current range is the duty cycle range that characterizes the high value region of the ripple current of the bus capacitor. Specifically, the high ripple current range is the duty cycle range that characterizes the high value region of the effective value of the ripple current Icrms of the bus capacitor (≥Icrms_max×k1, where k1 is the ripple current proportional coefficient, with a value range of 0.7~0.9), denoted as [d1, d3].

[0072] Step S240: When the effective duty cycle is in the high ripple current range, execute the first control strategy.

[0073] The first control strategy is an active control method that adjusts the bus voltage of the phase-shifted full-bridge DC-DC converter to make the effective duty cycle D deviate from [d1, d3] when the effective duty cycle D is in the high ripple current range [d1, d3].

[0074] Step S250: If the effective duty cycle is still in the high ripple current range after the first control strategy is executed, then determine whether the capacitor temperature is greater than the preset temperature.

[0075] The preset temperature is the rated temperature at which the bus capacitor reaches its expected service life. For example, when the bus capacitor operates continuously at the preset temperature Ta, its capacitance decay rate and leakage current growth rate both meet the 5-year service life requirement. The preset temperature Ta is usually set between 65 and 85°C, and the specific value is adjusted according to the capacitor model.

[0076] Step S260: When the capacitor temperature is higher than the preset temperature, the second control strategy is executed to adjust the switching frequency in order to reduce the ripple current of the bus capacitor.

[0077] The second control strategy involves dynamically adjusting the switching frequency when the effective duty cycle D remains within the high ripple current range [d1, d3] after the first control strategy is executed, and the capacitor temperature T exceeds the preset temperature Ta. This is a supplementary control method to further reduce bus capacitor ripple current.

[0078] As can be seen, in the bus capacitor ripple current control method provided in this application embodiment, the output voltage of the phase-shifted full-bridge DC-DC converter and the capacitor temperature of the bus capacitor are first collected in real time; secondly, the effective duty cycle under the current operating state is calculated based on the output voltage; then, it is determined whether the effective duty cycle is in the high ripple current range, which is a duty cycle range that indicates the ripple current of the bus capacitor is in a high value region; when the effective duty cycle is in the high ripple current range, the first control strategy is executed; then, if the effective duty cycle is still in the high ripple current range after executing the first control strategy, it is determined whether the capacitor temperature is greater than the preset temperature, which is the rated temperature that indicates the bus capacitor reaches its expected working life; finally, when the capacitor temperature is greater than the preset temperature, the second control strategy is executed to adjust the switching frequency to reduce the ripple current of the bus capacitor. Thus, by controlling the switching frequency and duty cycle under different voltages, the ripple current of the bus capacitor is reduced, thereby reducing the number of bus capacitors used in the system, achieving the effect of reducing costs, while also extending the service life of the bus capacitor, improving the reliability and high power density of the charging module.

[0079] In a possible embodiment, determining whether the effective duty cycle is within the high-ripple current range includes: within a switching period, determining the functional relationship between the effective value of the ripple current of the bus capacitor and the duty cycle; according to the functional relationship, selecting the duty cycle range where the effective value of the ripple current of the bus capacitor is greater than the set threshold as the high-ripple current range.

[0080] Here, the switching period refers to the time for the power switching tubes of the phase-shifted full-bridge DC-DC converter to complete one conduction and turn-off cycle. The functional relationship between the effective value of the ripple current of the bus capacitor and the duty cycle is Icrms = f(D);

[0081] For the phase-shifted full-bridge topology, its output voltage is proportional to the effective energy transfer duty cycle D. According to the output voltage Vo, the duty cycle D corresponding to the output voltage Vo is calculated inside the module. Assuming that the duty cycle corresponding to Vo1 is d1, the output voltage is Vo2 corresponding to the duty cycle is dm, and at this time the effective value of the bus ripple current is the largest, the duty cycle corresponding to Vo3 is d3 (d1 < dm < d3), then the high-ripple current range is [d1, d3].

[0082] It can be seen that in this embodiment, by determining the functional relationship between the effective value of the ripple current of the bus capacitor and the duty cycle, the high-ripple current range is determined, so as to accurately lock the duty cycle range where the ripple current is at a high-risk level, providing an objective and reliable judgment basis for the triggering of subsequent control strategies, thereby improving the pertinence of the control strategy.

[0083] In a possible embodiment, implementing the first control strategy includes: judging the magnitude of the effective duty cycle and the target duty cycle. The target duty cycle refers to the duty cycle corresponding to the maximum value of the effective value of the ripple current of the bus capacitor, and the target duty cycle is within the high-ripple current range; if the effective duty cycle is greater than the target duty cycle, then reduce the bus voltage until the effective duty cycle is less than the minimum value of the high-ripple current range; if the effective duty cycle is less than the target duty cycle, then increase the bus voltage until the effective duty cycle is greater than the maximum value of the high-ripple current range; recalculate the effective duty cycle.

[0084] Here, the target duty cycle is the above-mentioned dm, and at this time the effective value of the bus ripple current is the largest. Specifically, the target duty cycle refers to the effective duty cycle corresponding to the maximum value Icrms_max of the effective value of the ripple current of the bus capacitor when the phase-shifted full-bridge DC-DC converter is under standard working conditions (ambient temperature 25°C, rated bus voltage Vbus, rated output current Io). The target duty cycle dm is the central reference value of the high-ripple current range [d1, d3], satisfying (d1 < dm < d3).

[0085] Specifically, when the effective duty cycle D is greater than the target duty cycle, that is, D ∈ (dm, d3], the ripple current increases as D decreases. Therefore, the first control strategy is adopted to reduce the bus voltage Vbus. According to the formula , where Vo is constant. When Vbus decreases, D increases accordingly. Continuously reduce Vbus until the recalculated effective duty cycle D > d3. At this time, D gets out of the high-ripple range, and the ripple current drops below the set threshold. Similarly, when the effective duty cycle D is less than the target duty cycle, that is, D ∈ [d1, dm), the ripple current increases as D increases. The first control strategy is adopted to increase the bus voltage Vbus. According to the formula , where Vo is constant. When Vbus increases, D decreases accordingly. Continuously increase Vbus until the recalculated effective duty cycle D < d1. At this time, D gets out of the high-ripple range, and the ripple current drops below the set threshold.

[0086] Among them, during the process of raising and lowering the bus voltage, upper and lower voltage limits need to be set to prevent device damage or abnormal operation of the converter caused by too high or too low voltage: the upper bus voltage limit Vbus_max does not exceed the maximum output voltage of the previous-stage PFC topology to avoid overvoltage protection of the PFC circuit; the lower bus voltage limit Vbus_min is not lower than the minimum bus voltage required for the converter to maintain the rated output current to ensure the energy transfer ability from the primary side to the secondary side.

[0087] Specifically, in a possible embodiment, the method further includes: when the bus voltage is reduced to the output lower limit or the bus voltage is increased to the output upper limit, and the effective duty cycle is in the high-ripple current range, determine whether the capacitor temperature is greater than the preset temperature to obtain a judgment result; according to the judgment result, determine whether to execute the second control strategy.

[0088] Among them, if the effective duty cycle still does not get out of the high-ripple range after being adjusted to the voltage upper and lower limits, and there is no adjustment space for the first control strategy, the second control strategy needs to be started as a backup control strategy to adjust the switching frequency to further suppress the ripple current.

[0089] It can be seen that in this embodiment, by judging the size relationship between the effective duty cycle and the target duty cycle, and adjusting the execution of the first control strategy according to the size relationship between the effective duty cycle and the target duty cycle, the effective duty cycle gets out of the high-ripple current range. In this way, the response delay problem caused by blind adjustment is avoided. The first control strategy only adjusts the bus voltage and does not change the output voltage closed-loop control parameters of the converter. While suppressing the ripple current, it can ensure the volatility of the output voltage, avoid the output voltage fluctuation caused by the execution of the control strategy, and improve the robustness of the voltage control strategy.

[0090] In a possible embodiment, implementing the second control strategy to adjust the switching frequency includes: when the effective duty cycle is less than the target duty cycle, increasing the switching frequency according to the second functional relationship, where the second functional relationship represents the relationship between the output voltage and the capacitor temperature and the switching frequency, and the second functional relationship indicates that the switching frequency is positively correlated with the output voltage and positively correlated with the capacitor temperature; when the effective duty cycle is greater than the target duty cycle, increasing the switching frequency according to the third functional relationship, where the third functional relationship indicates that the switching frequency is negatively correlated with the output voltage and positively correlated with the capacitor temperature.

[0091] Wherein, the target duty cycle dm is the critical duty cycle when the bus capacitor ripple current reaches the maximum value, and it is also the central reference point of the high ripple interval [d1, d3]. The magnitude relationship between the effective duty cycle D and dm determines the change trend of the ripple current and the direction of the demand for switching frequency adjustment.

[0092] Specifically, when the duty cycle D is still within the interval [d1, dm], the second functional relationship is:

[0093] ;

[0094] Where, f(Vo): the switching frequency corresponding to the output voltage Vo, that is, the switching frequency dynamically adjusted according to the output voltage, used to suppress the bus capacitor ripple or optimize the efficiency. T: the real-time temperature of the bus capacitor, reflecting the heating state of the capacitor, which is a key factor triggering frequency adjustment. Ta: the rated temperature of the capacitor life, that is, the rated temperature threshold at which the capacitor can work stably for five years. Beyond this temperature, the capacitor life will be sharply shortened. : the basic switching frequency, the default switching frequency of the module when "the temperature is normal and there is no special requirement for voltage". Vo: the current output voltage, the actual output voltage of the subsequent load, used to judge the working condition and adjust the frequency. Vo1: the lower threshold of the output voltage, when Vo is lower than this value, the frequency adjustment logic enters a specific interval. Vo2: the upper threshold of the output voltage, when Vo is higher than this value, the frequency adjustment logic enters another specific interval.

[0095] Where, when D < dm, the higher the output voltage, the greater the energy to be transferred on the primary side, and the higher the corresponding ripple current amplitude. It is necessary to synchronously increase the switching frequency to enhance the ripple suppression effect; the higher the capacitor temperature, the more serious the ripple current loss, and it is necessary to adjust the switching frequency with a higher priority to quickly reduce the capacitor temperature rise.

[0096] Specifically, when the duty cycle D is still within the interval [dm, d3], the third functional relationship is:

[0097] ;

[0098] Wherein, Vo3: Output voltage reference threshold, the reference voltage node for the frequency adjustment logic. Vo2: Output voltage upper limit threshold, used in conjunction with Vo3 to define the upper limit of the voltage adjustment range.

[0099] When D>dm, the higher the output voltage, the longer the inductor freewheeling time will be if the same switching frequency is maintained, which will increase the ripple current. Therefore, it is necessary to reduce the increase of the switching frequency with the output voltage and reduce the switching frequency in the opposite direction to match the energy transfer requirements. Meanwhile, the positive correlation logic of capacitor temperature remains unchanged to ensure priority protection under high temperature conditions.

[0100] As can be seen, in this embodiment, by judging the relationship between the effective duty cycle and the target duty cycle, the switching frequency is adjusted using a differentiated functional relationship, and the positive and negative correlation adjustment logic of the output voltage is matched respectively. This improves the adaptability of the switching frequency adjustment to the converter operating conditions, avoids problems such as capacitor value decay and leakage current increase caused by high temperature, extends the service life of the bus capacitor, and improves the adaptability and flexibility of the control strategy.

[0101] Please see Figure 7 , Figure 7 This is a schematic flowchart illustrating a method for controlling bus capacitor ripple current according to an embodiment of this application. Figure 7 The steps shown are as follows:

[0102] S701. After detecting that the circuit is connected to the power grid, the received circuit parameters are initialized.

[0103] This process initializes all variables, including power-on / off commands and loop parameters. Specifically, the loop parameters are the core parameters of the converter's closed-loop control, such as the voltage and current loops. These include the PID control parameters for the voltage and current loops, the voltage loop reference value, the current loop limiting value, the sampling signal filtering coefficient, and the ripple current judgment threshold. During initialization, these parameters are assigned calibrated optimal preset values ​​under rated operating conditions to ensure that the closed-loop control loop is in a stable initial state.

[0104] S702, received power-on command.

[0105] The monitoring platform sends a power-on command to the module, which then performs a series of startup operations. The monitoring platform refers to the core control unit of the power electronic system where the converter module is located, such as a charging pile system or an industrial power supply system. It can interact with the converter module through industrial communication buses such as CAN / 485, and can be used as the main control screen of a charging pile or the central controller of an industrial power supply.

[0106] S703. Check if an alarm signal has been received. If not, proceed to step S704; if received, proceed to step S705.

[0107] S704, module powered on.

[0108] S705, sampling the output voltage Vo of the phase-shifted full-bridge DC-DC converter, and the capacitor temperature T of the bus capacitor.

[0109] S706. Calculate the effective duty cycle D under the current working state.

[0110] The effective duty cycle D under the current operating state is calculated by the DSP of the phase-shifted full-bridge DC-DC converter. Specifically, the DSP, or Digital Signal Processor, is the core computing and control unit of the converter. It has high-speed data processing and real-time algorithm computing capabilities, and is responsible for receiving voltage data from the sampling circuit, executing duty cycle calculation logic, and outputting control commands.

[0111] S707. Determine if d1≤D≤d3. If yes, proceed to step S708; otherwise, proceed to step S709.

[0112] S708. Determine if D ≥ dm. If yes, proceed to step S710; otherwise, proceed to step S711.

[0113] S709, Let the switching frequency f= Then proceed to step S718.

[0114] Where, let the switching frequency f= That is, to keep the switching frequency constant.

[0115] S710. Reduce the bus voltage and recalculate the duty cycle D, then jump to step S712.

[0116] S711. Increase the bus voltage and recalculate the duty cycle D, then jump to step S715.

[0117] When the bus voltage is adjusted, the duty cycle D will change, and the DSP needs to recalculate the corresponding duty cycle after the bus voltage is changed.

[0118] S712. After recalculation, determine whether D > d3. If yes, proceed to step S709; otherwise, proceed to step S713.

[0119] S713. Determine if T > preset temperature Ta? If yes, proceed to step S714; otherwise, proceed to step S709.

[0120] The DSP determines whether the temperature exceeds the rated life of the capacitor, i.e., the preset temperature Ta, based on the sampled bus capacitor temperature T. If not, the switching frequency f remains unchanged.

[0121] S714. Adjust f as Vo and T decrease, then jump to step S718.

[0122] S715. After recalculation, determine whether D > d3. If yes, proceed to step S709; otherwise, proceed to step S716.

[0123] S716. Determine if T > preset temperature Ta? If yes, proceed to step S717; otherwise, proceed to step S709.

[0124] S717. Adjust f as Vo and T increase, then jump to step S718.

[0125] S718, End.

[0126] This application embodiment can divide the electronic device into functional units according to the above method example. For example, each function can be divided into a separate functional unit, or two or more functions can be integrated into one processing unit. The integrated unit can be implemented in hardware or as a software functional unit. It should be noted that the unit division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0127] and Figure 2 The implementation is consistent with the previous one; please refer to [link / reference]. Figure 8 , Figure 8 This is a functional unit block diagram of a bus capacitor ripple current control device provided in an embodiment of this application. The bus capacitor ripple current control device 800 is applied to, for example... Figure 1The phase-shifted full-bridge circuit shown includes a bus capacitor ripple current control device 800 comprising: an acquisition unit 810, a calculation unit 820, a first judgment unit 830, a first control unit 840, a second judgment unit 850, and a second control unit 860. Specifically, the acquisition unit 810 is used to acquire the output voltage of the phase-shifted full-bridge DC-DC converter and the capacitor temperature of the bus capacitor in real time; the calculation unit 820 is used to calculate the effective duty cycle under the current operating state based on the output voltage; and the first judgment unit 830 is used to determine whether the effective duty cycle is in the high ripple current range. The current range is the duty cycle range that characterizes the high ripple current of the bus capacitor; the first control unit 840 is specifically used to execute the first control strategy when the effective duty cycle is in the high ripple current range; the second judgment unit 850 is specifically used to determine whether the capacitor temperature is greater than the preset temperature if the effective duty cycle is still in the high ripple current range after executing the first control strategy, the preset temperature being the rated temperature that characterizes the bus capacitor reaching its expected working life; the second control unit 860 is specifically used to execute the second control strategy to adjust the switching frequency to reduce the ripple current of the bus capacitor when the capacitor temperature is greater than the preset temperature.

[0128] In one possible embodiment, the first determination unit 830 is specifically used to determine whether the effective duty cycle is in the high ripple current range: within one switching cycle, determine the functional relationship between the effective value of the bus capacitor's ripple current and the duty cycle; and select, based on the functional relationship, the duty cycle range in which the effective value of the bus capacitor's ripple current is greater than a set threshold as the high ripple current range.

[0129] In one possible embodiment, a first control strategy is executed, and the first control unit 840 is specifically used to: determine the magnitude of the effective duty cycle and the target duty cycle, where the target duty cycle refers to the duty cycle corresponding to the maximum effective value of the ripple current of the bus capacitor, and the target duty cycle is within the high ripple current range; if the effective duty cycle is greater than the target duty cycle, then the bus voltage is reduced until the effective duty cycle is less than the minimum value of the high ripple current range; if the effective duty cycle is less than the target duty cycle, then the bus voltage is increased until the effective duty cycle is greater than the maximum value of the high ripple current range; and the effective duty cycle is recalculated.

[0130] In one possible embodiment, the bus capacitor ripple current control device 800 is further configured to: when the bus voltage is reduced to the lower output limit or increased to the upper output limit, and the effective duty cycle is in the high ripple current range, determine whether the capacitor temperature is greater than the preset temperature and obtain the determination result; and determine whether to execute the second control strategy based on the determination result.

[0131] In one possible embodiment, a second control strategy is executed to adjust the switching frequency. The second control unit 860 is specifically configured to: increase the switching frequency according to a second functional relationship when the effective duty cycle is less than the target duty cycle, the second functional relationship being a characterization of the relationship between the output voltage and capacitor temperature and the switching frequency, indicating that the switching frequency is positively correlated with the output voltage and positively correlated with the capacitor temperature; and increase the switching frequency according to a third functional relationship when the effective duty cycle is greater than the target duty cycle, the third functional relationship indicating that the switching frequency is negatively correlated with the output voltage and positively correlated with the capacitor temperature.

[0132] In one possible embodiment, the bus capacitor ripple current control device 800 is further configured to: when the bus voltage is the rated voltage and the output current of the bus capacitor is the rated output current, change the duty cycle and monitor the effective value of the ripple current of the bus capacitor in real time; record the duty cycle corresponding to when the effective value of the ripple current of the bus capacitor reaches the peak value, and determine it as the target duty cycle.

[0133] In one possible embodiment, before acquiring the output voltage of the phase-shifted full-bridge DC-DC converter and the capacitor temperature of the bus capacitor in real time, the bus capacitor ripple current control device 800 is further configured to: initialize the received circuit parameters after detecting grid connection; detect whether an alarm signal is received upon receiving a power-on command; if no alarm signal is received, perform a sampling operation according to the power-on command, wherein the sampling operation refers to the operation of the phase-shifted full-bridge DC-DC converter to acquire the output voltage and capacitor temperature.

[0134] It is understood that since the method embodiments and the device embodiments are different presentations of the same technical concept, the content of the method embodiment section in this application should be adapted to the device embodiment section in a synchronous manner, and will not be repeated here.

[0135] Figure 9 This is a structural block diagram of an electronic device provided in an embodiment of this application. For example... Figure 9 As shown, electronic device 900 may include one or more components: a processor 901 and a memory 902 coupled to the processor 901, wherein the memory 902 may store one or more computer programs, which may be configured to implement the methods described in the examples above when executed by one or more processors 901. Electronic device 900 may be as follows: Figure 8 The bus capacitor ripple current control device 800 shown is shown.

[0136] Processor 901 may include one or more processing cores. Processor 901 connects to various parts within the electronic device 900 using various interfaces and lines, and performs various functions and processes data of the electronic device 900 by running or executing instructions, programs, code sets, or instruction sets stored in memory 902, and by calling data stored in memory 902. Optionally, processor 901 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). Processor 901 may integrate one or more of a Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem. It is understood that the aforementioned modem may also not be integrated into processor 901, but may be implemented separately through a communication chip.

[0137] The memory 902 may include random access memory (RAM) or read-only memory (ROM). The memory 902 can be used to store instructions, programs, code, code sets, or instruction sets. The memory 902 may include a program storage area and a data storage area. The program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (such as touch functionality, sound playback functionality, image playback functionality, etc.), and instructions for implementing the above-described method examples. The data storage area may also store data created during the use of the electronic device 900.

[0138] It is understood that the electronic device 900 may include more or fewer structural elements than those shown in the above block diagram, such as a power module, physical buttons, WiFi (Wireless Fidelity) module, speaker, Bluetooth module, sensor, etc., without limitation.

[0139] This application also provides a computer storage medium storing a computer program / instructions thereon, which, when executed by a processor, implements some or all of the steps of any of the methods described in the above method embodiments.

[0140] This application also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments.

[0141] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0142] In the several embodiments provided in this application, it should be understood that the disclosed methods, apparatuses, and systems can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for example, the division of units is merely a logical functional division, and there may be other division methods in actual implementation; for example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0143] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0144] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can be physically comprised separately, or two or more units can be integrated into one unit. The integrated unit described above can be implemented in hardware or in the form of hardware plus software functional units.

[0145] The integrated units implemented as software functional units described above can be stored in a computer-readable storage medium. These software functional units, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute partial steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes: a USB flash drive, a portable hard drive, a magnetic disk, an optical disk, volatile memory, or non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous linked DRAM (SLDRAM), and direct rambus RAM (DR RAM), etc., which are various media capable of storing program code.

[0146] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can easily conceive of variations or substitutions without departing from the spirit and scope of the present invention, and various modifications and alterations can be made, including combinations of the different functions and implementation steps described above, as well as software and hardware implementation methods, all of which are within the protection scope of the present invention.

Claims

1. A method for controlling bus capacitor ripple current, characterized in that, Applied to phase-shifted full-bridge DC-DC converters, the methods include: The output voltage and bus capacitor temperature of the phase-shifted full-bridge DC-DC converter are collected in real time. Calculate the effective duty cycle under the current operating state based on the output voltage; Determine whether the effective duty cycle is in the high ripple current range. The high ripple current range is the duty cycle range that indicates that the ripple current of the bus capacitor is in the high value region. When the effective duty cycle is within the high ripple current range, a first control strategy is executed, including: determining the magnitude of the effective duty cycle and the target duty cycle, wherein the target duty cycle refers to the duty cycle corresponding to the maximum effective value of the ripple current of the bus capacitor, and the target duty cycle is within the high ripple current range; if the effective duty cycle is greater than the target duty cycle, then reducing the bus voltage until the effective duty cycle is less than the minimum value of the high ripple current range; if the effective duty cycle is less than the target duty cycle, then increasing the bus voltage until the effective duty cycle is greater than the maximum value of the high ripple current range; and recalculating the effective duty cycle. If the effective duty cycle is still in the high ripple current range after the first control strategy is executed, then it is determined whether the capacitor temperature is greater than the preset temperature. The preset temperature is the rated temperature that represents the bus capacitor reaching the expected working life. When the capacitor temperature is greater than the preset temperature, a second control strategy is executed to adjust the switching frequency, including: when the effective duty cycle is less than the target duty cycle, increasing the switching frequency according to a second functional relationship, the second functional relationship being a characterization of the relationship between the output voltage, the capacitor temperature, and the switching frequency, indicating that the switching frequency is positively correlated with the output voltage and positively correlated with the capacitor temperature; when the effective duty cycle is greater than the target duty cycle, increasing the switching frequency according to a third functional relationship, the third functional relationship indicating that the switching frequency is negatively correlated with the output voltage and positively correlated with the capacitor temperature, in order to reduce the ripple current of the bus capacitor.

2. The method according to claim 1, characterized in that, The determination of whether the effective duty cycle is in the high ripple current range includes: Within one switching cycle, determine the functional relationship between the effective value of the ripple current of the bus capacitor and the duty cycle; Based on the aforementioned functional relationship, the duty cycle range in which the effective value of the ripple current of the bus capacitor is greater than a set threshold is selected as the high ripple current range.

3. The method according to claim 2, characterized in that, The method further includes: When the bus voltage is reduced to the lower limit of the output or increased to the upper limit of the output, the effective duty cycle is in the high ripple current range. Then, it is determined whether the capacitor temperature is greater than the preset temperature, and a determination result is obtained. Based on the judgment result, determine whether to execute the second control strategy.

4. The method according to claim 1, characterized in that, The method further includes: When the bus voltage is determined to be the rated voltage and the output current of the bus capacitor is the rated output current, the duty cycle is changed and the effective value of the ripple current of the bus capacitor is monitored in real time. Record the duty cycle corresponding to the peak value of the ripple current of the bus capacitor, and determine it as the target duty cycle.

5. The method according to claim 1, characterized in that, Before acquiring the output voltage and bus capacitor temperature of the phase-shifted full-bridge DC-DC converter in real time, the method further includes: After detecting grid connection, the received circuit parameters are initialized. Upon receiving the power-on command, check if an alarm signal has been received. If no alarm signal is received, a sampling operation is performed according to the power-on command. The sampling operation refers to the operation of the phase-shifted full-bridge DC-DC converter to collect the output voltage and the capacitor temperature.

6. A control device for bus capacitor ripple current, characterized in that, This device, applied to a phase-shifted full-bridge DC-DC converter, includes: an acquisition unit, a calculation unit, a first judgment unit, a first control unit, a second judgment unit, and a second control unit; wherein, The acquisition unit is specifically used to collect the output voltage and bus capacitor temperature of the phase-shifted full-bridge DC-DC converter in real time. The calculation unit is specifically used to calculate the effective duty cycle under the current operating state based on the output voltage; The first judgment unit is specifically used to determine whether the effective duty cycle is in the high ripple current range, where the high ripple current range is the duty cycle range that indicates that the ripple current of the bus capacitor is in the high value region. The first control unit is specifically configured to execute a first control strategy when the effective duty cycle is in the high ripple current range, including: determining the magnitude of the effective duty cycle and a target duty cycle, wherein the target duty cycle refers to the duty cycle corresponding to the maximum effective value of the ripple current of the bus capacitor, and the target duty cycle is within the high ripple current range; if the effective duty cycle is greater than the target duty cycle, then reducing the bus voltage until the effective duty cycle is less than the minimum value of the high ripple current range; if the effective duty cycle is less than the target duty cycle, then increasing the bus voltage until the effective duty cycle is greater than the maximum value of the high ripple current range; and recalculating the effective duty cycle. The second judgment unit is specifically used to determine whether the capacitor temperature is greater than a preset temperature if the effective duty cycle is still in the high ripple current range after the first control strategy is executed. The preset temperature is the rated temperature that represents the bus capacitor reaching the expected working life. The second control unit is specifically configured to execute a second control strategy to adjust the switching frequency when the capacitor temperature is greater than the preset temperature. This includes: when the effective duty cycle is less than the target duty cycle, increasing the switching frequency according to a second functional relationship, where the second functional relationship characterizes the relationship between the output voltage, the capacitor temperature, and the switching frequency, indicating that the switching frequency is positively correlated with both the output voltage and the capacitor temperature; and when the effective duty cycle is greater than the target duty cycle, increasing the switching frequency according to a third functional relationship, where the third functional relationship indicates that the switching frequency is negatively correlated with both the output voltage and the capacitor temperature, thereby reducing the ripple current of the bus capacitor.

7. An electronic device, characterized in that, It includes a processor and a memory, the memory being used to store one or more programs and configured to be executed by the processor, the programs including instructions for performing the steps of the method as described in any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, A computer program for storing electronic data interchange is provided, wherein the computer program causes a computer to perform the method as described in any one of claims 1-5.

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