Minimum working voltage measurement method, test system, storage medium and processor

Abstract

The invention provides a minimum working voltage measuring method, a testing system, a storage medium and a processor. The minimum working voltage measurement method comprises the following steps: when the processing core is at the current working voltage, controlling the chip to run a preset application in a full load manner; the processing core is used for executing the operation of the preset application; controlling the chip to execute a preset number of high-voltage transient events; the high-voltage transient event is used for abruptly changing the working voltage requirement of a processing core of the chip; after the preset number of high-voltage transient events, detecting the working state of the chip; when it is determined that the chip works normally through the working state, the current working voltage of the chip is reduced; and under the condition that the chip works abnormally, determining the lowest working voltage corresponding to the preset working frequency based on the current working voltage. According to the method, the measurement efficiency and accuracy of the minimum working voltage corresponding to each working frequency of the chip can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of chip testing, and in particular, provides a minimum operating voltage measurement method, a test system, a storage medium and a processor. BACKGROUND

[0002] To more effectively control power consumption, a DVFS (Dynamic Voltage and Frequency Scaling) mechanism is configured in various chips, for example, the mechanism can be configured in a GPGPU (General-Purpose computing on Graphics Processing Units), a GPU (Graphics Processing Unit), a CPU (central processing unit), an NPU (Neural Processing Unit) and other processor chips, or in other functional module chips. The DVFS mechanism can adjust the operating frequency of the chip according to the actual work requirement, so that the chip is at a lower operating frequency to meet the work requirement, thereby achieving the effect of reducing power consumption.

[0003] In the DVFS mechanism, the chip is adjusted to run at different operating frequencies, and each operating frequency corresponds to a minimum operating voltage Vmin. The minimum operating voltage Vmin is the lowest supply voltage that enables the chip to run stably under the premise of ensuring the correctness of the chip function and the timing convergence. Accurate measurement of the minimum operating voltage corresponding to each operating frequency helps to ensure that the chip is working normally while reducing power waste.

[0004] Currently, when measuring the minimum operating voltage Vmin corresponding to each operating frequency, the chip is usually run in a worse application for testing. The worse application is the application with the highest requirement for the operating voltage of the chip, and the worse-case voltage transient event is triggered to detect whether the chip will appear abnormal work.

[0005] However, the occurrence of the worse-case has randomness and sparseness, and a large number of tests are needed to trigger it, which will make the test efficiency low. Moreover, since the possibility of the occurrence of the worse-case is low, the worse-case may not appear in a large number of tests, thereby affecting the measurement accuracy of the minimum operating voltage. SUMMARY

[0006] Therefore, the present application aims to provide a minimum operating voltage measurement method, a test system, a storage medium and a processor to improve the measurement efficiency and accuracy of a chip.

[0007] In a first aspect, the embodiments of the present application provide a minimum operating voltage measurement method for measuring a minimum operating voltage corresponding to a preset operating frequency of a chip; the chip comprises a processing core; the minimum operating voltage measurement method comprises: controlling the chip to run a preset application at full load when the processing core is at a current operating voltage; the processing core is configured to perform operations of the preset application; controlling the chip to perform a preset number of high-voltage transient events; the high-voltage transient event is configured to cause a sudden change in the operating voltage requirement of the processing core of the chip; detecting the working state of the chip after the preset number of high-voltage transient events; if the chip works normally, reducing the current operating voltage of the chip; if the chip works abnormally, determining the minimum operating voltage corresponding to the preset operating frequency based on the current operating voltage.

[0008] The voltage transient event includes a transient large change in voltage. Therefore, in the embodiments of the present application, during the measurement of the minimum operating voltage corresponding to each preset operating frequency of the chip, the chip is controlled to run the preset application at full load, so that the chip can fully utilize the current operating voltage to perform operations. Then, the chip is controlled to perform a preset number of high-voltage transient events, and the high-voltage transient event is configured to cause a sudden change in the operating voltage requirement of the processing core of the chip. Thus, the chip is actively controlled to generate a transient large change in voltage, and the voltage transient event is actively triggered. Compared with waiting for the preset application to trigger the voltage transient event passively, this method effectively improves the triggering frequency of the voltage transient event. Compared with multiple tests to make the preset application trigger the voltage transient event, this method can reduce the number of tests and the waiting time required for waiting for the voltage transient event to be triggered, improve the test efficiency, and reduce the influence of the minimum operating voltage measurement accuracy caused by the non-triggering of the voltage transient event.

[0009] In an embodiment, the high-voltage transient event comprises: controlling the processing core to enter an idle state; and controlling the processing core to recover from the idle state to full load operation and run for a first preset time period.

[0010] The processing core has different requirements for working voltage under different loads. Therefore, in the embodiment of the application, the processing core can be controlled to enter an idle state when the processing core is in full load operation, which greatly reduces the requirement of the processing core for working voltage. Then, the processing core is restored from the idle state to full load operation, which greatly increases the requirement of the processing core for working voltage. Thus, the requirement of the processing core for working voltage changes abruptly, triggering a voltage transient event to test the chip. Meanwhile, the requirement of the processing core for working voltage changes twice when the processing core changes from full load to idle state and then from idle state to full load, which increases the triggering frequency of the voltage transient event, further reduces the requirement for the number of tests, and improves the test efficiency.

[0011] In an embodiment, the chip further includes a memory, wherein the processing core executes the operation of the preset application by calling the memory; the control of the processing core to enter the idle state includes limiting the processing core to call the memory to limit the processing core to execute the operation of the preset application and enter the idle state; and the control of the processing core to restore from the idle state to full load operation includes controlling the processing core to call the memory with maximum load to execute the operation of the preset application with full load.

[0012] In the embodiment of the application, a credit mechanism is configured between the cache and the memory controller, so that the cache is allowed to send a request to the memory controller only when the cache has a credit value. Thus, the situation that the memory controller loses data due to overload can be effectively prevented. Correspondingly, the credit mechanism is closed to limit the cache to send a request to the memory controller. Therefore, when the processing core is controlled to enter the idle state, the credit mechanism can be closed to limit the processing core to call the memory, so as to control the processing core to pause the execution of new work and enter the idle state after waiting for a second preset time length corresponding to the execution of the current work. Correspondingly, when the processing core is controlled to restore from the idle state to full load operation, the processing core can be controlled to call the memory with maximum credit. This method is simple and can reduce the difficulty of controlling the processing core to enter the idle state and restore to full load operation. Meanwhile, after entering the idle state, the processing core can continue to send a request, and the cache can accumulate the request. Therefore, after calling the memory with maximum credit, the processing core can enter the full load operation state at a faster speed. This method helps to further reduce the measurement time of the minimum working voltage, improves the measurement efficiency, and makes the abrupt change of the requirement for working voltage more obvious, so as to more effectively measure the chip and improve the measurement accuracy of the minimum working voltage.

[0013] In an embodiment, the chip further comprises a cache and a memory controller, the cache is connected with the memory controller and the processing core respectively, the memory controller is further connected with the memory, the memory request of the processing core to the memory is sent to the memory controller through the cache to call the memory through the memory controller; the cache and the memory controller are configured to control the transmission of the request based on a preset credit mechanism; the credit mechanism comprises: the cache allows to transmit the call request to the memory to the memory controller in the case of having a credit value; the limiting the processing core to call the memory comprises: closing the credit mechanism between the cache and the memory controller; the controlling the processing core to call the memory at a maximum load comprises: controlling the cache and the memory controller to transmit the call request of the processing core to the memory based on the maximum credit preset in the credit mechanism.

[0014] In the embodiments of the present application, the closing and resuming of the credit mechanism can be realized by adjusting the record value of the credit register, which effectively reduces the control complexity, helps to improve the control efficiency, and further shortens the time required for the sudden change of the working voltage demand, so that the sudden change of the working voltage demand in a short time is more obvious, which helps to improve the test effect of the chip and improve the measurement accuracy of the minimum working voltage.

[0015] In an embodiment, the chip further comprises a credit register, the credit register is connected with the cache, and the credit register is used to record the credit value between the cache and the memory controller; the closing the credit mechanism between the cache and the memory controller comprises: modifying the credit value recorded by the credit register to 0; the controlling the cache and the memory controller to transmit the call request of the processing core to the memory based on the maximum credit preset in the credit mechanism comprises: adjusting the credit value recorded by the credit register to the maximum value of the credit register.

[0016] In the embodiments of the present application, the credit value is recorded by the credit register in the process of transmitting the request by the credit mechanism, and only the credit value recorded by the credit register needs to be saved when the working voltage is reduced, and the recorded credit value is restored after the reduction of the working voltage is completed. This simple and efficient method realizes the saving and resuming of the credit mechanism, helps to reduce the time required for reducing the working voltage, and further improves the measurement efficiency of the minimum working voltage.

[0017] In an embodiment, before the controlling the chip to execute the preset number of high-voltage transient events, the method further comprises: waiting for the chip to run a preset application at full load for a duration greater than or equal to a third preset time length, the third preset time length is greater than or equal to the time of executing the preset number of high-voltage transient events.

[0018] In the process of starting the chip to run the preset application, the load is gradually increased and dynamically changed, so that the state of the chip running the preset application at full load may be unstable. Therefore, in the embodiments of the present application, the chip can be waited for running for a third preset time length to wait for the chip to stably run at full load, so as to reduce the influence of too large change range of the load on the test effect and improve the stability of the voltage transient event triggering. The third preset time length is greater than or equal to the time of executing the preset number of high-voltage transient events, which ensures that the chip can maintain full load running before the high-voltage transient event is controlled to be executed.

[0019] In an embodiment, the chip further includes a memory, and the processing core executes the operation of the preset application by calling the memory; the reducing the current working voltage of the chip includes limiting the calling of the memory; after the calling of the memory is limited, the preset application is maintained to run and the operation of the preset application is limited to be executed; the current working voltage of the chip is reduced; and the calling of the memory is restored to enable the processing core to continue to execute the operation of the preset application.

[0020] The running of the preset application is affected by the voltage, and the reduction of the working voltage will reduce the accuracy of the operation of the preset application, and further reduce the measurement accuracy of the minimum working voltage. Therefore, in the embodiments of the present application, the calling of the memory of the chip is limited to limit the execution of the operation of the preset application, and even if the working voltage is adjusted during this period, the change of the working voltage will not affect the current operation, so that the accuracy of the execution of the preset application can be ensured, and the influence on the measurement accuracy of the minimum working voltage is reduced. At the same time, the calling of the memory is limited without the need to close the preset application, that is, the preset application can still be maintained to run, so that the influence of closing the preset application on the measurement conditions and environment of the chip can be effectively avoided, and the preset application does not need to be restarted, initialized and the like, so that the waiting time caused by closing the preset application is avoided, and the measurement efficiency of the minimum working voltage is improved. In addition, since the preset application will run all the time during the measurement process, the size of the load of the chip will not change obviously, so that the influence of too large change range of the load of the chip on the measurement accuracy of the minimum working voltage can be effectively reduced. At the same time, since the load does not change obviously, the power consumption of the chip will not change too much, which reduces the influence of the change of the power consumption on the temperature of the chip, and further reduces the error caused by the change of the performance of the chip due to the temperature, so that the measurement accuracy is further improved.

[0021] In an embodiment, the chip further comprises a cache and a memory controller, the cache is connected with the memory controller and the processing core respectively, the memory controller is further connected with the memory, the memory request of the processing core to the memory is sent to the memory controller through the cache to call the memory through the memory controller; the cache and the memory controller are configured to control the transmission of the request based on a preset credit mechanism; the credit mechanism comprises: the cache allows the transmission of the memory request to the memory controller in the case of having credit value; the limiting the calling of the memory comprises: obtaining and saving the current configuration of the credit mechanism of the cache; controlling the cache to close the credit mechanism; after the credit mechanism is closed, the cache is limited to transmit the memory request to the memory controller; and the restoring the calling of the memory comprises: restoring the credit mechanism of the cache to the current configuration.

[0022] In the embodiments of the present application, the credit mechanism is configured between the cache and the memory controller, so that the cache is allowed to send a request to the memory controller only in the case of having credit value, thereby effectively preventing the memory controller from losing data due to overload. Accordingly, closing the credit mechanism can limit the cache from sending a request to the memory controller, and therefore, when adjusting the working voltage, the calling of the memory by the processing core can be limited by closing the credit mechanism, so as to avoid that the current operation is abnormal or the chip works abnormally due to the execution of operation by the processing core when adjusting the working voltage. Accordingly, the configuration of the credit mechanism can be saved before frequency adjustment, and restored after voltage adjustment, which is simple to implement, can reduce the difficulty of implementation and the time required for limiting the calling of the memory, and at the same time, after the working voltage is reduced, the transmission of the request between the cache and the memory controller can also be quickly restored, which reduces the time required for overall voltage reduction, and this method helps to further reduce the measurement time of the minimum working voltage and improve the measurement efficiency.

[0023] In an embodiment, the minimum working voltage measurement method further comprises: obtaining the idle power consumption of the chip when the chip does not run the preset application; the reducing the current working voltage of the chip comprises: obtaining the current power consumption of the chip; determining whether the current power consumption is less than or equal to the idle power consumption; in the case of determining that the current power consumption is less than or equal to the idle power consumption, reducing the current working voltage of the chip.

[0024] In the embodiments of the present application, after the memory call is limited, the processor can still execute the current operation task. If the working voltage is directly adjusted, the chip may work abnormally due to unstable voltage. Therefore, before the working voltage is reduced, the chip can be first put into an idle state to avoid chip abnormality caused by unstable voltage after voltage adjustment, so as to reduce the influence on the accuracy of the lowest working voltage measurement. In the idle state, the chip will not execute the operation of the preset application. Based on this, the present application provides a way to determine whether the chip is in an idle state, that is, recording the idle power consumption of the preset application not running at the initial voltage, and comparing the current power consumption of the chip with the idle power consumption. If the current power consumption is less than or equal to the idle power consumption, it indicates that the chip execution is completed and no additional power consumption is generated. At this time, it can be determined that the chip is in an idle state. Compared with the state judgment of whether the chip is idle by using various state registers, this way can reduce the reading of the registers, improve the measurement efficiency, and even reduce the use of some registers, and optimize the structure.

[0025] In an embodiment, before the call of the memory is restored, the method further comprises: waiting for a fourth preset time length to stabilize the working voltage of the chip after being reduced.

[0026] After the voltage is reduced, there will be a period of time during which the voltage is unstable. If the operation is executed during this period, the operation may be incorrect. Therefore, in the embodiments of the present application, after the voltage is reduced, the fourth preset time can be waited for to wait for the voltage to stabilize, to avoid chip abnormality caused by unstable voltage after voltage adjustment, and to further reduce the influence on the accuracy of the lowest working voltage measurement. This way helps to improve the accuracy of the lowest working voltage measurement.

[0027] In a second aspect, the embodiments of the present application provide a test system, comprising: an access module configured to access a chip to be tested; and a test host connected with the access module and configured to execute the lowest working voltage measurement method according to any one of the first aspect, to measure the lowest working voltage corresponding to each preset working frequency in the chip to be tested.

[0028] In a third aspect, the embodiments of the present application provide a computer readable storage medium, wherein the computer readable storage medium stores a computer program. When the computer program runs on a computer, the computer is caused to execute the lowest working voltage measurement method according to any one of the first aspect.

[0029] In a fourth aspect, the embodiments of the present application provide a processor, comprising: a chip configured with a dynamic voltage and frequency adjustment mechanism, and the lowest working voltage corresponding to each working frequency in the dynamic voltage and frequency adjustment mechanism is measured by the lowest working voltage measurement method according to any one of the first aspect. BRIEF DESCRIPTION OF DRAWINGS

[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments of the present application. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be regarded as a limitation on the scope, and for those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0031] Figure 1 A flowchart of a minimum operating voltage measurement method provided by an embodiment of the present application; Figure 2 A structural schematic diagram of a chip provided by an embodiment of the present application; Figure 3 A flowchart of a minimum operating voltage measurement provided by an embodiment of the present application; Figure 4 A schematic diagram of a high-voltage transient event provided by an embodiment of the present application; Figure 5 A schematic diagram of a test system provided by an embodiment of the present application.

[0032] Icon: chip 200; processing core 210; connection architecture component 220; cache 230; credit register 231; memory controller 240; memory 250; test system 400; access module 410; test host 420. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solutions and advantages of the present application more clear, the following will further describe the present application in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.

[0034] First, the present application provides a minimum operating voltage measurement method, which can measure the minimum operating voltage corresponding to the preset operating frequency of the chip 200. The type of the chip 200 is not limited, which can be a processor or a chip 200 of various functional modules.

[0035] Among them, the chip 200 is a chip 200 configured with a dynamic voltage frequency adjustment mechanism. The preset operating frequency is each operating frequency preset in the dynamic voltage frequency adjustment mechanism, each operating frequency has a corresponding minimum operating voltage, and the minimum operating voltage is the minimum power supply voltage at which the chip 200 can stably run under the premise of ensuring functional correctness and timing convergence.

[0036] Please refer to Figure 1 , Figure 1A flowchart of a minimum operating voltage measurement method provided by an embodiment of the present application. The minimum operating voltage measurement method comprises: S110, controlling the chip to run a preset application in full load under the current operating voltage of the processing core.

[0037] In an embodiment of the present application, the processing core 210 is used to perform the operation of the preset application.

[0038] For the sake of understanding, first, the structure of the chip 200 will be described. Please refer to Figure 2 , Figure 2 A structural schematic diagram of a chip 200 provided by an embodiment of the present application, the chip 200 comprises a processing core 210, a connection architecture component 220, a cache 230, a memory 250, a memory controller 240 and a memory 250. The processing core 210, the connection architecture component 220, the cache 230, the memory 250, the memory controller 240 and the memory 250 are connected in sequence.

[0039] The processing core 210 is a core unit used to perform a computing task.

[0040] In the present application, the preset operating frequency of the chip 200 refers to the preset operating frequency of the processing core 210, or the core operating frequency. The preset operating frequency can be provided by a phase-locked loop or a clock signal providing circuit. For details, please refer to the prior art, which will not be described here.

[0041] Fabric (connection architecture component) is used to take charge of the network architecture for communication between various modules inside the chip 200.

[0042] The cache 230 comprises various types of cache modules, such as L1 (level 1 cache), L2 (level 2 cache) and L3 (level 3 cache). Among them, the shared cache layer in the chip architecture is LLC (Last Level Cache, last level cache), and the LLC cache is also called L3 cache. It is the last layer of the chip 100 core private protocol, used to reduce the access frequency to the external part and improve the chip performance. For details of LLC, please refer to the prior art, which will not be described here.

[0043] The memory controller is used to manage the data transmission between the processing core and the memory. The device memory (abbreviated as memory) is used to store various data required by the processor.

[0044] In the embodiments of the present application, the processing core 210 needs to call the memory 250 to perform the operation of the application, wherein the request of the processing core 210 to call the memory 250 is sequentially transmitted to the connection architecture component 220, the cache 230 and the memory controller 240 of the memory 250, and the memory controller 240 of the memory 250 selects the required access and call of the memory 250 according to the instruction.

[0045] The above structure can refer to the prior art, and the chip 200 can further include other structures, for example, a power module, a heat dissipation module, etc. The specific structure of the chip 200 or other structures that can be included can refer to the prior art, which will not be expanded here.

[0046] In the embodiments of the present application, the lowest working voltage corresponding to the preset working frequency also refers to the lowest working voltage of the processing core 210 at the preset working frequency. When measuring the lowest working voltage corresponding to any preset working frequency, the processing core 210 can be caused to work at the preset working frequency, and the working voltage can be gradually reduced from the preset initial working voltage, and whether the chip 200 or the processing core 210 works normally at each working voltage can be measured respectively to measure the lowest working voltage.

[0047] For example, the preset working frequency includes F0, F1, …, Fn, and the working voltage corresponding to F0 includes F0-V0, F0-V1, F0-V2, …, F0-Vm. Wherein, F0-V0 is the initial working voltage preset for F0, and F0-V0 to F0-Vm are gradually reduced. For example, F0=100MHz, F0-V0=700mv, F0-V1=690mv, F0-V2=680mv, and so on. After the lowest working voltage corresponding to F0 is measured, the lowest working voltage corresponding to F1 can be measured again, and F1-V0, F1-V1, F1-V2, …, are measured in turn. The specific measurement method will be expanded later.

[0048] Therefore, when measuring the lowest working voltage, the processing core 210 can be caused to work at different working voltages to run the preset application to determine whether it can work normally.

[0049] In the embodiments of the present application, one preset working frequency is taken as an example for expansion, and the measurement methods corresponding to different preset working frequencies are the same. When the chip 200 works abnormally, the chip 200 needs to be replaced and the preset working frequency needs to be reset, so the measurement of the lowest working voltage corresponding to different preset working frequencies will not be repeated.

[0050] In an embodiment of the present application, the preset application is a preset application with a higher requirement on working voltage, and the preset application can refer to an existing worse application. For example, the worse application can include GEMM (General Matrix Multiplication), FFT (Fast Fourier Transform), and the like. The worse application type used by different types of chips 200 during measurement and the included operation mode can be different, and will not be expanded here.

[0051] The demand of the chip 200 on voltage is related to the operation performed by the processing core 210. If the voltage is too low, the processing core 210 can perform an operation abnormally. During the execution of the preset application, the load of the preset application can be dynamically changed. For example, when the preset application is started, the operation to be performed is less, and the voltage required by the processing core 210 is also lower. The actual demand on working voltage can be lower than the current working voltage.

[0052] Therefore, in an embodiment of the present application, the chip 200 can be controlled to run at full load to increase the demand on the actual working voltage to the maximum, so that the current working voltage can be fully utilized.

[0053] In some embodiments of the present application, the preset application itself is an application for measuring the minimum working voltage, which can issue enough operation tasks for the processing core 210 to execute. Therefore, the preset application can be executed for a preset time period, so that the chip 200 enters a full load running state.

[0054] In another embodiment of the present application, the preset application can also actively issue operation tasks during the execution of the preset application by the chip 200 to accelerate the entering of the full load running state.

[0055] In an embodiment of the present application, the full load running state can be determined by monitoring the requests of each part of the chip 200. For example, the processing core 210 needs to call the memory 250 to perform an operation, and the call request of the processing core 210 to the memory 250 passes through the connection structure component, the cache 230 and the memory controller 240 of the memory 250 in turn. Therefore, whether the full load running state is entered can be determined by monitoring whether the requests in the connection structure component, the cache 230 and the memory controller 240 of the memory 250 are accumulated.

[0056] S120, controlling the chip to perform a preset number of high-voltage transient events.

[0057] In the embodiment of the present application, the high-voltage transient event is used to cause the working voltage requirement of the processing core 210 of the chip 200 to mutate, which is a way of actively triggering the transient event to test the stability of the chip 200.

[0058] The functional stability of the chip 200 is dominated by the transient current change rate (dI / dt) and the local voltage drop (IR Drop / ΔV). The minimum working voltage Vmin of the chip 200 is related to the transient current change rate (dI / dt), and when the chip 200 is in a high-frequency condition, the transient voltage drop is the main reason for the functional test failure. Therefore, when testing the minimum working voltage, it is necessary to cause the chip 200 to generate such a transient event to test the functional stability of the chip 200, and then determine the minimum working voltage that enables the chip 200 to work normally.

[0059] The worse application can trigger the transient event for measuring the functional stability of the chip 200, but there is randomness and sparseness, that is, the occurrence of the transient event is uncontrollable, and the test under the same working voltage may pass or fail. And the occurrence is rare, in the test of the worse application lasting for several minutes or even longer, the transient event that can really trigger the "fatal voltage collapse" may only occur 1-3 times, and if the working voltage of the chip 200 is just near the critical point when such a transient event occurs, the test may fail. The condition is harsh, so the occurrence is extremely rare, and it may need to run dozens or even hundreds of cycles to stably capture. In order to ensure the accuracy of the minimum working voltage, the worse application is tested multiple times, which affects the overall time-consuming and the test cost is extremely high.

[0060] Compared with the passive waiting transient event triggering mode of running the worse application in the existing measurement mode, in the embodiment of the present application, a way of simulating the transient event is provided, that is, the high-voltage transient event, which is used to cause the working voltage requirement of the processing core 210 of the chip 200 to mutate, so that the transient current change rate of the processing core 210 thereof mutates, thereby actively triggering the occurrence of the transient event, so as to test the functional stability of the chip 200 through the actively triggered high-voltage transient event without passive waiting for the transient event triggered by the worse application.

[0061] By controlling the chip 200 to execute the preset number of high-voltage transient events, the triggering frequency of the transient event can be effectively improved, and the functional stability of the chip 200 can be more stably and frequently tested, without waiting for the worse application to passively trigger the transient event, reducing the number of tests required to be executed, and thereby improving the measurement efficiency of the minimum working voltage.

[0062] In one embodiment of this application, a high-voltage transient event may include: the control processing core 210 entering an idle state; the control processing core 210 resuming full-load operation from the idle state and running for a first preset duration.

[0063] In idle state, processing core 210 will not perform any calculations. At this time, the operating voltage requirement of processing core 210 decreases. Conversely, if chip 200 enters idle state from full-load operation, the operating voltage requirement will decrease from high to low, causing a sudden change in the transient current rate of change of chip 200, thus triggering a transient event. Conversely, if chip 200 resumes full-load operation from idle state, the operating voltage requirement will decrease from low to high, again causing a sudden change in the transient current rate of change of chip 200, also equivalent to triggering a transient event.

[0064] Therefore, this method allows for the proactive triggering of transient events, enabling stability testing of the chip 200. Furthermore, the transition from full load to idle and back to full load, upon resuming chip 200 operation, effectively triggers two transient events, increasing their frequency. This, in turn, helps to further reduce the number of tests required and improves the efficiency of measuring the minimum operating voltage.

[0065] In some embodiments of this application, the `worse` application can identify scenarios where the load changes rapidly from low to full load and from full load to low load at certain times. By controlling the `worse` application to trigger these rapid changes, the high-voltage transient events provided in the embodiments of this application can be simulated. Alternatively, by determining which part of the code / operation in the `worse` application causes the load to change rapidly from low to full load and from full load to low load, this part of the code can be extracted and made into a separate application that loops and repeats this part. Various specific methods are possible and are not limited here. In one approach, the `worse` application identifies the application with the worst voltage by detecting a large number of applications.

[0066] In this process, the load on chip 200 needs a certain amount of time to recover from 0 to full load. Therefore, after recovering to full load operation, a first preset time period is required to allow the load to stabilize. This reduces the impact of unstable load or failure to reach full load on the triggering stability and frequency of transient events, thus improving measurement accuracy. For example, in some embodiments, the first preset time period can be 1 second.

[0067] In the embodiments of this application, the preset number of executions of the high-voltage transient event can be determined based on the performance of the chip 200 and other test requirements, which will not be elaborated here. In some embodiments, the preset number of executions can be set to 50 to 100 times.

[0068] In the embodiments of this application, the processing core 210 calls memory 250 to execute the operation of a preset application. Correspondingly, controlling the processing core 210 to enter an idle state includes: restricting the processing core 210 from calling memory 250, so as to restrict the processing core 210 from executing the operation of the preset application and entering an idle state; waiting for a second preset time.

[0069] Processing core 210 executes preset application operations by calling memory 250. In this case, if processing core 210 is restricted from calling memory 250, processing core 210 will not be able to continue to execute new operations after completing the current operation, and processing core 210 will pause operations and enter a low-power idle state.

[0070] The second preset duration is the time required for the power consumption of chip 200 to stabilize at the idle state level. Even after the processing core 210 is restricted from accessing memory 250, it can still continue to complete the computational tasks already performed on memory 250. Therefore, after restricting memory access to processing core 210, a second preset duration is required to allow it to enter an idle state. The second preset duration can be determined based on the performance of chip 200 and other testing requirements. For example, in some embodiments, for a microsecond-level chip 200, the second preset duration can be 100 milliseconds, which allows the microsecond-level chip 200 to enter an idle state.

[0071] Accordingly, the control processing core 210 may resume full-load operation from an idle state, which may include: the control processing core 210 calling memory 250 at maximum capacity to execute the calculations of a preset application at full load.

[0072] In some embodiments of this application, instructions can be sent to the memory controller 240 of memory 250 to cause the memory controller 240 to stop accessing memory 250 or refuse to perform access to memory 250. Alternatively, the cache 230 or the connection architecture component 220 can stop sending instructions to the memory controller 240 to access memory 250. There can be various specific implementations for restricting access to memory 250; different structures and types of chips 200 can be configured in different ways, which will not be elaborated here. Conversely, control instructions can be sent to the part that restricts access requests to enable it to access memory 250 to its maximum capacity.

[0073] For example, in one embodiment of this application, cache 230 is configured to: allow receiving requests from processing core 210 and connection architecture component 220 and restrict the sending of such requests to memory controller 240, thereby limiting processing core 210's access to memory 250. Conversely, the maximum number of requests that memory controller 240 can handle simultaneously is used to control processing core 210 to send requests to cache 230 to access memory 250.

[0074] In some embodiments of this application, the cache 230 and memory 250 memory controller 240 can be configured to control the transmission of requests based on a preset credit mechanism, and when memory 250 calls are restricted, the credit mechanism between the cache 230 and memory 250 memory controller 240 can be turned off (or frozen).

[0075] In this credit mechanism, the data receiver can assign one or more credits to the sender. Each credit determines the amount of data the sender is allowed to transmit. Once the sender has used a credit to send data, the sender is only allowed to retransmit data after the receiver has processed the data and returned an acknowledgment (or released the corresponding buffer space). This method effectively prevents the receiver from losing data due to overload. The principle of the credit mechanism can be found in existing technologies and will not be elaborated upon here.

[0076] In the embodiments of this application, cache 230 includes multiple levels of different caches 230, specifically including LLC (last-level cache 230), also known as L3 cache 230. LLC serves as the last line of defense above each core private cache 230 (such as L1, L2), used to reduce the number of accesses to external memory 250, thereby improving the performance of chip 200. Details of LLC can be found in existing technologies and will not be elaborated here. The shared cache 230 layer in the processor architecture is LLC. LLC is used to store actual data blocks (or cache lines 230) and their related metadata (such as tags, status, etc.), used to accelerate data access, reduce the frequency of access to main memory 250, thereby improving overall performance. In chip 200 such as processor, LLC is connected to memory controller 240 of memory 250. Therefore, in the embodiments of this application, the aforementioned credit mechanism can be configured between LLC and memory controller 240 of memory 250.

[0077] The credit mechanism includes Forward Credit and Backward Credit. While there are some differences in implementation methods, both credit mechanisms can be configured, and this application makes no restrictions.

[0078] Taking Forward Credit as an example, a request buffer queue can be configured within memory controller 240 (memory 250). Assuming the request buffer queue has a depth of 8, it can cache a maximum of 230 unprocessed requests. The MC (Memory Controller) will then announce to the upstream LLC (Limited Controller) that it has 8 credit values. For each request transmitted, the LLC decrements one credit value. When the MC receives or processes a request, it sends feedback to the LLC, allowing the LLC to restore a credit value. The credit value is recorded and maintained through dedicated signals or registers. For example, the credit register 231 can be connected to the cache 230 to record the credit values ​​held by the cache 230.

[0079] Therefore, in embodiments of this application, the credit mechanism includes: cache 230 allowing the transmission of memory 250 requests to memory 250 memory controller 240 when a credit value is available. Correspondingly, in embodiments of this application, restricting memory 250 access may include: controlling cache 230 to disable the credit mechanism, thereby restricting cache 230 from transmitting memory 250 requests to memory 250 memory controller 240 after the credit mechanism is disabled.

[0080] Accordingly, controlling the processing core 210 to call memory 250 at maximum capacity may include: controlling the maximum credit transfer between the cache 230 and the memory controller 240 of memory 250 based on a credit mechanism to request the processing core 210 to call memory 250.

[0081] In this embodiment, when the credit mechanism of cache 230 is disabled, cache 230 can no longer submit new read / write requests to memory manager 250. This is because the credit mechanism is a flow control measure used to limit the number of requests cache 230 can send to memory controller 240. While cache 230 can still receive data and requests from upper-layer connectivity components 220, it cannot forward these requests to memory controller 240. In other words, cache 230 will temporarily store upstream requests until the credit mechanism is restored.

[0082] Meanwhile, in the embodiments of this application, the cache 230 and the connection architecture component 220 can also be configured with a backpressure mechanism. When the backpressure mechanism is unable to send requests to the downstream, it sends a backpressure signal to the upstream so that the upstream stops sending new requests after receiving the backpressure signal.

[0083] Taking cache 230 as an example, when the credit mechanism of cache 230 is disabled, cache 230 cannot send requests to memory manager 250. In this case, cache 230 can send a backpressure signal to connection architecture component 220, so that connection architecture component 220 will no longer send new requests to cache 230. At the same time, connection architecture component 220 can also send a call signal to processing core 210, so that processing core 210 stops sending requests, thereby restricting processing core 210 from sending new requests to execute new operations.

[0084] Disabling the credit mechanism causes a sharp drop in chip load, quickly bringing it into an idle state. Conversely, resuming the credit mechanism allows for rapid return to full load as the default application continues running and requests are temporarily cached. Therefore, by disabling and resuming the credit mechanism, abrupt changes in chip load can be controlled. Alternatively, other methods can be used to control the processing core's transition to an idle state and back to full load, employing shorter timeframes to achieve a similar abrupt effect.

[0085] In this embodiment, by configuring a credit mechanism in the cache 230, the system can be prevented from crashing or losing data due to brief freeze operations. At the same time, since the requests to access the memory 250 are temporarily stored in the cache 230, after the control processing core 210 accesses the memory 250 at its maximum capacity, the requests accumulated in the cache 230 can be sent to the memory 250 manager and access the memory 250 in a short time. This method helps to reduce the time to restore full-load operation, improve the effect of sudden changes in the operating voltage demand of high-voltage instantaneous events, and thus help to improve the test effect of the functional stability of the chip 200.

[0086] Credit values ​​can be recorded through dedicated registers. Therefore, in some embodiments of this application, chip 200 also includes a credit register 231, which is connected to cache 230. The credit register 231 is used to record the credit values ​​requested by cache 230 to memory controller 240 of memory 250.

[0087] Accordingly, controlling the cache 230 to disable the credit mechanism includes: adjusting the credit value recorded in the credit register 231 to 0. Controlling the maximum credit transfer between the cache 230 and the memory controller 240 based on the credit mechanism to the processing core 210's call request to the memory 250 may include: adjusting the value recorded in the credit register 231 to the maximum value of the credit register 231.

[0088] For example, the maximum credit value that the credit register 231 can record is 9. Before the credit mechanism is turned off, the credit value actually recorded by the credit register 231 may be 7 due to dynamic changes in the load. At this time, the credit value currently recorded can be ignored and the credit value of the credit register 231 can be modified to 0 so that the processing core 210 enters an idle state. After a second preset time, the credit value is adjusted to 8.

[0089] The above describes a method that controls the occurrence of high-voltage transient events through a credit mechanism. This method is simple to implement and reduces the difficulty of controlling the processing core 210 to enter idle and resume full-load operation. It can stably trigger transient events in a simple way, which helps to reduce the number of tests and improve the testing efficiency of the functional stability and minimum operating voltage of the chip 200.

[0090] In some embodiments of this application, before the control chip 200 executes a preset number of high voltage transient events, it may also wait for the chip 200 to run a preset application at full load for a duration greater than or equal to a third preset duration.

[0091] The third preset duration is greater than or equal to the time for executing the preset number of high-voltage transient events, wherein the time for executing the preset number of high-voltage transient events includes the first preset duration and the second preset duration. The third preset duration may vary for chips with different performance characteristics; it can be an empirical value or calculated in some way. For example, in one embodiment, the third preset duration = n × (first preset duration + second preset duration) × preset number of times, where n is an integer greater than 2.

[0092] For example, the first preset time is represented as RESTORE_TIME, the first preset duration is FREEZE_TIME, the preset number of times is SWITCH_CYCLES, and the third preset duration can be represented as: The third preset duration = n × (RESTORE_TIME + FREEZE_TIME) × SWITCH_CYCLES.

[0093] In this embodiment, because the load gradually increases and changes dynamically during the process of the chip starting to run the preset application, the state of the chip running the preset application at full load may be unstable. Therefore, in this embodiment, the chip can be waited for a third preset duration to run stably at full load, thereby reducing the impact of excessive load changes on the test results and improving the stability of voltage transient event triggering.

[0094] S130 detects the chip's operating status after a preset number of high-voltage transient events.

[0095] The minimum operating voltage is the lowest voltage required for chip 200 to maintain stable operation. Therefore, the operating status of chip 200 can be used to determine whether chip 200 is malfunctioning, and thus determine whether the current operating voltage can maintain stable operation of chip 200, thereby determining the minimum operating voltage. Therefore, after a preset number of high-voltage transient events, the operating status of chip 200 can be detected.

[0096] During this period, chip 200 continues to execute the preset application. When chip 200 runs the preset application, processing core 210 performs the calculations for the preset application. Stable operation of processing core 210 requires a suitable operating voltage. If the operating voltage is too low when processing core 210 is performing calculations, it cannot meet the computational demands, and the processing core 210 will experience operational anomalies, such as memory errors (e.g., calculation deviations, chip 200 deadlock). Conversely, excessively high operating voltages lead to additional power consumption. Therefore, it is necessary to measure the minimum operating voltage corresponding to each preset operating frequency. This minimum operating voltage can also be understood as the critical voltage. A reasonable minimum operating voltage can help optimize the performance of chip 200, maximize energy efficiency, optimize power management strategies, and reduce system heat dissipation costs.

[0097] For the reasons mentioned above, the normal operation of chip 200 can be determined by detecting the execution result of a preset application, the status of memory 250, and other hardware statuses of chip 200. Therefore, in some embodiments of this application, detecting the operating status of chip 200 may include: obtaining at least one of the calculation result, verification result, and running status of a preset application; and determining whether chip 200 is operating normally when any preset condition has not occurred based on the calculation result, verification result, and running status of the preset application.

[0098] In this embodiment, the preset conditions may include: the deviation between the calculation result and the preset result exceeds a preset threshold; the verification result indicates a verification error; and the running status indicates that the chip 200 is deadlocked.

[0099] In some embodiments, the preset conditions may also include timing violations, system crashes, etc. The measurement conditions and methods of different chips 200 are different, and the corresponding preset conditions can be configured according to the specific chip 200, which will not be elaborated here.

[0100] In the embodiments of this application, the working state of the chip 200 can be detected by monitoring whether the chip 200 has an abnormal signal through a test device, or by running a relevant verification program to verify the state of the chip 200. For details, please refer to the prior art, which will not be elaborated here.

[0101] In the embodiments of this application, the working state of the chip 200 can be detected based on a preset duration or cycle. For example, the working state of the chip 200 can be detected once every 3 minutes, or once every 10 loops (one operating cycle of the chip 200).

[0102] The specific methods and requirements for detecting the working status of chip 200 can be configured according to the type and performance of chip 200, and are not limited here.

[0103] S140, after confirming that the chip is working normally through the working status, reduces the current operating voltage of chip 200.

[0104] When measuring the minimum operating voltage corresponding to each preset operating frequency of chip 200, it is necessary to start from the initially set operating voltage and gradually reduce the operating voltage to determine the operating voltage that causes chip 200 to malfunction, and then use this operating voltage to determine the minimum operating voltage.

[0105] Therefore, in the embodiments of this application, if the chip 200 is working normally, the current operating voltage of the chip 200 can be reduced, and the test can be repeated with the new operating voltage. That is, with the reduced operating voltage, S110 to S130 can be executed again.

[0106] In the embodiments of this application, the operating voltage can be reduced in a preset step size, such as 5mV, 10mV, etc. Different chips 200 have different voltage requirements due to various reasons such as structure, function, and performance, so the preset step size is not limited here.

[0107] Changes in the operating voltage can affect the current operation of the processing core 210, thereby affecting the accuracy of the operation and even causing operational abnormalities. These abnormalities are caused by changes in the operating voltage, rather than by the inability to maintain the operation of the chip 200. Therefore, the minimum operating voltage determined based on this abnormality is incorrect.

[0108] For example, reducing the operating voltage during computation by the processing core 210 of chip 200 may lead to some abnormal situations. For instance, due to dynamic load, if the system load is not constant, even a small voltage change can cause instability when the voltage is reduced, resulting in abnormal system operation. This is because some computations may be particularly sensitive to voltage, especially in high-performance computing tasks. Furthermore, the effects of power supply noise and transient response can also occur. During voltage regulation, the power supply may introduce additional noise or affect transient response characteristics, potentially causing errors when the system performs complex computations.

[0109] Therefore, directly reducing the operating voltage during the operation will cause the chip 200 to malfunction or make calculation errors. This will result in an inaccurate minimum operating voltage when the chip 200 malfunctions, making it impossible to determine whether the malfunction or failure of the chip 200 is caused by insufficient voltage, unstable voltage regulation, transient problems caused by sudden load changes, etc. It will also lead to misjudgment and excessively high minimum operating voltage Vmin results. Consequently, the minimum operating voltage setting may be set too conservatively, thus affecting the performance of the chip 200.

[0110] However, if the preset application is closed and the operating voltage is reduced, the restart of the preset application and the restoration of the chip 200's operating state will take a long time, affecting measurement efficiency. Therefore, in the embodiments of this application, a method is provided to adjust the operating voltage during the operation of the preset application, reducing the operating voltage without affecting the accuracy of the calculation, and avoiding the time caused by restarting the preset application and restoring the chip 200's state.

[0111] In one embodiment of this application, reducing the current operating voltage of chip 200 may include: restricting memory 250 from being accessed; reducing the current operating voltage of chip 200; and restoring access to memory 250 so that processing core 210 can continue to execute the operation of a preset application.

[0112] In the embodiments of this application, after memory 250 is restricted from being accessed, the processing core 210 will be unable to access memory 250 to perform calculations. However, requests for memory 250 can still be sent and temporarily stored in cache 230. Therefore, this method can maintain the preset application without performing calculations, thereby achieving the effect of maintaining the operation of the preset application while restricting the execution of the preset application's calculations.

[0113] In conjunction with the aforementioned credit mechanism, in the embodiments of this application, restricting the access of memory 250 may include: controlling cache 230 to disable the credit mechanism, for example, writing 0 to the credit value recorded in credit register 231. Thus, after the credit mechanism is disabled, cache 230 is restricted from transmitting memory 250 requests to memory controller 240.

[0114] Because the call to restore memory 250 is required later, the current configuration of the credit mechanism in cache 230 can be obtained and saved before controlling cache 230 to disable the credit mechanism. Furthermore, the call to restore memory 250 may include restoring the credit mechanism of cache 230 to its current configuration.

[0115] It's important to distinguish that when the operating voltage is reduced, the credit mechanism of cache 230 is restored to its current configuration, not adjusted to maximum capacity / maximum credit. For example, if the maximum value of credit register 231 is 8, and the credit value recorded before the operating voltage adjustment is 7, then the credit value of 7 can be saved first, and then the credit value recorded in credit register 231 can be written to 0 to disable the credit mechanism. After the operating voltage reduction is complete, the credit value recorded in credit register 231 is restored to 7.

[0116] Adjusting the operating voltage can affect the accuracy of the calculation. After the credit mechanism is turned off, the processing core 210 will still complete the current calculation. If the operating voltage is reduced directly, it will affect the current calculation. Therefore, before reducing the operating voltage, you can wait for the chip 200 to enter the idle state.

[0117] In addition to limiting the waiting time after calling memory 250, some embodiments of this application also provide a method for determining whether the chip has entered an idle state. This includes: obtaining the idle power consumption of the chip 200 when it is not running the preset application; obtaining the current power consumption of the chip 200 before reducing its current operating voltage; determining whether the current power consumption is less than or equal to the idle power consumption; and determining that the chip 200 has entered an idle state if the current power consumption is less than or equal to the idle power consumption, at which point the current operating voltage of the chip 200 can be reduced.

[0118] Conversely, if the current power consumption is greater than the idle power consumption, then chip 200 has not yet entered the idle state.

[0119] Idle power consumption refers to the power consumption of chip 200 when it is not running a preset application. Besides maintaining basic operation, no other calculations are performed. When chip 200 starts running the preset application, processing core 210 needs to perform various calculations and schedule other structures, which increases the power consumption of chip 200. When processing core 210 stops running the preset application, its power consumption decreases, allowing the power consumption of chip 200 to return to idle power consumption.

[0120] Based on this, it can be determined whether chip 200 has entered an idle state by judging whether the current power consumption of chip 200 is less than or equal to the idle power consumption. This method no longer relies on register recording, which can reduce the process of reading and calculating registers, reduce the use of registers, and improve measurement efficiency.

[0121] Since the processing core 210 will gradually reduce and stop its operations after calling memory 250, if it is determined that the current power consumption is greater than the idle power consumption, it can wait for a second preset time and re-determine whether the current power consumption is less than or equal to the idle power consumption; repeat the above process until the current power consumption is less than or equal to the idle power consumption.

[0122] After voltage adjustment, the voltage will remain unstable for a period of time, around 250V, and the operating voltage output by the power module will fluctuate around the target value. However, by closing the Worse application and then adjusting the operating voltage, the voltage will have stabilized during the time it takes to restart and restore the Worse application.

[0123] In this application, because the preset application is not closed, its execution will resume quickly after memory 250 is restored. Unstable operating voltage may affect computation, leading to errors or malfunctions, and consequently affecting the accuracy of the minimum operating voltage measurement. Therefore, in this embodiment, after lowering the operating voltage and before restoring memory 250, a first preset duration is required to allow the voltage to stabilize, reducing the impact on the accuracy of the minimum operating voltage measurement. Therefore, in this embodiment, before restoring memory 250, the method further includes waiting for a fourth preset duration to allow the reduced operating voltage of chip 200 to stabilize.

[0124] S150 determines the minimum operating voltage corresponding to the preset operating frequency based on the current operating voltage when the chip malfunctions.

[0125] If the chip is confirmed to be functioning normally, the operating voltage can be further reduced and S110-S130 can be re-executed. However, if the operating status indicates that chip 200 is malfunctioning, it means that the current operating voltage of chip 200 cannot guarantee functional correctness and timing convergence, or cannot maintain stable operation of chip 200. Therefore, the minimum operating voltage corresponding to the preset operating frequency can be determined. In this embodiment, since chip 200 was still able to function normally when the current operating voltage was reduced previously, the previous operating voltage can be used as the minimum operating voltage corresponding to the current preset operating frequency. For example, if chip 200 functions normally at an operating voltage of 700mV, but malfunctions at an operating voltage of 690mV, then 700mV can be used as the minimum operating voltage corresponding to the preset operating frequency.

[0126] In the embodiments of this application, the chip 200 reduces its voltage by a preset step size in a single step. Correspondingly, determining the minimum operating voltage corresponding to a preset operating frequency based on the current operating voltage may include: determining the minimum operating voltage as the sum of the target operating voltage that causes the chip 200 to malfunction and the preset step size voltage. For example, if the preset step size is 10mV, and the target operating voltage that causes the chip 200 to malfunction is 680mV, then the minimum operating voltage corresponding to the preset operating frequency is 690mV.

[0127] The above describes the measurement of the minimum operating voltage corresponding to a single preset operating frequency of chip 200. In actual measurement, chip 200 may be configured with multiple preset operating frequencies. When measuring the minimum operating voltage corresponding to different preset operating frequencies, the difference lies in the different preset operating voltages and initial operating voltages used. Therefore, for each preset operating frequency, the above process can be repeated to measure the minimum operating voltage, which will not be elaborated here.

[0128] Since the chip 200 started to malfunction when the lowest operating voltage was measured, the chip 200 can be restarted and the preset operating frequency and corresponding initial operating voltage can be reset. The preset application can then be run to measure the lowest operating frequency corresponding to the new preset operating frequency.

[0129] To facilitate understanding, an example is provided here. Please refer to [link / reference]. Figure 3 , Figure 3 This is a schematic flowchart illustrating the measurement of the minimum operating voltage according to an embodiment of this application.

[0130] First, a list of preset operating frequencies and initial voltage ranges can be obtained. The preset operating frequencies can be various adjustable operating frequencies configured by the DVFS mechanism of chip 200. The initial operating voltage is the operating voltage at the start of the measurement, which is generally a large value and gradually decreases during subsequent measurements. For example, the preset operating frequencies include F0, F1, F2...Fn, etc., and F0, F1, F2...Fn can be used to set their respective corresponding initial operating voltages.

[0131] Next, select a preset operating frequency to be tested, and configure the chip 200 with the preset operating frequency and corresponding initial operating voltage so that the chip 200 operates at the preset operating frequency and corresponding initial operating voltage. For example, set the operating frequency of the chip 200 to F=F0=100MHz and the operating voltage of the chip 200 to V=V0=700mV. Record the idle power consumption at this time, for example, P=20W.

[0132] Under the current operating voltage, the preset application is run at full load for a duration that can be the third preset duration.

[0133] Then, the control chip 200 executes the high-voltage transient event a preset number of times. Please refer to [link / reference needed]. Figure 4 , Figure 4 This is a flowchart illustrating a high-voltage transient event provided in an embodiment of this application. The high-voltage transient event may include: modifying the value of credit register 231 to 0; waiting for a second preset duration; modifying the value of credit register 231 to its maximum value; and waiting for a first preset duration. Thus, one high-voltage transient event is completed, and the high-voltage transient event is repeated a preset number of times.

[0134] Then, the operating status of chip 200 is detected, and the following processes are executed according to the operating status: If chip 200 is functioning normally, it indicates that the operating voltage needs to be further reduced for measurement. At this time, the recorded value of credit register 231 can be saved and modified to 0 to limit the access of memory 250, thereby limiting the execution of the preset application. Then, it is determined whether chip 200 has entered an idle state by checking whether the current power consumption is less than or equal to the idle power consumption. If it is greater, the process continues to wait; if it is less than or equal to the idle power consumption, the current operating voltage can be reduced by a preset step size. After waiting for a fourth preset time, the access of memory 250 is restored, such as by modifying the recorded value of credit register 231 from 0 to the current recorded value. Then, the system is run at full load again and the high-voltage transient event is executed a preset number of times, repeating the previous steps.

[0135] If chip 200 malfunctions, the minimum operating voltage corresponding to the preset operating frequency can be determined based on the current operating voltage. The voltage corresponding to the preset step size is then added to the current operating voltage to obtain the minimum operating voltage corresponding to the current preset operating frequency.

[0136] Meanwhile, after the minimum operating voltage measurement corresponding to a preset operating frequency is completed, since the chip 200 has malfunctioned, the chip 200 can be restarted and a new preset operating frequency and initial operating voltage can be reconfigured to measure the minimum operating voltage corresponding to the new preset operating frequency.

[0137] Repeat the measurement process until the lowest operating voltage corresponding to each preset operating frequency in the preset operating frequency-initial operating voltage range list is measured.

[0138] In this measurement method, by executing a high-voltage transient event, a transient event is actively triggered to test the functional stability of the chip 200. This avoids the excessive number of tests and long test times caused by passively waiting for the transient event to be triggered, and reduces the impact on the accuracy of the minimum operating voltage measurement when the transient event is not triggered, thus effectively improving test efficiency and accuracy.

[0139] Furthermore, the measurement efficiency can be further improved by not shutting down the preset application during this period. The accuracy of the minimum operating voltage measurement is also affected by factors such as load changes and temperature of the preset application. During operation, the preset application may cause dynamic changes in the load of the processing core 210 of chip 200, especially when the preset application is not running stably. However, in the embodiments of this application, since the preset application does not need to be shut down during the measurement process, it can maintain stable operation. This method can effectively avoid large changes in the load of chip 200, thereby reducing the impact of load changes on the accuracy of the minimum operating voltage measurement. Similarly, since the preset application does not need to be shut down, the power consumption caused by the load of the preset application will not change significantly, thus preventing the temperature of chip 200 from changing significantly due to power consumption. This reduces the impact of chip 200 temperature on chip 200 performance, thereby also improving the accuracy of the minimum operating voltage measurement.

[0140] In some embodiments of this application, the above-described test method is implemented as an automated test program of the chip 200 test equipment, so that the test equipment calls the automated test program to implement the above-described test method, thereby realizing the automated measurement of the minimum operating voltage of the chip 200 and further improving test efficiency.

[0141] Based on the same inventive concept, this application also provides a testing system 400. Please refer to [link to relevant documentation]. Figure 5 , Figure 5 This is a schematic diagram of a test system 400 provided in an embodiment of this application. The test system 400 includes an access module 410 and a test host 420.

[0142] The access module 410 is used to connect to the chip under test. The receiving module includes a gold finger and a communication module to collect electrical signals from the chip under test.

[0143] The test host 420 is connected to the access module 410 and is used to execute the minimum operating voltage measurement method provided in any of the foregoing embodiments to measure the chip under test and obtain the minimum operating voltage corresponding to each preset operating frequency in the chip under test.

[0144] In the embodiments of this application, the testing system 400 may be a testing machine used in a laboratory or testing factory.

[0145] Based on the same inventive concept, embodiments of this application also provide a computer-readable storage medium storing a computer program thereon. When the computer program is run on a computer, it causes the computer to execute the minimum operating voltage measurement method provided in the above embodiments. The computer may be the test host 420 provided in the foregoing embodiments.

[0146] The computer-readable storage medium can be any available medium that a computer can access, or a data storage device such as a server or data center that integrates one or more available media. The available medium can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs (digital video discs)), or semiconductor media (e.g., SSDs (solid state disks)).

[0147] If the minimum operating voltage measurement method is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

[0148] Based on the same inventive concept, embodiments of this application also provide a processor, which includes a chip 200. The chip 200 is configured with a dynamic voltage-frequency adjustment mechanism, and the minimum operating voltage corresponding to each operating frequency in the dynamic voltage-frequency adjustment is measured by the minimum operating voltage measurement method provided in any of the foregoing embodiments.

[0149] In the embodiments of this application, the processor type can be a GPGPU, GPU, CPU, NPU, or other processors, and the specific type is not limited here.

[0150] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0151] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A method for measuring the minimum operating voltage, characterized in that, This method is used to measure the minimum operating voltage corresponding to a preset operating frequency of a chip; the chip includes a processing core; the minimum operating voltage measurement method includes: When the processing core is operating at the current voltage, it controls the chip to run a preset application at full load; the processing core is used to execute the calculations of the preset application. The chip is controlled to execute a preset number of high-voltage transient events; the high-voltage transient events are used to cause a sudden change in the operating voltage requirement of the chip's processing core; After the preset number of high-voltage transient events, the operating status of the chip is detected; If the chip is determined to be working normally based on the operating status, the current operating voltage of the chip is reduced. In the event of a chip malfunction, the minimum operating voltage corresponding to the preset operating frequency is determined based on the current operating voltage.

2. The method for measuring the minimum operating voltage according to claim 1, characterized in that, The high-voltage transient events include: Control the processing core to enter an idle state; The processing core is controlled to resume full-load operation from the idle state and run for a first preset duration.

3. The method for measuring the minimum operating voltage according to claim 2, characterized in that, The chip also includes memory, wherein the processing core executes the operations of the preset application by calling the memory; The control of the processing core to enter an idle state includes: The processing core is restricted from accessing the memory, thereby limiting the processing core from executing the operations of the preset application and entering the idle state; waiting for a second preset time; The control of the processing core to resume full-load operation from the idle state includes: The processing core is controlled to utilize the memory to its maximum capacity, so as to execute the preset application's operations at full load.

4. The method for measuring the minimum operating voltage according to claim 3, characterized in that, The chip also includes a cache and a memory controller. The cache is connected to the memory controller and the processing core, respectively. The memory controller is also connected to the memory. The processing core sends memory requests to the memory through the cache to the memory controller so that the memory can be accessed through the memory controller. The cache and the memory controller are respectively configured to control the transmission of requests based on a preset credit mechanism; The credit mechanism includes: the cache allows the transmission of a request to access the memory to the memory controller if it has a credit value; The restriction on the processing core's access to the memory includes: disabling the credit mechanism between the cache and the memory controller; The control of the processing core to access the memory to the maximum extent includes: controlling the maximum credit transfer between the cache and the memory controller based on the credit mechanism to request the processing core to access the memory.

5. The method for measuring the minimum operating voltage according to claim 4, characterized in that, The chip also includes a credit register, which is connected to the cache and is used to record the credit value between the cache and the memory controller. The step of disabling the credit mechanism between the cache and the memory controller includes: modifying the credit value recorded in the credit register to 0; The control of the maximum credit transfer between the cache and the memory controller based on the credit mechanism to the processing core's memory access request includes: adjusting the credit value recorded in the credit register to the maximum value of the credit register.

6. The method for measuring the minimum operating voltage according to claim 5, characterized in that, Before controlling the chip to execute the high-voltage transient event a preset number of times, the method further includes: waiting for the chip to run a preset application at full load for a duration greater than or equal to a third preset duration, wherein the third preset duration is greater than or equal to the time for executing the high-voltage transient event a preset number of times.

7. The method for measuring the minimum operating voltage according to any one of claims 1-6, characterized in that, The chip also has memory, and the processing core executes the calculations of the preset application by calling the memory; The reduction of the current operating voltage of the chip includes: The memory access is restricted; after the memory access is restricted, the preset application continues to run, but the operation of the preset application is restricted. Reduce the current operating voltage of the chip; The memory access is restored so that the processing core can continue to execute the preset application's operations.

8. The method for measuring the minimum operating voltage according to claim 7, characterized in that, The chip also includes a cache and a memory controller. The cache is connected to the memory controller and the processing core, respectively. The memory controller is also connected to the memory. The processing core sends memory requests to the memory through the cache to the memory controller so that the memory can be accessed through the memory controller. The cache and the memory controller are respectively configured to control the transmission of requests based on a preset credit mechanism; The credit mechanism includes: the cache allows the transmission of the memory request to the memory controller if it has a credit value; The restriction on the memory being accessed includes: Obtain and save the current configuration of the cache for the credit mechanism; The cache is controlled to disable the credit mechanism; after the credit mechanism is disabled, the cache is restricted from transmitting memory requests to the memory controller. And, the call to restore the memory includes: Restore the cached credit mechanism to the current configuration.

9. The method for measuring the minimum operating voltage according to claim 7, characterized in that, The minimum operating voltage measurement method further includes: obtaining the idle power consumption of the chip when it is not running the preset application; The reduction of the current operating voltage of the chip includes: Obtain the current power consumption of the chip; Determine whether the current power consumption is less than or equal to the idle power consumption; If it is determined that the current power consumption is less than or equal to the idle power consumption, the current operating voltage of the chip is reduced.

10. The method for measuring the minimum operating voltage according to claim 7, characterized in that, Before resuming the memory access, the method further includes: waiting for a fourth preset duration to allow the chip's reduced operating voltage to stabilize.

11. A testing system, characterized in that, include: Access module, used to connect to the chip under test; The test host, connected to the access module, is used to perform the minimum operating voltage measurement method as described in any one of claims 1-10, and to measure the minimum operating voltage corresponding to each preset operating frequency in the chip under test.

12. A computer-readable storage medium, characterized in that, The readable storage medium stores a computer program that, when run on a computer, causes the computer to perform the minimum operating voltage measurement method as described in any one of claims 1-10.

13. A processor, characterized in that, Includes: a chip, the chip being configured with a dynamic voltage frequency adjustment mechanism, wherein the minimum operating voltage corresponding to each operating frequency in the dynamic voltage frequency adjustment is measured by the minimum operating voltage measurement method as described in any one of claims 1-10.

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