Light receiving device of laser radar and laser radar

Abstract

The invention provides a light receiving device of a laser radar, and the device comprises a plurality of receiving units, each receiving unit comprises at least one photoelectric detector, and the photoelectric detector is configured to receive a light signal and convert the light signal into an electric signal; the power switch circuit is respectively coupled with the plurality of receiving units and is used for gating a part of photoelectric detectors in each receiving unit and providing bias voltage for the part of photoelectric detectors; and the plurality of integrating circuits are respectively coupled with the receiving units and are used for integrating and outputting the electric signals. According to the light receiving device of the laser radar, the number of power switch circuits can be reduced, so that the occupied area of a PCB (Printed Circuit Board) is reduced, and the cost and the power consumption are saved.

Description

Technical Field

[0001] This invention relates to the field of laser detection, and more particularly to a light receiving device for a lidar and a lidar including the same. Background Technology

[0002] A silicon photomultiplier tube (SiPM) is a commonly used high-sensitivity photodetector. Each pixel consists of many avalanche diodes operating in Geiger mode, such as... Figure 1 As shown, its circuit model can be simplified to a diode with a signal output port.

[0003] In lidar light receiving devices that use silicon photomultiplier tubes as photodetectors, the number of photons received by a pixel during a period of time can be characterized by measuring the electrical signals (including current and voltage) on the silicon photomultiplier tube and integrating them.

[0004] Current lidar systems typically have dozens or even hundreds of photodetectors, such as 128 or 256. To achieve the current integration function of each photodetector, many current integration circuits need to be designed, which is usually unacceptable in terms of cost, power consumption and printed circuit board (PCB) area.

[0005] The content in the background section is merely technology known to the public and does not necessarily represent existing technology in this field. Summary of the Invention

[0006] In view of at least one deficiency of the prior art, the present invention provides a light receiving device and a lidar that can reduce the number of power switching circuits, thereby reducing PCB footprint and saving cost and power consumption.

[0007] This invention provides an optical receiving device for lidar, comprising: Multiple receiving units, wherein each receiving unit includes at least one photodetector configured to receive an optical signal and convert the optical signal into an electrical signal; A power switch circuit is coupled to the plurality of receiving units respectively, for selecting a portion of the photodetectors in each receiving unit and providing a bias voltage to the portion of the photodetectors; Multiple integrating circuits are provided, each coupled to a receiving unit, to integrate and output the electrical signal.

[0008] According to one aspect of the invention, in each receiving unit, one end of the at least one photodetector is shared and coupled to the input of the integrating circuit, and the non-shared end of the at least one photodetector is coupled to the power switching circuit to receive the bias voltage.

[0009] According to one aspect of the invention, the power switch circuit includes a voltage input terminal and at least one voltage output terminal, wherein the voltage input terminal is configured to receive a bias voltage, and each voltage output terminal is coupled to a non-common terminal of one or more photodetectors in each receiving unit.

[0010] According to one aspect of the invention, the power switch circuit further includes an address input terminal configured to receive an address bit to select the portion of the photodetector and to output the bias voltage from a voltage output terminal corresponding to the address bit.

[0011] According to one aspect of the invention, the integrating circuit includes: The first switching unit has a first terminal coupled to a common terminal of the at least one photodetector, a second terminal grounded, and a control terminal receiving a control signal to turn the first switching unit on or off. The first capacitor has a first end coupled to a common terminal of the at least one photodetector, and a second end grounded. The first end serves as the output terminal of the integrating circuit, which outputs the integrated result of the electrical signal.

[0012] According to one aspect of the invention, the first switching unit includes a tri-state buffer configured to have its output coupled to a common terminal of the at least one photodetector, and to enable a control terminal to receive the control signal. The tri-state buffer is used to switch the state of the output terminal between a low level and a high impedance state according to the control signal.

[0013] According to one aspect of the present invention, when the power switch circuit selects a portion of the photodetectors in each receiving unit, the first switching unit of the corresponding integrating circuit is turned off, the first capacitor is charged, and the first capacitor is charged for the same amount of time each time; when the power switch circuit ends the selection, the first switching unit of the corresponding integrating circuit is turned on, and the first capacitor is discharged.

[0014] According to one aspect of the invention, it further includes: An analog-to-digital converter, coupled to the output of the integrator circuit, is used to sample the integration result of the electrical signal during the charging time of the first capacitor.

[0015] According to one aspect of the invention, the analog-to-digital converter samples the integral result of the output electrical signal of different photodetectors each time.

[0016] According to one aspect of the invention, the period during which the analog-to-digital converter samples the integral result of the electrical signal is matched with the period during which the first switching unit is turned on and off.

[0017] According to one aspect of the invention, the integrating circuit includes: A transimpedance amplifier, the input of which is coupled to a common terminal of the at least one photodetector; The first resistor has its first end coupled to the output terminal of the transimpedance amplifier, and its second end serves as the output terminal of the integrator circuit, outputting the integrated result of the electrical signal. The second capacitor has its first end coupled to the second end of the first resistor, and its second end grounded.

[0018] According to one aspect of the present invention, the receiving unit includes a photodetector array, the photodetector being a photomultiplier tube, in each receiving unit, the anodes or cathodes of a plurality of photomultiplier tubes are shared, the cathodes or anodes are respectively coupled to one of the voltage output terminals of a power switch circuit, and the integrating circuit outputs the integration result of the DC component of the electrical signal.

[0019] The present invention also provides a lidar, comprising: A light emitting device, configured to emit a detection beam for detecting a target object; and As described above, the optical receiving device, wherein the plurality of receiving units are configured to receive the echo beam reflected from the probe beam on the target and convert it into an electrical signal.

[0020] The present invention also provides a method for receiving radar echoes using the optical receiving device described above, comprising: The power switch circuit selects a portion of the photodetectors in each receiving unit and provides a bias voltage to the photodetectors. The echo beam is received by a selected photodetector in each receiving unit and the echo beam is converted into an electrical signal. The electrical signal is integrated and output through multiple integrating circuits corresponding to the multiple receiving units.

[0021] Embodiments of the present invention provide an optical receiving device for lidar, which selects a portion of the photodetectors in each receiving unit through a power switch circuit, and integrates and outputs the electrical signals through an integrating circuit coupled to multiple receiving units. The optical receiving device for lidar provided by the present invention can reduce the number of power switch circuits, thereby reducing PCB footprint and saving cost and power consumption. Attached Figure Description

[0022] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings: Figure 1 The anode, cathode, and fast output port of the silicon photomultiplier tube are shown. Figure 2A A silicon photomultiplier tube array is shown; Figure 2B It shows Figure 2A The pin diagram of the silicon photomultiplier tube array is shown. Figure 3 The power management and integration circuit of a silicon photomultiplier array in the prior art is schematically shown; Figure 4 The light receiving device of a lidar in the prior art is schematically shown; Figure 5 The light receiving device of a lidar according to a preferred embodiment of the present invention is schematically shown; Figure 6 The light receiving device of a lidar according to a preferred embodiment of the present invention is schematically shown; Figure 7A The light receiving device of a lidar according to a preferred embodiment of the present invention is schematically shown; Figure 7B An integrating circuit of an optical receiving device according to a preferred embodiment of the present invention is schematically shown; Figure 8 The diagram schematically illustrates the on-off cycle of the first switching unit and the charge-discharge cycle of the first capacitor according to a preferred embodiment of the present invention. Figure 9 The light receiving device of a lidar according to a preferred embodiment of the present invention is schematically shown; Figure 10 The light receiving device of a lidar according to a preferred embodiment of the present invention is schematically shown; Figure 11 An integrating circuit according to a preferred embodiment of the present invention is illustrated schematically; Figure 12 A light receiving device comprising a single silicon photomultiplier tube is schematically illustrated according to a preferred embodiment of the present invention; Figure 13 A lidar according to a preferred embodiment of the present invention is illustrated schematically; Figure 14 A method for receiving an echo beam according to a preferred embodiment of the present invention is shown. Detailed Implementation

[0023] In the following description, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments can be modified in various ways without departing from the spirit or scope of the invention. Therefore, the drawings and description are considered to be exemplary in nature and not restrictive.

[0024] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0025] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows for communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0026] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0027] The following disclosure provides many different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0028] The embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0029] To activate a silicon photomultiplier tube (SMT), a voltage Vbias = Vca – Va needs to be applied. When no photons enter the photosensitive surface of the SMT, the avalanche diode inside the SMT does not activate, and therefore no current is generated. When the photosensitive surface of the SMT receives photons, the avalanche diode inside the SMT will avalanche, and the SMT will generate a current. The magnitude of this current can characterize the intensity of the received light.

[0030] In lidar, multiple silicon photomultiplier tubes are typically arranged in a one-dimensional linear array, with the anodes or cathodes of the multiple silicon photomultiplier tubes connected together. For example... Figure 2A As shown, this is a silicon photomultiplier array consisting of 16 silicon photomultiplier tubes with a common anode. Figure 2B As shown Figure 2A The diagram shows the pinout of a silicon photomultiplier tube array, where F1-F16 are the 16 pulse signal output terminals of the silicon photomultiplier tube array, C1-C16 are the 16 cathodes of the silicon photomultiplier tube array, and ANODE is the common anode of the silicon photomultiplier tube array.

[0031] The optical receiving device of a lidar system typically consists of multiple silicon photomultiplier tube (SPD) arrays, where each SPD array usually has only one SPD tube active at any given time. It is easy to see that if the optical receiving device has M SPD arrays, and each SPD array contains N SPD tubes, then the total number of SPD tubes is M*N.

[0032] Therefore, to save power, in practical optical receiving devices, an N-to-1 power switch circuit can be used to control the power supply, powering only one silicon photomultiplier tube at a time. The N-to-1 power switch circuit sequentially selects one voltage output from among N voltage outputs for power supply, with each voltage output being powered for approximately a few microseconds. During this time, the current generated on the silicon photomultiplier tube is integrated, and the integration result can characterize the number of photons received by that silicon photomultiplier tube. Figure 3 As shown, in the prior art, the integrating circuit is used in conjunction with the power switching circuit. Figure 3 The receiving unit shown is preferably a silicon photomultiplier tube array composed of 16 common-anode silicon photomultiplier tubes. Using an integrating circuit in conjunction with a 16-to-1 power switch circuit, the current at the output of the currently supplied voltage can be integrated. The integrating circuit is used to obtain the DC component to characterize the received light intensity. The FASTOUT port (F1-F16) outputs an AC pulse signal. The address lines of the power switch circuit are A0-A3, as shown in Table 1. When it represents 0 (0000), the voltage output terminal C1 of the power switch circuit selects the first silicon photomultiplier tube in the silicon photomultiplier tube array (selected through port C1 of the silicon photomultiplier tube array), and supplies power to the first silicon photomultiplier tube in the silicon photomultiplier tube array through the voltage input terminal VBIAS of the power switch circuit. The first silicon photomultiplier tube receives the echo signal and generates current. The integrating circuit integrates the current to obtain the corresponding voltage value to characterize the intensity of the echo signal.

[0033]

[0034] Table 1 The current flow of the optical receiving device is as follows: power supply VBIAS -> integrating circuit VCC -> integrating circuit ACC_IN -> power switch circuit VBIAS -> power switch circuit C1 -> silicon photomultiplier tube array C1 -> silicon photomultiplier tube array common anode ANODE -> ground.

[0035] In existing technologies, lidar optical receiving devices contain M silicon photomultiplier tube arrays. It is readily apparent that, to achieve power management and energy integration, a total of M 16-to-1 power switches are required, along with M integration circuits. For example... Figure 4 As shown, with the increase of the value of M, the cost, PCB area and power consumption of the power switching circuit and the integrating circuit will increase exponentially.

[0036] This invention provides a light receiving device for lidar utilizing a power switching circuit and an integrating circuit. It employs only one N-to-1 power switching circuit to manage the power of M*N photodetectors, where M*N photodetectors refer to the light receiving device having M silicon photomultiplier tube arrays, each array comprising N photodetectors. The light receiving device provided by this invention saves PCB area and cost, further reduces the size of the light receiving device, and lowers the power consumption of the lidar system.

[0037] According to a preferred embodiment of the present invention, such as Figure 5 As shown, the present invention provides a light receiving device 100 for lidar, including multiple receiving units 110, a power switching circuit 120, and multiple integrating circuits 130. Each receiving unit 110 includes at least one photodetector configured to receive an optical signal and convert it into an electrical signal. The power switching circuit 120 is coupled to each of the multiple receiving units 110 to select a portion of the photodetectors in each receiving unit and to provide a bias voltage to that portion of the photodetectors. Each integrating circuit 130 is coupled to each receiving unit 110 to integrate and output the electrical signal.

[0038] like Figure 5 As shown, according to a preferred embodiment of the present invention, in the light receiving device 100, the receiving unit 110 includes a photodetector array, the photodetector being a silicon photomultiplier tube. In each receiving unit 110, the anodes or cathodes of multiple silicon photomultiplier tubes are shared, and the cathodes or anodes are respectively coupled to one of the voltage output terminals of the power switch circuit 120. The integrating circuit 130 outputs the integration result of the DC component of the electrical signal.

[0039] Preferably, in each receiving unit 110, one end of the at least one photodetector is shared and coupled to the input of the integrating circuit 130, and the non-shared end of the at least one photodetector is coupled to the power switching circuit 120 to receive the bias voltage.

[0040] like Figure 6 As shown, according to a preferred embodiment of the present invention, receiving units 110-1 and 110-2 respectively include as follows: Figure 6 The diagram shows a silicon photomultiplier tube array consisting of 16 silicon photomultiplier tubes with a common anode. The figure illustrates the pinout of the silicon photomultiplier tube array, where C1-C16 are the cathodes of the 16 silicon photomultiplier tubes in receiver unit 110-1, F1-F16 are the fast output ports of the 16 silicon photomultiplier tubes in receiver unit 110-1, and ANODE is the common anode of the 16 silicon photomultiplier tubes in receiver unit 110-1. Figure 6An embodiment of the light receiving device 100 including two silicon photomultiplier tube arrays is shown. It will be readily understood by those skilled in the art that the receiving unit 110 may include more or fewer photodetectors, and the light receiving device 100 may include more receiving units 110 or only one receiving unit 110, all of which are within the protection scope of this invention.

[0041] In this embodiment, the 16 silicon photomultiplier tubes in the silicon photomultiplier tube array share a common anode and are coupled to the input terminal of the integrating circuit 130. The power switch circuit 120 selects the 16 silicon photomultiplier tubes by being coupled to their respective cathodes and outputs a bias voltage. Those skilled in the art will readily understand that multiple silicon photomultiplier tubes in the silicon photomultiplier tube array can also be connected in parallel with their cathodes, selected and outputting bias voltages through independent anodes; these are all within the scope of this invention.

[0042] Preferably, the power switch circuit 120 includes a voltage input terminal and at least one voltage output terminal, wherein the voltage input terminal is configured to receive a bias voltage, and each voltage output terminal is coupled to a non-common terminal of one or more photodetectors in each receiving unit 110. For example... Figure 6 As shown, the voltage input terminals C1, C2...C16 of the power switch circuit 120 are coupled to the non-common terminals C1, C2...C16 of multiple photodetectors of the receiving unit 110-1 and the receiving unit 110-2, respectively, to output bias voltage and select some of the photodetectors.

[0043] Preferably, the power switch circuit 120 further includes an address input terminal configured to receive an address bit to select the portion of the photodetector and output a bias voltage from a voltage output terminal corresponding to the address bit. For example... Figure 6 As shown, the address input terminals A0-A3 of the power switch circuit 120 are configured to receive address bits and output bias voltages from the voltage output terminals (C1, C2...C16) corresponding to the address bits to select the corresponding photodetectors.

[0044] Figure 6 The pinout diagram of the power switch circuit 120 is also shown. Figure 6 In the illustrated embodiment, the power switch circuit 120 includes an address input terminal A[3:0], a bias voltage input terminal VBIAS, and 16 voltage output terminals C1-C16, which are respectively coupled to the cathodes of the 16 silicon photomultiplier tubes of receiving units 110-1 and 110-2. Based on the input signal from the address input terminal VBIAS, the bias voltage is output from one of the voltage output terminals C1-C16 to select the corresponding silicon photomultiplier tube.

[0045] Figure 6In this embodiment, each voltage output terminal of the power switch circuit 120 corresponds to a silicon photomultiplier tube, and each silicon photomultiplier tube is selected separately. This is only a preferred embodiment. Those skilled in the art will readily understand that one voltage output terminal of the power switch circuit 120 can select multiple silicon photomultiplier tubes, allowing multiple silicon photomultiplier tubes in receiving units 110-1 and 110-2 to detect simultaneously. This embodiment is also within the protection scope of this invention.

[0046] like Figure 6 As shown, integrator circuits 130-1 and 130-2 are coupled to the common terminal of receiver units 110-1 and 110-2, respectively, to integrate the current generated on the silicon photomultiplier tube within a certain time to characterize the number of received photons.

[0047] Figure 6 In the illustrated embodiment, M=2, N=16, where M represents the total number of M silicon photomultiplier tube arrays in the optical receiving device 100, and N represents the number of silicon photomultiplier tubes in one silicon photomultiplier tube array. Specifically, the common terminal of receiving unit 110-1 and receiving unit 110-2 is coupled to integrating circuit 130-1 and integrating circuit 130-2, respectively. The voltage output terminals C1-C16 of the power switch circuit 120 are coupled to the ports C1-C16 of receiving unit 110-1 and receiving unit 110-2, respectively. The address terminals of the power switch circuit 120 are A0-A3. When the input address is 0 (0000), the voltage output terminal C1 of the power switch circuit 120 selects receiving unit 110-1 and receiving unit 110-2. The first silicon photomultiplier tube in unit 110-2 is powered by the voltage input terminal VBIAS to the first silicon photomultiplier tubes in receiving units 110-1 and 110-2. The first silicon photomultiplier tube receives the echo signal and generates current (flowing from the cathode to the anode). Integrating circuits 130-1 and 130-2 are respectively connected to the common anode terminal ANODE of receiving units 110-1 and 110-2 to integrate the current and obtain the corresponding voltage value to characterize the intensity of the echo signal.

[0048] For any case where M>2, only one set of power switch circuit 120 is still needed. The preferred embodiment of the present invention further simplifies the circuit design, reduces the circuit cost, and saves PCB area.

[0049] According to another preferred embodiment of the present invention, the present invention also provides a low-cost integrating circuit, such as... Figure 7A As shown, the integrating circuits 130-1 and 130-2 each include a first switching unit 131 and a first capacitor 132. The first terminal of the first switching unit 131 shares a common terminal with at least one photodetector of the receiving units 110-1 and 110-2. Figure 7AThe first terminal of the first capacitor 132 is coupled to the first terminal of the at least one photodetector (shown as ANODE), the second terminal is grounded, and the control terminal receives a control signal to turn the first switch unit 131 on or off. The first terminal of the first capacitor 132 is connected to the common terminal of the at least one photodetector (shown as ANODE). Figure 7A The diagram shows the ANODE terminal coupled to the ground terminal, with the first terminal serving as the output terminal of the integrator circuit 130, which outputs the integrated result of the electrical signal.

[0050] According to a preferred embodiment of the present invention, such as Figure 7A As shown, when the power switch circuit 120 selects some of the photodetectors in the receiving units 110-1 and 110-2, the first switching unit 131 of the corresponding integrating circuits 130-1 and 130-2 ( Figure 7A Preferably, switches K1 and K2 are open, and the first capacitor 132 ( Figure 7A The capacitors C1 and C2 are preferred for charging, and the first capacitor 132 is charged for the same amount of time each time. When the power switch circuit 120 ends the selection, the first switching unit 131 of the corresponding integrating circuit 130 is turned on, and the first capacitor 132 is discharged.

[0051] According to a preferred embodiment of the present invention, such as Figure 7A As shown, one of the silicon photomultiplier tubes is selected using the power switch circuit 120, and the first switching unit 131 ( Figure 7A The control terminal of the preferred switches K1 and K2 receives the control signal. Taking switch K1 as an example, the control signal uses the system clock, ACC_CLR1 is high, causing switch K1 to open, and the photocurrent generated by the selected silicon photomultiplier tube flows from the cathode to the anode of the silicon photomultiplier tube, which is the first capacitor 132 ( Figure 7A The preferred method is to charge the capacitor (C1). Figure 8 The charging (integration)-discharging process of capacitor C1 is illustrated. Typically, the integration time t (charging time) is 1-2 µs. Since the light intensity is usually uniform, the integration process is a linearly increasing process, where the voltage across capacitor C1... for:

[0052] Depend on Figure 8 It can be seen that, since the number of photons received by each photodetector may be different each time, therefore Figure 8 The current used to charge capacitor C1 varies each time. In the above formula, V0 is the initial voltage across capacitor C1, determined by the characteristics of the first switching unit 131. The first switching unit 131 can be a transistor, MOSFET, analog switch, etc. Since a MOSFET can be equivalent to a very small resistor when it is turned on, when a MOSFET is used as the first switching unit 131, V0 can be considered to be 0, which is closest to the ideal integrating circuit.

[0053] According to a preferred embodiment of the present invention, such as Figure 9 As shown, the integrating circuits 130-1 and 130-2 respectively include: a first switching unit 131 and a first capacitor 132, wherein the first switching unit 131 includes NMOS transistors Q1 and Q2. The gates of NMOS transistors Q1 and Q2 are coupled to ACC_CLR1 and ACC_CLR2 respectively, and the NMOS transistors are controlled according to the output voltages of ACC_CLR1 and ACC_CLR2. The source and drain of NMOS transistors Q1 and Q2 are coupled to the first capacitor 132. Figure 9 The two ends of capacitors C1 and C2 are preferably connected, and the drain is coupled to ACC_OUT1 and ACC_OUT2 as the output terminal of the integration result on capacitors C1 and C2, while the source is grounded.

[0054] According to a preferred embodiment of the present invention, the optical receiving device 100 further includes an analog-to-digital converter. For example... Figure 7B As shown, the analog-to-digital converter (ADC) is coupled to the output (ACC_OUT1) of the integrator circuit 130-1, for use in the first capacitor 132 ( Figure 7B The integral result of the electrical signal is sampled during the charging time of C1 (preferably) to obtain a digital signal representing the integral result, which is then input into the FPGA for processing.

[0055] like Figure 7B As shown, the analog-to-digital converter (ADC) connected to ACC_OUT1 is used to sample the first capacitor 132 ( Figure 7B The voltage signal during charging (preferably C1) is used to read the amplitude of the voltage signal. After integration time t, the first switching unit 131 ( Figure 7B The control terminal of K1 (preferably) turns on the first switching unit 131, ACC_CLR1 goes low, and the first capacitor 132 discharges, following an RC discharge curve. Then, the next silicon photomultiplier tube can be selected using a power switch circuit, and the above process is repeated. The time interval between each sampling by the analog-to-digital converter is equal, such as... Figure 8 As shown, the dashed line represents the voltage sampling time point on the first capacitor 132. This voltage sampling time point falls within the time during which the first switching unit 131 is open and the first capacitor 132 is charging. Preferably, the voltage sampling time point is the moment when the first switching unit 131 switches from open to on. Figure 8 It can be seen that the magnitude of the photocurrent generated by each detection is different, and the analog-to-digital converter samples the integral result of the output electrical signal of different photodetectors each time.

[0056] According to a preferred embodiment of the present invention, the sampling period of the integral result of the analog-to-digital converter on the electrical signal is matched with the period of the first switching unit 131 being turned on and off.

[0057] Furthermore, the period of some photodetectors in the power switch circuit 120 selecting the receiving unit 110, and the period of the first switching unit 131 being turned on and off, are matched with the sampling period of the analog-to-digital converter. The period t1 during which the analog-to-digital converter samples the integral result of the electrical signal is equal to one complete cycle of ACC_CLR being at a high level and a low level, that is, equal to one cycle of the first switching unit 131 being turned on and off. Preferably, alignment can be achieved through the system clock. By aligning the timing of each trigger signal with the system clock, when the power switch circuit 120 selects a portion of the photodetectors in the receiving unit 110, the first switch unit 131 is turned off, and the first capacitor 132 is charged; when the power switch circuit 120 stops selecting that portion of the photodetectors, the first switch unit 131 is turned on, and the first capacitor 132 stops charging. At this time, the analog-to-digital converter (ADC) coupled to the integrating circuit 130 samples the charging voltage on the first capacitor 132 so that the charging (integration) time of the first capacitor 132 is the same each time, and the analog-to-digital converter (ADC) can sample the peak value of the charging voltage to improve the accuracy of the voltage value used to characterize the number of received photons.

[0058] According to another preferred embodiment of the present invention, the first switching unit 131 includes a tri-state buffer configured to have its output terminal coupled to a common terminal of the at least one photodetector, and to enable the control terminal to receive a control signal. The tri-state buffer is used to switch the state of the output terminal between a low level and a high impedance state according to the control signal.

[0059] like Figure 10 As shown, the power switch circuit 120 selects some of the photodetectors in the receiving units 110-1, 110-2..., where the receiving units 110-1, 110-2... are silicon photomultiplier arrays with 16 silicon photomultiplier tubes, configured to receive optical signals and convert them into electrical signals. The integrating circuits 130-1, 130-2... are coupled to the receiving units 110-1, 110-2... to integrate and output the electrical signal. The integrating circuit 130 includes a first switching unit 131 and a first capacitor 132, where the first switching unit 131 includes a tri-state buffer. Using the tri-state buffer as the first switching unit 131, when nCLR is 1, the output terminal Y of the tri-state buffer is in a high-impedance state (noe), and the current to the first capacitor 132... Figure 10 The diagram shows the charging (integration) of capacitor C, and the voltage signal during capacitor C charging is acquired using an analog-to-digital converter (ADC) to read the amplitude of the voltage signal. When nCLR is 0, the output Y of the tri-state buffer is low, and the charge on the capacitor is released. The tri-state buffer has a switching speed of 3ns, which is faster than that of a MOSFET or analog switch, thereby improving the accuracy of signal acquisition.

[0060] The integrating circuit 130 can also be used as follows: Figure 11 The shown integrating circuit 130 includes: a transimpedance amplifier 133, whose input terminal is coupled to a common terminal of the at least one photodetector; a first resistor 134, whose first terminal is coupled to the output terminal of the transimpedance amplifier, and whose second terminal serves as the output terminal of the integrating circuit, outputting the integrated result of the electrical signal; and a second capacitor 135, whose first terminal is coupled to the second terminal of the first resistor 134, and whose second terminal is grounded. The transimpedance amplifier 133 converts the current signal input to ACC_IN into a voltage signal, which charges the second capacitor 135 through the first resistor 134. The ACC_OUT terminal is connected to an analog-to-digital converter to acquire the voltage signal during the charging of the second capacitor 135, thereby reading out the amplitude of the voltage signal. (Except for...) Figure 11 In addition to the connection shown, the second capacitor 135 can also be connected in parallel with the transimpedance amplifier 133 to form an integrating circuit.

[0061] According to another preferred embodiment of the present invention, for the use of a single silicon photomultiplier tube in an independently packaged form rather than a silicon photomultiplier tube array, directly connecting the anodes or cathodes of all photodiodes in parallel can convert it into a light receiving device 100 suitable for the present invention, such as... Figure 12 As shown, the light receiving device 100 includes: multiple receiving units 110, namely receiving units 110-1, 110-2, 110-3..., wherein each receiving unit 110 includes a photodetector, namely a silicon photomultiplier tube. As shown, the multiple silicon photomultiplier tubes are configured as receiving units 110-1, 110-2... to receive light signals and convert the light signals into electrical signals; a power switch circuit 120 controls the conduction and disconnection of each silicon photomultiplier tube, that is, selects some of the silicon photomultiplier tubes in receiving units 110-1, 110-2...; an integrating circuit 130 is connected to the common anode of the multiple receiving units 110 to integrate and output the electrical signal.

[0062] A preferred embodiment of the present invention provides an optical receiving device for lidar, which selects a portion of the photodetectors in each receiving unit through a power switch circuit, and integrates and outputs the DC component of the electrical signal through an integrating circuit coupled to multiple receiving units. The optical receiving device for lidar provided by the present invention can reduce the number of power switch circuits, thereby reducing PCB footprint and saving cost and power consumption.

[0063] According to a preferred embodiment of the present invention, such as Figure 13 As shown, the present invention also provides a lidar 200, comprising: Light emitting device 210, configured to emit a detection beam for detecting a target object; and As described above, the optical receiving device 100, wherein the plurality of receiving units 110 are configured to receive the echo beam reflected by the probe beam on the target object and convert the echo beam into an electrical signal.

[0064] According to a preferred embodiment of the present invention, such as Figure 14 As shown, the present invention also provides a method 10 for receiving an echo beam using the optical receiving device 100 as described above, comprising: In step S101, a portion of the photodetectors in each receiving unit 110 are selected by the power switch circuit 120, and a bias voltage is provided to the portion of the photodetectors. In step S102, the echo beam is received by the selected photodetector in each receiving unit 110 and the echo beam is converted into an electrical signal. In step S103, the electrical signal is integrated and output through multiple integrating circuits 130 corresponding to the multiple receiving units 110.

[0065] In summary, the method provided by this invention, which includes an M*N silicon photomultiplier tube optical receiver, requires only one power switch circuit with M voltage output terminals, M first switching units, and a first capacitor. Compared to the original method, this saves M-1 power switch circuits. This results in reduced PCB area and cost, lower circuit power consumption, smaller optical receiver size, and improved integration of the radar system receiver.

[0066] Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A light receiving device for a lidar system, comprising: Multiple receiving units, wherein each receiving unit includes at least one photodetector configured to receive an optical signal and convert the optical signal into an electrical signal; A power switch circuit is coupled to the plurality of receiving units respectively, for selecting a portion of the photodetectors in each receiving unit and providing a bias voltage to the portion of the photodetectors; Multiple integrating circuits are provided, each coupled to a receiving unit, to integrate and output the electrical signal.

2. The optical receiving device of claim 1, wherein in each receiving unit, one end of the at least one photodetector is shared and coupled to the input of the integrating circuit, and the non-shared end of the at least one photodetector is coupled to the power switching circuit to receive the bias voltage.

3. The optical receiving device of claim 2, wherein the power switch circuit includes a voltage input terminal and at least one voltage output terminal, wherein the voltage input terminal is configured to receive a bias voltage, and each voltage output terminal is coupled to a non-common terminal of one or more photodetectors in each receiving unit.

4. The optical receiving device of claim 3, wherein the power switch circuit further includes an address input terminal, the address input terminal being configured to receive address bits to select the portion of the photodetectors, and outputting the bias voltage from a voltage output terminal corresponding to the address bits.

5. The optical receiving device according to any one of claims 2-4, wherein the integrating circuit comprises: The first switching unit has a first terminal coupled to a common terminal of the at least one photodetector, a second terminal grounded, and a control terminal receiving a control signal to turn the first switching unit on or off. The first capacitor has a first end coupled to a common terminal of the at least one photodetector, and a second end grounded. The first end serves as the output terminal of the integrating circuit, which outputs the integrated result of the electrical signal.

6. The optical receiving device of claim 5, wherein the first switching unit includes a tri-state buffer configured to have its output terminal coupled to a common terminal of the at least one photodetector, and to enable a control terminal to receive the control signal, the tri-state buffer being used to switch the state of the output terminal between a low level and a high impedance state according to the control signal.

7. The optical receiving device as claimed in claim 5, wherein when the power switch circuit selects a portion of the photodetectors in each receiving unit, the first switching unit of the corresponding integrating circuit is turned off, the first capacitor is charged, and the first capacitor is charged for the same amount of time each time; when the power switch circuit ends the selection, the first switching unit of the corresponding integrating circuit is turned on, and the first capacitor is discharged.

8. The optical receiving device as claimed in claim 7, further comprising: An analog-to-digital converter, coupled to the output of the integrator circuit, is used to sample the integration result of the electrical signal during the charging time of the first capacitor.

9. The optical receiving device of claim 8, wherein the analog-to-digital converter samples the integration result of the electrical signals output by different photodetectors each time.

10. The optical receiving device of claim 8 or 9, wherein the period during which the analog-to-digital converter samples the integral result of the electrical signal matches the period during which the first switching unit is turned on and off.

11. The optical receiving device according to any one of claims 2-4, wherein the integrating circuit comprises: A transimpedance amplifier, the input of which is coupled to a common terminal of the at least one photodetector; The first resistor has its first end coupled to the output terminal of the transimpedance amplifier, and its second end serves as the output terminal of the integrator circuit, outputting the integrated result of the electrical signal. The second capacitor has its first end coupled to the second end of the first resistor, and its second end grounded.

12. The optical receiving device as claimed in claim 2, wherein the receiving unit includes a photodetector array, the photodetector being a photomultiplier tube, in each receiving unit, the anodes or cathodes of multiple photomultiplier tubes are shared, the cathodes or anodes are respectively coupled to one of the voltage output terminals of the power switching circuit, and the integrating circuit outputs the integration result of the DC component of the electrical signal.

13. A lidar, comprising: A light emitting device configured to emit a detection beam for detecting a target object; and The optical receiving device as claimed in any one of claims 1-12, wherein the plurality of receiving units are configured to receive the echo beam reflected by the probe beam on the target and convert it into an electrical signal.

14. A method for receiving an echo beam using the optical receiving device as described in any one of claims 1-12, comprising: The power switch circuit selects a portion of the photodetectors in each receiving unit and provides a bias voltage to the photodetectors. The echo beam is received by a selected photodetector in each receiving unit and the echo beam is converted into an electrical signal. The electrical signal is integrated and output through multiple integrating circuits corresponding to the multiple receiving units.

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