Indoor space automatic layout and rendering method and system based on design knowledge graph

Abstract

The invention relates to the field of knowledge graph data processing, and discloses an indoor space automatic layout and rendering method and system based on a design knowledge graph, and the method comprises the steps: maintaining an entity knowledge graph containing a variation path, and discretizing a continuous geometric space into an environment topological graph; executing node mapping and resource topology handshake verification based on subgraph isomorphism; and responding to the mapping deadlock, triggering recursive topology rewriting along the variation path to reconstruct the query sub-graph, and generating a configuration instruction. According to the method, continuous geometric search is converted into discrete atlas isomorphism and attribute propagation, the high-dimensional space layout calculation complexity is reduced, the deadlock problem under the over-constraint condition is solved by utilizing a recursive variation mechanism, and the configuration efficiency is improved. And the logic leakproofness and engineering compliance of the layout scheme are ensured.

Description

TECHNICAL FIELD

[0001] The present application relates to a kind of indoor space automatic layout and rendering method and system based on design knowledge graph, belong to knowledge graph data processing technical field. BACKGROUND

[0002] At present, the existing indoor space design automation technology usually adopts parameterized method based on geometric constraint solving or template matching method based on preset rule base, geometric constraint solving depends on continuous Euclidean space high-dimensional numerical calculation and entity collision detection, and the solution that meets the size and position constraint is found by iterative search, and the template matching method is based on static database house type feature rigid rule mapping;In the face of non-standard special-shaped space or multiple complex constraint superposition real working conditions, the above technical path has the bottleneck of calculation efficiency, and indoor layout involves the combination optimization among multiple entities, and the optimal solution of continuous geometric space search belongs to the combination optimization problem with exponential growth of computational complexity, and with the increase of the number of space entities, the calculation power consumption increases dramatically and the convergence speed decreases simply by relying on geometric calculation, and the geometric solver is difficult to directly process privacy level, accessibility logic non-geometric semantic constraint, which leads to the calculation result although geometric collision-free but logic is not in compliance, and simply increasing the size of rule base causes rule conflict and deadlock, and cannot adapt to dynamic change space topological structure.

[0003] This double problem of calculation efficiency and adaptability is essentially due to the fact that the existing technical path often focuses too much on the geometric representation and visual effect rendering of physical space, and ignores the effective abstraction and deduction of deep logical semantics of space, for example, the Chinese invention patent with the authorization announcement No.CN119091027B discloses a kind of indoor decoration simulation display method and system based on BIM, which integrates structure light simulation and texture mapping analysis technology, and attempts to calculate light coefficient through complex physical rendering equation to assist display, but the core layout logic still stays in the shallow calculation level based on geometric distance (Zd, Zc) and collision detection, and essentially carries out iterative search based on visual a posteriori in continuous space, and lacks the graph-based representation ability of implicit design knowledge such as privacy level, accessibility and engineering resource compliance.

[0004] Therefore, how to break away from the dependence on geometric calculation, process space semantic constraints through discrete data structure, and realize the automatic processing mechanism of deterministic and compliant layout generation under limited computing resources, has become a technical problem to be solved by the present application. SUMMARY

[0005] To solve the problems raised in the background art, the technical solution of the present application is as follows: a kind of indoor space automatic layout and rendering method based on design knowledge graph, comprising the following steps: An entity knowledge graph is maintained in a graph database, the entity knowledge graph comprising entity nodes connected by logical edges, the entity nodes being defined with a topology interface attribute and a set of resource request tags, the logical edges being defined with relative spatial constraint parameters between entities and a one-way mutation path pointing to a degraded substitute node; In response to inputted continuous geometric spatial data, spatial boundary features are extracted and the continuous geometric spatial data is discretized into an environment topology graph composed of a plurality of spatial slot nodes, the spatial slot nodes being written with capacity attribute data describing their geometric carrying capacity and a set of resource supply tags describing the physical resource supply state; A primary mapping based on maximum common subgraph isomorphism is performed, a target entity node to be processed in the entity knowledge graph is constructed into a query subgraph, and a candidate slot set that is topologically isomorphic to the query subgraph and satisfies the capacity attribute data is searched in the environment topology graph; A resource topology handshake verification is performed on the candidate slot set, an inclusive logical operation is performed on the set of resource request tags of the target entity node and the set of resource supply tags of the spatial slot node, and when the operation result is false, a relay node is dynamically inserted into the query subgraph based on compensation logic in the entity knowledge graph to reconfigure the connection relationship; In response to a deadlock state caused by a failure of the primary mapping or the resource topology handshake verification, a recursive topology rewriting along the one-way mutation path is triggered, a conflict node in the query subgraph is replaced with the degraded substitute node and the topology interface attribute is updated, and a rewritten mutation query subgraph is used to re-perform the isomorphic search until a home mapping relationship is established; Based on the established home mapping relationship and the relative spatial constraint parameters of the logical edges, a local coordinate transformation matrix of each node is calculated and a structured configuration instruction is generated.

[0006] Preferably, the step of generating the environment topology graph further comprises establishing a discrete mapping logic of non-geometric field attributes, constructing an undirected connected graph with a spatial slot node corresponding to an entry position of the continuous geometric spatial data as a root node; traversing the undirected connected graph and calculating the betweenness centrality value of each spatial slot node and the shortest path hop count relative to the root node; mapping the betweenness centrality value to accessibility attribute data and the shortest path hop count to privacy attribute data, and writing the accessibility attribute data and the privacy attribute data into the corresponding spatial slot node; correspondingly, the primary mapping based on maximum common subgraph isomorphism comprises verifying whether a preset logical requirement of the target entity node and the accessibility attribute data or the privacy attribute data of the spatial slot node satisfy a preset logical inclusion relationship.

[0007] Preferably, in the step of performing the resource topology handshake verification, the inclusive logical operation follows the following set determination rules: the set of resource request tags of the target entity node is extracted and the set of resource supply tags of the corresponding slot node in the candidate slot set ; if the set operation result is true, it is determined that the resource topology handshake verification passes; if the set operation result is false, missing resource items in the difference set are identified, and a compensation relay node capable of providing the missing resource items in the entity knowledge graph is searched; when the compensation relay node successfully inserts the query subgraph and establishes a new logical connection, it is determined that the resource topology handshake verification passes.

[0008] Preferably, the logical edge contains a necessity weight attribute, and the recursive topology rewriting step further includes a weighted pruning logic based on a minimum spanning tree, in response to the query subgraph failing to establish an effective home mapping relationship in the environment topology graph, a weighted connected graph is constructed based on the query subgraph; the weighted connected graph is pruned based on a reverse minimum spanning tree according to the necessity weight attribute, and the logical edge with the lowest weight or the entity node with the lowest weight is preferentially disconnected or removed to generate a modified query subgraph; the subgraph isomorphism search is re-executed using the modified query subgraph, and the pruned logical edge or entity node is marked as a to-be-processed residual item and written into the structured configuration instruction.

[0009] Preferably, the construction step of the environment topology graph further includes a virtual slot derivation logic triggered based on a master anchor point, a master-slave dependency relationship between a parent node and a subordinate node is defined in the entity knowledge graph; in response to the parent node being successfully mapped to a first spatial slot node in the environment topology graph, a group of virtual derived slot nodes are dynamically created in the environment topology graph based on the coordinate data of the first spatial slot node, in combination with the relative spatial constraint parameters in the logical edge; the subordinate node is directly mapped to the virtual derived slot node, and the logical connection relationship between the parent node and the subordinate node is locked, and the global isomorphism search is no longer performed on the subordinate node.

[0010] Preferably, the one-way variant path defines a downgrade replacement relationship from the source node to the target node, and the downgrade replacement relationship includes reduction of entity size, reduction of functional components, or simplification of topology connection structure; the recursive topology rewriting is executed until the traversal depth of the one-way variant path reaches a preset threshold or the home mapping relationship is established.

[0011] Preferably, the step of generating the environment topology graph further includes attribute injection based on environmental potential, in response to window or noise source position features in the continuous geometric space data, the environmental potential values of each region in space are calculated based on a preset distance decay function; the environmental potential values are quantified as hierarchical labels, and the hierarchical labels are written into the data structure of the corresponding spatial slot node as environmental attributes; correspondingly, the entity nodes in the entity knowledge graph contain environmental demand attributes, and the primary mapping step includes verifying the matching degree of the environmental attributes of the spatial slot node and the environmental demand attributes of the target entity node.

[0012] ​​Preferably, the entity knowledge graph adopts a double-layer heterogeneous graph architecture, the bottom layer is an environment topology graph composed of space slot nodes, used to represent the discretized attributes of the physical space; the upper layer is a logical entity graph composed of entity nodes, used to encapsulate the design rules and the accompanying dependency relationship between entities; the ownership mapping relationship is realized by embedding the nodes in the logical entity graph into the corresponding nodes in the environment topology graph.

[0013] Preferably, the structured configuration instruction is a JSON format data file containing the unique identifier of the object, the relative transformation matrix and the material reference, and the data file is used to drive the rendering engine to generate a three-dimensional scene. The method further includes a deadlock detection and rollback step. When the traversal depth in the recursive topology rewriting step reaches a preset threshold value and the ownership mapping relationship is still not established, it is determined that it is an unsolvable deadlock state; a state rollback operation is performed to restore to the last successful primary mapping state, and the conflict area causing the unsolvable deadlock state is marked, and an exception report containing the conflict area information is generated.

[0014] An indoor space automatic layout and rendering system based on a design knowledge graph, comprising: A graph maintenance module for maintaining an entity knowledge graph in a graph database, the entity knowledge graph containing entity nodes connected by logical edges, the entity nodes being defined with topology interface attributes and a resource request tag set, the logical edges being defined with relative spatial constraint parameters between entities and a one-way variation path pointing to a degraded substitute node; A space discretization module for extracting space boundary features and discretizing continuous geometric space data into an environment topology graph composed of multiple space slot nodes in response to input continuous geometric space data, the space slot nodes being written with capacity attribute data describing geometric carrying capacity and a resource supply tag set describing physical resource supply status; An isomorphic mapping module for performing primary mapping based on maximum common subgraph isomorphism, constructing a target entity node to be processed in the entity knowledge graph as a query subgraph, searching for a candidate slot set in the environment topology graph that is topologically isomorphic to the query subgraph and meets the capacity attribute data; A resource handshake verification module for performing resource topology handshake verification on the candidate slot set, performing an inclusive logical operation on the resource request tag set of the target entity node and the resource supply tag set of the space slot node, and when the operation result is false, inserting a relay node into the query subgraph based on the compensation logic in the entity knowledge graph to reconfigure the connection relationship; A recursive topology rewriting module for triggering recursive topology rewriting along the one-way variation path in response to a deadlock state caused by failure of the primary mapping or the resource topology handshake verification, replacing the conflict nodes in the query subgraph with the degraded substitute nodes and updating the topology interface attributes, and re-executing the isomorphic search using the rewritten variation query subgraph until the ownership mapping relationship is established; The configuration instruction generation module is configured to calculate local coordinate transformation matrices of each node and generate structured configuration instructions based on the established home mapping relationship and relative spatial constraint parameters of the logical edge.

[0015] Compared with the prior art, the beneficial effects of the present application are: 1. In the automatic layout and rendering of indoor space, a discrete mapping mechanism of physical space features to environment topology graph is constructed, design rules are encapsulated as entity knowledge graph interface definition and logical edge, continuous Euclidean space geometry search and collision detection are converted into graph database subgraph isomorphism and attribute propagation problem, entity ownership is directly locked by using discrete attribute of space slot node, relative position constant level deduction is triggered by logical edge dependency, high-dimensional geometric space non-deterministic iterative optimization and backtracking calculation are avoided, this data processing paradigm conversion makes it not dependent on expensive physical simulation computing power when processing large-scale complex house type or non-standard special-shaped space, and layout scheme is generated in milliseconds based on graph topology structure; based on the matching logic of the data structure bottom, common logical errors in object overlap and function deviation geometry calculation are eliminated from the bottom of the data structure, and the stability of the generated scheme engineering specification is ensured.

[0016] 2. The physical field semantics is digitized by the graph theory centrality algorithm and potential discretization mapping, the environment topology graph construction introduces the betweenness centrality calculation and shortest path hop analysis mechanism based on the undirected connected graph, combines the preset potential decay function, and translates the continuous physical field information of light and noise and the implicit space semantics of privacy and accessibility into discrete attribute labels of slot nodes, directly quantifies and represents the space habitability and function attribute by the graph theory algorithm, automatically filters the layout combinations that meet the environmental potential constraint in the graph matching stage, solves the technical problem that the traditional geometric layout method is difficult to process non-geometric environmental constraint at low cost, establishes direct data mapping between physical environment features and design logic demand through multi-dimensional attribute Boolean logic operation, and ensures the physical comfort and function logic of the layout result.

[0017] 3. The weighted logical pruning and ontology recursive variation mechanism is based on the adaptive solving ability of graph reasoning, establishes the necessary weight logical connection and definition degradation replacement path ontology variation edge in the entity knowledge graph, constructs an automatic deadlock resolution mechanism for graph matching, in the case of space limitation or demand conflict over-constraint, performs dynamic pruning of weighted edges or triggers node recursive ontology replacement along the variation path based on the minimum spanning tree algorithm, automatically reconstructs the topology structure of the query subgraph, converts the value selection and scheme adjustment logic when the designer's resources are limited into graph algorithm weight optimization and path walking process, ensures that the system does not fail to find a fully matched subgraph in an extreme house type or severe demand, outputs a scheme that retains the core design value and has a complete and effective topology structure, and improves the usability and generalization ability of the automatic layout system in real complex scenarios. BRIEF DESCRIPTION OF DRAWINGS

[0018] Fig. 1 The flow chart of the indoor space automatic layout and rendering method combined with the recursive topology rewriting mechanism of the present application; Fig. 2 The comparison chart of the calculation time consumption of the method of the present application and the simulated annealing algorithm under different space entity scales; Fig. 3 The logic architecture diagram of the indoor space automatic layout and rendering system based on the design knowledge graph of the present application. DETAILED DESCRIPTION

[0019] The present application will be described in detail below with specific embodiments, and it should be noted that the following embodiments are only used to illustrate the present application, but not to limit the protection scope of the present application.

[0020] The embodiment discloses an indoor space automatic layout and rendering method and system based on a design knowledge graph, which comprises four core processing stages of entity knowledge graph maintenance, environment topology graph generation, slot attribution matching and rendering instruction generation. In the entity knowledge graph construction stage, the system maintains the entity knowledge graph in the graph database, which contains the entity nodes connected by logical edges. The entity nodes are defined with topology interface attributes, which clearly define the port type, normal direction and size tolerance of the physical connection of the entity in the space. The entity nodes are also defined with a resource request tag set , which enumerates the physical resource types required for normal operation of the entity, such as power interface, network interface or water supply and drainage interface. The logical edges connecting the entity nodes define the relative spatial constraint parameters between entities, including relative distance interval, relative angle and alignment method. The logical edges also define a one-way variation path pointing to a degraded replacement node, which specifies a sequence of replacement nodes for size reduction or function simplification of the current node when the current node cannot meet the spatial constraints. The logical edges also contain a necessity weight attribute, which is used to guide the priority of constraint relaxation in the over-constrained state. In the environment topology graph generation stage, the system extracts the spatial boundary features of walls, doors, windows and holes in response to the input continuous geometric space data. The system discretizes the continuous geometric space data into an environment topology graph composed of multiple space slot nodes according to the preset sampling accuracy. The space slot nodes are written into capacity attribute data describing the geometric carrying capacity, and a resource supply tag set describing the physical resource supply state . In the discrete construction of the environment topology graph, the geometric carrying capacity attribute data of the space slot nodes is not only defined by the area dimension, but also determined by shape compactness quantification screening. The physical area and geometric perimeter of each independent candidate region formed by the discretization of continuous geometric space are calculated. According to the formula , the shape compactness index of the region is calculated The database is used to access a pre-stored standard furniture model library. The distribution data of the aspect ratio of the minimum bounding rectangle of the entity to be laid out is statistically analyzed, and the compactness value corresponding to the 5th percentile of this distribution is set as the geometric validity threshold. When generating the final environment topology graph, the inequality will be satisfied. Region mapping is a spatial slot node with capacity attribute. During the map construction stage, regions that meet the physical area requirements but cannot accommodate entities due to excessively narrow or distorted geometric shapes are automatically removed.

[0021] To process implicit spatial semantics, the system establishes a discrete mapping logic for non-geometric field attributes. The system uses the spatial slot node corresponding to the entry point of the continuous geometric spatial data as the root node, constructing an undirected connected graph based on spatial adjacency relationships. The system traverses this undirected connected graph, using graph theory algorithms to calculate the betweenness centrality value and the shortest path hop count relative to the root node for each spatial slot node. The system maps the betweenness centrality value to accessibility attribute data, representing the transportation hub status of the area; and maps the shortest path hop count to privacy attribute data, representing the privacy level of the area. These two attribute data are written to the corresponding spatial slot nodes. Furthermore, in response to the window or noise source location characteristics in the continuous geometric spatial data, the system calculates the spatial area based on a preset distance decay function. The system calculates the environmental potential energy value of the domain and quantifies it into hierarchical labels, which are then written into the data structure of the corresponding spatial slot node as environmental attributes. During the initial mapping phase based on the maximum common subgraph isomorphism, the system parses the design requirements and constructs a query subgraph from the target entity nodes in the entity knowledge graph. The system performs isomorphic search in the environmental topology graph to find a set of candidate slots that are topologically isomorphic to the query subgraph and satisfy the capacity attribute data. During this process, the system verifies whether the preset logical requirements of the target entity nodes and the accessibility, privacy, and environmental attributes of the spatial slot nodes satisfy the preset logical inclusion relationship. To ensure project compliance, the system performs resource topology handshake verification on the candidate slot set and extracts the resource request label set of the target entity nodes. The resource supply tag set corresponding to the slot node in the candidate slot set In the resource topology handshake verification logic operation of the candidate slot set, the inclusion determination of the resource supply tag set follows a physical port concurrent occupancy locking mechanism. Each resource supply node in the environment topology graph is initialized with a fixed maximum load capacity integer. Integers are directly extracted from the physical interface quantity attribute of the electromechanical facility elements corresponding to the input geometric space data, such as the standard two-hole wall socket. Single-port network panel corresponding When the graph matching engine performs resource supply and demand verification, it maintains and reads the current occupancy counter of each resource supply node in real time. When the target entity resource request type matches the supply label and meets the real-time constraint condition , output the check pass Boolean true, synchronously trigger Add an update operation, the mechanism internalizes the physical hardware concurrent access limit into the graph matching boundary condition, ensuring that the generated layout scheme is logically connected and strictly meets the physical load limit of the on-site mechanical and electrical facilities. The system performs a set inclusion logical operation. If the set operation result is true, it is determined that the resource topology handshake check passes. If the result is false, the system identifies the missing resource item in the difference set , and retrieves a compensation relay node with the ability to provide the missing resource item in the entity knowledge graph, such as a power strip or extension cord node. When the compensation relay node successfully inserts the query subgraph and establishes a new logical connection, the system determines that the resource topology handshake check passes.

[0022] In response to a failure of the primary mapping or resource topology handshake verification, the system locks the conflict nodes in the query subgraph, replaces the conflict nodes with degraded substitute nodes along the unidirectional variant path, and synchronously updates the topology interface attributes. The degraded substitution relationship involves the reduction of entity size, the deletion of functional components, or the simplification of topology connection structure. The system re-executes the isomorphic search using the rewritten variant query subgraph. This process is recursively executed until the home mapping relationship is established or the traversal depth of the unidirectional variant path reaches a preset threshold. If the threshold is reached and the problem is still not solved, the system determines that it is a deadlock and processes it based on the weighted pruning logic of the minimum spanning tree. The system constructs a weighted connected graph based on the query subgraph and performs reverse minimum spanning tree pruning based on the necessity weight attribute. It preferentially disconnects logical edges with the lowest weight or removes entity nodes with the lowest weight. It generates a revised query subgraph for re-search and marks the pruned items as pending residual items. For island layout scenarios, the system performs virtual slot derivation logic triggered based on the main anchor point. The system identifies the master-slave dependency relationship between parent nodes and dependent child nodes in the entity knowledge graph. In response to the successful mapping of the parent node to the first spatial slot node in the environment topology graph, the system dynamically creates a set of virtual derivative slot nodes in the environment topology graph based on the coordinate data of the first spatial slot node and the relative spatial constraint parameters in the logical edge. The system maps the dependent child node directly to the virtual derivative slot node and locks the logical connection relationship between the parent node and the dependent child node, without performing global isomorphic search on the dependent child node. In the configuration instruction generation phase, based on the established home mapping relationship and the relative spatial constraint parameters of the logical edge, the system calculates the local coordinate transformation matrix of each node. The system generates structured configuration instructions containing object unique identifiers, relative transformation matrices, and material references. The instructions are usually JSON format data files used to drive the rendering engine to generate a three-dimensional scene. If the traversal depth in the recursive topology rewriting step reaches the preset threshold and the home mapping relationship is still not established, the system determines that it is an unsolvable deadlock state, performs a state rollback operation to restore to the last successful primary mapping state, and generates an exception report containing conflict area information.

[0023] In the renovation project of a bedroom in an irregular old community with 6 square meters and corner load-bearing walls, there are serious over-constrained layout challenges. The user requires the installation of a 1.5-meter-wide double bed, a standard-size bedside table, a desk, and a wardrobe in this limited space. There are only a few fixed power outlets in the room. The conventional rectangular layout algorithm cannot accommodate all furniture while avoiding the corner of the load-bearing wall, and it is easy to cause the electrical equipment such as the desk to be unable to use due to being far away from the outlet, resulting in a double failure of the layout scheme in the geometric and engineering aspects. For this working condition, the system executes the automatic layout process based on the design knowledge graph. The system extracts the spatial features of the walls, doors, windows, and power outlets in the room, discretizes them into an environment topology graph composed of multiple space slot nodes, and maps the power outlet position to the resource supply tag of the corresponding slot node The system constructs a query subgraph containing all target furniture entities and attempts to search for candidate slots that meet the geometric size constraints in the primary mapping stage. Due to the rigid constraints of physical space dimensions, a standard-size double bed and bedside table cannot coexist while preserving the minimum passage width, resulting in a primary mapping failure and triggering a deadlock state.

[0024] In response to this deadlock, the system activates the recursive topology rewriting mechanism, locks the standard-size bedside table node that causes geometric conflict, and replaces it with a smaller floating side table node based on the predefined one-way variation path in the entity knowledge graph, and synchronously updates the topology interface attributes. This ontology-based variation degradation operation eliminates the hard conflict of geometric dimensions, enabling the reconstructed variation query subgraph to be successfully mapped to the environment topology graph. While establishing geometric mapping, the system performs resource topology handshake verification. The system detects that the area mapped by the desk node lacks power resources, i.e., the resource request tag of the desk node is not included in the resource supply tag of the corresponding slot node , resulting in a false result of the inclusive logical operation. To solve this engineering contradiction, the system automatically retrieves the entity knowledge graph, dynamically inserts a power extension line compensation relay node between the desk node and the nearest power outlet node, thereby reconstructing the logical connection relationship, allowing the resource topology handshake verification to pass. Finally, the system outputs a layout scheme that takes into account functional requirements and engineering specifications. This scheme uses the dynamic reconstruction capability of discrete graphs to solve spatial geometric conflicts and solves the mechanical and electrical resource gap through logical deduction of resource attributes, achieving effective layout in extremely limited space.

[0025] Example 2: To quantify the effectiveness and stability of the present application under complex working conditions, this example constructs a high-fidelity indoor design automation test platform based on the Plan5D-G dataset. 500 real house type samples containing special-shaped spaces and multiple constraint conflicts are selected and run on a workstation configured with an Intel Core i9-10900K processor, 64 GB DDR4 memory and an NVIDIA RTX 3080 graphics card. The test design includes a multi-dimensional control system with gradient pressure. Control group A uses a traditional geometric constraint solving algorithm based on simulated annealing. Control group B uses an expert system matching method based on static rule templates. Control group C (partially missing type) uses the graph mapping architecture of the present application but removes the recursive topology rewriting module. The sample group of the present application uses the complete technical solution including recursive topology rewriting and resource topology handshake verification. The core monitoring indicators are set as layout generation success rate and average calculation time consumption. The test is carried out in a standard rectangular room working condition. The success rates of all groups are more than 98%. The system gradually increases the special-shaped degree and constraint conflict density of the house type, enters the extreme test stage, and as the problem complexity increases, the success rate of control group B decreases rapidly, indicating that static templates cannot adapt to topology mutations. Control group A maintains a certain success rate, but the calculation time consumption increases exponentially, which is easy to fall into local optimum. Control group C has a lower success rate than the sample group of the present application when facing over-constrained working conditions, confirming the key role of the recursive mutation mechanism in handling deadlocks. The sample group of the present application shows stability under extreme working conditions, with a stable success rate at a high level and only a slight increase in average time consumption. Key intermediate data shows that the system triggers an average of 2.3 recursive mutation operations when encountering deadlocks, solving most geometric conflicts. In addition, for specific test sets containing mechanical and electrical resource gaps, the sample group of the present application achieves a high resource conflict resolution rate through resource topology handshake mechanism, while control groups A and B have a large number of mechanical and electrical resource conflicts. See Table 1.

[0026] Table 1: Specific performance data table under extreme over-constrained working conditions;

[0027] The above data show that the present application has adaptive solving ability and engineering stability in handling extreme problems such as special-shaped spaces and over-constrained deadlocks through graph mutation and resource handshake mechanism.

[0028] Example 3: This example combines Figs. 1 to 3 the indoor space automatic layout and rendering method and system based on design knowledge graph, as follows: Fig. 1As shown, in response to inputting continuous geometric space data containing boundary features such as walls, doors and windows, and holes, the environment topology graph is generated via the space discretization module, and the capacity attribute is calculated and the potential energy is injected, and then it enters the isomorphic mapping module, which interacts with the graph maintenance module to obtain the topology interface, performs a primary mapping search based on the maximum common subgraph isomorphism, and the generated candidate set enters the resource handshake verification module, in which the graph maintenance module provides compensation logic to support the resource supply and demand inclusive operation and dynamic insertion of relay nodes, and after verification, it enters the logical judgment link, if the verification is passed and there is no deadlock, the local coordinate transformation matrix is calculated by the configuration instruction generation module and the structured configuration instruction in JSON format is generated, and finally the instruction data for driving the rendering engine to generate a three-dimensional scene is output, if the judgment result is no, that is, there is a deadlock or conflict, the recursive topology rewriting module is triggered, which replaces the nodes along the unidirectional mutation path and updates the topology interface to reconstruct the query subgraph according to the mutation path searched by the graph maintenance module, and feeds back the reconstructed subgraph to the isomorphic mapping module to re-execute the search until a closed loop logic is formed.

[0029] As shown in Fig. 2 , the abscissa represents the space scale, which is quantified as the number of entities, covering four test nodes of small space 5 entities, medium space 15 entities, large space 30 entities and super large space 50 entities, and the ordinate represents the calculation time, which is in milliseconds ms, and uses logarithmic scale display, the figure contains two data sequences, the dotted line represents the simulated annealing geometric solving method, and the solid line represents the method of the application, it can be seen from the data trend that as the space scale increases from 5 entities to 50 entities, the time of the simulated annealing geometric solving method increases exponentially, the value increases from 100 ms to more than 10000 ms, while the time of the method of the application increases gently and always remains in a low range, and the time is still less than 300 ms under the super large space working condition; as shown in Fig. 3 , the user interaction layer includes a designer terminal device and a front-end interaction application, which is responsible for inputting space scanning data and communicating with the core layer through HTTPS / WebSocket protocol and receiving a three-dimensional rendering scene, the core computing service layer integrates space discretization service, isomorphic mapping engine, resource handshake verification service and configuration instruction generation service, and embeds a recursive topology rewriting mechanism to handle deadlock detection and degradation along the mutation path, the layer interacts with the knowledge data layer through the isomorphic mapping engine and the rewriting mechanism, the knowledge data layer is composed of a graph database cluster, which internally stores an entity knowledge graph, specifically including logical edge definition, unidirectional mutation path and resource request label data, the layer provides data support to the core layer and supports subgraph reconstruction when rewriting is triggered, and each layer works together to realize full-process automatic processing from data input to instruction generation.

[0030] Embodiment 4: To solve the algorithm path black box and parameter threshold black box problems that the system may face under complex special-shaped space and dynamic constraint conditions, this embodiment provides a set of adaptive parameter tuning and path decision mechanism based on dynamic feedback. By implanting the operation flow description and constructing the parameter setting principle and adaptive logic at the pseudo code level, the decision transparency and reproducibility of the system under the non-deterministic environment are ensured. For the core path decision in the layout algorithm, the system implants a clear input-processing-output operation flow. In the primary mapping stage, the system no longer relies on fuzzy heuristic search, but performs deterministic priority sorting based on topological centrality. The system calculates the topological importance of all entities to be laid out The value is defined as the weighted sum of the degree and the betweenness centrality of the entity node in the logical entity graph. The system arranges the entities to be laid out in descending order according to the value , forming a deterministic layout sequence. For each entity in the sequence, the system performs candidate slot search based on maximum common subgraph isomorphism in the environment topology graph. If the search result is empty, the system triggers a backtracking mechanism based on the minimum conflict set to identify and remove the low-priority entity causing the conflict, rather than randomly retrying, ensuring that each step of the layout decision has a clear algorithm basis and eliminating the path black box caused by randomness.

[0031] Secondly, for the parameter / threshold black box problem, this embodiment constructs a parameter adaptive setting logic based on the complexity of the environment to dynamically calculate the mutation depth threshold in recursive topology rewriting. For example, the parameter is no longer set as a fixed empirical value, but is dynamically calculated according to the complexity of the environment topology graph , defined as the ratio of the number of nodes to the number of edges in the environment topology graph. The system presets a reference threshold , and calculates the current mutation depth threshold according to the formula , where The system automatically increases the mutation depth threshold as a preset adjustment coefficient when the environmental complexity is high, providing greater solution space search capability; conversely, it lowers the threshold to reduce computational overhead. This mechanism is not only based on the system's adaptive capability under different operating conditions, but also elevates parameter settings from empirical values ​​to principle-driven deterministic logic through explicit calculation formulas. Finally, to ensure transparency of the model's working mechanism, the system introduces a three-stage lifecycle explanation. In the model initialization stage, the system explicitly loads the pre-trained entity knowledge graph and environmental feature extractor. In the model running stage, the system monitors the state changes during the layout generation process in real time, including the current constraint satisfaction rate, the number of resource conflicts, and the size of the remaining solution space. Once a deadlock trend is detected, i.e., no effective solution is generated after several consecutive iterations, the system triggers the aforementioned adaptive parameter tuning or backtracking mechanism. In the model termination stage, the system outputs the final layout scheme and detailed decision logs, including entity selection, slot matching results, and mutation operation records for each step. This transparent management throughout the entire lifecycle ensures the traceability and interpretability of system behavior, avoiding the trust crisis caused by the model black box.

[0032] Example 5: To construct an entity knowledge graph with deterministic logic and eliminate the subjectivity of parameter setting, the system performs an offline parameter calibration procedure based on large-scale synthetic samples before deployment. The system loads a training sample set containing multi-dimensional spatial constraints and uses the Monte Carlo tree search algorithm to perform iterative layout solving. During this process, the system records the frequency statistical distribution of successful solutions resulting from the disconnection of specific logical edges or node replacement operations. Based on this statistical result, the system quantifies and sets the necessity weight attribute of logical edges. Edges that can effectively resolve deadlocks by frequently disconnecting are marked with low weight. Simultaneously, the system establishes a unidirectional mutation path based on the functional similarity vector space analysis of entity nodes. When the functional similarity between the target node and the source node exceeds a safety threshold... Furthermore, mutation connections are only established when the space occupancy reduction rate meets the preset efficiency standard, so that the setting of the graph topology and parameter weights is based on the objective solution probability distribution.

[0033] For accurate mapping of non-geometric field properties, the system executes the on-site environmental benchmark calibration procedure during the initialization phase. The system sets the geometric centroid of the space to be laid out as the calibration zero point, and virtually sets a known intensity at the window or noise source location. Using a standard signal source, the system samples the field intensity at multiple discrete grid points in space to obtain measured attenuation curves. By fitting the measured values ​​to the theoretical propagation model using the least squares method, the system calculates the distance attenuation coefficient applicable to the current physical scenario. and environmental potential energy gain factor These calibrated parameters are written into the property configuration file of the space slot node, enabling the environmental labels stored in the node to... The layout generation stage can strictly reflect the physical field distribution characteristics of the site.

[0034] Example 6: To resolve the trade-off between search efficiency and convergence of the recursive topology rewriting mechanism under different problem scales, this example constructs a set of dynamic search boundary adaptive constraint procedures based on problem scale. The system quantifies the complexity coefficient of the current layout task by parsing the input environment topology graph and query subgraph. This coefficient is defined as the product of the number of slot nodes in the environmental space and the number of entity nodes to be deployed, and is used to characterize the theoretical size of the solution space. The system is based on a linear mapping function. Calculate and lock the maximum recursive search depth threshold for the current task in real time. ,in and As a preset adjustment constant, during the recursive search process, once the current search depth reaches this threshold and no valid belonging mapping relationship is established, the system immediately determines that the current search path is an invalid path and forcibly terminates the recursion, activating the weighted pruning logic based on the minimum spanning tree, ensuring that the system can automatically limit the depth of invalid search when dealing with large-scale or extreme over-constraint problems.

[0035] To address the geometric data quality issues in the environmental topology map generation process, the system incorporates a standardized geometric preprocessing and accuracy calibration procedure before the discretization step. The system performs vector closure checks on the input continuous geometric space data and calculates the gap value between disconnected endpoints using the Euclidean distance formula. If this gap value is less than a preset tolerance threshold... The system performs endpoint merging to construct a closed physical boundary. It retrieves the minimum bounding box size of all target entity nodes to be processed in the entity knowledge graph, extracts the minimum value as a benchmark, and sets the discretization sampling step size based on a predetermined multiple of this benchmark value, such as 0.5 times. This ensures that the generated spatial slot nodes can effectively filter out meaningless geometric noise while having the capacity to support the minimum physical entity.

[0036] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0037] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. An indoor space automatic layout and rendering method based on a design knowledge graph, characterized in that, The method comprises the following steps: maintaining an entity knowledge graph in a graph database, the entity knowledge graph comprising entity nodes connected by logical edges, the entity nodes being defined with topology interface attributes and a set of resource request tags, the logical edges being defined with relative spatial constraint parameters between entities and a one-way variation path pointing to a degraded substitute node; in response to input continuous geometric spatial data, extracting spatial boundary features and discretizing the continuous geometric spatial data into an environmental topology graph composed of a plurality of spatial slot nodes, the spatial slot nodes being written with capacity attribute data describing their geometric carrying capacity and a set of resource supply tags describing the physical resource supply state; performing a primary mapping based on maximum common subgraph isomorphism, constructing a target entity node to be processed in the entity knowledge graph into a query subgraph, and searching for a candidate slot set in the environmental topology graph that is topologically isomorphic to the query subgraph and meets the capacity attribute data; performing resource topology handshake verification on the candidate slot set, performing an inclusive logical operation on the resource request tag set of the target entity node and the resource supply tag set of the spatial slot node, and when the operation result is false, dynamically inserting a relay node into the query subgraph based on compensation logic in the entity knowledge graph to reconstruct the connection relationship; in response to a deadlock state caused by failure of the primary mapping or the resource topology handshake verification, triggering recursive topology rewriting along the one-way variation path, replacing conflict nodes in the query subgraph with degraded substitute nodes and updating the topology interface attributes, and re-executing isomorphic search using the rewritten variation query subgraph until a home mapping relationship is established; based on the established home mapping relationship and the relative spatial constraint parameters of the logical edges, calculating the local coordinate transformation matrix of each node and generating a structured configuration instruction.

2. The indoor space automatic layout and rendering method based on a design knowledge graph according to claim 1, characterized in that, The step of generating the environmental topology graph further comprises establishing discrete mapping logic for non-geometric field attributes, taking a spatial slot node corresponding to an entry position of the continuous geometric spatial data as a root node to construct an undirected connected graph; traversing the undirected connected graph and calculating the betweenness centrality value of each spatial slot node and the shortest path hop count relative to the root node; mapping the betweenness centrality value to accessibility attribute data and the shortest path hop count to privacy attribute data, and writing the accessibility attribute data and the privacy attribute data into the corresponding spatial slot node; Correspondingly, performing the primary mapping based on maximum common subgraph isomorphism comprises verifying whether the preset logical requirements of the target entity node and the accessibility attribute data or the privacy attribute data of the spatial slot node meet the preset logical inclusion relationship.

3. The indoor space automatic layout and rendering method based on a design knowledge graph according to claim 1, characterized in that, In the step of performing the resource topology handshake verification, the inclusive logical operation follows the following set determination rule: extracting the resource request tag set of the target entity node and the resource supply tag set of the corresponding slot node in the candidate slot set ; if the set operation result is true, it is determined that the resource topology handshake verification is passed; if the set operation result is false, the missing resource item in the difference set is identified, and a compensation relay node with the ability to provide the missing resource item in the entity knowledge graph is searched; when the compensation relay node successfully inserts the query subgraph and establishes a new logical connection, it is determined that the resource topology handshake verification is passed.

4. The indoor space automatic layout and rendering method based on a design knowledge graph according to claim 1, characterized in that, The logical edge contains a necessity weight attribute, and the recursive topology rewriting step further comprises a weighted pruning logic based on a minimum spanning tree, in response to the query subgraph not establishing an effective home mapping relationship in the environmental topology graph, constructing a weighted connected graph based on the query subgraph; performing reverse minimum spanning tree pruning on the weighted connected graph according to the necessity weight attribute, preferentially disconnecting the logical edge with the lowest weight or removing the entity node with the lowest weight to generate a modified query subgraph; re-executing subgraph isomorphism search using the modified query subgraph, and marking the pruned logical edge or entity node as a to-be-processed residual item and writing it into the structured configuration instruction.

5. The indoor space automatic layout and rendering method based on a design knowledge graph according to claim 1, characterized in that, The construction steps of the environmental topology graph also include virtual slot derivation logic triggered by the main anchor point, and defining the master-slave dependency relationship between the parent node and the subordinate child node in the entity knowledge graph; In response to the parent node being successfully mapped to the first spatial slot node in the environment topology graph, a set of virtual derived slot nodes are dynamically created in the environment topology graph based on the coordinate data of the first spatial slot node and combined with the relative spatial constraint parameters in the logical edge. It directly maps subordinate child nodes to virtual derived slot nodes and locks the logical connection between the parent node and subordinate child nodes, and no longer performs a global isomorphic search on subordinate child nodes.

6. The indoor space automatic layout and rendering method based on a design knowledge graph according to claim 1, characterized in that, A one-way mutation path defines a degradation replacement relationship from the source node to the target node. The degradation replacement relationship includes the reduction of entity size, the deletion of functional components, or the simplification of the topological connection structure. Recursive topology rewriting is executed until a belonging mapping relationship is established or the traversal depth of the one-way mutation path reaches a preset threshold.

7. The indoor space automatic layout and rendering method based on a design knowledge graph according to claim 1, characterized in that, The steps for generating the environmental topology map also include attribute injection based on environmental potential energy. In response to the window or noise source location features in the continuous geometric spatial data, the environmental potential energy value of each region in the space is calculated based on a preset distance decay function. The environmental potential energy value is quantified into hierarchical labels, and the hierarchical labels are written as environmental attributes into the data structure of the corresponding spatial slot node. Correspondingly, the entity nodes in the entity knowledge graph contain environmental demand attributes, and the primary mapping step includes verifying the matching degree between the environmental attributes of the spatial slot node and the environmental demand attributes of the target entity node.

8. The indoor space automatic layout and rendering method based on a design knowledge graph according to claim 1, characterized in that, The entity knowledge graph adopts a two-layer heterogeneous graph architecture. The bottom layer is an environmental topology graph composed of spatial slot nodes, which is used to represent the discretized attributes of physical space. The upper layer is a logical entity graph composed of entity nodes, which is used to encapsulate the co-existing dependencies between design rules and entities. The attribution mapping relationship is achieved by embedding the nodes in the logical entity graph into the corresponding nodes in the environment topology graph.

9. The indoor space automatic layout and rendering method based on a design knowledge graph according to claim 1, characterized in that, The structured configuration instructions are JSON format data files containing unique object identifiers, relative transformation matrices, and material references. These data files are used to drive the rendering engine to generate 3D scenes. The method also includes deadlock detection and rollback steps. When the traversal depth in the recursive topology rewriting step reaches a preset threshold and no ownership mapping relationship is established, it is determined to be an unsolvable deadlock state. A state rollback operation is performed to restore the previous successful primary mapping state, and the conflict areas that caused the unsolvable deadlock state are marked, generating an exception report containing conflict area information.

10. An indoor space automatic layout and rendering system based on a design knowledge graph, for implementing the method of claim 1, characterized in that, include: The graph maintenance module is used to maintain entity knowledge graphs in the graph database. The entity knowledge graph contains entity nodes connected by logical edges. Entity nodes define topological interface attributes and resource request tag sets. Logical edges define relative spatial constraint parameters between entities and unidirectional mutation paths pointing to degraded replacement nodes. The spatial discretization module is used to extract spatial boundary features in response to the input continuous geometric spatial data and discretize the continuous geometric spatial data into an environmental topology map composed of multiple spatial slot nodes. The spatial slot nodes are written with capacity attribute data describing geometric carrying capacity and a set of resource supply tags describing physical resource supply status. The isomorphic mapping module is used to perform primary mapping based on the maximum common subgraph isomorphism, constructing the target entity nodes to be processed in the entity knowledge graph into a query subgraph, and searching in the environment topology graph for a set of candidate slots that are topologically isomorphic to the query subgraph and satisfy the capacity attribute data. The resource handshake verification module is used to perform resource topology handshake verification on the candidate slot set, perform inclusion logic operation on the resource request tag set of the target entity node and the resource supply tag set of the space slot node, and dynamically insert relay nodes into the query subgraph to reconstruct the connection relationship based on the compensation logic in the entity knowledge graph when the operation result is false. The recursive topology rewriting module is used to respond to deadlock caused by failure of primary mapping or resource topology handshake verification. It triggers recursive topology rewriting along a one-way mutation path, replaces conflicting nodes in the query subgraph with degraded replacement nodes and updates the topology interface attributes. It then uses the rewritten mutated query subgraph to re-execute isomorphic search until the ownership mapping relationship is established. The configuration instruction generation module is used to calculate the local coordinate transformation matrix of each node and generate structured configuration instructions based on the established attribution mapping relationship and the relative spatial constraint parameters of logical edges.

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