A high frequency converter and control method

Abstract

The application relates to the technical field of power electronic circuits, and discloses a high-frequency converter and a control method. The high-frequency converter comprises a DC-DC partial power processing circuit, a slope voltage circuit and a bias voltage circuit, the DC-DC partial power processing circuit, the slope voltage circuit and the bias voltage circuit are cascaded in sequence; wherein: the DC-DC partial power processing circuit is used for adjusting inputted partial power; the slope voltage circuit and the bias voltage circuit constitute a waveform synthesis circuit, which is used for synthesizing bias voltage and slope voltage waveforms to perform high-frequency conversion. The control method corresponds to the high-frequency converter. According to the application, the circuit can be effectively simplified, the number of power supplies and switching devices can be reduced, and the voltage stress of the switching devices can be reduced through the multiplexing mode of multiple switching devices.

Description

Technical Field

[0001] This application relates to the field of power electronic circuit technology, specifically a high-frequency converter and its control method. Background Technology

[0002] Power electronic circuit technology has been widely and actively applied in plasma-related fields. Specifically, power converters, relying on next-generation power semiconductor devices, have been successfully applied in core devices of plasma systems such as radio frequency (RF) power supplies and pulsed power supplies. With the rapid development of high-end materials, the requirements for the precision of plasma ion energy control in material preparation processes are becoming increasingly stringent. Stable and accurate bias voltage control is crucial for improving the accuracy of capacitively coupled plasma processes. Traditional converters used in plasma processes, such as RF converters, control ion energy by combining multiple frequencies according to the energy distribution ratio. However, multi-frequency RF synthesis cannot form a stable and accurate bias voltage, resulting in difficulties in precisely controlling ion energy distribution, limited scalability, complex structures requiring impedance matching networks, and an excessive number of power supplies. Summary of the Invention

[0003] The purpose of this application is to provide a high-frequency converter and control method to solve the technical problems in the prior art, such as difficulty in accurately controlling ion energy distribution, limited scalability, complex structure requiring impedance matching network, and excessive number of power sources.

[0004] To achieve the above objectives, this application provides a high-frequency converter, including a DC-DC power processing circuit, a ramp voltage circuit, and a bias voltage circuit, which are cascaded in sequence. The DC-DC power processing circuit is used to adjust a portion of the input power. The ramp voltage circuit and the bias voltage circuit constitute a waveform synthesis circuit for synthesizing the bias voltage and ramp voltage waveforms for high-frequency conversion.

[0005] Preferably, the DC-DC power processing circuit includes a passive inductor. DC voltage source Bus capacitor Fifth power switching device and the sixth power switching device Among them: DC voltage source With bus capacitor Series connection, bus capacitor With the fifth power switching device Series, fifth power switching device With the sixth power switching device Series, passive inductor One end is connected to a DC voltage source and bus capacitor Connection points between them, passive inductors The other end is connected to the fifth power switching device and the sixth power switching device The connection points between them are connected.

[0006] Preferably, the ramp voltage circuit includes a passive inductor. DC voltage source First power diode Second power diode and the fourth power switching device Among them: passive inductors One end is connected to a fourth power switching device With DC voltage source One end is connected to a DC voltage source. The other end is connected to the first power diode. One end is connected to the first power diode. The other end is connected to the second power diode. One end is connected to the second power diode. The other end is connected to a passive inductor One end is connected.

[0007] Preferably, the bias voltage circuit includes a first power switching device. Second power switching device Third power switching device and the third power diode Among them: the first power switching device With the second power switching device Series connection, second power switching device With the third power diode Series connection, third power diode With third power switching devices Series connection.

[0008] Preferably, the high-frequency converter is equipped with a corresponding control method, which includes:

[0009] A1: Control gate pulse width modulation signal drives the first power switching device Second power switching devices When the circuit is turned on, the output bias voltage is... ;in, Bus capacitor The voltage;

[0010] A2: Turn off the first power switching device. Turn on the third power switching device The output bias voltage is clamped to ;

[0011] A3: Turn off the second power switching device within the preset time period. Turn on the fourth power switching device Load equivalent capacitance Passive inductor in ramp voltage circuit Charging, output ramp voltage ;

[0012] A4: Turn off the fourth power switching device Turn on the second power switching device The output bias voltage is clamped to ;

[0013] A5: Repeat steps A1 to A5 by adjusting the DC voltage source. and control of the fourth power switching device The duty cycle of the driving pulse width modulation signal is changed at high frequency.

[0014] Preferably, the control method outputs voltage V during high-frequency conversion. o By bias voltage V o1 With ramp voltage V o2 Composition, V o The mathematical expression for a single period is:

[0015]

[0016] Where: D is the first power switching device in the bias voltage circuit. The gate drive signal duty cycle, T is a first power switching device. The gate drive signal period, V A It is the DC voltage source in the DC-DC power processing circuit.

[0017] Preferably, the bias voltage in the control method Generated by the DC-DC power processing circuit. The mathematical expression is:

[0018]

[0019] in, The sixth power switching device in the DC-DC power processing circuit. The duty cycle of the gate drive signal.

[0020] As a preferred embodiment, the control method utilizes the passive inductor in the ramp voltage circuit during high-frequency conversion. Corresponding average current and slope voltage The passive inductor in the ramp voltage circuit Equivalent capacitance of load The composition, and the corresponding mathematical expression, is:

[0021]

[0022]

[0023] in, The minimum required output voltage value

[0024] To achieve the minimum required output voltage value The DC voltage source in the ramp voltage circuit of this high-frequency converter The mathematical expression is:

[0025]

[0026] in, The fourth power switching device in the ramp voltage circuit The equivalent output charge, The second power diode in the ramp voltage circuit The equivalent output charge.

[0027] Preferably, the passive inductor in the ramp voltage circuit of the high-frequency converter The constraints are .

[0028] As a preferred option, the bus capacitor The constraints are ,in, This is the output ripple voltage value. The switching frequency of the power switching devices is partially processed; the passive inductor in the DC-DC power processing circuit. The constraints are ,in, This represents the inductor ripple current value.

[0029] The high-frequency converter and control method of this application achieve at least the following beneficial effects:

[0030] 1. Design a converter to synthesize the bias voltage and ramp voltage waveforms to achieve a narrow plasma ion energy distribution. Multiplexing multiple switching devices effectively simplifies the circuit, reduces the number of switching devices, and lowers the voltage stress on the switching devices.

[0031] 2. It adopts a high-frequency converter with a high operating frequency and outputs a non-sinusoidal waveform, eliminating the need for impedance matching circuits and enabling precise control of plasma ion energy.

[0032] 3. The high-frequency converter adopts a partial power processing circuit to realize multi-level output control of the bias voltage, which can effectively reduce the demand for DC power supply, requiring only two DC voltage sources.

[0033] 4. The high-frequency converter has diverse output waveforms and can be combined according to actual engineering needs; due to the modular design of the converter, the power can be expanded according to actual needs when dealing with different current and power levels, which facilitates networking. Attached Figure Description

[0034] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 The circuit schematic diagram of the high-frequency converter provided in the embodiments of this application;

[0036] Figure 2 The circuit schematic of the DC-DC power processing circuit provided in the embodiments of this application;

[0037] Figure 3 The circuit schematic of the ramp voltage circuit provided in the embodiments of this application;

[0038] Figure 4 The circuit schematic of the bias voltage circuit provided in the embodiments of this application;

[0039] Figure 5 Key operating waveforms of the circuit during waveform synthesis provided in the embodiments of this application;

[0040] Figure 6 Key circuit waveforms for partial power combining provided in this application embodiment;

[0041] Figure 7 Schematic diagram of simulated output waveforms of the high-frequency converter provided in this application embodiment at different frequencies and output powers. Figure 1 ;

[0042] Figure 8 Schematic diagram of simulated output waveforms of the high-frequency converter provided in this application embodiment at different frequencies and output powers. Figure 2 ;

[0043] Figure 9 Schematic diagram of simulated output waveforms of the high-frequency converter provided in this application embodiment at different frequencies and output powers. Figure 3 .

[0044] The implementation, functional features, and advantages of this invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0045] The technical solutions in the embodiments of this application will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0046] In this document, the term "comprising" is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0047] This embodiment discloses a high-frequency converter and control method to reduce the number of impedance matching networks and power supplies, thereby achieving precise control of plasma ion energy distribution. It should be noted that the high-frequency converter and control method disclosed in this embodiment are applicable at least to plasma processes; they are also applicable to other scenarios requiring precise control of plasma ion energy distribution.

[0048] The high-frequency converter disclosed in this embodiment will now be described in detail.

[0049] Reference Figure 1 , Figure 1 The circuit schematic diagram of the high-frequency converter provided in the embodiments of this application is shown.

[0050] like Figure 1As shown, this embodiment discloses a high-frequency converter. This high-frequency converter employs a waveform synthesis circuit design, including a DC-DC power processing circuit, a ramp voltage circuit, and a bias voltage circuit, which are cascaded sequentially. The DC-DC power processing circuit is used to regulate the input voltage. The ramp voltage circuit and the bias voltage circuit constitute a waveform synthesis circuit for synthesizing the bias voltage and ramp voltage waveforms for high-frequency conversion. In this embodiment, the high-frequency converter achieves the synthesis of the output voltage's bias voltage and ramp voltage waveforms by multiplexing multiple power switching devices.

[0051] In the specific application of this embodiment, the bias voltage circuit and the ramp voltage circuit constitute a waveform synthesis circuit; wherein, the output terminal of the DC-DC power processing circuit is connected to the input terminal of the bias voltage circuit and the ramp voltage circuit, and the input and output terminals of the bias voltage circuit and the ramp voltage circuit are connected in parallel.

[0052] In this embodiment: on the one hand, the waveform synthesis circuit composed of the bias voltage circuit and the ramp voltage circuit reduces the number of switching devices and reduces the voltage stress on the switching devices by multiplexing multiple switching devices, and synthesizes the output bias voltage and ramp voltage waveforms; on the other hand, the DC-DC power processing circuit reduces the number of voltage sources required for multi-level output by constructing a buck-boost converter, and realizes adjustable output voltage.

[0053] Reference Figure 2 , Figure 2 The circuit schematic diagram of the DC-DC power processing circuit provided in the embodiments of this application.

[0054] Specifically, such as Figure 2 As shown, the DC-DC power processing circuit includes a passive inductor. DC voltage source Bus capacitor Fifth power switching device and the sixth power switching device Among them: DC voltage source With bus capacitor Series connection, bus capacitor With the fifth power switching device Series, fifth power switching device With the sixth power switching device Series, passive inductor One end is connected to a DC voltage source Connection, passive inductor The other end is connected to the fifth power switching device and the sixth power switching device The connection points between them are connected. In the specific application of this embodiment, the bus capacitor... With the fifth power switching device Terminal A is led out from the connection point, and the bus capacitor... Passive inductor and DC voltage source The connection point leads to terminal D, a DC voltage source. Sixth power switching device Terminal B is led out from the connection point to the ground.

[0055] Based on the above, the DC-DC power processing circuit realizes the control of the input voltage. Step-up / step-down converter to process output voltage Part of the power. Its output voltage gain is:

[0056]

[0057] in, This refers to the output voltage gain of the DC-DC power processing circuit.

[0058] Reference Figure 3 , Figure 3 The circuit diagram of the ramp voltage circuit provided in the embodiments of this application.

[0059] Specifically, such as Figure 3 As shown, the ramp voltage circuit includes a passive inductor. DC voltage source First power diode Second power diode and the fourth power switching device Among them: passive inductors One end is connected to a fourth power switching device With DC voltage source One end is connected to a DC voltage source. The other end is connected to the first power diode. One end is connected to the first power diode. The other end is connected to the second power diode. One end is connected to the second power diode. The other end is connected to a passive inductor One end is connected. In the specific application of this embodiment: DC voltage source The positive terminal and the first power diode Connect the diode, and extend terminal D from the connection point; first power diode. Second power diode The E terminal is led out from the connection point; passive inductor The other end leads to terminal C, and the load (i.e., the load equivalent inductance) supplies the passive inductor. Reverse charging creates a ramp voltage. Passive inductor. It has a fault bypass function when the passive inductor In case of a fault, the second power switching device is turned on by controlling the pulse width modulation drive signal. passive inductor Second power diode Second power switching devices It forms a loop and is bypassed.

[0060] Reference Figure 4 , Figure 4 The circuit diagram of the bias voltage circuit provided in the embodiments of this application.

[0061] Specifically, such as Figure 4 As shown, the bias voltage circuit includes a first power switching device. Second power switching device Third power switching device and the third power diode Among them: the first power switching device With the second power switching device Connection, second power switching device With the third power diode Series connection, third power diode With third power switching devices Series connection. In the specific application of this embodiment, the first power switching device... One end of the first power switching device has terminal A connected to the ground terminal, and terminal B is connected to the ground terminal. With the second power switching device The E terminal is led out from the connection point of the second power switching device. With the third power diode The C-end is brought out from the connection point.

[0062] As described above, the bias voltage circuit processes the DC voltage sources at terminals A and B. The input voltage is used to form a three-level output.

[0063] Reference Figure 5 , Figure 5 The key working waveform diagrams of the circuit during waveform synthesis provided in the embodiments of this application are shown.

[0064] like Figure 5 As shown, this mainly includes the pulse width modulation drive signal control of the power switching device, the output voltage and current waveforms, and the inductor voltage waveform. The inductor voltage is adjusted by regulating the pulse width modulation drive signal of the power switching device. Voltage Output voltage Output current With power.

[0065] In the specific application of this embodiment, the high-frequency converter is equipped with a corresponding control method. In this control method, the gate pulse width modulation signal is first controlled to drive the first power switching device. Second power switching devices When the circuit is turned on, the output bias voltage is... Turn off the first power switching device. Turn on the third power switching device The output bias voltage is clamped to Turn off the second power switching device within tens of nanoseconds. Turn on the fourth power switching device Load capacitor Ramp circuit inductance Charging to achieve output ramp voltage Turn off the fourth power switching device. Turn on the second power switching device The output bias voltage is clamped to This control method is used cyclically. This embodiment adjusts the DC voltage source... and control of the fourth power switching device The duty cycle of the driving pulse width modulation signal can control the magnitude of the output voltage. This controls the first power switching device. The duty cycle of the driving pulse width modulation signal can control the duration of the bias voltage and the ramp voltage drop; controlling the frequency of the pulse width modulation driving signal allows for adjustable output frequency to meet different process requirements. A higher output frequency results in a narrower control over plasma ion energy, enabling precise regulation of plasma ion energy.

[0066] In the control method, the output voltage V o By bias voltage V o1 With ramp voltage V o2 It consists of two parts, V o The mathematical expression for a single period is:

[0067]

[0068] Where: D is the first power switching device in the bias voltage circuit. The gate drive signal duty cycle, T is a first power switching device. The gate drive signal period, V A It is the DC voltage source in the DC-DC power processing circuit.

[0069] bias voltage of high frequency converter Generated by the DC-DC power processing circuit. The mathematical expression is:

[0070]

[0071] in, The sixth power switching device in the DC-DC power processing circuit. The duty cycle of the gate drive signal.

[0072] Passive inductor of high frequency converter Corresponding average current and slope voltage The passive inductor in the ramp voltage circuit Equivalent capacitance of load The composition, and the corresponding mathematical expression, is:

[0073]

[0074]

[0075] in, This is the minimum required output voltage value.

[0076] To achieve the target output The DC voltage source in the ramp voltage circuit of this high-frequency converter The mathematical expression is:

[0077]

[0078] in, The fourth power switching device in the ramp voltage circuit The equivalent output charge, The second power diode in the ramp voltage circuit The equivalent output charge.

[0079] To achieve precise control of plasma ion energy distribution with a deviation of less than 1%, the passive inductor in the ramp voltage circuit of the high-frequency converter... The mathematical expression for the constraint is:

[0080]

[0081] The DC-DC power processing circuit of the high-frequency converter performs DC-DC buck-boost power conversion, controls the bias voltage of the high-frequency converter, and performs partial power processing. (Bus capacitor) voltage With input DC voltage source The relationship is:

[0082]

[0083] in, The sixth power switching device in the DC-DC power processing circuit. The duty cycle of the gate drive signal.

[0084] Reference Figure 6 , Figure 6 The key operating waveforms of the circuit during partial power combining provided in the embodiments of this application are shown.

[0085] like Figure 6 As shown, this mainly includes the pulse width modulation drive signal control of the power switching device, the output voltage and current waveforms, and the inductor voltage and current waveforms. The output voltage is adjusted by regulating the pulse width modulation drive signal of the power switching device. Output current and inductor Current value .

[0086] In one implementation, the control gate pulse width modulation signal drives the fifth power switching device. and the sixth power switching device Complementary conduction with a certain dead zone to prevent straight-through of its bridge arms.

[0087] Specifically, the power processing circuit of the DC-DC section of this high-frequency converter ensures the bus voltage, i.e., the bias voltage V. o1 Stable, reducing ripple current, switching frequency is f s Its bus capacitor Represented as:

[0088]

[0089] in, This is the output ripple voltage value. This is for partially processing the switching frequency of power switching devices.

[0090] Its filter inductor L1 can be expressed as:

[0091] ;

[0092] in, This represents the inductor ripple current value.

[0093] The actual inductance values ​​of the first and second passive inductors deviate from the theoretical calculation values ​​by less than 10%.

[0094] Reference Figures 7 to 9 , Figure 7Schematic diagram of simulated output waveforms of the high-frequency converter provided in this application embodiment at different frequencies and output powers. Figure 1 , Figure 8 Schematic diagram of simulated output waveforms of the high-frequency converter provided in this application embodiment at different frequencies and output powers. Figure 2 , Figure 9 Schematic diagram of simulated output waveforms of the high-frequency converter provided in this application embodiment at different frequencies and output powers. Figure 3 .

[0095] like Figure 7 As shown, at this time , , , , , Load 0.8kW.

[0096] like Figure 8 As shown, at this time , , , , , 2.5kW load.

[0097] like Figure 9 As shown, at this time , , , , , 3kW load.

[0098] Based on actual operating condition testing, this embodiment has achieved good results in frequency regulation, output level voltage regulation, waveform synthesis, and power output.

[0099] For applications requiring higher power, this embodiment can use multiple modules connected in series on the input side and in series or parallel on the output side to expand the power.

[0100] In summary, compared with the prior art, the high-frequency converter and control method of this embodiment have the following advantages:

[0101] 1. Design a converter to synthesize the bias voltage and ramp voltage waveforms to achieve a narrow plasma ion energy distribution. Multiplexing multiple switching devices effectively simplifies the circuit, reduces the number of switching devices, and lowers the voltage stress on the switching devices.

[0102] 2. It adopts a high-frequency converter with a high operating frequency and outputs a non-sinusoidal waveform, eliminating the need for impedance matching circuits and enabling precise control of plasma ion energy.

[0103] 3. The high-frequency converter adopts a partial power processing circuit to realize multi-level output control of the bias voltage, which can effectively reduce the demand for DC power supply, requiring only two DC voltage sources.

[0104] 4. The high-frequency converter has diverse output waveforms and can be combined according to actual engineering needs; due to the modular design of the converter, the power can be expanded according to actual needs when dealing with different current and power levels, which facilitates networking.

[0105] In the embodiments provided in this application, it should be understood that the embodiments described herein can be implemented in hardware, software, firmware, middleware, code, or any suitable combination thereof. For hardware implementation, the processor may be implemented in one or more of the following: application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, other electronic units designed to implement the functions described herein, or combinations thereof. For software implementation, some or all of the processes of the embodiments may be performed by a computer program instructing the associated hardware. During implementation, the program may be stored in a computer-readable storage medium or transmitted as one or more instructions or code on a computer-readable storage medium. Computer-readable storage media include computer storage media and communication media, wherein communication media include any medium that facilitates the transmission of a computer program from one place to another. Storage media may be any available medium accessible to a computer. Computer-readable storage media may include, but are not limited to, RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code having the form of instructions or data structures and accessible to a computer.

[0106] Finally, it should be noted that the above description is only a preferred embodiment of this application and is not intended to limit this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A high frequency transformer, characterized by, It includes a DC-DC power processing circuit, a ramp voltage circuit, and a bias voltage circuit, which are cascaded in sequence. Among them, the DC-DC power processing circuit is used to adjust part of the input power; the ramp voltage circuit and the bias voltage circuit constitute a waveform synthesis circuit for synthesizing the bias voltage and ramp voltage waveforms for high-frequency conversion. The DC-DC power processing circuit includes a passive inductor. DC voltage source Bus capacitor Fifth power switching device and the sixth power switching device Among them: DC voltage source With bus capacitor Series connection, bus capacitor With the fifth power switching device Series, fifth power switching device With the sixth power switching device Series, passive inductor One end is connected to a DC voltage source and bus capacitor Connection points between them, passive inductors The other end is connected to the fifth power switching device and the sixth power switching device The connection points between them are connected; and the bus capacitor With the fifth power switching device Terminal A is led out from the connection point, and the bus capacitor... Passive inductor and DC voltage source The connection point leads to terminal D, a DC voltage source. Sixth power switching device Terminal B is led out from the connection point to ground; The ramp voltage circuit includes a passive inductor. DC voltage source First power diode Second power diode and the fourth power switching device Among them: passive inductors One end is connected to a fourth power switching device With DC voltage source One end is connected to a DC voltage source. The other end is connected to the first power diode. One end is connected to the first power diode. The other end is connected to the second power diode. One end is connected to the second power diode. The other end is connected to a passive inductor One end is connected; and the DC voltage source The positive terminal and the first power diode Connect the diode, and extend terminal D from the connection point; first power diode. Second power diode The E terminal is led out from the connection point; passive inductor The other end leads to terminal C, and the load is supplied to the passive inductor. Reverse charging creates a ramp voltage; passive inductor It has a fault bypass function when the passive inductor In case of a fault, the second power switching device is turned on by controlling the pulse width modulation drive signal. passive inductor Second power diode Second power switching devices Forming a loop, which is then bypassed; The bias voltage circuit includes a first power switching device. Second power switching device Third power switching device and the third power diode Among them: the first power switching device With the second power switching device Series connection, second power switching device With the third power diode Series connection, third power diode With third power switching devices Series connection; and the first power switching device One end of the first power switching device has terminal A connected to the ground terminal, and terminal B is connected to the ground terminal. With the second power switching device The E terminal is led out from the connection point of the second power switching device. With the third power diode The C-end is brought out from the connection point.

2. A control method of a high-frequency converter, which is applied to the high-frequency converter as claimed in claim 1, characterized by, The high-frequency converter is equipped with a corresponding control method, which includes: A1: Control gate pulse width modulation signal drives the first power switching device Second power switching devices When the circuit is turned on, the output bias voltage is... ;in, Bus capacitor The voltage; A2: turn off the first power switching device , turn on the third power switching device , the output bias voltage is clamped to ; A3: Turn off the second power switching device within the preset time period. Turn on the fourth power switching device Load equivalent capacitance Passive inductor in ramp voltage circuit Charging, output ramp voltage ; A4: Turn off the fourth power switching device Turn on the second power switching device The output bias voltage is clamped to ; A5: repeating steps Al to A5 by adjusting the DC voltage source and controlling the drive pulse width modulation signal duty cycle of the fourth power switching device for high frequency conversion.

3. The control method of the high-frequency converter according to claim 2, characterized in that, When the control method performs high-frequency conversion, the output voltage V o By bias voltage V o1 With ramp voltage V o2 Composition, V o The mathematical expression for a single period is: wherein: D is a first power switching device in a bias voltage circuit T is a gate drive signal period of one first power switching device V A is a DC voltage source in a DC-DC portion power handling circuit.

4. The control method of the high-frequency converter according to claim 3, characterized by, Bias voltage in control method generated by a DC-DC partial power handling circuit, The mathematical expression is: wherein, a sixth power switching device in a DC-DC partial power processing circuit a gate drive signal duty cycle of the sixth power switching device.

5. The control method of the high-frequency converter according to claim 4, characterized in that, When performing high-frequency conversion, the passive inductor in the ramp voltage circuit... Corresponding average current and slope voltage The passive inductor in the ramp voltage circuit Equivalent capacitance of load The composition, and the corresponding mathematical expression, is: in, The minimum required output voltage value; To achieve the minimum required output voltage value The DC voltage source in the ramp voltage circuit of this high-frequency converter The mathematical expression is: in, The fourth power switching device in the ramp voltage circuit The equivalent output charge, The second power diode in the ramp voltage circuit The equivalent output charge.

6. The control method of a high-frequency converter according to claim 5, characterized by Passive inductance in the ramp voltage circuit of the high frequency converter The constraint condition is .

7. The control method for a high-frequency converter according to claim 5, characterized in that, bus capacitor The constraints are ,in, This is the output ripple voltage value. The switching frequency of the power switching devices is partially processed; the passive inductor in the DC-DC power processing circuit. The constraints are ,in, This represents the inductor ripple current value.

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