A low-noise adjustable-gain shunt feedback transimpedance amplifier and a control method thereof

Abstract

The application discloses a low-noise adjustable gain parallel feedback transimpedance amplifier and a control method thereof, relates to the technical field of optical communication, and comprises a variable gain amplifier and a feedback circuit. The variable gain amplifier comprises a voltage-controlled current source and a gain adjusting circuit. The gain adjusting circuit is composed of a current mirror composed of a triode, an NMOS transistor and a PMOS transistor, a resistor and a controllable current source. The output voltage is sampled by a feedback resistor and is fed back to an input end. By adjusting a pair of controllable current sources with opposite change directions, the current distribution of the triode as a shunt tube is controlled, the alternating current flowing through a main amplifying tube is changed, and the gain of the transimpedance amplifier is adjusted. The application not only realizes the adjustable gain of the transimpedance amplifier, but also avoids the input noise deterioration caused by the parasitic capacitance.

Description

Technical Field

[0001] This invention relates to the field of optical communication technology, and in particular to a low-noise adjustable gain parallel feedback transimpedance amplifier and its control method. Background Technology

[0002] As an important component of optical receivers in the field of optical communication, the transimpedance amplifier is used to convert the current signal output by the photodetector into a voltage signal. When the photodetector current is very small, only on the order of μA, the transimpedance amplifier must provide a large gain and low input noise. However, if the photodetector current reaches the order of mA, the transimpedance amplifier gain is smaller, but it provides better linearity and avoids signal distortion. Therefore, the transimpedance amplifier needs to have a wide dynamic response range and low noise.

[0003] There are two main drawbacks to the traditional parallel feedback transimpedance amplifier control gain variation method: First, the transistor introduces noise, which degrades the overall noise performance of the transimpedance amplifier; second, the feedback resistor affects the closed-loop poles, and if the feedback resistor varies over a large range, the circuit may be at risk of instability. Summary of the Invention

[0004] In view of the aforementioned existing problems, the present invention is proposed.

[0005] Therefore, this invention provides a low-noise adjustable gain parallel feedback transimpedance amplifier and its control method to solve the problems of additional noise and circuit instability introduced by the traditional parallel feedback transimpedance amplifier control gain variation method.

[0006] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0007] The present invention provides a low-noise adjustable gain parallel feedback transimpedance amplifier, which includes a variable gain amplifier and a feedback circuit.

[0008] The variable gain amplifier includes a voltage input terminal Vin1 and a voltage output terminal Vout1;

[0009] The feedback circuit includes a voltage input terminal Vin2 and voltage output terminals Vout2 and Vout3;

[0010] The voltage input terminal Vin1 of the variable gain amplifier is externally connected to a photodetector to receive the current signal output by the photodetector. The voltage input terminal Vin1 of the variable gain amplifier is connected to the voltage output terminal Vout3 of the feedback circuit, and the voltage output terminal Vout1 of the variable gain amplifier is connected to the voltage input terminal Vin2 of the feedback circuit.

[0011] The voltage input terminal Vin2 of the feedback circuit is connected to the voltage output terminal Vout1 of the variable gain amplifier. The voltage output terminal Vout2 of the feedback circuit serves as the voltage output terminal of the parallel feedback transimpedance amplifier. The voltage output terminal Vout3 of the feedback circuit is connected to the voltage input terminal Vin1 of the variable gain amplifier.

[0012] The variable gain amplifier is a voltage signal amplifier with controllable gain. The input is a voltage signal and the output is a voltage signal. The voltage input terminal Vin2 of the feedback circuit samples the voltage signal of the voltage output terminal Vout1 of the variable gain amplifier.

[0013] The voltage output terminal Vout2 of the feedback circuit serves as the voltage output terminal of the transimpedance amplifier, outputting a voltage signal to the subsequent circuit. The voltage signal output by the voltage output terminal Vout3 of the feedback circuit is fed back to the voltage input terminal Vin1 of the variable gain amplifier.

[0014] As a preferred embodiment of the low-noise adjustable gain parallel feedback transimpedance amplifier of the present invention, the variable gain amplifier further includes a voltage-controlled current source and a gain adjustment circuit.

[0015] The first terminal of the voltage-controlled current source is the voltage input terminal Vin1 of the variable gain amplifier;

[0016] The first terminal of the voltage-controlled current source is connected to the third terminal of the feedback circuit;

[0017] The second terminal of the voltage-controlled current source is connected to the first terminal of the gain adjustment circuit;

[0018] The second terminal of the gain adjustment circuit is connected to the first terminal of the feedback circuit.

[0019] As a preferred embodiment of the low-noise adjustable gain parallel feedback transimpedance amplifier of the present invention, wherein: the first terminal of the feedback circuit is connected to the second terminal of the gain adjustment circuit;

[0020] The second terminal of the feedback circuit is the voltage output terminal Vout2 of the parallel feedback transimpedance amplifier;

[0021] The third terminal of the feedback circuit is connected to the first terminal of the voltage-controlled current source.

[0022] As a preferred embodiment of the low-noise adjustable gain parallel feedback transimpedance amplifier of the present invention, wherein: the voltage-controlled current source is a transistor Q1, used to provide bias current and AC current for the gain adjustment circuit.

[0023] As a preferred embodiment of the low-noise adjustable gain parallel feedback transimpedance amplifier of the present invention, the gain adjustment circuit includes transistors Q2, Q3, Q4, Q5 and Q6.

[0024] The common-source cascode current mirror is composed of NMOS transistors MN1, MN2, MN3 and MN4;

[0025] A current mirror composed of PMOS transistors MP1 and MP2;

[0026] Resistors R1 and R2;

[0027] Current source I1 and current source I2.

[0028] As a preferred embodiment of the low-noise adjustable gain parallel feedback transimpedance amplifier described in this invention, the feedback circuit further includes a transistor Q7, a current source I3, and a resistor R3.

[0029] The resistor R3 serves as a feedback resistor, and the current source I3 provides bias current to the transistor Q7.

[0030] The transistor Q7 is used to sample the output voltage of the gain adjustment circuit and feeds the sampled voltage back to the voltage input terminal Vin1 of the variable gain amplifier through the resistor R3.

[0031] As a preferred embodiment of the low-noise adjustable gain parallel feedback transimpedance amplifier and its control method described in this invention, wherein: the current source I1 and the current source I2 provide bias current for transistors Q5 and Q6.

[0032] Transistor Q5 provides bias voltage for transistors Q2 and Q3, and transistor Q6 provides bias voltage for transistor Q4;

[0033] Transistor Q4 provides bias current to PMOS transistor MP1, and PMOS transistor MP1 provides bias voltage to PMOS transistor MP2, proportionally replicating the current flowing through transistor MP1 to the current flowing through transistor MP2.

[0034] PMOS transistor MP2 provides bias current to NMOS transistors MN1 and MN3. NMOS transistors MN1 and MN3 provide bias voltage to NMOS transistors MN2 and MN4 respectively. The current flowing through transistors MN1 and MN3 is proportionally replicated to the current in transistors MN2 and MN4. NMOS transistor MN4 provides bias current to transistor Q3.

[0035] Resistor R1 is the load resistor of the gain adjustment circuit, and resistor R2 provides common-mode voltage for transistors Q5 and Q6.

[0036] Secondly, the present invention provides a low-noise adjustable gain parallel feedback transimpedance amplifier control method, which includes sampling the output voltage of the gain adjustment circuit through the feedback resistor R3 of the feedback circuit, and feeding the sampled voltage back to the input terminal of the voltage-controlled current source through the feedback resistor R3, so that the current flowing through the voltage-controlled current source transistor Q1 is a fixed current, and the current of the transistor Q1 is the sum of the currents of the transistors Q2 and Q4;

[0037] With transistors Q3 and Q4 acting as shunts to transistor Q2, the current distribution between transistors Q3 and Q4 is changed by adjusting the output currents of current sources I1 and I2, thereby changing the AC current flowing through transistor Q2 and the AC current flowing through resistor R1, thus adjusting the gain of the transimpedance amplifier.

[0038] As a preferred embodiment of the low-noise adjustable gain parallel feedback transimpedance amplifier control method of the present invention, wherein: the current ratio of the current mirror composed of the PMOS transistors MP1 and MP2 is X:Y;

[0039] The current ratio of the common-source cascode current mirror composed of NMOS transistors MN1, MN2, MN3 and MN4 is Y:X, so that the ratio of the current flowing through transistor Q3 and transistor Q4 is 1.

[0040] In the current mirror and common-source cascode current mirror structure, the current flowing through transistor Q3 is controlled proportionally by controlling the current flowing through transistor Q4.

[0041] As a preferred embodiment of the low-noise adjustable gain parallel feedback transimpedance amplifier control method of the present invention, wherein: the current source I1 and the current source I2 are variable current sources and the current changes in opposite directions, that is, when the current of current source I1 increases, the current of current source I2 decreases, and when the current of current source I1 decreases, the current of current source I2 increases.

[0042] When the current source I1 is at its maximum and the current source I2 is at its minimum, the current of transistor Q4 is at its minimum, which also makes the current of transistor Q3 at its minimum. Then the AC current flowing through transistor Q2 is at its maximum, and the transimpedance amplifier gain is at its maximum.

[0043] When the current source I1 is at its minimum and the current source I2 is at its maximum, the current of transistor Q4 is at its maximum, which makes the current of transistor Q3 also at its maximum. Therefore, the AC current flowing through transistor Q2 is at its minimum, and the gain of the transimpedance amplifier is at its minimum.

[0044] The beneficial effects of this invention are as follows: This invention adjusts the transimpedance gain of the transimpedance amplifier by adjusting the voltage gain of the variable gain amplifier. The circuit structure is simple and no additional parasitic capacitance is introduced into the signal path. This not only realizes the adjustable gain of the transimpedance amplifier, but also avoids the input noise degradation caused by parasitic capacitance. Attached Figure Description

[0045] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 A simplified circuit diagram of a parallel feedback transimpedance amplifier with low noise and adjustable gain.

[0047] Figure 2 This is a circuit diagram of a traditional parallel feedback transimpedance amplifier.

[0048] Figure 3 The equivalent noise circuit diagram of a parallel feedback transimpedance amplifier with low noise and adjustable gain.

[0049] Figure 4 The circuit diagram is for a parallel feedback transimpedance amplifier with low noise and adjustable gain.

[0050] Figure 5 This is a block diagram of a parallel feedback transimpedance amplifier with low noise and adjustable gain. Detailed Implementation

[0051] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0052] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0053] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0054] Reference Figures 1-4As one embodiment of the present invention, this embodiment provides a low-noise adjustable-gain parallel feedback transimpedance amplifier, comprising the following:

[0055] Variable gain amplifier and feedback circuit;

[0056] The variable gain amplifier includes a voltage input terminal Vin1 and a voltage output terminal Vout1;

[0057] The feedback circuit includes a voltage input terminal Vin2 and voltage output terminals Vout2 and Vout3;

[0058] The voltage input terminal Vin1 of the variable gain amplifier is externally connected to a photodetector to receive the current signal output by the photodetector. The voltage input terminal Vin1 of the variable gain amplifier is connected to the voltage output terminal Vout3 of the feedback circuit, and the voltage output terminal Vout1 of the variable gain amplifier is connected to the voltage input terminal Vin2 of the feedback circuit.

[0059] The voltage input terminal Vin2 of the feedback circuit is connected to the voltage output terminal Vout1 of the variable gain amplifier. The voltage output terminal Vout2 of the feedback circuit serves as the voltage output terminal of the parallel feedback transimpedance amplifier. The voltage output terminal Vout3 of the feedback circuit is connected to the voltage input terminal Vin1 of the variable gain amplifier.

[0060] The variable gain amplifier is a voltage signal amplifier with controllable gain. The input is a voltage signal and the output is a voltage signal. The voltage input terminal Vin2 of the feedback circuit samples the voltage signal at the voltage output terminal Vout1 of the variable gain amplifier.

[0061] The voltage output terminal Vout2 of the feedback circuit serves as the voltage output terminal of the transimpedance amplifier, outputting a voltage signal to the subsequent circuit. The voltage signal output from the voltage output terminal Vout3 of the feedback circuit is fed back to the voltage input terminal Vin1 of the variable gain amplifier.

[0062] The gain of the transimpedance amplifier can be controlled by adjusting the gain of the variable gain amplifier.

[0063] The variable gain amplifier also includes a voltage-controlled current source and a gain adjustment circuit;

[0064] The first terminal of the voltage-controlled current source is the voltage input terminal Vin1 of the variable gain amplifier;

[0065] The first terminal of the voltage-controlled current source is connected to the third terminal of the feedback circuit;

[0066] The second terminal of the voltage-controlled current source is connected to the first terminal of the gain adjustment circuit;

[0067] The second terminal of the gain adjustment circuit is connected to the first terminal of the feedback circuit.

[0068] The first terminal of the feedback circuit is connected to the second terminal of the gain adjustment circuit;

[0069] The second terminal of the feedback circuit is the voltage output terminal Vout2 of the parallel feedback transimpedance amplifier;

[0070] The third terminal of the feedback circuit is connected to the first terminal of the voltage-controlled current source.

[0071] The voltage-controlled current source is transistor Q1, which is used to provide bias current and AC current for the gain adjustment circuit.

[0072] The gain adjustment circuit includes transistors Q2, Q3, Q4, Q5, and Q6;

[0073] The common-source cascode current mirror is composed of NMOS transistors MN1, MN2, MN3 and MN4;

[0074] A current mirror composed of PMOS transistors MP1 and MP2;

[0075] Resistors R1 and R2;

[0076] Current source I1 and current source I2.

[0077] The feedback circuit also includes transistor Q7, current source I3, and resistor R3;

[0078] Resistor R3 serves as a feedback resistor, and current source I3 provides bias current for transistor Q7;

[0079] Transistor Q7 is used to sample the output voltage of the gain adjustment circuit, and the sampled voltage is fed back to the voltage input terminal Vin1 of the variable gain amplifier through resistor R3.

[0080] Current source I1 and current source I2 provide bias current for transistors Q5 and Q6;

[0081] Transistor Q5 provides bias voltage for transistors Q2 and Q3, and transistor Q6 provides bias voltage for transistor Q4;

[0082] Transistor Q4 provides bias current to PMOS transistor MP1, and PMOS transistor MP1 provides bias voltage to PMOS transistor MP2, proportionally replicating the current flowing through transistor MP1 to the current flowing through transistor MP2.

[0083] PMOS transistor MP2 provides bias current to NMOS transistors MN1 and MN3. NMOS transistors MN1 and MN3 provide bias voltage to NMOS transistors MN2 and MN4 respectively. The current flowing through transistors MN1 and MN3 is proportionally replicated to the current in transistors MN2 and MN4. NMOS transistor MN4 provides bias current to transistor Q3.

[0084] Resistor R1 is the load resistor of the gain adjustment circuit, and resistor R2 provides common-mode voltage for transistors Q5 and Q6.

[0085] Specifically, such as Figure 1 As shown, the gain of the transimpedance amplifier is adjusted by regulating the variable gain amplifier, thus avoiding the introduction of noise in the feedback loop. The gain of the variable gain amplifier is equal to the product of the equivalent transconductance and the equivalent resistance. The gain of the variable gain amplifier is expressed as... The feedback circuit is represented by an emitter follower and resistor R3. The two ends of resistor R3 are connected to the voltage input terminal of the variable gain amplifier and the voltage output terminal of the emitter follower, respectively. This is the input voltage of the transimpedance amplifier. The input current of the external photodiode is determined by... available:

[0086] ;

[0087] in, This is the unit resistance value of resistor R3.

[0088] The transimpedance gain of the transimpedance amplifier can be derived, expressed as:

[0089] ;

[0090] The gain of a transimpedance amplifier can be controlled by changing the gain of the variable gain amplifier. When the gain of the variable gain amplifier increases, the gain of the transimpedance amplifier also increases. Adjusting the gain of the variable gain amplifier can achieve the purpose of controlling the gain of the transimpedance amplifier.

[0091] It should be noted that, as Figure 2 The diagram shows a traditional parallel feedback transimpedance amplifier. The core of the transimpedance amplifier consists of transistor Q8, load resistor R4, transistor Q9, current source I3, feedback resistor R5, and NMOS transistor MN5. Transistor Q8 and load resistor R4 form a common-emitter amplifier, while transistor Q9 and current source I3 form an emitter follower. Feedback resistor R5 samples the output voltage signal and feeds it back to the transimpedance amplifier's input. Transistor MN5 operates as a variable resistor in the linear region, and its gate bias voltage is adjusted accordingly. The gain of the transimpedance amplifier is adjusted by changing its resistance value. This traditional method of controlling the gain of a parallel feedback transimpedance amplifier has two main drawbacks: First, the MN5 transistor introduces noise, which degrades the overall noise performance of the transimpedance amplifier; second, the feedback resistor affects the closed-loop poles, and if the feedback resistor varies over a large range, the circuit may be unstable.

[0092] It should also be noted that, such as Figure 3 As shown, the total equivalent input noise voltage of the variable gain amplifier and emitter follower is and The equivalent noise voltage of the feedback resistor R3 is The output noise voltage can be obtained. for:

[0093] ;

[0094] in, For complex frequencies, the feedback resistor Typically, resistors of several hundred ohms and input capacitors are used. Typically in the tens of farads; conservative assumption The input capacitance is 1000 ohms. The gain of the variable gain amplifier is 100 farads and the operating frequency is 1 GHz. When it is much greater than 1, The value is much smaller than 1 and can be ignored. Therefore, the equivalent output noise voltage of the transimpedance amplifier is... Equivalent to:

[0095] ;

[0096] Equivalent output noise voltage of transimpedance amplifier The equivalent formula shows that the output noise of a transimpedance amplifier is related to its resistance. The noise of the variable gain amplifier is directly related to the output noise voltage, which varies with the input capacitance. It increases with the increase of. Therefore, compared to Figure 2 In traditional parallel feedback transimpedance amplifiers, transistor MN5 is connected in parallel with the feedback resistor R5 in the feedback circuit to adjust the gain, introducing parasitic capacitance and increasing the input capacitance. The total parasitic capacitance at the input terminal of this invention is smaller, thus the equivalent noise voltage at the output terminal is smaller. Dividing the output voltage noise by the transimpedance gain yields the equivalent noise current at the input terminal. for:

[0097] ;

[0098] In summary, compared to Figure 2Compared to traditional parallel feedback transimpedance amplifiers, the transimpedance amplifier proposed in this invention achieves a lower equivalent input noise current.

[0099] Going a step further. For example... Figure 4 As shown, the first current mirror consists of transistors Q2, Q3, and Q5; the second current mirror consists of transistors Q4 and Q6; the third current mirror consists of NMOS transistors MN1, MN2, MN3, and MN4; the fourth current mirror consists of PMOS transistors MP1 and MP2; resistors R1 and R2; and current sources I1 and I2. The base of transistor Q2 is connected to the base of transistor Q3, the negative terminal of current source I1, and the base and collector of transistor Q5. The collector of transistor Q2 is connected to the cathode of resistor R1, the base of transistor Q7, and the collector of transistor Q3. The anode of resistor R1 is connected to the power supply VDD. The emitter of transistor Q3 is connected to the drain of transistor NM2. The base of transistor Q4 is connected to the negative terminal of current source I2, and the base and collector of transistor Q6. The collector of transistor Q4 is connected to the gate of transistor MP2, and the drain and gate of transistor MP1. The source of transistor MP1 is connected to the power supply VDD. DD; The source of transistor MP2 is connected to power supply VDD; the drain of transistor MP2 is connected to the gate of transistor MN2, and the collector and gate of transistor MN1; the source of transistor MN1 is connected to the gate of transistor MN4, and the collector and gate of transistor MN3; the source of transistor MN2 is connected to the drain of transistor MN4; the source of transistor MN3 is connected to ground; the source of transistor MN4 is connected to ground; the positive terminals of current sources I1 and I2 are both connected to power supply VDD; the emitters of transistors Q5 and Q6 are both connected to the anode of resistor R2; the cathode of resistor R2 is connected to ground.

[0100] like Figure 4 As shown, this design effectively avoids the problems inherent in traditional parallel feedback transimpedance amplifiers. PD is a photodetector that converts the received light signal into a current signal Iin. This current signal passes through feedback resistor R3, converting the current input signal into a voltage output signal. Transistor Q1 acts as a voltage-controlled current source, providing bias current and AC current to transistor Q2 in the gain adjustment circuit. Current source I1 and transistor Q5 provide bias voltage to the bases of transistors Q2 and Q3, while current source I2 and transistor Q6 provide bias voltage to the base of transistor Q4. Transistors Q3 and Q4 act as shunts to transistor Q2. By controlling the currents of current sources I1 and I2 to change in opposite directions, the currents of transistors Q3 and Q4 can be indirectly controlled, thus changing the current flowing through transistor Q2 and altering the AC current flowing through the load resistor R1, thereby achieving the purpose of gain adjustment.

[0101] One embodiment of the present invention provides a bias circuit for a VCSEL laser and a control method thereof, comprising the following specific steps:

[0102] Specifically, the output voltage of the gain adjustment circuit is sampled through the feedback resistor R3 of the feedback circuit, and the sampled voltage is fed back to the input end of the voltage-controlled current source through the feedback resistor R3, so that the current flowing through the voltage-controlled current source triode Q1 is a fixed current, and the current of the triode Q1 is the sum of the currents of the triodes Q2 and Q4;

[0103] When the triodes Q3 and Q4 are used as shunt tubes for the triode Q2, by adjusting the output currents of the current sources I1 and I2, the current distribution of the triodes Q3 and Q4 is changed, the AC current flowing through the triode Q2 is changed, the AC current flowing through the resistor R1 is changed, and the gain of the transimpedance amplifier is adjusted.

[0104] Furthermore, the feedback circuit controls the current of the triode Q1 to be fixed. The current flowing through the triode Q1 is the sum of the currents of the triodes Q2 and Q4, and the current flowing through the resistor R1 is the sum of the currents of the triodes Q2 and Q3. Therefore, the triodes Q3 and Q4 are used as shunt tubes for the triode Q2. In the present invention, the current ratio of the current mirror composed of the PMOS transistors MP1 and MP2 is X:Y, where both X and Y are positive integers. To save power consumption, Y < X. The current ratio of the cascode current mirror composed of the NMOS transistors MN1, MN2, MN3, and MN4 is Y:X. Then, the current ratio of the currents flowing through the triodes Q3 and Q4 is 1:1. By controlling the current flowing through the triode Q4, the current of the triode Q3 is controlled proportionally. When the current of the triode Q4 increases, the current of the triode Q3 increases proportionally. Since the current of the triode Q1 is fixed, the AC current flowing through the triode Q2 decreases, and the equivalent transconductance of the triode Q2 decreases, reducing the circuit gain. Similarly, when the current of the triode Q4 decreases, the current of the triode Q3 decreases proportionally. Since the current of the triode Q1 is fixed, the AC current flowing through the triode Q2 increases, and the equivalent transconductance of the triode Q2 increases, increasing the circuit gain, thereby achieving the purpose of adjusting the gain.

[0105] It should be noted that the current mirror composed of the PMOS transistors MP1 and MP2 has a current ratio of X:Y, and the cascode current mirror composed of the NMOS transistors MN1, MN2, MN3, and MN4 has a current ratio of Y:X. The current of the triode Q4 is transmitted to the triode Q3 in a ratio of 1:1. The current sources I1 and I2 are the bias currents for the triodes Q5 and Q6. The triodes Q5 and Q6 provide the base bias voltages for the triodes Q3 and Q4 through self-bias. The resistor R2 provides the common-mode voltage for the emitters of the triodes Q5 and Q6.

[0106] Among them, X and Y are positive integers.

[0107] It should also be noted that current sources I1 and I2 are variable current sources with opposite current changes. That is, when the current source I1 increases, the current I2 decreases, and vice versa. When the current source I1 is at its maximum, the current source I2 is at its minimum, and the current of transistor Q4 is at its minimum. The current mirror composed of PMOS transistors MP1 and MP2 and the common-source cascode current mirror composed of NMOS transistors MN1, MN2, MN3, and MN4 replicate the current of transistor Q4 to transistor Q3 in a 1:1 ratio, making the currents of transistors Q3 and Q4 equal. Therefore, the current of transistor Q3 is also at its minimum, and the AC current of transistor Q2 is at its maximum. At this time, the transimpedance amplifier gain is at its maximum. Similarly, when the current source I1 is at its minimum and the current source I2 is at its maximum, the current of transistor Q4 is at its maximum, and the current of transistor Q3 is also at its maximum. At this time, the AC current of transistor Q2 is at its minimum, and the transimpedance amplifier gain is at its minimum.

[0108] In summary, this invention adjusts the transimpedance gain of a transimpedance amplifier by regulating the voltage gain of the variable gain amplifier. The circuit structure is simple, and no additional parasitic capacitance is introduced into the signal path. Compared with traditional adjustable gain transimpedance amplifiers, this invention not only achieves adjustable transimpedance amplifier gain but also avoids input noise degradation caused by parasitic capacitance.

[0109] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A low-noise adjustable-gain parallel feedback transimpedance amplifier, characterized in that: This includes a gain adjustment circuit, a voltage-controlled current source, and a feedback circuit; The gain adjustment circuit includes transistors Q2~Q6, NMOS transistors MN1~MN4, PMOS transistors MP1 and MP2, resistors R1 and R2, and current sources I1 and I2; The voltage-controlled current source includes transistor Q1; The feedback circuit includes a transistor Q7, a resistor R3, and a current source I3; The base of Q2 is connected to the base of Q3, the negative electrode of I1, the base of Q5, and the collector. The collector of Q2 is connected to the cathode of R1, the base of Q7, and the collector of Q3. The emitter of Q2 is connected to the collector of Q1 and the emitter of Q4. The emitter of Q3 is connected to the drain of MN2; The base of Q4 is connected to the base and collector of Q6 and the negative terminal of current source I2. The collector of Q4 is connected to the gate and drain of MP1 and the gate of MP2. The emitter of Q5 is connected to the emitter of transistor Q6 and the anode of resistor R2; The gate of MN1 is connected to the drain of MN1, the gate of MN2 and the drain of MP2, and the source of MN1 is connected to the drain and gate of MN3 and the gate of MN4. The source of MN2 is connected to the drain of MN4; The source MN3 is connected to ground GND, the source MN4, the emitter Q1, the cathode R2, and the anode I3; MP1 source is connected to power line VDD, R1 anode, MP2 source, I1~I2 positive terminals and Q7 collector; Q1 base is connected to the cathode of R3 and the photodetector PD outside the chip; The emitter of Q7 is connected to the anode of R3 and the cathode of I3.

2. A control method for a low-noise adjustable gain parallel feedback transimpedance amplifier, based on the low-noise adjustable gain parallel feedback transimpedance amplifier of claim 1, characterized in that: The output voltage of the gain adjustment circuit is sampled through R3 in the feedback circuit, and the sampled voltage is fed back to the input terminal of the voltage-controlled current source through R3, so that the current flowing through Q1 is a fixed current, and the current of Q1 is the sum of the currents of tubes Q2 and Q4. With Q3 and Q4 acting as shunts to Q2, the gain of the transimpedance amplifier can be adjusted by changing the output currents of I1 and I2, thereby altering the current distribution between Q3 and Q4, changing the AC current flowing through Q2, and changing the AC current flowing through R1.

3. The low-noise adjustable gain parallel feedback transimpedance amplifier control method as described in claim 2, characterized in that: The current ratio of the current mirror composed of MP1 and MP2 is X:Y; The current ratio of the common source cascode current mirror composed of MN1, MN2, MN3 and MN4 is Y:X, so that the ratio of the currents flowing through Q3 and Q4 is 1. In the current mirror and cascode current mirror structure, the current flowing through Q3 is controlled proportionally by controlling the current flowing through Q4.

4. The low-noise adjustable gain parallel feedback transimpedance amplifier control method as described in claim 3, characterized in that: I1 and I2 are variable current sources, and the current changes in opposite directions. That is, when the current of I1 increases, the current of I2 decreases, and when the current of I1 decreases, the current of I2 increases. When the current I1 is at its maximum and the current I2 is at its minimum, the current Q4 is at its minimum, which also makes the current Q3 at its minimum. Therefore, the AC current flowing through Q2 is at its maximum, and the transimpedance amplifier gain is at its maximum. When the current I1 is at its minimum and the current I2 is at its maximum, the current Q4 is at its maximum, which makes the current Q3 also at its maximum. Therefore, the AC current flowing through Q2 is at its minimum, and the gain of the transimpedance amplifier is at its minimum.

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