W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction
By using a W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction, combined with a dual-core in-phase coupling structure and high-performance switched capacitor bank, a comprehensive performance of low phase noise, high output power and low tuning gain in the W-band is achieved, solving the problems of poor phase noise, low output power and high tuning gain in the existing technology.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIDIAN UNIV
- Filing Date
- 2025-12-29
- Publication Date
- 2026-05-08
AI Technical Summary
Achieving a voltage-controlled oscillator with low phase noise, high output power, wide tuning range, and low tuning gain in the W-band presents challenges. Existing technologies struggle to effectively address issues such as switching performance degradation, parasitic effects, and excessively high tuning gain at high frequencies.
A W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction is adopted, combined with a dual-core in-phase coupled oscillator core, a two-bit switched capacitor bank, a linearized variable capacitor bank and an output buffer. The phase noise is reduced by harmonic extraction technology, and a step-by-step frequency band division with low harmonic gain is achieved by using a high-performance HBT switch, and continuous fine-tuning is performed with a high-linearity variable capacitor bank.
It achieves a comprehensive performance of low phase noise, high output power, and low tuning gain in the W-band, with phase noise below -95dBc/Hz, output power greater than -1.2dBm, and tuning gain less than 1.75GHz/V, optimizing the reliability and frequency tuning effect of the oscillator.
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Figure CN122001303A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of millimeter-wave integrated circuit technology, specifically relating to a W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction. Background Technology
[0002] Millimeter-wave frequencies, especially the W-band (75–110 GHz), have become a key platform for next-generation high-speed communications, high-resolution radar, and imaging systems due to their extremely wide available bandwidth. Achieving high-performance frequency synthesis in this band hinges on voltage-controlled oscillators (VCOs) with low phase noise and wide tuning range. However, traditional design methods face significant challenges when oscillator operating frequencies are increased to the W-band. First, due to the limited switching performance and output swing of CMOS transistors at extremely high frequencies, cross-coupled oscillators struggle to achieve excellent phase noise in the W-band. Second, while Colpitts structures can operate at higher frequencies, their common collector load inductance introduces significant parasitic effects, limiting the maximum oscillation amplitude and increasing the risk of transistor breakdown, thus hindering further optimization of phase noise. Furthermore, directly using varactor tuning to achieve a wide tuning range results in excessively high tuning gain, making the oscillation frequency extremely sensitive to control voltage noise, worsening in-band phase noise, and exacerbating reference spurious emissions when applied to phase-locked loops (PLLs).
[0003] To overcome these problems, existing technologies have introduced switched-capacitor arrays for frequency band division to reduce tuning gain and have attempted to employ harmonic extraction techniques to reduce the core oscillation frequency and improve the quality factor of passive devices. However, in the W-band, the effective implementation of these techniques is constrained by inherent process characteristics. For example, the turn-off performance of MOS switches in traditional silicon-based CMOS processes degrades sharply in the W-band, leading to a low quality factor of the switched-capacitor array, a sharp increase in insertion loss, and an inability to achieve effective frequency band division and noise optimization.
[0004] Therefore, how to realize a voltage-controlled oscillator with low phase noise, high output power, wide tuning range and low tuning gain in the W-band has become a key technical problem that urgently needs to be solved in the field of millimeter-wave integrated circuit design. Summary of the Invention
[0005] To address the aforementioned problems in the prior art, this invention provides a W-band low-noise voltage-controlled oscillator based on a transformer resonant cavity and harmonic extraction. The technical problem to be solved by this invention is achieved through the following technical solution: This invention provides a W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction, comprising: a dual-core in-phase coupled oscillator core, a two-bit switched capacitor bank, a linearized variable capacitor bank, and an output buffer; The dual-core in-phase coupled oscillator core includes a transformer resonant cavity and a harmonic extraction network integrated therein. The transformer resonant cavity is used to generate a fundamental oscillation signal based on the discrete capacitance value and the fine-tuning capacitance value, and couples the fundamental oscillation signal to the output buffer. The harmonic extraction network is used to extract the second harmonic from the fundamental oscillation signal and perform power synthesis to generate and output the target oscillation signal LO1 in the W band. The two-bit switched capacitor bank is used in response to the switching control voltage V. S1 With switch control voltage V S2 The binary state combination provides corresponding discrete capacitance values to the dual-core in-phase coupled oscillator core, dividing the total tuning range of the oscillation frequency output by the dual-core in-phase coupled oscillator core into multiple overlapping discrete sub-frequency bands, thereby achieving step-by-step tuning of the oscillation frequency; the linearized variable capacitor bank is used to respond to the continuously changing DC control voltage signal V. T The output provides a fine-tuning capacitor value, which is used to continuously adjust the oscillation frequency within any sub-frequency band determined by the two-bit switched capacitor group; the output buffer is used to isolate and buffer the fundamental oscillation signal, and output two differential fundamental oscillation signals LO2 and LO3.
[0006] Compared with the prior art, the beneficial effects of the present invention are as follows: To address the current problems of poor phase noise, low output power, and high tuning gain in W-band voltage-controlled oscillators (VCOs), this invention provides a low-noise W-band VCO based on a transformer resonant cavity and harmonic extraction. By employing a dual-core in-phase coupling structure, combined with a transformer resonant cavity and harmonic extraction network, it achieves significant reduction in phase noise and efficient extraction of the second harmonic oscillation signal. Simultaneously, it avoids reliability issues such as transistor breakdown and harmonic distortion caused by the collector load inductance in traditional Colpitts structures. Using harmonic extraction technology, it effectively synthesizes high-power W-band second harmonic output while reducing the core oscillation frequency to improve the quality factor of passive components. Furthermore, by employing a two-bit capacitor bank based on a high-performance HBT switch, it achieves stepped frequency band division with low tuning gain, optimizing phase noise and suppressing reference spurious signals. Combined with a variable capacitor bank with high linearity CV characteristics for continuous fine-tuning, it effectively suppresses AM-to-PM conversion of flicker noise. These synergistic techniques enable this VCO to achieve excellent overall performance in the W-band, characterized by low phase noise, high output power, and low tuning gain. Attached Figure Description
[0007] Figure 1 This is a schematic diagram of the structure of a W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction provided in an embodiment of the present invention; Figure 2This is a circuit connection diagram of the dual-core in-phase coupled oscillator core provided in an embodiment of the present invention; Figure 3 This is a circuit connection diagram of a two-bit switched capacitor bank provided in an embodiment of the present invention; Figure 4 This is a circuit connection diagram of the linearized variable capacitor bank provided in an embodiment of the present invention; Figure 5 This is a circuit connection diagram of the output buffer provided in an embodiment of the present invention; Figure 6 This is a simulation result of the oscillation frequency tuning curve of the W-band low-noise voltage-controlled oscillator provided in the embodiment of the present invention; Figure 7 This is a simulation result of the phase noise of the W-band low-noise voltage-controlled oscillator at a frequency offset of 1MHz provided in the embodiment of the present invention; Figure 8 This is a simulation result diagram of the output power of the W-band low-noise voltage-controlled oscillator provided in the embodiment of the present invention. Detailed Implementation
[0008] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.
[0009] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0010] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, disclosure, and appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.
[0011] The following is a detailed description of a W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction proposed in this invention, with reference to the accompanying drawings.
[0012] Figure 1 This is a schematic diagram of the structure of a W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction provided in an embodiment of the present invention. Figure 1 As shown, the W-band low-noise voltage-controlled oscillator includes: a dual-core in-phase coupled oscillator core, a two-bit switched capacitor bank, a linearized variable capacitor bank, and an output buffer; wherein, the two-bit switched capacitor bank is used to respond to the switching control voltage V S1 With switch control voltage V S2 The binary state combination provides corresponding discrete capacitance values to the dual-core in-phase coupled oscillator core, dividing the total tuning range of the oscillation frequency output by the dual-core in-phase coupled oscillator core into multiple overlapping discrete sub-bands, thus achieving step-by-step tuning of the oscillation frequency; the linearized variable capacitor bank is used to respond to the continuously changing DC control voltage signal V. T The system outputs a fine-tuning capacitor value, which is used to continuously adjust the oscillation frequency within any sub-band defined by the two-bit switched capacitor bank; a dual-core in-phase coupled oscillator core is used to generate the fundamental oscillation signal based on the discrete capacitor value and the fine-tuning capacitor value, and couples the fundamental oscillation signal to the output buffer; a harmonic extraction network is used to extract the second harmonic from the fundamental oscillation signal and perform power synthesis to generate and output the target oscillation signal LO1 in the W band; and an output buffer is used to isolate and buffer the fundamental oscillation signal from the load, and output two differential fundamental oscillation signals LO2 and LO3.
[0013] Here, the dual-core in-phase coupled oscillator core includes: a first transformer resonant cavity, a second transformer resonant cavity, a harmonic extraction network, a first oscillator core, and a second oscillator core; wherein, the first transformer resonant cavity and the second transformer resonant cavity have identical structures; the first oscillator core and the second oscillator core have identical structures; the first oscillator core is connected to the first transformer resonant cavity, and the second oscillator core is connected to the second transformer resonant cavity; the first oscillator core and the second oscillator core are connected to node V. E1 V E2 The first and second oscillator cores are coupled in phase to generate fundamental oscillation signals with the same amplitude, frequency, and phase. The first and second transformer resonant cavities use the capacitance provided by the two-bit switched capacitor group and the linearized variable capacitor group to determine the frequency of the fundamental oscillation signal. The harmonic extraction network is used to extract the second harmonic signal from the common-mode node located at the collector of the transistor in the first and second oscillator cores, respectively, and to perform power synthesis on the extracted second harmonic signal to generate the target oscillation signal LO1. The fundamental oscillation signal is coupled to the output buffer through the two transformer resonant cavities.
[0014] Here, the dual-core in-phase coupled oscillator core proposed in this embodiment consists of two identical oscillator cores, and the oscillation signals generated by the two oscillator cores have the same amplitude and frequency. By adopting dual-core coupling technology, the oscillation signals generated by the two oscillator cores are forced to have the same phase, which is equivalent to improving the quality factor of the resonant cavity and thus reducing phase noise.
[0015] It should be noted that the transformer resonant cavity proposed in this embodiment refers to the oscillator's resonant cavity inductance being realized through the transformer's equivalent inductance and included in the dual-core in-phase coupled oscillator core. Furthermore, in this embodiment, the fundamental oscillation signal is directly coupled to the load via the transformer. Compared to traditional millimeter-wave Colpitts oscillators, this eliminates the collector inductor used to extract the fundamental oscillation signal, avoiding transistor breakdown and harmonic distortion. When this oscillator is applied to a W-band phase-locked loop (PLL), the transformer resonant cavity can output an oscillation signal at half the target frequency, saving the high-speed prescaler in the PLL and reducing the power consumption of the PLL system.
[0016] For example, the tuning voltage is drawn from the input terminal V. T V S1 and V S2 The input capacitance of the two-bit switched capacitor connected in the resonant cavity varies with the input switching voltage V. S1 and V S2 Discrete variation is used to divide the tuning bandwidth of the voltage-controlled oscillator into four overlapping sub-tuning bands to achieve coarse tuning, and the capacitance value of the linearized variable capacitor varies with the input voltage V. T Fine-tuning is achieved by continuously adjusting the oscillation frequency within each sub-tuning band using a continuous linear variation. A dual-core in-phase coupled oscillator generates a fundamental oscillation signal with a frequency range of 49.5–53 GHz, which is inductively coupled to the input of the output buffer via the resonant cavity and then output to the output terminals LO2 and LO3. A harmonic extraction network extracts second harmonic signals with a frequency range of 99–106 GHz at the common-mode node of each oscillator core. The extracted second harmonic signals are then power-synthesized and finally output as the target oscillation signal to the output terminal LO1.
[0017] Figure 2 This is a schematic diagram of the circuit connection of the dual-core in-phase coupled oscillator core provided in an embodiment of the present invention. Figure 2As shown, the first transformer resonant cavity includes inductors L1 and L2; the second transformer resonant cavity includes inductors L3 and L4; the coupling coefficients of the two transformer resonant cavities are the same; the harmonic extraction network includes transmission lines TL1, TL2, TL3, TL4, TL5, and capacitor C1; the first oscillator core includes transistors Q1 and Q2, capacitors C2, C3, and C4, resistor R1, transmission lines TL6 and TL7; the second oscillator core includes transistors Q3 and Q4, capacitors C5, C6, and C7, resistor R2, transmission lines TL8 and TL9; wherein, node V... E1 V E2 As the connection node for the dual-core in-phase coupled oscillator core, the two-bit switched capacitor bank, and the linearized variable capacitor bank, ports OUT1, OUT2, OUT3, and OUT4 serve as the four output terminals of the dual-core in-phase coupled oscillator core connected to the output buffer; port OUT5 serves as the output terminal for the target oscillation signal LO1; node V E1 Connect to one end of transmission line TL6, the emitter of transistor Q1, one end of capacitor C2, one end of transmission line TL9, one end of capacitor C6, and the emitter of transistor Q4 respectively; Node V E2 Connect one end of capacitor C3, the emitter of transistor Q2, one end of transmission line TL7, one end of capacitor C5, the emitter of transistor Q3, and one end of transmission line TL8, respectively; connect the other ends of capacitor C2 and C3, the other ends of transmission lines TL6 and TL7, one end of resistor R1, and one end of capacitor C4, with the other ends of resistor R1 and capacitor C4 both grounded; connect the other ends of capacitor C5 and C6, the other ends of transmission lines TL8 and TL9, one end of resistor R2, and one end of capacitor C7, with the other ends of resistor R2 and capacitor C7 both grounded; connect the collectors of transistors Q1 and Q2, one end of transmission line TL1, and one end of transmission line TL2; connect the other end of transmission line TL1 to the power supply voltage V. CC1 An inductor L2 is connected between the bases of transistors Q1 and Q2; inductor L2 is coupled to inductor L1; the two ends of inductor L1 serve as ports OUT1 and OUT2, respectively; the collectors of transistors Q3 and Q4, one end of transmission line TL3, and one end of transmission line TL4 are connected; the other end of transmission line TL4 is connected to the power supply voltage V. CC1 An inductor L4 is connected between the bases of transistors Q3 and Q4; inductor L4 is coupled to inductor L3; the two ends of inductor L3 serve as ports OUT3 and OUT4, respectively; the center taps of inductors L2 and L4 are connected to the bias voltage V. B1The other end of transmission line TL2, the other end of transmission line TL3, and one end of transmission line TL5 are connected; the other end of transmission line TL5 is connected to one end of capacitor C1, and the other end of capacitor C1 serves as port OUT5.
[0018] Here, port LO1, used to output the target oscillation signal, outputs the W-band main signal, i.e., the second harmonic signal with a frequency of 99~106GHz, which is used to drive subsequent circuits such as the mixer. The output frequency range of the target oscillation signal LO1 is 99GHz to 106GHz, and the phase noise at a frequency offset of 1MHz across the entire frequency band is lower than... 95dBc / Hz, output power higher than 1.2dBm. The two ports LO2 and LO3, used to output the fundamental oscillation signal, output a differential fundamental signal with a frequency range of 49.5~53GHz, which is used for circuit testing and as the input signal for the frequency divider in the phase-locked loop.
[0019] Here, the lengths of transmission lines TL1 and TL4 are configured to exhibit quarter-wavelength short-circuit characteristics at the target second harmonic frequency, in order to provide high impedance for the second harmonic at the collector common-mode nodes of transistors Q1~Q2 and Q3~Q4.
[0020] Here, in the transformer resonant cavity proposed in this embodiment, the coupling coefficients k1 and k2 of the two transformer resonant cavities are designed to be small values. On the one hand, this is beneficial to improve the quality factor of the resonant cavity and achieve phase noise optimization. On the other hand, it is beneficial to improve the isolation between the resonant cavity and the load and suppress the load pulling phenomenon of the oscillator.
[0021] The harmonic extraction network proposed in this embodiment includes a second harmonic generation network and a second harmonic synthesis network. The second harmonic generation network consists of transmission lines TL1 and TL4, both of which are quarter-wavelength short-circuited transmission lines. These quarter-wavelength short-circuited transmission lines provide high impedance at the common-mode node of each oscillator core, thereby generating a second harmonic at that node. The second harmonic synthesis network consists of transmission lines TL2, TL3, and TL5. It combines the second harmonic signals generated by the common-mode nodes of the two oscillator cores and outputs them, thereby increasing the output power of the target oscillation frequency signal.
[0022] Here, the two-bit switched capacitor bank proposed in this embodiment adopts an HBT switch that still has excellent turn-off performance at high operating frequencies, effectively reducing the parasitic capacitance of the switch in the turn-off state and the parasitic resistance in the turn-on state, ensuring the normal operation of the switched capacitor bank.
[0023] The two-bit switched capacitor bank proposed in this embodiment has four states, which can be equivalent to four different capacitance values in the resonant cavity, corresponding to the four sub-bands of the oscillator. Switch control voltage V S1 and switch control voltage V S2 Each signal is an independent digital signal, with only two states: "on" (high level, e.g., 1.5V) and "off" (low level, 0V); consequently, the switching control voltage V... S1 and switch control voltage V S2 The binary state combinations include: 1)V S1 It is low level and V S2 It is in a low-level state; 2)V S1 It is low level and V S2 It is in a high-level state; 3)V S1 High level and V S2 It is in a low-level state; 4)V S1 High level and V S2 It is in a high-level state; Each binary state combination corresponds to an equivalent capacitance value, thus corresponding to a sub-band. These sub-bands overlap in frequency, ensuring continuous adjustment of the full-band oscillation frequency. Ultimately, the oscillator's tuning gain is significantly reduced, which is beneficial for achieving better phase noise and reference spurious suppression capabilities.
[0024] Figure 3 This is a circuit connection diagram of a two-bit switched capacitor bank provided in an embodiment of the present invention. Figure 3 As shown, the two-bit switched capacitor bank includes: transistors Q5, Q6, Q7, Q8, Q9, Q10, Q11, and Q12; capacitors C8, C9, C10, C11, C12, and C13; and resistors R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12; wherein the switching control voltage V... S1 The circuit is connected to one end of resistor R4 and one end of resistor R9 respectively; the switch control voltage V S2The resistors R5 and R10 are connected to one end of each resistor; the other end of resistor R4 is connected to the base of transistor Q5 and the base of transistor Q6, respectively; the emitter of transistor Q5 and the collector of transistor Q6 are connected to one end of resistor R7, one end of capacitor C10, the emitter of transistor Q8, and the collector of transistor Q7, respectively; the other ends of resistor R7 and capacitor C10 are grounded; the collector of transistor Q5 and the emitter of transistor Q6 are connected to one end of resistor R3 and one end of capacitor C8, respectively; the other end of resistor R3 is grounded; the other end of resistor R5 is connected to the base of transistor Q7 and the base of transistor Q8, respectively; the collector of transistor Q8 and the emitter of transistor Q7 are connected to one end of resistor R6 and one end of capacitor C9, respectively; the other end of resistor R6 is grounded; the other ends of capacitor C8 and capacitor C9 are both connected to node V of the dual-core in-phase coupled oscillator core. E1 Connections are made as follows: The other end of resistor R9 is connected to the base of transistor Q9 and the base of transistor Q10, respectively; the emitter of transistor Q9 and the collector of transistor Q10 are both connected to one end of resistor R12, one end of capacitor C13, the emitter of transistor Q12, and the collector of transistor Q11; the other ends of resistor R12 and capacitor C13 are both grounded; the collector of transistor Q9 and the emitter of transistor Q10 are both connected to one end of resistor R8 and one end of capacitor C11; the other end of resistor R8 is grounded; the other end of resistor R10 is connected to the base of transistor Q11 and the base of transistor Q12, respectively; the collector of transistor Q12 and the emitter of transistor Q11 are both connected to one end of resistor R11 and one end of capacitor C12; the other end of resistor R11 is grounded; the other ends of capacitor C11 and capacitor C12 are both connected to node V of the dual-core in-phase coupled oscillator core. E2 connect.
[0025] The linearized variable capacitor proposed in this embodiment connects two accumulation-type MOS varactors biased at different voltages in parallel to achieve high linearity CV characteristics. It suppresses the phase noise caused by the flicker noise of the power supply and active devices through the AM-to-PM conversion mechanism, which is conducive to achieving better phase noise.
[0026] Figure 4 This is a circuit connection diagram of the linearized variable capacitor bank provided in an embodiment of the present invention. Figure 4 As shown, the linearized variable capacitor bank includes: capacitors C14, C15, C16, and C17; resistors R13, R14, R15, and R16; varactor VARC1; and varactor VARC2; wherein the DC control voltage signal V... TThe inputs are respectively connected to the control terminals of varactor VARC1 and VARC2; one end of varactor VARC1 is connected to one end of resistor R13 and one end of capacitor C14, and the other end of varactor VARC1 is connected to one end of resistor R14 and one end of capacitor C15; the other ends of resistors R13 and R14 are both connected to a bias voltage V. B2 The other end of capacitor C14 is connected to node V of the dual-core in-phase oscillator core. E1 Connection; the other end of capacitor C15 is connected to node V of the dual-core in-phase coupled oscillator core. E2 Connections: One end of varactor VARC2 is connected to one end of resistor R15 and one end of capacitor C16, and the other end of varactor VARC2 is connected to one end of resistor R16 and one end of capacitor C17; the other ends of resistors R15 and R16 are both connected to a bias voltage V. B3 The other end of capacitor C16 is connected to the other end of capacitor C14, and the other end of capacitor C17 is connected to the other end of capacitor C15.
[0027] The output buffer proposed in this embodiment adopts an emitter follower structure with a current source load. The current source is implemented by an HBT current mirror. Compared with a MOS current mirror, the HBT device has high transconductance, requires a smaller device size for the same current, thus reducing parasitics, and has good layout matching characteristics, reducing output current mismatch. As an output buffer, the emitter follower has a high operating frequency, moderate output impedance, and good isolation and load-driving capability.
[0028] Figure 5 This is a circuit connection diagram of the output buffer provided in an embodiment of the present invention. Figure 5As shown, the output buffer includes: transistors Q13, Q14, Q15, Q16, Q17, Q18, Q19, Q20, and Q21; capacitors C18, C19, C20, and C21; and resistors R17, R18, R19, R20, R21, R22, R23, R24, R25, and R26. Ports IN1, IN2, IN3, and IN4 are connected to ports OUT1, OUT2, OUT3, and OUT4 of the dual-core in-phase coupled oscillator core, respectively. Capacitor C18... One end of capacitor C19 serves as port IN1, and the other end is connected to one end of resistor R17 and the base of transistor Q13. One end of capacitor C19 serves as port IN2, and the other end is connected to one end of resistor R18 and the base of transistor Q15. The emitter of transistor Q13 and the collector of transistor Q14 are connected, and the tap between them serves as the positive terminal of the output fundamental oscillation signal LO2. The emitter of transistor Q15 and the collector of transistor Q16 are connected, and the tap between them serves as the negative terminal of the output fundamental oscillation signal LO2. The emitter of transistor Q14 is connected to one end of resistor R19, and the emitter of transistor Q16 is connected to one end of resistor R20. The bases of transistors Q14, Q16, Q18, and Q20, and the base of transistor Q21 are connected; the base and collector of transistor Q21 are connected; the collector of transistor Q21 is connected to one end of resistor R26; the emitter of transistor Q21 is connected to one end of resistor R25; one end of capacitor C20 serves as port IN3, and the other end is connected to one end of resistor R21 and the base of transistor Q17; one end of capacitor C21 serves as port IN4, and the other end is connected to one end of resistor R22 and the base of transistor Q19; the emitter of transistor Q17 and the collector of transistor Q18 are connected... The emitter of transistor Q19 and the collector of transistor Q20 are connected, and the tap between them serves as the positive terminal of the output fundamental oscillation signal LO3; the emitter of transistor Q18 is connected to one end of resistor R23, and the emitter of transistor Q20 is connected to one end of resistor R24; the other ends of resistors R26, R17, and R18, the collectors of transistors Q13 and Q15, the other ends of resistors R21 and R22, the collectors of transistors Q17 and Q19 are all connected to the power supply voltage V. CC2 The other ends of resistors R25, R19, R20, R23, and R24 are all grounded.
[0029] This W-band low-noise voltage-controlled oscillator is implemented using SiGe BiCMOS technology. The heterojunction bipolar transistors (HBTs) provided by this technology possess excellent characteristics of high characteristic frequency, high transconductance, and low noise, enabling the core oscillator circuitry to operate efficiently and reliably in the W-band, laying the foundation for low phase noise. Simultaneously, the high-performance HBT-based switch exhibits excellent turn-off performance and low parasitic capacitance at high frequencies, ensuring that the switched capacitors continue to operate normally in the millimeter-wave band.
[0030] It should be noted that all resistors and transistors use models and layouts provided in the process library; all capacitors use MIM capacitors from the process library; and all varactors use accumulator-type MOS varactors from the process library. Furthermore, the transmission lines use custom-designed layouts and S-parameters, with a top-layer thick metal signal layer, an M3 layer metal reference layer, and custom-designed layouts and S-parameters for the inductors. The metal used for the inductors is the top and second-to-top-layer thick metal provided by this process.
[0031] To provide a more comprehensive explanation of the W-band low-noise voltage-controlled oscillator of this invention, the simulation results of the circuit are described in detail below. The HBT directly calls the model from the process library. For the passive connections on the transistors, the electromagnetic simulation tool Momentum in ADS is used to perform electromagnetic simulation. The HBT from the process library and the passive connections on the transistors are encapsulated into a Symbol for easy access. The remaining passive parts are subjected to full-board electromagnetic simulation using the electromagnetic simulation tool Momentum in ADS. The results obtained through this co-simulation method are closer to the actual results during chip testing.
[0032] Table 1 is a table showing the fixed voltage correspondence for the external power supply of the W-band low-noise voltage-controlled oscillator provided in the embodiments of the present invention. Table 2 is a schematic diagram of the parameter values of each component of the W-band low-noise voltage-controlled oscillator provided in the embodiments of the present invention. As shown in Table 2, the parameter values of transistors are expressed as length × width × number of parallel connections; the parameter values of transmission lines are expressed as the length × width of the signal line.
[0033] Table 1
[0034] Table 2
[0035] Figure 6 This is a simulation result of the oscillation frequency tuning curve of the W-band low-noise voltage-controlled oscillator provided in an embodiment of the present invention. Figure 6 As shown, SW= <V S1 V S2 > represents different combinations of switching states of a two-bit switched capacitor. For example, when SW=10, VS1 When the voltage is high, the switch in the corresponding branch is turned on, and the capacitor is connected to the resonant cavity. S2 The circuit is at a low level, the branch switch is open, and the capacitor is not connected to the resonant cavity. The lowest frequency of the oscillator is at SW=11, V. T The frequency was obtained at 0V, which is 99GHz; the highest frequency is at SW=00, V. T The frequency was obtained at 1.2V, resulting in a frequency of 106GHz. Each sub-tuning band has at least 10% overlap, ensuring the continuity of the output frequency. After dividing the sub-tuning bands, the tuning gain is in the range of 1.41~1.75GHz / V, which is much smaller than the 5.83GHz / V without using switched capacitors.
[0036] Figure 7 This is a simulation result of the phase noise of the W-band low-noise voltage-controlled oscillator provided in an embodiment of the present invention at a frequency offset of 1MHz. Figure 7 As shown, the worst phase noise of the oscillator is at SW=00, V T The value was obtained at 0.2V, which is -95dBc / Hz; the optimal phase noise is achieved at SW=01, V T The value was obtained at 1.1V, which is -97.6dBc / Hz. Therefore, the phase noise of the oscillator is better than -95dBc / Hz across the entire output frequency range.
[0037] Figure 8 This is a simulation result diagram of the output power of the W-band low-noise voltage-controlled oscillator provided in an embodiment of the present invention. Figure 8 As shown, the output power here is the output power of the W-band oscillation signal from 99 to 106 GHz, with a load impedance of 50 Ω. Within the full output frequency range, the oscillator's output power is greater than -1.2 dBm, with a maximum output power of -0.54 dBm.
[0038] In summary, the W-band voltage-controlled oscillator of this invention achieves an output frequency range of 99~106GHz, has four sub-bands, and a tuning gain of less than 1.75GHz / V. Across the entire frequency band, the phase noise is less than -95dBc / Hz, with an optimal phase noise of -97.6dBc / Hz, and the output power is greater than -1.2dBm.
[0039] To address the current problems of poor phase noise, high tuning gain, and low output power in W-band voltage-controlled oscillators (VCOs), this invention provides a low-noise W-band VCO based on a transformer resonant cavity and harmonic extraction. By employing a dual-core in-phase coupled oscillator core structure combined with a transformer resonant cavity, phase noise is significantly reduced and oscillation signal is efficiently extracted, while avoiding the reliability issues introduced by the inductance of the traditional collector load. Harmonic extraction technology is used to reduce the core oscillation frequency to improve the quality factor of passive components while effectively synthesizing a high-power W-band second harmonic output. Furthermore, a two-bit capacitor bank based on a high-performance HBT switch is used to achieve stepped frequency band division with low tuning gain, suppressing the influence of control voltage noise. Continuous fine-tuning with a variable capacitor bank with high linearity CV characteristics effectively suppresses AM-to-PM conversion of flicker noise. These synergistic techniques enable this VCO to achieve excellent overall performance in the W-band, characterized by low phase noise, high output power, and low tuning gain.
[0040] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.
Claims
1. A W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction, characterized in that, include: Dual-core in-phase coupled oscillator core, two-bit switched capacitor bank, linearized variable capacitor bank and output buffer; The dual-core in-phase coupled oscillator core is used to generate a fundamental oscillation signal based on the discrete capacitance value and the fine-tuning capacitance value, and to couple the fundamental oscillation signal to the output buffer; the harmonic extraction network is used to extract the second harmonic from the fundamental oscillation signal and perform power synthesis to generate and output the target oscillation signal LO1 in the W band. The two-bit switched capacitor bank is used in response to the switching control voltage V. S1 With switch control voltage V S2 The binary state combination provides corresponding discrete capacitance values to the dual-core in-phase coupled oscillator core, so as to divide the total tuning range of the oscillation frequency output by the dual-core in-phase coupled oscillator core into multiple overlapping discrete sub-frequency bands, thereby realizing step-by-step tuning of the oscillation frequency. The linearized variable capacitor bank is used in response to a continuously changing DC control voltage signal V. T It outputs a fine-tuning capacitor value, which is used to continuously adjust the oscillation frequency within any sub-frequency band determined by the two-bit switched capacitor group. The output buffer is used to isolate and buffer the fundamental oscillation signal, and output two differential fundamental oscillation signals LO2 and LO3.
2. The W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction according to claim 1, characterized in that, The dual-core in-phase coupled oscillator core includes: a first transformer resonant cavity, a second transformer resonant cavity, a harmonic extraction network, a first oscillator core, and a second oscillator core; The first transformer resonant cavity and the second transformer resonant cavity have the same structure; the first oscillator core and the second oscillator core have the same structure. The first oscillator core is connected to the first transformer resonant cavity, and the second oscillator core is connected to the second transformer resonant cavity; The first oscillator core and the second oscillator core are connected to node V. E1 V E2 This achieves in-phase coupling, enabling the first oscillator core and the second oscillator core to generate fundamental oscillation signals with the same amplitude, frequency, and phase. The first transformer resonant cavity and the second transformer resonant cavity reuse the capacitance provided by the two-bit switched capacitor bank and the linearized variable capacitor bank to determine the frequency of the fundamental oscillation signal; The harmonic extraction network is used to extract second harmonic signals from the common-mode nodes located at the collectors of transistors in the first oscillator core and the second oscillator core, respectively, and to perform power synthesis on the extracted second harmonic signals to generate the target oscillation signal LO1. The fundamental oscillation signal is coupled to the output buffer through two transformer resonant cavities.
3. The W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction according to claim 2, characterized in that, The first transformer resonant cavity includes inductors L1 and L2; the second transformer resonant cavity includes inductors L3 and L4; the two transformer resonant cavities have the same coupling coefficient. The harmonic extraction network includes: transmission line TL1, transmission line TL2, transmission line TL3, transmission line TL4, transmission line TL5, and capacitor C1; The first oscillator core includes: transistor Q1, transistor Q2, capacitor C2, capacitor C3, capacitor C4, resistor R1, transmission line TL6, and transmission line TL7; The second oscillator core includes: transistor Q3, transistor Q4, capacitor C5, capacitor C6, capacitor C7, resistor R2, transmission line TL8, and transmission line TL9; Among them, the node V E1 V E2 As the connection node of the dual-core in-phase coupled oscillator core, the two-bit switched capacitor bank, and the linearized variable capacitor bank, ports OUT1, OUT2, OUT3, and OUT4 serve as the four output terminals of the dual-core in-phase coupled oscillator core connected to the output buffer; port OUT5 serves as the output terminal for outputting the target oscillation signal LO1. The node V E1 It is connected to one end of the transmission line TL6, the emitter of the transistor Q1, one end of the capacitor C2, one end of the transmission line TL9, one end of the capacitor C6, and the emitter of the transistor Q4, respectively. The node V E2 It is connected to one end of the capacitor C3, the emitter of the transistor Q2, one end of the transmission line TL7, one end of the capacitor C5, the emitter of the transistor Q3, and one end of the transmission line TL8, respectively. The other end of capacitor C2 is connected to the other end of capacitor C3. The other end of transmission line TL6, the other end of transmission line TL7, one end of resistor R1 and one end of capacitor C4 are connected. The other end of resistor R1 and the other end of capacitor C4 are both grounded. The other end of capacitor C5 is connected to the other end of capacitor C6. The other end of transmission line TL8, the other end of transmission line TL9, one end of resistor R2 and one end of capacitor C7 are connected. The other end of resistor R2 and the other end of capacitor C7 are both grounded. The collectors of transistor Q1 and Q2, one end of transmission line TL1, and one end of transmission line TL2 are connected; the other end of transmission line TL1 is connected to a power supply voltage V. CC1 The inductor L2 is connected between the base of transistor Q1 and the base of transistor Q2; the inductor L2 is coupled to the inductor L1; the two ends of the inductor L1 serve as port OUT1 and port OUT2, respectively. The collectors of transistor Q3 and Q4, one end of transmission line TL3, and one end of transmission line TL4 are connected; the other end of transmission line TL4 is connected to the power supply voltage V. CC1 The inductor L4 is connected between the base of transistor Q3 and the base of transistor Q4; the inductor L4 is coupled to the inductor L3; the two ends of the inductor L3 serve as port OUT3 and port OUT4, respectively; the center taps of the inductors L2 and L4 are connected to the bias voltage V. B1 ; The other end of transmission line TL2, the other end of transmission line TL3, and one end of transmission line TL5 are connected; the other end of transmission line TL5 is connected to one end of capacitor C1, and the other end of capacitor C1 serves as port OUT5.
4. The W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction according to claim 1, characterized in that, The switch control voltage V S1 and the switch control voltage V S2 The binary state combinations include: 1) The V S1 It is low level and the V S2 It is in a low-level state; 2) The V S1 It is low level and the V S2 It is in a high-level state; 3) The V S1 The V is high level and the V S2 It is in a low-level state; 4) The V S1 The V is high level and the V S2 It is in a high-level state; Each binary state combination corresponds to a sub-band.
5. The W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction according to claim 1, characterized in that, The two-bit switched capacitor bank includes: transistors Q5, Q6, Q7, Q8, Q9, Q10, Q11, and Q12; capacitors C8, C9, C10, C11, C12, and C13; and resistors R3, R4, R5, R6, R7, R8, R9, R10, R11, and R12. The switch control voltage V S1 The resistors are respectively connected to one end of resistor R4 and one end of resistor R9; The switch control voltage V S2 Connect one end of resistor R5 and one end of resistor R10 respectively; The other end of resistor R4 is connected to the base of transistor Q5 and the base of transistor Q6, respectively; the emitter of transistor Q5 and the collector of transistor Q6 are both connected to one end of resistor R7, one end of capacitor C10, the emitter of transistor Q8, and the collector of transistor Q7; the other end of resistor R7 and the other end of capacitor C10 are both grounded; the collector of transistor Q5 and the emitter of transistor Q6 are both connected to one end of resistor R3 and one end of capacitor C8; the other end of resistor R3 is grounded. The other end of resistor R5 is connected to the base of transistor Q7 and the base of transistor Q8, respectively; the collector of transistor Q8 and the emitter of transistor Q7 are both connected to one end of resistor R6 and one end of capacitor C9, and the other end of resistor R6 is grounded; the other ends of capacitor C8 and capacitor C9 are both connected to node V of the dual-core in-phase coupled oscillator core. E1 connect; The other end of resistor R9 is connected to the base of transistor Q9 and the base of transistor Q10, respectively; the emitter of transistor Q9 and the collector of transistor Q10 are both connected to one end of resistor R12, one end of capacitor C13, the emitter of transistor Q12, and the collector of transistor Q11; the other end of resistor R12 and the other end of capacitor C13 are both grounded; the collector of transistor Q9 and the emitter of transistor Q10 are both connected to one end of resistor R8 and one end of capacitor C11; the other end of resistor R8 is grounded. The other end of resistor R10 is connected to the base of transistor Q11 and the base of transistor Q12, respectively; the collector of transistor Q12 and the emitter of transistor Q11 are both connected to one end of resistor R11 and one end of capacitor C12, and the other end of resistor R11 is grounded; the other ends of capacitor C11 and capacitor C12 are both connected to node V of the dual-core in-phase coupled oscillator core. E2 connect.
6. The W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction according to claim 1, characterized in that, The linearized variable capacitor bank includes: capacitors C14, C15, C16, and C17; resistors R13, R14, R15, and R16; varactor VARC1; and varactor VARC2; wherein... The DC control voltage signal V T The control terminals of the variable capacitance tube VARC1 and VARC2 are respectively connected to the control terminals of the variable capacitance tube VARC2. One end of the varactor VARC1 is connected to one end of the resistor R13 and one end of the capacitor C14, and the other end of the varactor VARC1 is connected to one end of the resistor R14 and one end of the capacitor C15; the other ends of the resistors R13 and R14 are both connected to a bias voltage V. B2 The other end of capacitor C14 is connected to node V of the dual-core in-phase coupled oscillator core. E1 Connection; the other end of capacitor C15 is connected to node V of the dual-core in-phase coupled oscillator core. E2 connect; One end of the varactor VARC2 is connected to one end of the resistor R15 and one end of the capacitor C16, and the other end of the varactor VARC2 is connected to one end of the resistor R16 and one end of the capacitor C17; the other ends of the resistor R15 and the other ends of the resistor R16 are both connected to a bias voltage V. B3 ; The other end of capacitor C16 is connected to the other end of capacitor C14, and the other end of capacitor C17 is connected to the other end of capacitor C15.
7. The W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction according to claim 1, characterized in that, The output buffer includes: transistors Q13, Q14, Q15, Q16, Q17, Q18, Q19, Q20, and Q21; capacitors C18, C19, C20, and C21; and resistors R17, R18, R19, R20, R21, R22, R23, R24, R25, and R26; wherein, Ports IN1, IN2, IN3, and IN4 are respectively connected to ports OUT1, OUT2, OUT3, and OUT4 of the dual-core in-phase coupled oscillator core; One end of capacitor C18 serves as port IN1, and the other end is connected to one end of resistor R17 and the base of transistor Q13, respectively; one end of capacitor C19 serves as port IN2, and the other end is connected to one end of resistor R18 and the base of transistor Q15, respectively. The emitter of transistor Q13 is connected to the collector of transistor Q14, and a tap between them serves as the positive terminal for outputting the fundamental oscillation signal LO2; the emitter of transistor Q15 is connected to the collector of transistor Q16, and a tap between them serves as the negative terminal for outputting the fundamental oscillation signal LO2. The emitter of transistor Q14 is connected to one end of resistor R19, and the emitter of transistor Q16 is connected to one end of resistor R20; the bases of transistors Q14, Q16, Q18, Q20, and Q21 are connected, and the base and collector of transistor Q21 are connected; the collector of transistor Q21 is connected to one end of resistor R26. The emitter of transistor Q21 is connected to one end of resistor R25; One end of capacitor C20 serves as port IN3, and the other end is connected to one end of resistor R21 and the base of transistor Q17, respectively; one end of capacitor C21 serves as port IN4, and the other end is connected to one end of resistor R22 and the base of transistor Q19, respectively. The emitter of transistor Q17 is connected to the collector of transistor Q18, and a tap between them serves as the positive terminal for outputting the fundamental oscillation signal LO3; the emitter of transistor Q19 is connected to the collector of transistor Q20, and a tap between them serves as the negative terminal for outputting the fundamental oscillation signal LO3. The emitter of transistor Q18 is connected to one end of resistor R23, and the emitter of transistor Q20 is connected to one end of resistor R24; The other ends of resistor R26, resistor R17, resistor R18, the collector of transistor Q13, the collector of transistor Q15, the other ends of resistor R21, resistor R22, the collector of transistor Q17, and the collector of transistor Q19 are all connected to a power supply voltage V. CC2 ; The other ends of resistors R25, R19, R20, R23, and R24 are all grounded.
8. The W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction according to claim 1, characterized in that, The target oscillation signal LO1 has an output frequency range of 99 GHz to 106 GHz, and its phase noise at a frequency offset of 1 MHz across the entire frequency band is lower than [value missing]. 95dBc / Hz, output power higher than 1.2dBm.
9. The W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction according to claim 3, characterized in that, The lengths of transmission lines TL1 and TL4 are configured to exhibit quarter-wavelength short-circuit characteristics at the target second harmonic frequency, in order to provide high impedance for the second harmonic at the collector common-mode node of transistors Q1-Q2 and Q3-Q4.
10. The W-band low-noise voltage-controlled oscillator based on transformer resonant cavity and harmonic extraction according to any one of claims 3 to 7, characterized in that, The W-band low-noise voltage-controlled oscillator is fabricated using SiGe BiCMOS technology.