Integrated photonic chip coupling system and its control method

Abstract

This invention provides an integrated photonic chip coupling system and its control method. The integrated photonic chip coupling system includes a chip sample stage, a beam receiver connected to a lens barrel, an input optical fiber, and an optical fiber adjustment stage. The chip sample stage is used to place the chip under test (DUT). The beam receiver is located on the output side of the DUT. The input optical fiber and the optical fiber adjustment stage are located on the input side of the DUT, with the input optical fiber fixed on the adjustment stage. By setting a beam splitter inside the lens barrel and adjusting the position of the LED illumination and the input port of the DUT, the alignment of the optical fiber and the DUT is achieved. Furthermore, by adjusting the position of the input optical fiber, the optimal coupling point between the DUT and the input optical fiber is found, thereby achieving coupling of the DUT.

Description

Technical Field

[0001] This invention relates to the field of optics, and more specifically to an integrated photonics chip coupling system and its control method. Background Technology

[0002] Integrated photonics is a technology that integrates optical components such as waveguides, modulators, detectors, and light sources into photonic chips. Its core components include waveguide systems made of materials such as silicon, silicon nitride, and indium phosphide. Integrated photonic chips have revolutionized various fields, including high-speed data communication, optical sensing, and biophotonics. However, ensuring the functionality and performance of these chips requires robust testing and packaging strategies.

[0003] Integrated photonic coupling systems are optical systems designed for optical coupling of integrated photonic chips (such as integrated optical phased arrays and integrated vortex emitters) that have fiber optic input and vertical chip output of spatial light, aiming to achieve the lowest possible fiber coupling loss. Common photonic chip coupling systems typically employ at least two optical fibers. One fiber couples an external light source into the photonic chip, while the other couples light from within the chip to the outside. Optimal coupling is achieved by continuously adjusting the two fibers to the position with the lowest total loss. However, such coupling systems require two fiber couplers. For some photonic chip devices with spatial light output, it is not feasible to fabricate two fiber couplers, making it difficult to achieve proper coupling alignment for these devices. Summary of the Invention

[0004] Based on this, the present invention provides an integrated photonic chip coupling system and its control method. By setting a beam splitter inside the lens barrel, the alignment of the optical fiber and the chip under test is achieved by adjusting the position of the LED illumination and the light inlet of the chip under test. Then, by adjusting the position of the input optical fiber, the optimal coupling point between the chip under test and the input optical fiber is found, thereby realizing the coupling of the chip under test.

[0005] In a first aspect, the present invention provides an integrated photonic chip coupling system, including a chip sample stage, a beam receiver connected to a lens tube, an input optical fiber, and an optical fiber adjustment stage;

[0006] The chip sample stage is used to place the chip to be tested.

[0007] The beam receiver is located on one side of the light output port of the chip under test;

[0008] The input optical fiber and the optical fiber adjustment stage are set on the optical inlet side of the chip under test, and the input optical fiber is fixed on the optical fiber adjustment stage.

[0009] Furthermore, a sample stage adjustment structure is provided on one side of the chip sample stage;

[0010] The sample stage adjustment structure includes a flat plate that fits against the chip sample stage and an L-shaped tray for placing the chip sample stage.

[0011] The plate has screw holes at each of its four corners for fixing the packaged chip. The distance between any two screw holes is greater than the length of the chip sample stage edge that is parallel to them.

[0012] The L-shaped tray and the chip sample stage are located on the same side of the flat plate, and the height of the L-shaped tray is lower than the height of the chip sample stage.

[0013] The chip sample stage is equipped with vacuum adsorption holes for adsorbing unpackaged chips.

[0014] Furthermore, along the direction from the chip under test to the beam receiver, a microscope objective, a beam splitter, and a first lens are sequentially arranged on the main optical axis of the microscope tube;

[0015] The lens barrel is provided with a second lens in sequence along the direction perpendicular to the principal optical axis.

[0016] Furthermore, the integrated photonic chip coupling system is also equipped with an LED light source;

[0017] The LED light source is used to input an external light source through a second lens to a beam splitter, and finally reflect it onto the chip under test.

[0018] In a second aspect, the present invention also provides a control method for an integrated photonic chip coupling system, the control method being applied to the control method integration of the photonic chip coupling system described in the first aspect, comprising:

[0019] Step S1: Fix the chip under test onto the chip sample stage;

[0020] Step S2: Obtain the geometric parameters of the chip under test;

[0021] Step S3: Adjust the lens barrel according to the geometric parameters so that the lens barrel is aligned with the light entrance of the chip under test;

[0022] Step S4: After the lens barrel is aligned with the light entrance of the chip under test, the LED light source is turned on;

[0023] Step S5: Adjust the fiber optic adjustment stage according to the distance between the optical inlet and the input fiber, so that the input fiber is aligned with the optical inlet of the chip under test.

[0024] Step S6: If the input optical fiber is aligned with the light inlet of the chip under test, adjust the lens barrel to align with the light outlet of the chip under test.

[0025] Step S7: After the lens barrel is aligned with the light output port of the chip under test, the LED light source is turned off, and the beam splitter is cut out of the lens barrel.

[0026] Step S8: Turn on the external laser connected to the input fiber optic cable;

[0027] Step S9: Adjust the fiber optic adjustment stage according to the preset displacement to move the output fiber within the preset range, and record the optical power of the light output port of the chip under test corresponding to each position of the output fiber.

[0028] Step S10: Compare the optical power of the output port of the chip under test corresponding to each output fiber position, and record the output fiber position with the highest optical power.

[0029] Step S11: Reduce the preset displacement size according to the preset strategy. Starting from the position of the output fiber with the highest optical power in the previous movement, adjust the fiber adjustment table according to the reduced preset displacement size, and repeat steps S9-S10 until the distance between the output fiber position with the highest optical power in the previous movement and the output fiber position with the highest optical power in the next movement is less than the set threshold.

[0030] Furthermore, the control method for the integrated photonic chip coupling system also includes:

[0031] The coupling loss of the sample under test is obtained by measuring the output power of the external laser and the maximum optical power obtained by the beam receiver.

[0032] Furthermore, the acquisition of the geometric parameters of the chip under test specifically involves:

[0033] If the chip under test is an unpackaged chip, calculate the relative distances between the light inlet and light outlet of the chip under test and the first reference point of the chip under test;

[0034] If the chip under test is a packaged chip, calculate the relative distances between the light inlet and light outlet of the chip under test and the second reference point of the chip sample stage;

[0035] The geometric parameters of the chip under test are obtained based on the thickness of the chip under test and the relative distance.

[0036] Furthermore, if the chip under test is an unpackaged chip, when adjusting the lens barrel to align it with the light entrance of the chip under test, the distance the lens barrel needs to move is:

[0037] ,

[0038] in, Let be the first distance the microscope tube moves in the x-axis direction. For the width of the chip sample stage, This represents the relative distance between the chip's optical inlet and the first reference point along the x-axis. Let be the first distance the lens barrel moves in the y-axis direction. The length of the chip sample stage. This represents the relative distance between the chip's optical inlet and the first reference point along the y-axis. Let be the first distance the microscope tube moves in the z-axis direction. Chip thickness;

[0039] When the lens barrel is aligned with the light output port of the chip under test, the movement distance of the lens barrel adjustment is:

[0040] ,

[0041] in, This represents the second distance the microscope tube moves in the x-axis direction. For the width of the chip sample stage, This represents the relative distance between the chip's light output port and the first reference point along the x-axis. This represents the second distance the microscope tube moves in the y-axis direction. The length of the chip sample stage. This represents the relative distance between the chip's light output port and the first reference point along the y-axis. This represents the second movement distance of the microscope tube in the z-axis direction. Chip thickness;

[0042] If the chip under test is a packaged chip, the screw hole at the lower left of the flat plate is taken as the second reference point. When the lens barrel is adjusted to align with the light entrance of the chip under test, the movement distance of the lens barrel adjustment is:

[0043] ,

[0044] in, Let be the first distance the microscope tube moves in the x-axis direction. This represents the width between two screw holes along the x-axis on the flat plate. This represents the relative distance between the chip's optical inlet and the second reference point along the x-axis. Let be the first distance the lens barrel moves in the y-axis direction. This is the length between two screw holes along the y-axis on the flat plate. This represents the relative distance between the chip's optical inlet and the second reference point along the y-axis. Let be the first distance the microscope tube moves in the z-axis direction. Chip thickness;

[0045] When the lens barrel is aligned with the light output port of the chip under test, the movement distance of the lens barrel adjustment is:

[0046] ,

[0047] in, This represents the second distance the microscope tube moves in the x-axis direction. This represents the width between two screw holes along the x-axis on the flat plate. This represents the relative distance between the chip's light output port and the second reference point along the x-axis. This represents the second distance the microscope tube moves in the y-axis direction. This is the length between two screw holes along the y-axis on the flat plate. This represents the relative distance between the chip's light output port and the second reference point along the y-axis. This represents the second movement distance of the microscope tube in the z-axis direction. This refers to the chip thickness.

[0048] Thirdly, the present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the control method for the integrated photonics chip coupling system according to any one of the second aspects.

[0049] Fourthly, the present invention also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, it executes the control method of the integrated photonics chip coupling system described in any one of the second aspects.

[0050] The beneficial effects of adopting the above technical solution are as follows: In this embodiment, the coupling alignment of the chip under test (DUT) can be achieved using a beam splitter, an LED light source, and a single input fiber connected to an external laser. This allows photonic chip devices with partial spatial light output to be free from the limitation of two fiber couplers, achieving a more optimized coupling system setup. Alignment between the fiber and the DUT is achieved by adjusting the position of the LED illumination and the DUT's light inlet. Furthermore, adjusting the position of the input fiber helps find the optimal coupling point between the DUT and the input fiber, improving the efficiency of determining the optimal coupling point for the DUT. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below.

[0052] Figure 1 This is a schematic diagram of an integrated photonics chip coupling system in one embodiment of this application;

[0053] Figure 2 This is a schematic diagram of the chip sample stage in one embodiment of this application;

[0054] Figure 3 This is a schematic diagram of the internal structure of the lens barrel in one embodiment of this application;

[0055] Figure 4This is a schematic diagram of a control method for an integrated photonics chip coupling system in one embodiment of this application;

[0056] Figure 5 This is a schematic diagram of the light spot received by the beam receiver from the output port of the chip under test in one embodiment of this application. Detailed Implementation

[0057] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. To describe the present invention in more detail, the integrated photonics chip coupling system and its control method provided by the present invention will be specifically described below with reference to the accompanying drawings.

[0058] Unless otherwise defined, the technical or scientific terms used in this application shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms "an," "a," or "the" do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms "comprising" or "including" mean that the preceding element or object encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The terms "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up," "down," "left," "right," etc., are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0059] As attached Figure 1 The schematic diagram of the integrated photonic chip coupling system shown includes a chip sample stage 100, a beam receiver 300 connected to a lens tube 200, an input optical fiber 400, and an optical fiber adjustment stage 500.

[0060] The chip sample stage 100 is used to place the chip under test, the beam receiver 300 is located on the light output port side of the chip under test, the input optical fiber 400 and the optical fiber adjustment stage 500 are located on the light input port side of the chip under test, and the input optical fiber is fixed on the optical fiber adjustment stage.

[0061] Among them, as attached Figure 2 The schematic diagram shown is of a chip sample stage, and a sample stage adjustment structure is provided on one side of the chip sample stage 100.

[0062] The sample stage adjustment structure includes a flat plate 101 that fits into the chip sample stage, a base 102 for fixing the flat plate, and an L-shaped tray 103 for placing the chip sample stage.

[0063] The four corners of the plate 101 are provided with screw holes 104 for fixing the packaged chip. The distance between any two screw holes is greater than the length of the chip sample stage edge parallel to them.

[0064] The L-shaped tray 103 and the chip sample stage 100 are located on the same side of the flat plate 101, and the height of the L-shaped tray is lower than the height of the chip sample stage.

[0065] The chip sample stage is provided with a vacuum adsorption hole 105 for adsorbing unpackaged chips.

[0066] The L-shaped tray mentioned above can help fix the sample stage and provide a reference point for adjusting the position of the unpackaged chip. At the same time, the height of the L-shaped tray is lower than the height of the sample stage, which can ensure that the circuit board is tightly attached to the surface of the sample stage after it is fixed.

[0067] It should be noted that the packaged chip is attached to the printed circuit board, and the printed circuit board is fixed to the chip sample stage through screw holes, so that the packaged chip is also fixed on the chip sample stage.

[0068] In this embodiment, the width of the chip sample stage can be set to 20mm, the length of the chip sample stage can be set to 20mm, the distance between the two screw holes on the plate along the y-axis direction is set to 50mm, and the distance between the two screw holes on the plate along the x-axis direction is set to 50mm.

[0069] Furthermore, in conjunction with the appendix Figure 3 As shown, the specific configuration of the internal structure of the lens barrel 200 is as follows:

[0070] Along the direction from the chip under test to the beam receiver, a microscope objective 201, a beam splitter 202, and a first lens 205 are sequentially arranged on the main optical axis of the microscope tube.

[0071] The lens barrel is provided with a second lens 203 in the direction perpendicular to the principal optical axis.

[0072] After the surface of the chip under test is imaged, the beam receiver observes the light field distribution on the surface of the chip under test through the microscope tube. In this embodiment, the magnification of the microscope objective 201 can be set to 10x (for use with a lens with f=200), the focal length f1 of the first lens 205 is set to 300mm, and the focal length f2 of the second lens 203 is set to 50mm.

[0073] Furthermore, the integrated photonic chip coupling system is also equipped with an LED light source 204;

[0074] The LED light source 204 is used to input an external light source through the second lens to the beam splitter, and finally reflect it onto the chip under test. When the LED light source is working, the incident light from the LED light source passes through the second lens 203 and the beam splitter 202 in sequence, and the input light falls on the chip under test. Then, through the reflection of the chip under test, the measurement light falls on the beam receiver 300 along the main optical axis.

[0075] It should be noted that when the LED light source 204 is not working, the beam splitter 202 inside the lens barrel can cut out of the optical path structure of the lens barrel through the rotating structure or movable structure inside the lens barrel.

[0076] Based on the above-mentioned integrated photonics chip coupling system, the control method for the integrated photonics chip coupling system includes the following steps:

[0077] Step S1: Fix the chip under test onto the chip sample stage;

[0078] Step S2: Obtain the geometric parameters of the chip under test;

[0079] Step S3: Adjust the lens barrel according to the geometric parameters so that the lens barrel is aligned with the light entrance of the chip under test;

[0080] Step S4: After the lens barrel is aligned with the light entrance of the chip under test, the LED light source is turned on;

[0081] Step S5: Adjust the fiber optic adjustment stage according to the distance between the optical inlet and the input fiber, so that the input fiber is aligned with the optical inlet of the chip under test.

[0082] Step S6: If the input optical fiber is aligned with the light inlet of the chip under test, adjust the lens barrel to align with the light outlet of the chip under test.

[0083] Step S7: After the lens barrel is aligned with the light output port of the chip under test, the LED light source is turned off, and the beam splitter is cut out of the lens barrel.

[0084] Step S8: Turn on the external laser connected to the input fiber optic cable;

[0085] Step S9: Adjust the fiber optic adjustment stage according to the preset displacement to move the output fiber within the preset range, and record the optical power of the light output port of the chip under test corresponding to each position of the output fiber.

[0086] Step S10: Compare the optical power of the output port of the chip under test corresponding to each output fiber position, and record the output fiber position with the highest optical power.

[0087] Step S11: Reduce the preset displacement size according to the preset strategy. Starting from the position of the output fiber with the highest optical power in the previous movement, adjust the fiber adjustment table according to the reduced preset displacement size, and repeat steps S9-S10 until the distance between the output fiber position with the highest optical power in the previous movement and the output fiber position with the highest optical power in the next movement is less than the set threshold.

[0088] It should be noted that, in the process of moving the input optical fiber in this embodiment, in order to avoid direct collision between the input optical fiber and the chip under test, the direction of movement of the input optical fiber is different for different coupling methods (including horizontal coupling and vertical coupling). When the chip under test is horizontally coupled, the input optical fiber only moves in the x-axis and y-axis directions; when the chip under test is vertically coupled, the input optical fiber only moves in the x-axis and z-axis directions.

[0089] Furthermore, the control method for the integrated photonic chip coupling system also includes:

[0090] The coupling loss of the sample under test is obtained by measuring the output power of the external laser and the maximum optical power obtained by the beam receiver.

[0091] Among them, combined with the appendix Figure 5 The schematic diagram of the received beam receiver shown illustrates the calculation of optical power:

[0092] When the lens tube moves to the position corresponding to the light output port of the chip under test, the light spot of the light output port of the chip under test falls on the center of the beam receiver;

[0093] The optical power of the chip under test's output port is calculated based on a defined area at the center of the beam receiver. In other words, as shown in the attached diagram... Figure 5 The optical power received within the defined range at the center of the beam receiver in the frame is the optical power corresponding to the output port of the chip under test.

[0094] Furthermore, the acquisition of the geometric parameters of the chip under test specifically involves:

[0095] If the chip under test is an unpackaged chip, calculate the relative distances between the light inlet and light outlet of the chip under test and the first reference point of the chip under test;

[0096] If the chip under test is a packaged chip, calculate the relative distances between the light inlet and light outlet of the chip under test and the second reference point of the chip sample stage;

[0097] The geometric parameters of the chip under test are obtained based on the thickness of the chip under test and the relative distance.

[0098] Furthermore, if the chip under test is an unpackaged chip, the lower left corner of the chip under test is taken as the first reference point. When the lens barrel is adjusted to align with the light entrance of the chip under test, the distance the lens barrel needs to move is:

[0099] ,

[0100] in, Let be the first distance the microscope tube moves in the x-axis direction. For the width of the chip sample stage, This represents the relative distance between the chip's optical inlet and the first reference point along the x-axis. Let be the first distance the lens barrel moves in the y-axis direction. The length of the chip sample stage. This represents the relative distance between the chip's optical inlet and the first reference point along the y-axis. Let be the first distance the microscope tube moves in the z-axis direction. This refers to the chip thickness.

[0101] When the lens barrel is aligned with the light output port of the chip under test, the movement distance of the lens barrel adjustment is:

[0102] ,

[0103] in, This represents the second distance the microscope tube moves in the x-axis direction. For the width of the chip sample stage, This represents the relative distance between the chip's light output port and the first reference point along the x-axis. This represents the second distance the microscope tube moves in the y-axis direction. The length of the chip sample stage. This represents the relative distance between the chip's light output port and the first reference point along the y-axis. This represents the second movement distance of the microscope tube in the z-axis direction. This refers to the chip thickness.

[0104] If the chip under test is a packaged chip, the screw hole at the lower left of the flat plate is taken as the second reference point. When the lens barrel is adjusted to align with the light entrance of the chip under test, the movement distance of the lens barrel adjustment is:

[0105] ,

[0106] in, Let be the first distance the microscope tube moves in the x-axis direction. This represents the width between two screw holes along the x-axis on the flat plate. This represents the relative distance between the chip's optical inlet and the second reference point along the x-axis. Let be the first distance the lens barrel moves in the y-axis direction. This is the length between two screw holes along the y-axis on the flat plate. This represents the relative distance between the chip's optical inlet and the second reference point along the y-axis. Let be the first distance the microscope tube moves in the z-axis direction. This refers to the chip thickness.

[0107] When the lens barrel is aligned with the light output port of the chip under test, the movement distance of the lens barrel adjustment is:

[0108] ,

[0109] in, This represents the second distance the microscope tube moves in the x-axis direction. This represents the width between two screw holes along the x-axis on the flat plate. This represents the relative distance between the chip's light output port and the second reference point along the x-axis. This represents the second distance the microscope tube moves in the y-axis direction. This is the length between two screw holes along the y-axis on the flat plate. This represents the relative distance between the chip's light output port and the second reference point along the y-axis. This represents the second movement distance of the microscope tube in the z-axis direction. This refers to the chip thickness.

[0110] It should be understood that, although attached Figure 4 The steps in the flowchart are shown sequentially according to the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order requirement for the execution of these steps, and they can be executed in other orders. Furthermore, [the following is a list of steps]. Figure 4 At least some of the steps in the process may include multiple sub-steps or sub-stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0111] In one embodiment, the present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the control method for the integrated photonics chip coupling system described above.

[0112] The computer-readable storage medium may be an electronic storage device such as flash memory, EEPROM (Electrically Erasable Programmable Read-Only Memory), EPROM (Erasable Programmable Read-Only Memory), hard disk, or ROM. Optionally, the computer-readable storage medium includes a non-transitory computer-readable storage medium. The computer-readable storage medium has storage space for program code that performs any of the method steps described above. This program code can be read from or written to one or more computer program products, and the program code may be compressed in an appropriate form.

[0113] In one embodiment, the present invention provides a computer device including a memory and a processor, the memory storing a computer program, and the processor executing the computer program to perform the control method of the integrated photonics chip coupling system described above.

[0114] The computer device includes a memory, a processor, and one or more computer programs, wherein the one or more computer programs can be stored in the memory and configured to be executed by one or more processors, and the one or more application programs are configured to perform the control method of the integrated photonics chip coupling system described above.

[0115] A processor may include one or more processing cores. The processor connects to various parts of the computer device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in memory, and by calling data stored in memory. Optionally, the processor may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor may integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the displayed content; and the modem handles wireless communication. It is understood that the modem may also be implemented separately as a communication chip, without being integrated into the processor.

[0116] The memory may include random access memory (RAM) or read-only memory (ROM). The memory can be used to store instructions, programs, code, code sets, or instruction sets. The memory may include a program storage area and a data storage area. The program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (such as touch functionality, sound playback functionality, image playback functionality, etc.), and instructions for implementing the various method embodiments described above. The data storage area may also store data created by the terminal device during use.

[0117] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A control method for an integrated photonic chip coupling system, the control method being applied to the integrated photonic chip coupling system, characterized in that, The integrated photonic chip coupling system includes a chip sample stage, a beam receiver connected to a lens tube, an input optical fiber, and an optical fiber adjustment stage. The chip sample stage is used to place the chip to be tested. The beam receiver is located on one side of the light output port of the chip under test; The input optical fiber and the optical fiber adjustment stage are set on the optical inlet side of the chip under test, and the input optical fiber is fixed on the optical fiber adjustment stage. The control method includes: Step S1: Fix the chip under test onto the chip sample stage; Step S2: Obtain the geometric parameters of the chip under test; Step S3: Adjust the lens barrel according to the geometric parameters so that the lens barrel is aligned with the light entrance of the chip under test; Step S4: After the lens barrel is aligned with the light entrance of the chip under test, the LED light source is turned on; Step S5: Adjust the fiber optic adjustment stage according to the distance between the optical inlet and the input fiber, so that the input fiber is aligned with the optical inlet of the chip under test. Step S6: If the input optical fiber is aligned with the light inlet of the chip under test, adjust the lens barrel to align with the light outlet of the chip under test. Step S7: After the lens barrel is aligned with the light output port of the chip under test, the LED light source is turned off, and the beam splitter is cut out of the lens barrel. Step S8: Turn on the external laser connected to the input fiber optic cable; Step S9: Adjust the fiber optic adjustment stage according to the preset displacement to move the output fiber within the preset range, and record the optical power of the light output port of the chip under test corresponding to each position of the output fiber. Step S10: Compare the optical power of the output port of the chip under test corresponding to each output fiber position, and record the output fiber position with the highest optical power. Step S11: Reduce the preset displacement size according to the preset strategy. Starting from the position of the output fiber with the highest optical power in the previous movement, adjust the fiber adjustment table according to the reduced preset displacement size. Repeat steps S9-S10 until the distance between the position of the output fiber with the highest optical power in the previous movement and the position of the output fiber with the highest optical power in the next movement is less than the set threshold. When the chip under test is horizontally coupled, the input optical fiber moves only in the x and y axes; when the chip under test is vertically coupled, the input optical fiber moves only in the x and z axes.

2. The control method for the integrated photonic chip coupling system as described in claim 1, characterized in that, A sample stage adjustment structure is provided on one side of the chip sample stage; The sample stage adjustment structure includes a flat plate that fits against the chip sample stage and an L-shaped tray for placing the chip sample stage. The plate has screw holes at each of its four corners for fixing the packaged chip. The distance between any two screw holes is greater than the length of the chip sample stage edge that is parallel to them. The L-shaped tray and the chip sample stage are located on the same side of the flat plate, and the height of the L-shaped tray is lower than the height of the chip sample stage. The chip sample stage is equipped with vacuum adsorption holes for adsorbing unpackaged chips.

3. The control method for the integrated photonic chip coupling system as described in claim 2, characterized in that, Along the direction from the chip under test to the beam receiver, a microscope objective, a beam splitter, and a first lens are sequentially arranged on the main optical axis of the microscope tube. The lens barrel is provided with a second lens in sequence along the direction perpendicular to the principal optical axis.

4. The control method for the integrated photonic chip coupling system as described in claim 3, characterized in that, The integrated photonics chip coupling system is also equipped with an LED light source; The LED light source is used to input an external light source through a second lens to a beam splitter, and finally reflect it onto the chip under test.

5. The control method for the integrated photonic chip coupling system as described in claim 1, characterized in that, Also includes: The coupling loss of the sample under test is obtained by measuring the maximum optical power of the external laser and the maximum optical power of the beam receiver.

6. The control method for the integrated photonic chip coupling system as described in claim 1, characterized in that, The acquisition of the geometric parameters of the chip under test specifically involves: If the chip under test is an unpackaged chip, calculate the relative distances between the light inlet and light outlet of the chip under test and the first reference point of the chip under test; If the chip under test is a packaged chip, calculate the relative distances between the light inlet and light outlet of the chip under test and the second reference point of the chip sample stage; The geometric parameters of the chip under test are obtained based on the thickness of the chip under test and the relative distance.

7. The control method for the integrated photonic chip coupling system as described in claim 6, characterized in that, If the chip under test is an unpackaged chip, when adjusting the lens barrel to align it with the light inlet of the chip under test, the distance the lens barrel needs to move is: ， in, Let be the first distance the microscope tube moves in the x-axis direction. For the width of the chip sample stage, This represents the relative distance between the chip's optical inlet and the first reference point along the x-axis. Let be the first distance the lens barrel moves in the y-axis direction. The length of the chip sample stage. This represents the relative distance between the chip's optical inlet and the first reference point along the y-axis. Let be the first distance the microscope tube moves in the z-axis direction. Chip thickness; When the lens barrel is aligned with the light output port of the chip under test, the movement distance of the lens barrel adjustment is: ， in, This represents the second distance the microscope tube moves in the x-axis direction. For the width of the chip sample stage, This represents the relative distance between the chip's light output port and the first reference point along the x-axis. This represents the second distance the microscope tube moves in the y-axis direction. The length of the chip sample stage. This represents the relative distance between the chip's light output port and the first reference point along the y-axis. This represents the second movement distance of the microscope tube in the z-axis direction. Chip thickness; If the chip under test is a packaged chip, the screw hole at the lower left of the flat plate is taken as the second reference point. When the lens barrel is adjusted to align with the light entrance of the chip under test, the movement distance of the lens barrel adjustment is: ， in, Let be the first distance the microscope tube moves in the x-axis direction. This represents the width between two screw holes along the x-axis on the flat plate. This represents the relative distance between the chip's optical inlet and the second reference point along the x-axis. Let be the first distance the lens barrel moves in the y-axis direction. This is the length between two screw holes along the y-axis on the flat plate. This represents the relative distance between the chip's optical inlet and the second reference point along the y-axis. Let be the first distance the microscope tube moves in the z-axis direction. Chip thickness; When the lens barrel is aligned with the light output port of the chip under test, the movement distance of the lens barrel adjustment is: ， in, This represents the second distance the microscope tube moves in the x-axis direction. This represents the width between two screw holes along the x-axis on the flat plate. This represents the relative distance between the chip's light output port and the second reference point along the x-axis. This represents the second distance the microscope tube moves in the y-axis direction. This is the length between two screw holes along the y-axis on the flat plate. This represents the relative distance between the chip's light output port and the second reference point along the y-axis. This represents the second movement distance of the microscope tube in the z-axis direction. This refers to the chip thickness.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the control method for the integrated photonics chip coupling system according to any one of claims 1-7.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it performs the control method of the integrated photonics chip coupling system according to any one of claims 1-7.

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