Two-level inversion device capable of realizing common-mode rejection
By introducing a common-mode return capacitor network and an inverter-side filter inductor module into the inverter, a low-impedance path is formed to guide common-mode noise energy back to the DC bus, solving the problems of large size and high cost of existing common-mode suppression devices, and realizing internal circulation of common-mode noise and improving system efficiency.
Patent Information
- Application Number
- CN202511944812.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-22
- Publication Date
- 2026-02-10
AI Technical Summary
Existing common-mode suppression devices suffer from problems such as large size, high cost, energy dissipation, high switching losses, complex design, and high cost, and cannot effectively suppress common-mode voltage.
The system employs a three-phase two-level inverter, two-level bus capacitors, a DC filter module, a high-frequency common-mode current active return channel, and an AC filter module. Through the common-mode return capacitor network and the inverter-side filter inductor module, a low-impedance path is formed to guide the common-mode current back to the DC bus, thereby achieving internal circulation of common-mode noise energy.
It effectively suppresses common-mode noise, prevents common-mode current from flowing to the load and external ground, reduces EMI interference, improves system efficiency, and reduces cost and size.
Smart Images

Figure CN121508340A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of inverter technology, and more particularly to a two-level inverter device capable of common-mode suppression. Background Technology
[0002] Common-mode rejection is used to distinguish between "signal" and "noise". Differential technology is used to cancel out the same interference imposed on two lines by the external environment, and only retain the meaningful voltage difference between the two lines. This enables reliable and accurate signal transmission and measurement in the electrically "noisy" real world.
[0003] There are four main types of traditional common-mode suppression devices and methods: 1) Passive filtering using a common-mode inductor + Y-capacitor: While this method effectively suppresses common-mode voltage, the filter is large, costly, and energy is dissipated. 2) Active common-mode cancellers: An additional magnetizing inductor is added to the common-mode inductor to cancel the common-mode voltage generated by the two-level voltage source inverter. This method suffers from large filter size, complex system, high cost, and the need for an H-bridge for common-mode voltage cancellation. 3) Software strategies such as zero-vector modulation and adjacent-vector modulation: While this method reduces the common-mode voltage amplitude at the source, it comes at the cost of increased switching losses, reduced DC voltage utilization, and increased control complexity, and it cannot keep the common-mode voltage within a low range. 4) Symmetrical topology design: Using interleaved parallel control, the common-mode voltage is balanced using the phase cancellation principle. This method, being a symmetrical design, requires a large number of switches, resulting in high cost and increased design difficulty. Furthermore, engineering applications suffer from dead zones, switching speeds, issues related to the symmetrical topology's operating state, and modulation change response speed, thus failing to completely cancel the common-mode voltage.
[0004] Therefore, a new solution is needed. Summary of the Invention
[0005] According to one aspect of the present invention, a two-level inverter device capable of common-mode suppression is provided, comprising a three-phase two-level inverter, a two-level bus capacitor, a DC filter module, a high-frequency common-mode current active return channel, and an AC filter module. The DC filter module and the two-level bus capacitor are respectively connected in parallel at both ends of the DC bus. The first and second ends of the three-phase two-level inverter are connected in parallel at both ends of the DC bus. The high-frequency common-mode current active return channel is connected between the third end of the three-phase two-level inverter and the DC bus. The high-frequency common-mode current active return channel includes an inverter-side filter inductor module and a common-mode return capacitor network. The common-mode return capacitor network is connected in series with the inverter-side filter inductor module. The AC filter module is connected to the third end of the three-phase two-level inverter via the inverter-side filter inductor module.
[0006] The two-level inverter device with common-mode suppression provided by the present invention further includes a first DC bus capacitor and a second DC bus capacitor. The first end of the first DC bus capacitor is connected to the positive end of the DC bus. The second end of the first DC bus capacitor is connected to the first end of the common-mode return capacitor network and the first end of the second DC bus capacitor. The second end of the second DC bus capacitor is connected to the negative end of the DC bus. The second end of the common-mode return capacitor network is connected to the first end of the inverter-side filter inductor module. The second end of the inverter-side filter inductor module is connected to the third end of the three-phase two-level inverter.
[0007] In the two-level inverter device with common-mode suppression provided by the present invention, the common-mode return capacitor network includes N return capacitors, the inverter-side filter inductor module includes N inverter-side filter inductors, the three-phase two-level inverter includes N bridge arms, the first ends of the N return capacitors are connected to the second ends of the first DC bus capacitor, the second ends of the N return capacitors are respectively connected to the first ends of the N inverter-side filter inductors, and the second ends of the N inverter-side filter inductors are respectively connected to the midpoints of the N bridge arms of the three-phase two-level inverter.
[0008] In the two-level inverter device with common-mode suppression provided by the present invention, the rated voltage of the return capacitor is higher than the first preset voltage value V1. V1=1.2 * (Vdc / 2 + V_ripple), Wherein, Vdc / 2 is the DC operating voltage of the first DC bus capacitor and the second DC bus capacitor, and V_ripple is the peak value of the high-frequency ripple voltage.
[0009] In the two-level inverter device with common-mode suppression provided by the present invention, the first end of the common-mode return capacitor network is connected to the positive end of the DC bus, the second end of the common-mode return capacitor network is connected to the negative end of the DC bus, the third end of the common-mode return capacitor network is connected to the first end of the inverter-side filter inductor module, and the second end of the inverter-side filter inductor module is connected to the third end of the three-phase two-level inverter.
[0010] In the two-level inverter device with common-mode suppression provided by the present invention, the common-mode return capacitor network includes N return capacitor branches, each of which includes a first return capacitor and a second return capacitor connected in series. The inverter-side filter inductor module includes N inverter-side filter inductors. The three-phase two-level inverter includes N bridge arms. The first ends of the N return capacitor branches are commonly connected to the positive end of the DC bus. The second ends of the N return capacitor branches are commonly connected to the negative end of the DC bus. The third ends of the N return capacitor branches are respectively connected to the first ends of the N inverter-side filter inductors. The second ends of the N inverter-side filter inductors are respectively connected to the midpoints of the N bridge arms of the three-phase two-level inverter.
[0011] The two-level inverter device with common-mode suppression provided by the present invention also includes a load-side inductor module, which is connected between the AC filter module and the inverter-side filter inductor module.
[0012] In the two-level inverter device with common-mode suppression provided by the present invention, the AC filter module includes an AC-side common-mode inductor module and an AC-side Y-capacitor module to ground, wherein the AC-side common-mode inductor module is connected between the load-side inductor module and the AC-side Y-capacitor module to ground.
[0013] In the two-level inverter device with common-mode suppression provided by this invention, the common-mode return capacitor network resonates with the inverter-side filter inductor module, and the resonant frequency f_res is calculated using the following formula. f_res = 1 / (2 * π * sqrt(L1 * Cx)) Where Cx is the capacitance value of the return capacitor in the common-mode return capacitor network, and L1 is the inductance value of the inverter-side filter inductor in the inverter-side filter inductor module.
[0014] In the two-level inverter device with common-mode suppression provided by the present invention, the DC filter module includes a first DC-side common-mode inductor, a first DC-to-ground Y capacitor, a second DC-side common-mode inductor, and a second DC-to-ground Y capacitor. The first end of the first DC-side common-mode inductor is connected to the positive end of the DC bus, and the second end of the first DC-side common-mode inductor is connected to the negative end of the DC bus via the first DC-to-ground Y capacitor, the second DC-to-ground Y capacitor, and the second DC-side common-mode inductor.
[0015] The two-level inverter device implementing the present invention, which enables common-mode suppression, has the following beneficial effects: one end of the common-mode return capacitor network of the present invention is connected to the circuit node between the inverter-side filter inductor module and the load-side inductor module; the other end of the common-mode return capacitor network is connected to the positive terminal of the DC bus, the negative terminal of the DC bus, and the midpoint of the DC bus capacitor to form a common-mode current return path; by introducing the common-mode return capacitor network, the present invention provides a new path with extremely low impedance after the inverter-side filter inductor module. Since the inverter-side filter inductor, load-side inductor, AC-side common-mode inductor, and DC-side common-mode inductor present high impedance to high-frequency common-mode current, while the common-mode return capacitor network in the path presents low impedance, most of the high-frequency common-mode current will be "guided" through the common-mode return capacitor network and flow back to the DC bus, thereby avoiding its flow to the load and external ground; this process realizes the internal circulation of common-mode noise energy, rather than external radiation or dissipation. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort: Figure 1 The diagram shown is a schematic of a two-level inverter device capable of common-mode suppression provided in Embodiment 1 of the present invention; Figure 2 As shown Figure 1 The diagram shows a simplified high-frequency path for a two-level inverter that can achieve common-mode suppression. Figure 3 The diagram shown is a schematic of a two-level inverter device capable of common-mode suppression provided in Embodiment 2 of the present invention; Figure 4 As shown Figure 3 The diagram shows a simplified high-frequency path for a two-level inverter that can achieve common-mode suppression. Figure 5 The results show the test results of the Icm path in the traditional common-mode rejection scheme, where: in (A) and (B), CH1: Ldc common-mode inductor voltage; CH2: bus P to PE voltage; CH3: Lac common-mode inductor voltage; CH4: L2 port to PE voltage; in (C), CH1: Ldc port to PE voltage; CH3: Lac port to PE voltage; Figure 6The following are the test results of the Icm_new path in the common-mode suppression scheme of Example 1, where: in (A) and (B), CH1: Ldc common-mode inductor voltage; CH2: bus P to PE voltage; CH3: Lac common-mode inductor voltage; CH4: L2 port to PE voltage; in (C), CH1: Ldc port to PE voltage; CH3: Lac port to PE voltage; Figure 7 The results shown are the test results of the Icm_new path in the common mode suppression scheme of Example 2, where: in (A) and (B), CH1: Ldc common mode inductor voltage; CH2: bus P to PE voltage; CH3: Lac common mode inductor voltage; CH4: L2 port to PE voltage; in (C), CH1: Ldc port to PE voltage; CH3: Lac port to PE voltage. Detailed Implementation
[0017] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Typical embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
[0019] Example 1 Figure 1 The diagram shown is a schematic of a two-level inverter device capable of common-mode suppression provided in Embodiment 1 of the present invention. Figure 1 As shown, the two-level inverter device capable of common-mode suppression provided in this embodiment includes a three-phase two-level inverter 10, a two-level bus capacitor Cbus, a first DC bus capacitor C1, a second DC bus capacitor C2, a DC filter module 20, a high-frequency common-mode current active return channel, and an AC filter module 30. The high-frequency common-mode current active return channel includes an inverter-side filter inductor module 40 and a common-mode return capacitor network 50. The common-mode return capacitor network includes N return capacitors Cx. The inverter-side filter inductor module 40 includes N inverter-side filter inductors (L1a, L1b, L1c...). The three-phase two-level inverter includes N bridge arms, and each bridge arm includes two switching transistors. For example, Figure 1In the illustrated embodiment, the three-phase two-level inverter is a two-level three-phase four-arm inverter composed of switching transistors Q1~Q8, i.e., N=4. Therefore, the common-mode return capacitor network includes four return capacitors Cx, and the inverter-side filter inductor module 40 includes four inverter-side filter inductors. In other embodiments, the three-phase two-level inverter can also be a two-level three-phase three-arm inverter composed of switching transistors Q1~Q6, i.e., N=3.
[0020] Specifically, in this embodiment, the DC filter module and the two-level bus capacitor are connected in parallel at both ends of the DC bus, the first and second ends of the three-phase two-level inverter are connected in parallel at both ends of the DC bus, and the AC filter module is connected to the third end of the three-phase two-level inverter via the inverter-side filter inductor module. The first end of the first DC bus capacitor is connected to the positive end of the DC bus, the second end of the first DC bus capacitor is connected to the first end of the common-mode return current capacitor network and the first end of the second DC bus capacitor, and the second end of the second DC bus capacitor is connected to the negative end of the DC bus. The first ends of the N return current capacitors are all connected to the second end of the first DC bus capacitor, the second ends of the N return current capacitors are respectively connected to the first ends of the N inverter-side filter inductors, and the second ends of the N inverter-side filter inductors are respectively connected to the midpoints of the N bridge arms of the three-phase two-level inverter, i.e., the third end of the three-phase two-level inverter.
[0021] Furthermore, in this embodiment, a load-side inductor module 60 (L2a, L2b, L2b...) is also included, connected between the AC filter module 30 and the inverter-side filter inductor module 40. The AC filter module 30 includes an AC-side common-mode inductor module (Lac) and an AC-side Y-capacitor (Cy) module, with the AC-side common-mode inductor module connected between the load-side inductor module and the AC-side Y-capacitor module. The DC filter module 20 includes a first DC-side common-mode inductor Ldc, a first DC-side Y-capacitor C_Py, a second DC-side common-mode inductor Ldc, and a second DC-side Y-capacitor C_Ny. The first end of the first DC-side common-mode inductor is connected to the positive end of the DC bus, and the second end of the first DC-side common-mode inductor is connected to the negative end of the DC bus via the first DC-side Y-capacitor, the second DC-side Y-capacitor, and the second DC-side common-mode inductor.
[0022] In this embodiment, one end of the common-mode return capacitor network is connected to the circuit node between the inverter-side filter inductor module and the load-side inductor module; the other end of the common-mode return capacitor network is connected to the midpoint (O) of the DC bus capacitor to form a common-mode current return path. During high-frequency switching, the switching transistors of a three-phase two-level inverter generate extremely high dv / dt, thereby exciting a common-mode voltage Vcm. This voltage drives the common-mode current Icm to flow. Traditionally, Icm flows to ground through the AC-to-ground parasitic capacitance Cy and the DC-to-ground parasitic capacitances C_Py and C_Ny, forming EMI interference. This invention, by introducing a common-mode return capacitor network, provides a new path Icm_new with extremely low impedance after the inverter-side filter inductor module. Because the inverter-side filter inductor, load-side inductor, AC-side common-mode inductor, and DC-side common-mode inductor all exhibit high impedance to high-frequency common-mode current, while the common-mode return capacitor network along the path exhibits low impedance, the vast majority of high-frequency common-mode current will be "guided" through the common-mode return capacitor network and flow back to the DC bus, thus preventing it from flowing to the load and external ground. This process achieves internal circulation of common-mode noise energy, rather than external radiation or dissipation.
[0023] Furthermore, in this embodiment, the design goal of capacitor Cx is to resonate with the inverter-side filter inductor in the circuit, thereby providing the lowest impedance path in the main common-mode noise frequency range. Therefore, the resonant frequency f_res should be designed according to the frequency range to be filtered, and it is recommended to be slightly higher than the inverter switching frequency f_sw (to avoid affecting the fundamental frequency control), but much lower than the highest frequency f_max that common-mode noise needs to be suppressed (usually 10MHz or 30MHz). The common-mode component generated in the two-level system contains the switching frequency, and the actual design is based on the common-mode component. If it is necessary to filter out the common-mode component of the switching frequency, the resonant frequency f_res can be designed to be within 1 / 2f_sw. That is, the common-mode return capacitor network resonates with the inverter-side filter inductor module, and the resonant frequency f_res is calculated by the following formula. f_res = 1 / (2 * π * sqrt(L1 * Cx)) Where Cx is the capacitance value of the return capacitor in the common-mode return capacitor network, and L1 is the inductance value of the inverter-side filter inductor in the inverter-side filter inductor module.
[0024] Furthermore, the principle of impedance calculation is that the impedance Z_path of the return path reaches its minimum near the resonant point. The design goal is to make Z_path much smaller than the traditional path impedance through parasitic capacitance, i.e., within the noise band that needs to be suppressed, Z_path is much smaller than 1 / (2*π*f*Cy). Z_path = 2 * π * f * L1 - 1 / (2 * π * f * Cx).
[0025] Furthermore, the capacitors must be high-frequency capacitors with low parasitic parameters, such as metallized polypropylene film capacitors (MKP), and electrolytic capacitors are prohibited.
[0026] Furthermore, C1 and C2 have a DC operating voltage of Vdc / 2, but the peak value of high-frequency ripple voltage needs to be considered. Capacitors with a rated voltage higher than 1.2 * (Vdc / 2 + V_ripple) should be selected. For the scheme connecting to the P and N points of the bus, the operating voltage is the AC voltage plus the bus voltage bias, and the voltage peak value needs to be considered. That is, the rated voltage of the return capacitor is higher than the first preset voltage value V1, V1 = 1.2 * (Vdc / 2 + V_ripple), where Vdc / 2 is the DC operating voltage of the first DC bus capacitor and the second DC bus capacitor, and V_ripple is the peak value of the high-frequency ripple voltage.
[0027] Furthermore, the RMS current Icm_rms flowing through the capacitor needs to be calculated to ensure that it is less than the capacitor's rated ripple current. Icm_rms can be obtained through measurement or simulation.
[0028] Example 2 Figure 3 The diagram shown is a schematic of a two-level inverter device capable of common-mode suppression provided in Embodiment 2 of the present invention. Figure 3 As shown, the difference between this embodiment and Embodiment 1 is that in this embodiment, one end of the common-mode return capacitor network is connected to the positive terminal (P) and negative terminal (N) between the inverter-side filter inductor module and the load-side inductor module. That is, the two-level inverter device capable of common-mode suppression provided in this embodiment includes a three-phase two-level inverter 10, a two-level bus capacitor Cbus, a DC filter module 20, a high-frequency common-mode current active return channel, and an AC filter module 30. The high-frequency common-mode current active return channel includes an inverter-side filter inductor module 40 and a common-mode return capacitor network 50. The common-mode return capacitor network includes N return capacitor branches, each of which includes a first return capacitor and a second return capacitor connected in series. The inverter-side filter inductor module 40 includes N inverter-side filter inductors (L1a, L1b, L1c...). The three-phase two-level inverter includes N bridge arms, each of which includes two switching transistors.
[0029] Specifically, in this embodiment, the DC filter module and the two-level bus capacitor are connected in parallel at both ends of the DC bus, the first and second ends of the three-phase two-level inverter are connected in parallel at both ends of the DC bus, the AC filter module is connected to the third end of the three-phase two-level inverter via the inverter-side filter inductor module, the first ends of the N return capacitor branches are connected to the positive end of the DC bus, the second ends of the N return capacitor branches are connected to the negative end of the DC bus, the third ends of the N return capacitor branches are respectively connected to the first ends of the N inverter-side filter inductors, and the second ends of the N inverter-side filter inductors are respectively connected to the midpoints of the N bridge arms of the three-phase two-level inverter.
[0030] In this embodiment, one end of the common-mode return capacitor network is connected to the circuit node between the inverter-side filter inductor module and the load-side inductor module; the other end of the common-mode return capacitor network is connected to the positive terminal (P) and negative terminal (N) of the DC bus to form a return path for the common-mode current.
[0031] Figure 2 As shown Figure 1 The diagram shows a simplified high-frequency path of a two-level inverter that can achieve common-mode suppression. Figure 4 As shown Figure 3 The diagram shows a simplified high-frequency path for a two-level inverter that enables common-mode suppression. (See attached diagram.) Figure 2 and Figure 4 As shown, the common-mode noise source (Vcm) represents the high-frequency, high-dv / dt common-mode voltage generated by the operation of the inverter bridge switching transistors. It is the origin of the entire common-mode interference.
[0032] Traditional common-mode current path (Icm): Path: Noise source → Filters L1, L2, Lac → Load (capacitor to ground Cy) → Ground (PE); Noise source → Filter Ldc → Capacitors to ground C_Py, C_Ny → Ground (PE). This path current is a major cause of electromagnetic interference (EMI) and insulation withstand voltage problems. Its impedance is mainly determined by L1, L2, Lac, Ldc, the load, and each Cy to ground. Common-mode current will follow the path of least impedance in the system, easily generating EMI interference at critical locations in the system.
[0033] The common-mode return path (Icm_new) of the two-level inverter device that can achieve common-mode suppression provided by this invention is as follows: like Figure 2 As shown, the path in the two-level inverter device that can achieve common-mode suppression provided in Embodiment 1 is: noise source → filter L1 → common-mode return capacitor network (Cx) → DC bus midpoint → return to noise source; like Figure 4As shown, the path in the two-level inverter device that can achieve common-mode suppression provided in Embodiment 2 is: noise source → filter L1 → common-mode return capacitor network (Cx) → DC bus → return noise source.
[0034] like Figure 2 and 4 As shown, this invention introduces a low-impedance capacitive path (Cx) and, despite the obstruction of the inverter inductor L1, load-side inductor L2, common-mode inductors Lac and Ldc, AC / DC output circuit impedance, and load impedance, provides a preferred internal flow path for high-frequency common-mode current, enabling internal circulation and recovery of common-mode energy within the system. This invention's independent Cx network does not affect normal LCL filters and has no impact on system control or software algorithms, allowing for independent modification, upgrading, and optimization of existing products and equipment.
[0035] To enable those skilled in the art to fully understand and implement the present invention, the technical effects of the present invention are described in detail below with reference to comparative experimental data. Relevant test data are as follows: Figure 5-7 As shown in Table 1, the relevant test results and data analysis are presented below. It can be seen that, as... Figure 5 As shown, the traditional solution can effectively suppress common-mode signals, with no obvious high-frequency components at the port. The high-frequency common-mode signal is reduced to the two ends of the common-mode inductor. However, this solution results in a large filter size, high cost, and energy dissipation. Figure 6 As shown, in Embodiment 1 of the present invention, the high-frequency common-mode component is basically not present at the AC / DC ports, the high-frequency common-mode is effectively clamped, and the common-mode follows the Icm_new path, thus greatly reducing the common-mode content of the system. Figure 7 As shown, in Embodiment 2 of the present invention, the high-frequency common-mode component is basically not at the AC / DC port, the high-frequency common-mode is effectively clamped, and the common-mode follows the Icm_new path. This path has a lower impedance than the Cx network in Embodiment 1 of the present invention, so that the system common-mode is almost completely absorbed inside, realizing the internal circulation or recovery of energy.
[0036] Table 1 Test Results and Data Analysis
[0037] The two-level inverter device with common-mode suppression provided by this invention has the following advantages: 1. Common-mode noise energy path reconstruction: The traditional approach is "blocking + dissipation" (such as common-mode inductors) or "smaller size + avoidance" (such as modifying the modulation algorithm). The core of this invention lies in "guidance and return". That is, inside the inverter, a low-impedance path is actively constructed at a specific location to guide the common-mode noise energy back to its source (DC bus), so that it forms a loop inside the system, instead of passively allowing it to leak to the outside (through parasitic capacitance to ground) and cause interference.
[0038] 2. Structural Location of the Return Current Path: The extraction point of the path is located "after the inverter bridge arm" and "after the inverter-side filter inductor (L1)". This location is crucial: After the inverter-side filter inductor: This ensures that the current flowing to Cx is controllable by the inverter-side filter inductor (L1), ensuring that the system with added Cx network is not affected by this loop, and no changes are required in control. Before the load-side inductor (L2): This ensures that the return current path is independent of the load side, making the solution insensitive to load changes and more versatile. Even if the system does not have a load-side inductor (L2), the impedance of the Cx network is much smaller than the impedance of the external Y capacitor, thus forcing the high-frequency common-mode current to preferentially flow through the new path.
[0039] 3. The DC bus serves as a "recovery point" for common-mode energy: the end of the return path is connected to the DC bus (P, N, or O point), rather than to ground. This enables internal energy circulation or recovery, rather than simply dissipating it through resistors, which theoretically improves system efficiency.
[0040] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.
[0041] Similarly, it should be understood that, in order to simplify this disclosure and aid in understanding one or more of the various aspects of the invention, in the above description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof. However, this method of disclosure should not be construed as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as reflected in the following claims, inventive aspects lie in fewer than all features of a single foregoing disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into this detailed description, wherein each claim itself is a separate embodiment of the invention.
[0042] Furthermore, those skilled in the art will understand that although some embodiments herein include certain features included in other embodiments but not others, combinations of features from different embodiments are intended to be within the scope of the invention and form different embodiments. For example, in the following claims, any of the claimed embodiments can be used in any combination.
[0043] It should be noted that the above embodiments are illustrative of the invention and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names.
Claims
1. A two-level inverter capable of common-mode suppression, characterized in that, The system includes a three-phase two-level inverter, two-level bus capacitors, a DC filter module, a high-frequency common-mode current active return channel, and an AC filter module. The DC filter module and the two-level bus capacitors are connected in parallel across the two ends of the DC bus. The first and second ends of the three-phase two-level inverter are connected in parallel across the two ends of the DC bus. The high-frequency common-mode current active return channel is connected between the third end of the three-phase two-level inverter and the DC bus. The high-frequency common-mode current active return channel includes an inverter-side filter inductor module and a common-mode return capacitor network. The common-mode return capacitor network is connected in series with the inverter-side filter inductor module. The AC filter module is connected to the third end of the three-phase two-level inverter via the inverter-side filter inductor module.
2. The two-level inverter device capable of common-mode suppression according to claim 1, characterized in that, It also includes a first DC bus capacitor and a second DC bus capacitor. The first end of the first DC bus capacitor is connected to the positive end of the DC bus. The second end of the first DC bus capacitor is connected to the first end of the common-mode return capacitor network and the first end of the second DC bus capacitor. The second end of the second DC bus capacitor is connected to the negative end of the DC bus. The second end of the common-mode return capacitor network is connected to the first end of the inverter-side filter inductor module. The second end of the inverter-side filter inductor module is connected to the third end of the three-phase two-level inverter.
3. The two-level inverter device capable of common-mode suppression according to claim 2, characterized in that, The common-mode return capacitor network includes N return capacitors, the inverter-side filter inductor module includes N inverter-side filter inductors, the three-phase two-level inverter includes N bridge arms, the first ends of the N return capacitors are connected to the second ends of the first DC bus capacitor, the second ends of the N return capacitors are respectively connected to the first ends of the N inverter-side filter inductors, and the second ends of the N inverter-side filter inductors are respectively connected to the midpoints of the N bridge arms of the three-phase two-level inverter.
4. The two-level inverter device capable of common-mode suppression according to claim 3, characterized in that, The rated voltage of the return capacitor is higher than the first preset voltage value V1. V1=1.2 * (Vdc / 2 + V_ripple), Wherein, Vdc / 2 is the DC operating voltage of the first DC bus capacitor and the second DC bus capacitor, and V_ripple is the peak value of the high-frequency ripple voltage.
5. The two-level inverter device capable of common-mode suppression according to claim 1, characterized in that, The first end of the common-mode return capacitor network is connected to the positive end of the DC bus, the second end of the common-mode return capacitor network is connected to the negative end of the DC bus, the third end of the common-mode return capacitor network is connected to the first end of the inverter-side filter inductor module, and the second end of the inverter-side filter inductor module is connected to the third end of the three-phase two-level inverter.
6. The two-level inverter device capable of common-mode suppression according to claim 5, characterized in that, The common-mode return capacitor network includes N return capacitor branches, each of which includes a first return capacitor and a second return capacitor connected in series. The inverter-side filter inductor module includes N inverter-side filter inductors. The three-phase two-level inverter includes N bridge arms. The first ends of the N return capacitor branches are connected to the positive terminal of the DC bus. The second ends of the N return capacitor branches are connected to the negative terminal of the DC bus. The third ends of the N return capacitor branches are respectively connected to the first ends of the N inverter-side filter inductors. The second ends of the N inverter-side filter inductors are respectively connected to the midpoints of the N bridge arms of the three-phase two-level inverter.
7. The two-level inverter device capable of common-mode suppression according to claim 1, characterized in that, It also includes a load-side inductor module, which is connected between the AC filter module and the inverter-side filter inductor module.
8. The two-level inverter device capable of common-mode suppression according to claim 7, characterized in that, The AC filtering module includes an AC-side common-mode inductor module and an AC-side Y-capacitor module to ground, wherein the AC-side common-mode inductor module is connected between the load-side inductor module and the AC-side Y-capacitor module to ground.
9. The two-level inverter device capable of common-mode suppression according to claim 1, characterized in that, The common-mode return capacitor network resonates with the inverter-side filter inductor module, and the resonant frequency f_res is calculated using the following formula. f_res = 1 / (2 * π * sqrt(L1 * Cx)) Where Cx is the capacitance value of the return capacitor in the common-mode return capacitor network, and L1 is the inductance value of the inverter-side filter inductor in the inverter-side filter inductor module.
10. The two-level inverter device capable of common-mode suppression according to claim 1, characterized in that, The DC filter module includes a first DC-side common-mode inductor, a first DC-to-ground Y-capacitor, a second DC-side common-mode inductor, and a second DC-to-ground Y-capacitor. The first end of the first DC-side common-mode inductor is connected to the positive end of the DC bus, and the second end of the first DC-side common-mode inductor is connected to the negative end of the DC bus via the first DC-to-ground Y-capacitor, the second DC-to-ground Y-capacitor, and the second DC-side common-mode inductor.