Sideband signal testing method, device and equipment of chip, medium and product

Abstract

The invention discloses a sideband signal testing method, device and equipment of a chip, a medium and a product. The method comprises the following steps: defining a signal attribute of a sideband signal of a to-be-tested chip; generating a test case and an assertion file according to the template file and the signal attribute; and according to the assertion file and the test case, performing a simulation test on the sideband signal of the chip to be tested to obtain a sideband signal test result. Test cases and assertion files are generated based on the signal attributes of the sideband signals, the signal attributes serve as essential constraints of the test to be decoupled from specific test content, and all the test cases can be regenerated only by updating the attribute files when the design is changed; meanwhile, the assertion file can provide real-time check, and errors can be found more quickly. Compared with manual compiling test and manual inspection for each specific function point, the generation time of the test case is shortened, the attribute file and the template file can be reused, and the test efficiency and quality of the sideband signal are improved.

Description

Technical Field

[0001] This invention relates to the field of chip testing technology, and in particular to a method, apparatus, device, medium, and product for testing the sideband signals of a chip. Background Technology

[0002] In the design of a system-on-chip (SOC), a large number of sideband signals are integrated on-chip. These signals are usually not directly involved in data transmission, but are mainly used for control, status recording, debugging, power management, functional safety and other purposes (such as interrupt, reset, clock enable, low power mode control and error signals).

[0003] Due to the unique and complex functions of sideband signals, two main techniques are commonly used in SOC sideband signal testing: direct testing and sequence-based testing. However, as SOCs continue to expand in scale, the number of sideband signals increases dramatically, and existing technologies face the following problems: both direct testing and sequence-based testing require writing a large number of test cases for specific functions or signal paths, which is time-consuming and results in poor test case reusability, affecting the overall verification efficiency and quality of the SOC. Summary of the Invention

[0004] This invention provides a method, apparatus, device, medium, and product for testing the sideband signals of a chip, in order to solve the problem that existing methods for testing the sideband signals of chips require writing a large number of test cases for specific functions or signal paths, which consumes a lot of time and has poor reusability, thus affecting the overall verification efficiency and quality of the SOC.

[0005] In a first aspect, embodiments of the present invention provide a method for testing the sideband signals of a chip, comprising:

[0006] Define the signal properties of the sideband signals of the chip under test;

[0007] Generate test cases and assertion files based on the template file and the signal attributes;

[0008] The sideband signals of the chip under test are simulated and tested according to the assertion file and the test cases to obtain the sideband signal test results.

[0009] Secondly, embodiments of the present invention provide a sideband signal testing apparatus for a chip, comprising:

[0010] The definition module is used to define the signal attributes of the sideband signals of the chip under test;

[0011] The generation module is used to generate test cases and assertion files based on the template file and the signal attributes;

[0012] The testing module is used to perform simulation tests on the sideband signals of the chip under test according to the assertion file and the test cases, and obtain the sideband signal test results.

[0013] Thirdly, embodiments of the present invention provide an electronic device, the electronic device comprising:

[0014] At least one processor;

[0015] and a memory communicatively connected to the at least one processor;

[0016] The memory stores a computer program that can be executed by the at least one processor, which is then executed by the at least one processor to enable the at least one processor to perform the sideband signal testing method for the chip according to any embodiment of the present invention.

[0017] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing computer instructions, which are used to cause a processor to execute and implement the sideband signal testing method of the chip according to any embodiment of the present invention.

[0018] Fifthly, embodiments of the present invention provide a computer program product including a computer program, which, when executed by a processor, implements the sideband signal testing method of the chip described in any embodiment of the present invention.

[0019] The technical solution of this invention defines the signal attributes of the sideband signals of the chip under test; generates test cases and assertion files based on template files and signal attributes; and performs simulation tests on the sideband signals of the chip under test based on the assertion files and test cases to obtain the sideband signal test results. By generating test cases and assertion files based on the signal attributes of the sideband signals, the signal attributes, as the essential constraints of the test, are decoupled from the specific test content. When the design changes, only the attribute files need to be updated to regenerate all test cases. Simultaneously, the assertion files can provide real-time checks, enabling faster error detection. Compared to manually writing tests and manually checking for each specific function point, this not only shortens the test case generation time but also allows for the reuse of attribute files and template files. This solves the problem in existing testing methods for chip sideband signals, which require writing a large number of test cases for specific functions or signal paths, consuming a lot of time and having poor test case reusability, thus affecting the overall verification efficiency and quality of the SOC. This method has the beneficial effect of improving the testing efficiency and quality of sideband signals.

[0020] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 A flowchart illustrating a chip sideband signal testing method provided in Embodiment 1 of the present invention;

[0023] Figure 2 The flowchart shows a method for testing the sideband signals of a chip according to Embodiment 2 of the present invention.

[0024] Figure 3 This is a schematic diagram of a sideband signal transmission model provided in Embodiment 2 of the present invention;

[0025] Figure 4 This is a schematic diagram of the structure of a chip sideband signal testing device provided in Embodiment 3 of the present invention;

[0026] Figure 5 A schematic diagram of the structure of an electronic device for implementing the chip sideband signal testing method of this embodiment of the invention. Detailed Implementation

[0027] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0028] It should be noted that the terms "first," "second," "third," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in an order other than that illustrated or described. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0029] Example 1

[0030] Figure 1 This is a flowchart of a chip sideband signal testing method provided in Embodiment 1 of the present invention. This embodiment is applicable to testing the functionality of the sideband signals of a chip under test. The method can be executed by a chip sideband signal testing device, which can be implemented in hardware and / or software and can be configured in an electronic device. Figure 1 As shown, the method includes:

[0031] S110, Define the signal attributes of the sideband signals of the chip under test.

[0032] Sideband signals can be considered as signals in chip design that are not part of the core data path but are used to transmit control, status, configuration, or management information. For example, sideband signals may include control signals, status signals, configuration signals, interrupt signals, power management signals, and handshake communication signals. The signal attributes of sideband signals describe their characteristics, and these attributes can support formats such as JSON files and Excel files.

[0033] In this embodiment, the signal attributes of the sideband signal include one or more of the following: signal type, reference clock frequency, maximum transmission time period of the signal's effective value, initial signal value, and register address. The signal type can include single-bit type and register type. Single-bit type sideband signals can include level signals, single-cycle pulse signals, and acknowledge handshake pulse signals. Register type sideband signals can be considered as memory units with specific addresses accessed through a bus interface; essentially, they are a set of flip-flops, but their behavior is regulated by standard read / write protocols. A register is typically divided into multiple fields, each controlling or representing a different function.

[0034] S120. Generate test cases and assertion files based on the template file and signal attributes.

[0035] The template file can be considered a pre-written blueprint file containing static text fragments and dynamic generation logic. It can be used as input to a code generator to automatically generate target files by populating specific data models into its predefined structure. In this embodiment, the template file may include a test case template file and an assertion template file. The test case template file is used to generate test cases, and the assertion template file is used to generate assertion files.

[0036] In this embodiment, generating test cases and assertion files based on template files and signal attributes can be achieved using a template engine. A template engine can be considered a software tool that automatically generates specific, executable code by populating structured data into predefined template files. For example, the template engine can select the ERB (Embedded Ruby) tool. The ERB tool can be used to populate signal attributes into predefined test case template files to obtain test cases, and to populate signal attributes into predefined assertion template files to obtain assertion files.

[0037] S130. Simulate and test the sideband signals of the chip under test according to the assertion file and test cases to obtain the sideband signal test results.

[0038] In this embodiment, the assertion file and test cases generated by the above steps are integrated into the verification environment. The entire verification platform, including the chip under test, test code, and assertions, is compiled. An automated test suite is run to execute all generated test scenarios. Assertions monitor signal behavior in real time to check whether they conform to attribute specifications. Test cases actively verify various normal, boundary, and error scenarios. Sideband signal test results are collected. For example, sideband signal test results may include assertion failure reports, test pass rates, and coverage reports. The coverage report may include functional coverage and code coverage.

[0039] The technical solution of this invention defines the signal attributes of the sideband signals of the chip under test; generates test cases and assertion files based on template files and signal attributes; and performs simulation tests on the sideband signals of the chip under test based on the assertion files and test cases to obtain the sideband signal test results. By generating test cases and assertion files based on the signal attributes of the sideband signals, the signal attributes serve as the essential constraints of the test and are decoupled from the specific test content. When the design changes, only the attribute files need to be updated to regenerate all test cases. Simultaneously, the assertion files can provide real-time checks, enabling faster error detection. Compared to manually writing tests and manually checking each specific function point, this not only shortens the test case generation time but also allows for the reuse of attribute files and template files, improving the testing efficiency and quality of sideband signals.

[0040] Example 2

[0041] Figure 2 This is a flowchart of a chip sideband signal testing method provided in Embodiment 2 of the present invention. This embodiment elaborates on the steps of defining the signal attributes of the sideband signals and generating test cases and assertion files based on template files and signal attributes, building upon the previous embodiments. Specifically, defining the signal attributes of the sideband signals includes: obtaining a sideband signal transmission model, which is used to convert the source sideband signal into a terminal sideband signal through a transmission channel; defining at least one set of signal attributes for the sideband signals based on the sideband signal transmission model; each sideband signal includes the source sideband signal and the terminal sideband signal.

[0042] Furthermore, test cases and assertion files are generated based on template files and signal attributes, including: constructing test case templates and assertion templates; generating test cases based on test case templates and signal attributes using the ERB template engine, and generating assertion files based on assertion templates and signal attributes.

[0043] like Figure 2 As shown, the method includes:

[0044] S210. Obtain the sideband signal transmission model. The sideband signal transmission model is used to convert the sideband signal at the source end into the sideband signal at the terminal end through the transmission channel.

[0045] Among them, the sideband signal transmission model is used to describe the process of sideband signals being transmitted from the source to the terminal.

[0046] In a System-on-a-Chip (SoC), regardless of whether the sideband signal functions as an interrupt, status output, or control, it is implemented by combining single-bit signals and register signals. The intermediate transmission channel can be combinational logic or sequential logic. In this embodiment, the specific logic of the transmission channel can be ignored, and the focus is on the attributes of the sideband signals at the source and end.

[0047] Figure 3 This is a schematic diagram of a sideband signal transmission model provided in Embodiment 2 of the present invention. Figure 3 As shown (where E represents a single-bit signal and R represents a register signal), the sideband signal transmission model includes three transmission modes. The first mode involves the source-end single-bit sideband signal being transmitted through the transmission channel and transformed into the terminal's single-bit sideband signal. The second mode involves the source-end single-bit sideband signal being transmitted through the transmission channel and transformed into the terminal's register-type sideband signal. The third mode involves the source-end register-type sideband signal being transmitted through the transmission channel and transformed into the terminal's single-bit signal type sideband signal.

[0048] Single-bit sideband signals can include level signals, single-cycle pulse signals, and acknowledge / handshake pulse signals. Level signals typically use a continuous voltage level to represent an active or inactive state; the signal remains active as long as the condition is met. Single-cycle pulse signals typically use a short transition (usually one clock cycle) to represent the occurrence of an event. Acknowledge / handshake pulse signals typically use one (or more) pairs of signals to ensure reliable transmission of information or operations through a request-response mechanism. Register signals are generally multi-bit vectors used for read and write operations, with specific addresses and values.

[0049] S220. Define at least one set of signal attributes for sideband signals according to the sideband signal transmission model; each set of sideband signals includes the sideband signals at the source end and the sideband signals at the terminal end.

[0050] In this embodiment, the sideband signals of the source end and the sideband signals of the terminal end are grouped together for defining signal attributes. For example, the signal attributes of a group of sideband signals can be represented as {source end: {attribute: A}; terminal end: {attribute: B}}.

[0051] In this embodiment, the signal attributes of the sideband signal include one or more of the following: signal type, reference clock frequency, maximum transmission time period of the effective signal value, initial signal value, and register address. The signal attributes of the sideband signal can be stored in a JASON file using a hash data structure.

[0052] It's understandable that only register-type sideband signals have register addresses as their signal attributes. Different types of sideband signals have different functions and circuit implementation requirements, and therefore require different testing methods.

[0053] S230, Construct test case templates and assertion templates.

[0054] A test case template can be considered a standardized, structured framework or blueprint used to define the data and test content that must be included when writing a single test case. An assertion template is a standardized, reusable pattern or rule used to define how to specifically and automatically verify whether the expected result of a test step or test case is true. For example, it can include assertion objects, assertion conditions, and expected results.

[0055] In this embodiment, a test case template is constructed to define the process of performing sideband signal tests in the verification environment based on signal attributes, and an assertion template is constructed to define the process of verifying and judging the actual results generated after the test execution.

[0056] As one implementation of this embodiment, the test case template definition includes: defining the configuration of the test environment for the chip under test; defining the driving of the sideband signal according to the signal attributes; and defining the check of the register state for the sideband signal of the register type terminal.

[0057] In this embodiment, for the sideband signals of the chip under test, the test environment configuration for the chip under test is defined in the test case template. This includes configuring the initial clock frequency and reset state, configuring the switching states and voltage values ​​of relevant power domains, and listing the registers that must be pre-configured before testing and their initial values ​​to ensure the chip is at the correct test starting point. The process of driving the sideband signals using signal attributes also needs to be defined. This process requires applying an stimulus, which can be done using a forced method or by configuring registers.

[0058] Additionally, when the terminal's sideband signal is identified as a register type, a register status check needs to be defined. Register status check refers to the process of reading the actual value of the chip's internal registers and comparing it with the expected value during verification to confirm whether the registers are in the correct state. This verifies whether the configuration is effective, whether the status is updated, and whether the hardware functions correctly.

[0059] As one implementation of this embodiment, the assertion template definition includes:

[0060] At least one set of assertions is defined based on the signal properties of a single-bit signal. The assertions include an assertion timing sequence and corresponding assertion conditions. The assertion timing sequence includes a source timing sequence, a terminal timing sequence, and a transmission timing sequence.

[0061] In this embodiment, for single-bit signals, assertion timing sequences and corresponding assertion conditions are defined according to the signal type of the single-bit signal to accurately describe the conditions that the sideband signal should follow under a specific test scenario. The assertion timing sequence covers the entire process of sideband signal transmission and can specifically include source timing sequences, terminal timing sequences, and transmission timing sequences. The source timing sequence describes the behavior of the excitation origin point; the transmission timing sequence describes the expected delay of signal transmission and processing inside the chip under test after the source event occurs; the terminal timing sequence describes the resulting behavior that the single-bit signal should exhibit at the terminal after the transmission delay. For example, the assertion condition for a level signal can be the effective level hold period, the assertion condition for a pulse signal can be the effective pulse width, and the assertion condition for a handshake pulse signal can be the signal response period.

[0062] S240, based on the ERB template engine, generates test cases according to test case templates and signal attributes, and generates assertion files according to assertion templates and signal attributes.

[0063] The ERB template engine can be considered a text generator that leverages Ruby's powerful features to build test cases and assertion files.

[0064] In this embodiment, based on the ERB template engine, signal attributes are passed as variables to the test case template to generate ERB test case scripts. Executing these ERB test case scripts generates specific, executable test cases in batches. Furthermore, based on the ERB template engine, signal attributes are passed as variables to the assertion template to generate ERB assertion scripts. Executing these ERB assertion scripts generates specific, executable assertion files in batches.

[0065] S250. Based on the assertion file and test cases, perform simulation tests on the sideband signals of the chip under test to obtain the sideband signal test results.

[0066] The technical solution of this invention obtains a sideband signal transmission model, which is used to convert the sideband signal from the source end into the sideband signal of the terminal through a transmission channel; defines at least one set of signal attributes for the sideband signals according to the sideband signal transmission model; each set of sideband signals includes the sideband signal from the source end and the sideband signal from the terminal; constructs test case templates and assertion templates based on the ERB template engine; generates test cases based on the test case templates and signal attributes, and generates assertion files based on the assertion templates and signal attributes. Defining the signal attributes of the sideband signals based on the sideband signal transmission model extracts the timing and transmission essence of the sideband signals from the complex implementation of specific functions, covering all transmission types of sideband signals in a SOC, and has good versatility; and generating test cases and assertion files based on signal attributes achieves templated testing of sideband signals; compared to manually writing tests and manually checking for each specific function point, it not only shortens the test case generation time, but also allows for the reuse of attribute files and template files, improving the testing efficiency and quality of sideband signals.

[0067] Example 3

[0068] Figure 4 This is a schematic diagram of a chip sideband signal testing device provided in Embodiment 3 of the present invention. Figure 4 As shown, the device includes: a definition module 410, a generation module 420, and a test module 430; wherein:

[0069] Definition module 410 is used to define the signal attributes of the sideband signals of the chip under test;

[0070] Generation module 420 is used to generate test cases and assertion files based on the template file and the signal attributes;

[0071] The test module 430 is used to perform simulation tests on the sideband signals of the chip under test according to the assertion file and the test cases, and obtain the sideband signal test results.

[0072] This invention provides a chip sideband signal testing device. It defines the signal attributes of the sideband signals of the chip under test; generates test cases and assertion files based on template files and signal attributes; and performs simulation tests on the sideband signals of the chip under test based on the assertion files and test cases to obtain the sideband signal test results. By generating test cases and assertion files based on the signal attributes of the sideband signals, the signal attributes serve as the essential constraints of the test and are decoupled from the specific test content. When the design changes, only the attribute files need to be updated to regenerate all test cases. Simultaneously, the assertion files can provide real-time checks, enabling faster error detection. Compared to manually writing tests and manually checking each specific function point, this not only shortens the test case generation time but also allows for the reuse of attribute files and template files, improving the testing efficiency and quality of sideband signals.

[0073] Optionally, the definition module 410 is specifically used for:

[0074] Obtain a sideband signal transmission model, which is used to convert the sideband signal at the source end into the sideband signal at the terminal through the transmission channel;

[0075] According to the sideband signal transmission model, at least one set of signal attributes for sideband signals are defined; each sideband signal includes the sideband signal at the source end and the sideband signal at the terminal end.

[0076] Optionally, the signal attributes of the sideband signals of the source and the terminal include one or more of the following: signal type, reference clock frequency, maximum transmission time, initial signal value, and register address;

[0077] The signal types include single-bit type and register type; the single-bit type sideband signals include level signals, single-cycle pulse signals and acknowledgment handshake pulse signals.

[0078] Optionally, the generation module 420 is specifically used for:

[0079] Create test case templates and assertion templates;

[0080] Based on the ERB template engine, test cases are generated according to the test case template and signal attributes, and assertion files are generated according to the assertion template and signal attributes.

[0081] Optionally, the content defined in the test case template includes:

[0082] Define the configuration of the test environment for the chip under test;

[0083] Define the driving force of the sideband signal based on the signal properties;

[0084] Define a check of the register state for the sideband signals of register-type terminals.

[0085] Optionally, the assertion template definition includes the following:

[0086] Define at least one set of assertions based on the signal properties of a single-bit signal, wherein the assertions include an assertion timing sequence and a corresponding assertion condition;

[0087] The assertion timing sequence includes a source timing sequence, a terminal timing sequence, and a transmission timing sequence.

[0088] The chip sideband signal testing device provided in the embodiments of the present invention can execute the chip sideband signal testing method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of executing the method.

[0089] Example 4

[0090] Figure 5 A schematic diagram of an electronic device 10, which can be used to implement embodiments of the present invention, is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0091] like Figure 5 As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0092] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0093] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the chip's sideband signal testing method.

[0094] In some embodiments, the chip sideband signal testing method can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the chip sideband signal testing method described above can be performed. Alternatively, in other embodiments, processor 11 can be configured to execute the chip sideband signal testing method by any other suitable means (e.g., by means of firmware).

[0095] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0096] In some embodiments, the chip sideband signal testing method can be implemented as a computer program, which is implicitly included in a computer program product. When executed by a processor, the computer program implements the chip sideband signal testing method of the present invention. The computer program product can be understood as a software product that primarily implements its solution through a computer program. The computer program used to implement the method of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The computer program can be executed entirely on a machine, partially on a machine, partially on a remote machine as a standalone software package, or entirely on a remote machine or server.

[0097] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0098] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0099] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0100] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0101] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0102] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for testing the sideband signals of a chip, characterized in that, include: Define the signal properties of the sideband signals of the chip under test; Generate test cases and assertion files based on the template file and the signal attributes; The sideband signals of the chip under test are simulated and tested according to the assertion file and the test cases to obtain the sideband signal test results.

2. The method according to claim 1, characterized in that, Define the signal properties of the sideband signal, including: Obtain a sideband signal transmission model, which is used to convert the sideband signal at the source end into the sideband signal at the terminal through the transmission channel; According to the sideband signal transmission model, at least one set of signal attributes for sideband signals are defined; each sideband signal includes the sideband signal at the source end and the sideband signal at the terminal end.

3. The method according to claim 2, characterized in that, The signal attributes of the sideband signals of the source and the terminal include one or more of the following: signal type, reference clock frequency, maximum transmission time, initial signal value, and register address; The signal types include single-bit type and register type; the single-bit type sideband signals include level signals, single-cycle pulse signals and acknowledgment handshake pulse signals.

4. The method according to any one of claims 1-3, characterized in that, The step of generating test cases and assertion files based on the template file and the signal attributes includes: Create test case templates and assertion templates; Based on the ERB template engine, test cases are generated according to the test case template and signal attributes, and assertion files are generated according to the assertion template and signal attributes.

5. The method according to claim 4, characterized in that, The test case template definition includes the following: Define the configuration of the test environment for the chip under test; Define the driving force of the sideband signal based on the signal properties; Define a check of the register state for the sideband signals of register-type terminals.

6. The method according to claim 4, characterized in that, The assertion template definition includes the following: Define at least one set of assertions based on the signal properties of a single-bit signal, wherein the assertions include an assertion timing sequence and a corresponding assertion condition; The assertion timing sequence includes a source timing sequence, a terminal timing sequence, and a transmission timing sequence.

7. A device for testing the sideband signals of a chip, characterized in that, include: The definition module is used to define the signal attributes of the sideband signals of the chip under test; The generation module is used to generate test cases and assertion files based on the template file and the signal attributes; The testing module is used to perform simulation tests on the sideband signals of the chip under test according to the assertion file and the test cases, and obtain the sideband signal test results.

8. An electronic device, characterized in that, The electronic device includes: At least one processor; and a memory communicatively connected to the at least one processor; The memory stores a computer program that can be executed by the at least one processor, which is then executed by the at least one processor to enable the at least one processor to perform the sideband signal testing method for the chip according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the sideband signal testing method of the chip according to any one of claims 1-6.

10. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the sideband signal testing method for the chip according to any one of claims 1-6.

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