Image recognition method based on hybrid resistive array and electronic device

Abstract

The application discloses an image recognition method based on a hybrid resistive array and electronic equipment, and relates to the technical field of integrated circuits and in-memory computing. The hybrid resistive array integrating two types of resistive devices, namely cation active electrodes and anion active electrodes, simulates the nerve processing mechanism of coexistence of excitation and inhibition in a biological vision system. When a voltage signal converted from a to-be-recognized image is applied, the resistive array can process image information in situ and in parallel. The first type of resistive device produces an excitatory response to a forward voltage, while the second type of device produces an inhibitory response to a negative voltage, greatly enhancing the contrast and boundary definition of image features, and being capable of generating a highly specific output current response. The application solves the problem of insufficient image recognition accuracy caused by the lack of inhibitory mechanism, and realizes high-accuracy image recognition.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuits and in-memory computing, and particularly relates to an image recognition method based on a hybrid resistive array and an electronic device. BACKGROUND

[0002] In-memory computing technology based on emerging non-volatile memories can efficiently perform neural network computing tasks such as image recognition. Resistive memory has the advantages of adjustable resistance, fast read-write speed, and high integration, and its cross-array structure can complete vector-matrix multiplication in situ in a highly parallel manner according to Kirchhoff's law and Ohm's law.

[0003] In related technologies, the scheme for implementing image recognition using a resistive array is to use it as a weight layer of a neural network, to simulate synaptic weights of the neural network using conductance values of resistive devices, to input a voltage vector representing image data to the array, and to measure an output current vector, thereby completing the multiplication and addition operation of a layer of neural network. However, the scheme in related technologies is not sufficiently biomimetic in principle, and it is difficult to achieve high specificity and high accuracy of image recognition when processing images with complex contours, low contrast, or specific directional features. SUMMARY

[0004] The present application provides an image recognition method based on a hybrid resistive array and an electronic device to at least solve the problem of how to achieve high specificity and high accuracy of image recognition in related technologies.

[0005] The present application provides an image recognition method based on a hybrid resistive array, comprising:

[0006] Obtaining a pixel matrix of an image to be recognized and converting the pixel matrix into an image voltage signal;

[0007] Applying bias voltages of different polarities to a plurality of resistive devices in the resistive array based on the image voltage signal, wherein the resistive array is arranged in a preset arrangement manner by a plurality of first-type resistive devices based on cation-active electrodes and a plurality of second-type resistive devices based on anion-active electrodes;

[0008] After applying the bias voltages, counting the conduction results of the resistive devices in the resistive array and reading the output current of the resistive array, wherein the first-type resistive devices are turned on under positive bias voltage, and the second-type resistive devices are turned on under negative bias voltage;

[0009] Determining the image features of the image to be recognized according to the conduction results and the amplitude or distribution pattern of the output current.

[0010] The present application provides an image recognition device based on a hybrid resistive array, comprising:

[0011] an acquisition unit configured to acquire a pixel matrix of an image to be identified;

[0012] a conversion unit configured to convert the pixel matrix into an image voltage signal;

[0013] a biasing unit configured to apply bias voltages of different polarities to the plurality of resistive devices in the resistive array based on the image voltage signal, wherein the resistive array is arranged by a plurality of first-type resistive devices based on cation-active electrodes and a plurality of second-type resistive devices based on anion-active electrodes in a preset arrangement manner;

[0014] a reading unit configured to count on-conduction results of the resistive devices in the resistive array after the bias voltages are applied, and read an output current of the resistive array, wherein the first-type resistive devices are turned on under a positive bias voltage, and the second-type resistive devices are turned on under a negative bias voltage;

[0015] a determination unit configured to determine an image feature of the image to be identified according to the on-conduction results and an amplitude or a distribution mode of the output current.

[0016] The application further provides an electronic device, comprising a memory configured to store a computer program, and a processor configured to execute the computer program to implement the steps of the resistive device corresponding to any of the target regions.

[0017] The application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and the computer program is executed by a processor to implement the steps of the resistive device corresponding to any of the target regions.

[0018] The application further provides a computer program product, comprising a computer program, and the computer program is executed by a processor to implement the steps of the resistive device corresponding to any of the target regions.

[0019] The image identification method and the electronic device based on the hybrid resistive array provided by the application simulate the neural processing mechanism of coexistence of excitation and inhibition in a biological visual system by using a hybrid resistive array integrating two types of resistive devices of cation-active electrodes and anion-active electrodes, and the resistive array can process image information in situ and in parallel when a voltage signal converted from an image to be identified is applied, wherein the first-type resistive devices produce excitatory responses to positive voltages, and the second-type resistive devices produce inhibitory responses to negative voltages, which greatly enhances the contrast and boundary definition of image features, effectively sharpens the direction selectivity, and thus can produce a highly specific output current response when facing images with complex contours, low contrast or specific directional features. The image identification accuracy is improved, and high-accuracy image identification is achieved. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor.

[0021] Figure 1 A flowchart of an image recognition method based on a hybrid resistive array provided by an embodiment of the present application;

[0022] Figure 2 A structural diagram of a resistive array provided by an embodiment of the present application;

[0023] Figure 3 An electrical characteristic diagram of a resistive device based on a cation active electrode provided by an embodiment of the present application;

[0024] Figure 4 A planar diagram of a resistive array provided by an embodiment of the present application;

[0025] Figure 5 An image recognition diagram based on a resistive array provided by an embodiment of the present application;

[0026] Figure 6 A structural diagram of a longitudinally alternately arranged resistive array provided by an embodiment of the present application;

[0027] Figure 7 A structural diagram of a resistive array arranged alternately one by one provided by an embodiment of the present application;

[0028] Figure 8 A structural diagram of an image recognition device based on a hybrid resistive array provided by an embodiment of the present application. DETAILED DESCRIPTION

[0029] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.

[0030] It should be noted that in the description of the present application, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, so that processes, methods, articles or devices including a series of elements not only include those elements, but also include other elements not specifically listed or inherent to such processes, methods, articles or devices. The terms "first", "second" and the like in the present application are used to distinguish similar objects, not to describe a specific order or sequence.

[0031] An image recognition method based on a hybrid resistive array according to an embodiment of the present application, the core of which is to convert visual information of an image into an electrical signal by constructing a hybrid resistive array composed of two types of active electrode resistive devices, and to realize extraction and recognition of image features by using the electrical response characteristics of resistive devices. It is especially suitable for scenarios such as edge computing that have high requirements for hardware energy consumption, volume and response efficiency, and can complete the image recognition task in a way closer to biological visual perception.

[0032] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0033] Figure 1 A flowchart of an image recognition method based on a hybrid resistive array provided for an embodiment of the present application is shown, which is used to describe the method in detail in combination with the execution flow of the image recognition method based on a hybrid resistive array.

[0034] As shown in Figure 1 The image recognition method based on a hybrid resistive array includes:

[0035] Step 101, obtaining a pixel matrix of an image to be recognized, and converting the pixel matrix into an image voltage signal.

[0036] In an embodiment of the present application, the pixel matrix refers to a data structure in which the brightness or color value of each pixel point in an image is represented in the form of a matrix, which is usually obtained through an image sensor or digital image processing technology. After obtaining the pixel matrix, it is converted into an image voltage signal. This conversion process involves mapping digital pixel values to corresponding voltage levels in order to drive the resistive array subsequently. The generation of the image voltage signal can allocate different voltage amplitudes according to the brightness of the pixels, for example: bright area pixels correspond to positive voltage, dark area pixels correspond to negative voltage, thereby forming an electrical input related to the image content.

[0037] Step 102, applying bias voltages of different polarities to a plurality of resistive devices in the resistive array based on the image voltage signal, wherein the resistive array is obtained by arranging a plurality of first-type resistive devices based on cation active electrodes and a plurality of second-type resistive devices based on anion active electrodes in a preset arrangement.

[0038] In the embodiments of the present application, the resistive switching array is a circuit structure composed of a plurality of resistive switching devices in a cross-point array form, each of which is located at the intersection of a row line and a column line and has a non-volatile resistance switching characteristic. The bias voltage refers to a specific voltage applied across the device to drive the resistive switching device to change the resistance state.

[0039] The resistive switching array is obtained by arranging a plurality of first-type resistive switching devices based on cation-active electrodes and a plurality of second-type resistive switching devices based on anion-active electrodes in a preset arrangement manner. The preset arrangement manner refers to the spatial distribution mode of the two types of devices in the array, for example, longitudinal alternating arrangement or individual alternating arrangement can be used to optimize the electrical performance and recognition accuracy of the array.

[0040] The first-type resistive switching device based on cation-active electrodes is an electronic device that relies on the migration of cations (such as metal ions) to realize resistance state change, which turns on under a positive bias voltage, i.e., switches from a high resistance state to a low resistance state (SET process). The second-type resistive switching device based on anion-active electrodes is a device that relies on the migration of anions (such as oxygen vacancies) to regulate the resistance state, which turns on under a negative bias voltage, showing opposite voltage response characteristics to the first-type device.

[0041] By combining the two types of devices in the same array, the sensitivity of the two types of devices to positive and negative voltages can be utilized to realize parallel processing of image voltage signals.

[0042] In step 103, the turn-on results of the resistive switching devices in the resistive switching array after applying the bias voltage are counted, and the output current of the resistive switching array after applying the bias voltage is read, wherein the first-type resistive switching device turns on under a positive bias voltage, and the second-type resistive switching device turns on under a negative bias voltage.

[0043] In the embodiments of the present application, the turn-on result refers to the state information of whether each resistive switching device enters a low resistance state under the action of the voltage, which can be determined by measuring the current or resistance value of each intersection. The core purpose of counting the turn-on results is to establish the correspondence between the device working state and the image pixel information. Since the position of each resistive switching device corresponds to a pixel point in the image pixel matrix to be recognized, the turn-on state of the device can directly reflect the visual information (such as brightness, gray scale) of the corresponding pixel point, providing basic state data for subsequent analysis of image features.

[0044] The output current refers to the total current or current distribution generated by the entire resistive switching array under the driving of the bias voltage, and the amplitude depends on the number and type of conductive devices. Since the first type of resistive switching device is conductive under a positive bias voltage, and the second type of resistive switching device is conductive under a negative bias voltage, when the image voltage signal is applied to the array, the devices in different regions will selectively conduct according to the voltage polarity, forming a current pattern corresponding to the image features. For example, in a letter recognition application, the pixels corresponding to the letter outline apply a positive voltage, which activates the first type of device, while the background area applies a negative voltage, which activates the second type of device, thereby generating a specific current output.

[0045] In step 104, the image features of the image to be recognized are determined according to the conduction results and the amplitude or distribution pattern of the output current.

[0046] In the embodiments of the present application, the image features refer to structures or patterns in the image that are distinctive, such as edges, outlines or textures, etc. By analyzing the spatial distribution of the conductive devices and the amplitude of the output current, the content of the image can be inferred. For example, when the output current amplitude is high, it indicates that more devices are conductive, which may correspond to bright or high-contrast regions in the image; while the distribution pattern of the output current reflects the spatial features of the image, such as symmetry or directionality. This method takes advantage of the parallel processing capability of the resistive switching array to achieve in-situ extraction of image features, without the need for complex digital calculations, thereby reducing power consumption and delay and improving recognition efficiency.

[0047] In the analysis process, first, the spatial structure information of the image is mined based on the conduction results: since the conduction results reflect the working state of the resistive switching devices at each position in the array, and each device position corresponds to a pixel point in the image, by analyzing the spatial distribution of the conductive devices in the array, the spatial arrangement of the image pixels can be directly mapped, for example: regions with a high concentration of conductive devices usually correspond to regions with high brightness or obvious features in the image (such as the stroke regions of a letter image), and regions with a low concentration of conductive devices correspond to dark regions or background regions with no obvious features in the image, through this mapping relationship, the overall spatial outline of the image can be initially outlined.

[0048] At the same time, fine analysis is carried out in combination with the amplitude of the output current or the distribution pattern of the output current: the amplitude of the output current refers to the specific size value of the output current signal, and the pixel matrix of different images to be recognized is different, the converted image voltage signal is also different, which results in differences in the number of conductive devices, the degree of conduction in the array, and finally the amplitude of the output current, for example: an image containing a large area of bright region will correspond to more conductive devices, and the output current amplitude will be larger; while an image dominated by dark regions will correspond to fewer conductive devices, and the output current amplitude will be smaller, therefore the amplitude of the output current can be used as an important indicator to distinguish the overall brightness or feature density of the image.

[0049] The distribution mode of the output current refers to the distribution law of the output current at different output positions of the resistive switching array and in different time periods. Due to the specific spatial distribution characteristics of the pixel matrix of the image to be recognized, the excitation distribution of the corresponding image voltage signal on the array also presents a corresponding law, so that the resistive switching devices in different regions of the array are in different conduction states, and then the output current forms a specific mode in the spatial dimension. For example, if there is a horizontal bright line in the image, the resistive switching devices corresponding to the horizontal position in the array will be concentrated in conduction, and the output current will present a higher amplitude at the horizontal position, forming a horizontal high-current band distribution mode corresponding to the bright line. If the image is the letter Z, the devices corresponding to the letter stroke path in the array will be in conduction, and the output current will present a distribution mode consistent with the shape of Z. The distribution mode can reflect the local features and edge contours of the image in detail and make up for the limitations of analysis only through the conduction result. By combining the conduction result with the amplitude or distribution mode of the output current, the key visual features of the image to be recognized can be comprehensively and accurately extracted, and finally the accurate recognition of the image can be realized.

[0050] The application realizes efficient processing of the image voltage signal by combining the mixed resistive switching array with two different types of resistive switching devices, and enhances the accuracy of image recognition. By using the non-volatility and voltage sensitivity of the resistive switching device, the external storage and calculation requirements are reduced, which is suitable for resource-limited edge devices. In addition, by optimizing the device layout through the preset arrangement mode, the interference between adjacent devices can be minimized, the stability and scalability of the array can be improved, and a low-power and high-parallel image recognition solution is provided.

[0051] In an implementation manner of the embodiment of the application, the first type of resistive switching device is in a high resistance state before the conduction operation, and is in a low resistance state after the conduction operation under the positive bias voltage; and the second type of resistive switching device is in a high resistance state before the conduction operation, and is in a low resistance state after the conduction operation under the negative bias voltage.

[0052] The first type of resistive switching device is in a high resistance state before the reset operation, and is in a high resistance state after the reset operation under the negative bias voltage; and the second type of resistive switching device is in a high resistance state before the reset operation, and is in a high resistance state after the reset operation under the positive bias voltage.

[0053] In embodiments of the present application, the turn-on operation refers to the process of switching the resistive switching device from a non-conductive state to a conductive state by applying a voltage of a specific polarity, which is essentially the SET process of the resistive switching device, i.e., forming a conductive filament by driving ion migration under an electric field. The high resistance state is the initial resistance state of the resistive switching device when it is not activated, which exhibits a high resistance value and usually corresponds to logic 0 or the off state; while the low resistance state is the resistance state of the resistive switching device after activation, which exhibits a low resistance value and usually corresponds to logic 1 or the on state. The state change depends on the application of a forward bias voltage, i.e., the voltage polarity is from the cation-active electrode to the counter electrode, thereby promoting the migration of cations (such as metal ions) to the electrolyte layer, forming a stable conductive filament and realizing the low resistance of the device. Similarly, the second type of resistive switching device changes from a high resistance state to a low resistance state after a turn-on operation under a negative bias voltage. The negative bias voltage refers to the voltage polarity from the anion-active electrode to the counter electrode, thereby driving the migration of anions (such as oxygen vacancies) to reconfigure the conductive path inside the device and complete the SET process. The symmetric but opposite polarity operation mechanism allows the two types of devices to respond to different polarity input signals in parallel in the array, thereby achieving more precise voltage mapping in the image recognition process.

[0054] The first type of resistive switching device undergoes a reset operation under a negative bias voltage and changes from a high resistance state to a low resistance state, it should be noted that in actual operation, the reset operation usually refers to the process of restoring the device from a low resistance state to a high resistance state, i.e., the RESET process. Therefore, for the first type of resistive switching device, the device changes from a low resistance state back to a high resistance state after a reset operation under a negative bias voltage. The reset operation is to destroy or weaken the conductive filament by reversing the voltage polarity, so that the device returns to a high resistance state, thereby realizing state reset. Similarly, the second type of resistive switching device undergoes a reset operation under a positive bias voltage and changes to a high resistance state, which means that the second type of device will not turn on under a positive bias voltage, but maintain its high resistance state, thereby avoiding misoperation. The reset mechanism ensures the state consistency of the resistive switching array after multiple operations, reduces the influence of cross talk and leakage current, and improves the durability and reliability of the array.

[0055] By the explicit definition of the turn-on and reset operations, the state change of the resistive devices can be more accurately controlled in the image recognition process. When the image voltage signal is applied to the hybrid resistive array, the first type of device is only turned on in response to the positive voltage, and the second type of device is only turned on in response to the negative voltage, thereby forming a current output pattern corresponding to the image features. This operating characteristic enhances the discrimination of image recognition, for example: in the light-dark boundary area, by selective turn-on of the device, the contrast can be enhanced, the lateral inhibition effect in biological vision can be simulated, and the accuracy of edge detection can be improved. In addition, the introduction of the reset operation enables the array to be quickly reset after the recognition task, avoiding state accumulation errors and supporting continuous image processing. Overall, by optimizing the electrical response of the device, low-power and high-parallel image feature extraction is achieved, which is particularly suitable for resource-constrained application scenarios such as edge computing.

[0056] In an implementation manner of the embodiment of the present application, when different polarity bias voltages are applied to the plurality of resistive devices in the resistive array based on the image voltage signal, the following implementation manners can be adopted, but are not limited to: a positive bias voltage is applied to a first target resistive device in the resistive array based on the image voltage signal, and a negative bias voltage is applied to a second target resistive device in the resistive array; wherein the first target resistive device is a resistive device corresponding to a target region of the image to be recognized in situ, the second target resistive device is a resistive device corresponding to a non-target region of the image to be recognized in situ, and the first target resistive device and the second target resistive device each contain at least one of the first type of resistive device and the second type of resistive device.

[0057] In the embodiment of the present application, the image voltage signal is a voltage input generated by converting the pixel matrix of the image to be recognized into an electrical signal, and the amplitude and polarity correspond to the brightness or color information of each pixel in the image. For example: in a binary image, the bright area pixels can be mapped to a positive voltage, and the dark area pixels can be mapped to a negative voltage, thereby forming an electrical excitation matching the spatial distribution of the image.

[0058] The bias voltage is a direct current or pulse voltage applied across the resistive device, used to regulate the resistance state of the device. Specifically, it includes applying a positive bias voltage to a first target resistive device in the resistive array and applying a negative bias voltage to a second target resistive device in the resistive array. The positive bias voltage refers to a voltage signal with a polarity pointing from the cation-active electrode to the counter electrode, which is usually used to activate devices based on cation-active electrodes; while the negative bias voltage refers to a voltage signal with a polarity pointing from the anion-active electrode to the counter electrode, which is usually used to activate devices based on anion-active electrodes.

[0059] The first target resistive switching device refers to a resistive switching device corresponding to a target region of the image to be identified in situ. The target region refers to a part of the image that needs to be identified or feature extracted, such as the outline of a letter, the edge of an object, or other regions of interest, which usually corresponds to the bright area or high-contrast part of the image. In situ correspondence refers to the spatial alignment of each resistive switching device in the resistive switching array with the image pixels one by one, so that the electrical input of the image is directly mapped to the physical structure of the array, realizing in-situ processing of the signal. Similarly, the second target resistive switching device refers to a resistive switching device corresponding to a non-target region of the image to be identified in situ. The non-target region refers to the part of the image other than the target region, such as the background or low importance region, which usually corresponds to the dark area or low-contrast part of the image. Through this mapping method, the spatial information of the image is directly converted into electrical excitation, thereby forming a voltage distribution in the resistive switching array that matches the image content.

[0060] Since the target region and the non-target region may contain mixed types of devices, the applied bias voltage selectively activates the corresponding devices according to the region characteristics. For example, when a positive bias voltage is applied to the target region, the first type of resistive switching device is activated and turned on, while the second type of resistive switching device remains in a high resistance state; when a negative bias voltage is applied to the non-target region, the second type of resistive switching device is activated and turned on, while the first type of resistive switching device remains in a high resistance state. This operating mode enables the array to process input signals of different polarities in parallel, enhancing the discrimination of image features.

[0061] The present application can more accurately realize in-situ extraction of image features by applying a bias voltage. Since the target region and the non-target region correspond to different polarity voltage inputs, the output current pattern of the resistive switching array reflects the spatial structure of the image, for example, when there are more conductive devices in the target region, the output current amplitude is higher, and the non-target region produces a complementary current response. This mechanism simulates the lateral inhibition effect in biological vision, which enhances the light-dark contrast to improve recognition accuracy. In addition, by mixed use of two types of resistive switching devices, the array can fully utilize the voltage sensitivity of the devices, reduce misoperation and crosstalk, and improve stability and energy efficiency. Overall, by optimizing the application strategy of the bias voltage, low-power and high-parallel image recognition is achieved.

[0062] In an implementation manner of the embodiment of the present application, when the first target resistive device in the resistive array is applied with the forward bias voltage and the second target resistive device in the resistive array is applied with the negative bias voltage based on the image voltage signal, the following manner can be adopted, but is not limited to: a first voltage is applied to a target row line of the resistive array to apply the forward bias voltage to the first target resistive device, wherein the target row line is a row line where the first target resistive device is located in the resistive array; and a second voltage is applied to a target column line of the resistive array to apply the negative bias voltage to the second target resistive device, wherein the target column line is a column line where the second target resistive device is located in the resistive array.

[0063] In the embodiment of the present application, the target row line refers to a row line where the first target resistive device is located in the resistive array, that is, a metal wire connecting devices in the same row in the resistive array, which drives the electrical state of all devices in the row by applying a voltage. The first voltage is a forward bias voltage, usually a positive value, which is applied to the target row line and cooperates with the column line voltage to form a voltage difference from the row line to the column line, thereby generating a forward bias on the first target resistive device. The forward bias voltage refers to a voltage signal with a polarity from the cation active electrode to the counter electrode, which can activate the device based on the cation active electrode and promote it to change from the high resistance state to the low resistance state. By this row line driving manner, the devices corresponding to the image target area can be activated specifically to realize in-situ enhancement of local features.

[0064] Similarly, applying the negative bias voltage to the second target resistive device includes applying a second voltage to a target column line of the resistive array. The target column line refers to a column line where the second target resistive device is located in the resistive array, that is, a metal wire connecting devices in the same column in the resistive array, which regulates the electrical response of all devices in the column by applying a voltage. The second voltage is a negative bias voltage, usually a negative value, which is applied to the target column line and cooperates with the row line voltage to form a voltage difference from the column line to the row line, thereby generating a negative bias on the second target resistive device. The negative bias voltage refers to a voltage signal with a polarity from the anion active electrode to the counter electrode, which can activate the device based on the anion active electrode and promote it to change from the high resistance state to the low resistance state. By this column line driving manner, a reverse voltage can be applied to the devices corresponding to the non-target area of the image to realize background suppression or contrast enhancement.

[0065] The application applies the first voltage and the second voltage through the target row line and the target column line respectively, so that the resistive switching array can process the image voltage signal in a parallel and efficient manner. The selection of the target row line and the target column line is based on the image space mapping relationship, that is, the first target resistive switching device corresponds to the in-situ position of the target region of the image, and the second target resistive switching device corresponds to the in-situ position of the non-target region of the image. Through independent control of the row line and the column line, voltage crosstalk can be minimized, and false operation of the non-target device can be avoided, thereby improving the accuracy of image recognition. In addition, the amplitude and timing of the first voltage and the second voltage can be adjusted according to the image complexity to optimize the conduction characteristics of the device. Overall, through the voltage application strategy of row and column line driving, fine control of the hybrid resistive switching array is realized, the energy efficiency of image feature extraction is enhanced, and it is particularly suitable for high parallelism and low power consumption edge computing applications.

[0066] In an implementation manner of the embodiment of the application, after the first target resistive switching device in the resistive switching array is applied with a forward bias voltage and the second target resistive switching device in the resistive switching array is applied with a negative bias voltage based on the image voltage signal, the following method can also be used, but is not limited to: applying a third voltage to other row lines and other column lines of the resistive switching array, wherein the other row lines and the other column lines are row lines and column lines of the resistive switching array except the target row line and the target column line, and the third voltage is not greater than a preset proportion of the first voltage or the second voltage.

[0067] In the embodiment of the application, the other row lines refer to all the row lines in the resistive switching array except the target row line, and the other column lines refer to all the column lines in the resistive switching array except the target column line. The other row lines and the other column lines are not redundant structures without actual effect, and resistive switching devices (which can be the first type of resistive switching device or the second type of resistive switching device) are also integrated on them. However, these devices do not belong to the first target resistive switching device or the second target resistive switching device, that is, they do not correspond to the in-situ position of the target region or the non-target region of the image to be identified, and belong to the non-target response device carrier in the array. If no voltage is applied to the other row lines and the other column lines, they can be in a voltage floating state. During the process of applying voltage to the target row line and the target column line, uncertain induced potential can be generated due to electromagnetic coupling, parasitic capacitance or leakage effect. The uncertain potential can cause unexpected resistance state changes of the non-target devices on the other row lines and the other column lines, such as false conduction or false reset, thereby interfering with the overall response result of the array and affecting the accurate statistics of the conduction state of the first target resistive switching device and the second target resistive switching device.

[0068] The preset ratio refers to a ratio coefficient preset in the design stage according to the electrical characteristics (such as the conduction threshold voltage and the reset threshold voltage) of the resistive switching devices in the resistive switching array, the array size and the actual application scene requirements. The determination of the ratio coefficient needs to take the core principle of not causing abnormal state of non-target devices. For example, the preset ratio can be set to 1 / 2, etc. The fundamental reason for setting this ratio limit is that the conduction or reset of the resistive switching device needs to reach a specific threshold voltage. The first type of resistive switching device needs to be converted from a high resistance state to a low resistance state when the forward voltage reaches the conduction threshold, and needs to be restored from a low resistance state to a high resistance state when the negative voltage reaches the reset threshold. The second type of resistive switching device needs to be conducted when the negative voltage reaches the conduction threshold, and needs to be reset when the positive voltage reaches the reset threshold. The amplitude of the third voltage is limited in a specific ratio range of the first voltage or the second voltage through the preset ratio, which can ensure that it is far lower than the conduction threshold and the reset threshold of the non-target devices (resistive switching devices on other row lines and other column lines), so as to avoid driving the non-target devices to conduct or triggering the reset operation of the non-target devices, so that the non-target devices always maintain the initial stable resistance state, avoiding interference with the response result of the target devices.

[0069] The application of the third voltage can further optimize the electrical environment of the array. Since the resistive switching array adopts a structure in which the row lines and the column lines intersect, the first voltage applied by the target row line and the second voltage applied by the target column line form a clear bias electric field at the intersection, driving the first target resistive switching device and the second target resistive switching device to respond. After the other row lines and the other column lines apply the third voltage, the potential distribution of the entire array is more uniform, reducing the leakage current caused by the large potential difference between different row lines and column lines, and reducing the overall power consumption of the array.

[0070] Meanwhile, the existence of the third voltage can also suppress the influence of external electromagnetic interference on the other row lines and the other column lines, avoiding the coupling of external interference signals to the target row line or the target column line through the non-target row line or the column line, affecting the bias voltage stability of the target device. For example, when there is voltage fluctuation in the external environment, the other row lines without the third voltage applied may transmit the fluctuation signal to the target row line, causing the amplitude of the first voltage to deviate, and then affecting the conduction degree of the first target resistive switching device. After the third voltage is applied, the potential of the other row lines is fixed, which can effectively isolate external fluctuations, ensure the stability of the amplitudes of the first voltage and the second voltage, and ensure the response consistency of the target device.

[0071] The present application enhances the energy efficiency of the hybrid resistive array in image recognition by applying a third voltage. By controlling the voltage levels of other row and column lines, the state drift of partially selected devices can be effectively prevented, and the recognition error caused by voltage leakage can be reduced. In addition, the biasing method simulates the lateral inhibition mechanism in the biological visual system, which enhances the contrast of the target features by suppressing the electrical response of the non-target area, thereby improving the resolution and accuracy of image recognition. Overall, by optimizing the voltage distribution of the array, low-power and high-stability parallel processing is achieved, which is particularly suitable for large-scale resistive arrays and complex image recognition tasks.

[0072] In an implementation manner of the embodiment of the present application, when the pixel matrix is converted into a voltage signal, the following manner can be adopted, but is not limited to: the pixels corresponding to the bright area in the pixel matrix are mapped to a positive bias voltage, wherein the bright area in the pixel matrix corresponds to the target area of the image to be recognized; and the pixels corresponding to the dark area in the pixel matrix are mapped to a negative bias voltage, wherein the dark area in the pixel matrix corresponds to the non-target area of the image to be recognized.

[0073] In the embodiment of the present application, the bright area in the pixel matrix refers to the area with high brightness in the image, which corresponds to the target area of the image, i.e., the part that needs to be recognized or the feature extracted, such as the object contour, the character stroke or other structures of interest; and the dark area in the pixel matrix refers to the area with low brightness in the image, which corresponds to the non-target area of the image, i.e., the background or the part with low importance. By mapping the bright area and the dark area to different voltage signals respectively, direct conversion of the image content to electrical excitation can be realized, providing input for subsequent processing of the resistive array.

[0074] The positive bias voltage is a positive polarity voltage signal, and its amplitude is usually determined linearly or nonlinearly according to the pixel brightness value, for example: high brightness pixels can be mapped to a higher positive voltage, and low brightness pixels can be mapped to a lower positive voltage, but the bright area as a whole is given a positive polarity. Similarly, the negative bias voltage is a negative polarity voltage signal, and its amplitude is adjusted based on the brightness of the dark area pixels, for example: low brightness pixels can be mapped to a higher negative voltage, but the dark area as a whole is given a negative polarity. This mapping relationship is based on image semantic segmentation, in which the target area (bright area) is usually associated with a positive voltage, and the non-target area (dark area) is associated with a negative voltage, thereby forming a voltage distribution in the resistive array that matches the spatial structure of the image.

[0075] The target region refers to the part of the image that needs to be identified or emphasized, which is characterized by bright pixels, for example: in the letter recognition task, the letter strokes correspond to the bright area, and the background corresponds to the dark area. By mapping the target region to a positive bias voltage, the first type of resistive switching device based on cation active electrodes in the resistive switching array can be activated, prompting it to transition from a high resistance state to a low resistance state, thereby enhancing the current response of the target feature. The non-target region refers to the part of the image other than the target region, which is characterized by dark pixels, for example: image background or noise area. By mapping the non-target region to a negative bias voltage, the second type of resistive switching device based on anion active electrodes in the resistive switching array can be activated, prompting it to transition from a high resistance state to a low resistance state, while suppressing the misoperation of non-target devices, forming a lateral inhibition effect. This voltage mapping strategy takes advantage of the polarity sensitivity of resistive switching devices, enabling parallel processing of image information.

[0076] The present application converts the pixel matrix into a voltage signal and enhances the contrast of image recognition through bright and dark partitioning and voltage polarity allocation. By associating the bright area with a positive bias voltage and the dark area with a negative bias voltage, the light-on and light-off response mechanisms in the biological visual system are simulated, strengthening the boundary between the target and non-target regions. This reduces the complexity of image preprocessing, enables in-situ mapping from pixels to electrical signals, and reduces computational delay and power consumption. In addition, through precise control of voltage polarity, the output current mode of the resistive switching array can more accurately reflect image features, improving recognition accuracy and anti-interference ability.

[0077] In one implementation manner of the embodiment of the present application, when determining the features or categories of the image to be recognized according to the conduction results and the amplitude or distribution mode of the output current, the following implementation manners can be adopted, but are not limited to: comparing the conduction results and the output current with preset recognition conditions to obtain a comparison result, wherein the preset recognition conditions at least include a reference current amplitude or a reference distribution mode for reference, and a reference conduction result for reference; determining the image features of the image to be recognized based on the consistency of the conduction results indicated by the comparison result and the reference conduction result, and the consistency of the output current and the reference current amplitude or the reference distribution mode.

[0078] In the embodiment of the present application, the conduction results record the conduction mode of the device under the action of the image voltage signal, reflecting the electrical mapping of the image spatial features. The output current refers to the total current or current distribution generated by the entire resistive switching array under the driving of the bias voltage, the amplitude of which depends on the number and type of conduction devices, and the distribution mode describes the spatial variation law of the current in the array, for example: uniform distribution, gradient change or local concentration, etc. These electrical responses are directly related to the image content, so feature information needs to be extracted through comparison processing.

[0079] The preset recognition condition is a reference standard set constructed in advance based on a large number of known image samples (i.e. standard images with clear image features) before the image recognition task is performed, which serves as a comparison benchmark for the electrical response data of the image to be recognized, and ensures that the recognition process has rules to follow. The preset recognition condition includes at least three core reference items: reference current amplitude, reference distribution mode and reference conduction result. Among them, the reference conduction result is a set of conduction states of the resistance variable device obtained after processing the known image sample: specifically, the known image sample is first converted into a corresponding image voltage signal, and then the signal is applied to the resistance variable array with the same structure as the image to be recognized. The conduction state of each resistance variable device in the array is recorded by the reading circuit, and finally the reference conduction result corresponding to the visual features of the known image sample is formed, for example: for the known letter Z sample, its reference conduction result will present a conduction device distribution consistent with the Z stroke path.

[0080] The reference current amplitude is the specific size value of the output current of the resistance variable array during the processing of the known image sample. Since the visual features (such as the target region size) of each known image sample are fixed, the corresponding reference current amplitude also has uniqueness and can be used as a reference benchmark for measuring the target region size of the image to be recognized. The reference distribution mode is the distribution rule of the output current of the known image sample in the spatial or temporal dimension, which is obtained by applying voltage to the known image sample and recording the output current distribution. It is directly matched with the visual shape and contour features of the known image sample, for example: the reference distribution mode corresponding to the known square object sample will present a rectangular high current area consistent with the square boundary. These reference items will be stored in a dedicated storage module for quick access during the processing of the image to be recognized.

[0081] After obtaining the conduction result, output current (amplitude or distribution pattern) of the image to be identified and the preset identification condition, a comparison process is performed, which is a process of comparing and analyzing each item of the actual electrical response data of the image to be identified with the reference item in the preset identification condition, aiming to judge the similarity of the two. Specifically, the execution logic of the comparison process can be divided into two core dimensions: first, for the comparison of the conduction result and the reference conduction result, the conduction result of the image to be identified and the reference conduction result of a known image sample in the preset identification condition are aligned one by one according to the position of the resistance variable device (i.e. ensuring that the two are compared for the same position device in the array), and then the state of each aligned device is judged, and the number or proportion of devices with completely consistent conduction and non-conduction states is counted to measure the matching degree of the two; second, for the comparison of the output current and the reference current amplitude or reference distribution pattern: if the reference current amplitude is selected as the comparison item, the difference or ratio of the amplitude of the output current of the image to be identified and the reference current amplitude is calculated to judge the numerical proximity of the two; if the reference distribution pattern is selected as the comparison item, the feature matching algorithm commonly used in the field of image recognition (such as template matching algorithm) is used to analyze the coincidence degree of the distribution pattern of the output current of the image to be identified and the reference distribution pattern in the position, shape, range, etc. dimensions of the high current area, for example: calculating the overlapping area ratio of the high current areas of the two, or comparing the boundary coordinate deviation of the high current areas of the two.

[0082] The comparison result generated after the comparison process is a quantitative or qualitative description of the similarity of the actual data and the reference item, and its core information is the consistency of the conduction result and the reference conduction result, and the consistency of the output current and the reference current amplitude or reference distribution pattern. The consistency here refers to the degree of agreement of the actual data and the reference item in the key feature dimension, which is usually judged by a preset consistency threshold: if the consistent device proportion of the conduction result and the reference conduction result reaches or exceeds the preset state consistency threshold (such as 90%), it is determined that the consistency of the two is high; if the difference between the amplitude of the output current of the image to be identified and the reference current amplitude is less than the preset amplitude deviation threshold (or the ratio is within the preset amplitude ratio range), it is determined that the consistency of the two is high; if the high current area overlap area ratio of the distribution pattern of the output current and the reference distribution pattern reaches or exceeds the preset distribution consistency threshold (such as 85%), it is also determined that the consistency of the two is high.

[0083] The image feature of the to-be-identified image can be determined based on the consistency indicated by the comparison result: if the reference conduction result, the reference current amplitude (or the reference distribution mode) corresponding to a certain known image sample and the conduction result and the output current of the to-be-identified image all satisfy the determination condition of high consistency, it is indicated that the visual feature of the to-be-identified image is highly matched with the visual feature of the known image sample, and therefore the image feature of the known image sample can be directly determined as the image feature of the to-be-identified image. For example: if the conduction result of the to-be-identified image is highly consistent with the reference conduction result of the known letter M sample, the amplitude of the output current is highly consistent with the reference current amplitude of the M sample, and the distribution mode of the output current is highly consistent with the reference distribution mode of the M sample, it can be determined that the image feature of the to-be-identified image is the shape and contour of the letter M. This consistency-based judgment logic can effectively avoid the limitations of single-dimensional data judgment, and through the coordinated comparison of multiple dimensions (conduction state, current amplitude, current distribution), the accuracy and reliability of image feature determination are ensured, so that the image recognition method based on the hybrid resistive array has stable recognition performance.

[0084] The application improves the adaptability of image recognition through preset identification conditions and comparison processing. Since the reference conditions can cover multiple image modes, different complexity inputs can be flexibly processed, and the influence of noise and variants is reduced. At the same time, through comprehensive consistency analysis of the conduction result and the output current, the dimension of feature judgment is enhanced, and the limitations of single electrical parameter are avoided. The decision-making ability of the hybrid resistive array in image recognition is optimized, and high-precision and real-time edge computing applications are supported.

[0085] In an implementation manner of an embodiment of the application, the preset arrangement mode includes:

[0086] The first type of resistive device and the second type of resistive device are arranged in the resistive array in a longitudinal alternating manner, so that any column in the resistive array contains only resistive devices of a single type;

[0087] Or, the first type of resistive device and the second type of resistive device are arranged in the resistive array in a one-by-one alternating manner, so that the four resistive devices adjacent to each first type of resistive device are all second type of resistive devices.

[0088] In an embodiment of the application, the preset arrangement mode refers to the spatial arrangement rule of the first type of resistive device and the second type of resistive device in the resistive array, which determines the relative position and distribution rule of the two types of devices in the array, and thus affects the voltage response and current output characteristics of the array in the image recognition process.

[0089] The preset arrangement mode includes a first mode, that is, the first type of resistance variable device and the second type of resistance variable device are arranged in the resistance variable array in longitudinal alternation. The longitudinal alternation refers to that the two types of devices are alternately distributed in the column direction of the array, that is, each column only contains a single type of resistance variable device, for example, the odd columns are all the first type of resistance variable device, the even columns are all the second type of resistance variable device, or vice versa. This arrangement mode makes any column in the resistance variable array contain only a single type of resistance variable device, thereby forming uniform voltage response characteristics in the column direction. When the image voltage signal is applied to the array, since the type of each column device is consistent, the column line driving voltage can be used to activate the conduction or reset operation of all devices in the column, thereby reducing the control complexity caused by type mixing. For example, under the application of a forward bias voltage, only the column containing the first type of device will respond as a whole, while the column containing only the second type of device remains in an inactive state, thereby forming a current output mode corresponding to the image column direction feature.

[0090] The preset arrangement mode also includes a second mode, that is, the first type of resistance variable device and the second type of resistance variable device are arranged in the resistance variable array in individual alternation. The individual alternation refers to that the two types of devices are alternately distributed in the row and column directions of the array, that is, each first type of resistance variable device has four adjacent resistance variable devices (up, down, left, right) which are all the second type of resistance variable device, thereby forming a checkerboard distribution pattern. This arrangement mode ensures that the first type of device and the second type of device are completely isolated in space, and the direct neighbors of each device are of the opposite type, thereby achieving electrical isolation in the local area. When a bias voltage is applied to a specific device, due to the difference in the types of adjacent devices, the voltage crosstalk and the risk of accidental operation are significantly reduced, for example, when a forward bias voltage is applied to the first type of device, the adjacent second type of device will not be accidentally turned on due to the same voltage, thereby improving the accuracy and stability of array operation.

[0091] The present application enhances the performance and reliability of the mixed resistance variable array in image recognition through the two preset arrangement modes of longitudinal alternation and individual alternation. The longitudinal alternation simplifies the voltage driving strategy through the consistency of the type in the column direction, improves the efficiency of column line control, and is particularly suitable for image recognition tasks with vertical direction features, for example, edge detection. The individual alternation reduces the interference between adjacent devices through local electrical isolation, avoids the state drift of part of the selected devices, thereby improving the durability and recognition accuracy of the array, and is particularly suitable for high-density arrays and complex image processing. Overall, the two arrangement modes optimize the device layout, realize low crosstalk and high parallelism of image feature extraction, and provide an efficient and stable hardware foundation for edge computing and other scenarios.

[0092] In an implementation manner of the embodiment of the present application, the first type of resistive switching device and the second type of resistive switching device are arranged in a longitudinal alternation or a one-by-one alternation to extend to an n*n array, to obtain a resistive switching array, where n is an odd number greater than 1.

[0093] In the embodiment of the present application, the n*n array refers to a square grid structure containing n device units in the row direction and the column direction, where n is an odd number greater than 1. The setting of the odd number ensures that the array can form a symmetrical and balanced device distribution when arranged in a longitudinal alternation or a one-by-one alternation, avoiding uneven type distribution or boundary effects caused by even scale. By arranging the first type of resistive switching device and the second type of resistive switching device in a longitudinal alternation or a one-by-one alternation to extend to an n*n array, a large-scale resistive switching array can be obtained, thereby supporting higher resolution or more complex image recognition tasks.

[0094] In the longitudinal alternation expansion, the first type of resistive switching device and the second type of resistive switching device are alternately distributed in the column direction, and each column contains only a single type of device. When extended to an n*n array, the odd columns can all be the first type of resistive switching device, and the even columns can all be the second type of resistive switching device, or vice versa. This expansion method maintains the consistency of the device type within the column, so that the column line driving voltage can be optimized for the characteristics of the entire column of devices, for example: when a positive bias voltage is applied, only the first type of device column will respond, and the second type of device column needs a negative bias voltage to activate. Since n is an odd number, the center column of the array is definitely assigned to a certain type, thereby forming a stable voltage response mode in the center region of the image and enhancing the recognition ability of symmetrical features.

[0095] In the one-by-one alternation expansion, the first type of resistive switching device and the second type of resistive switching device are distributed in a checkerboard pattern, that is, each first type of device has four adjacent devices that are the second type of device. When extended to an n*n array, this arrangement maintains the local isolation characteristics of the devices in the global range, and each device is surrounded by neighbors of the opposite type. Since n is an odd number, the number of rows and columns of the array is odd, ensuring that the number of first type of devices and second type of devices is close to balance, avoiding the type quantity deviation caused by the even scale. This balanced distribution helps to achieve uniform voltage response in image processing and reduce recognition deviation between regions.

[0096] The application significantly improves the accuracy and scope of image recognition by expanding the mixed resistive array to an n by n scale. The large-scale array can accommodate more pixel information, thereby processing more complex image features, such as high-resolution text, fine texture or complex contours. The odd scale setting optimizes the symmetry and type distribution of the array, making voltage application and current reading more stable and reliable. In addition, the expanded array retains the advantages of the original arrangement. The longitudinal alternating arrangement simplifies the column line control, and the individual alternating arrangement minimizes crosstalk interference, thereby improving the recognition ability while ensuring energy efficiency and durability.

[0097] In one implementation manner of the embodiment of the application, in order to facilitate the understanding of the implementation process of the image recognition method based on the mixed resistive array of the application, the application provides two embodiments for illustration, as shown in the following embodiment one and embodiment two.

[0098] Embodiment one: the application provides a structural schematic diagram of a resistive array, as shown in Figure 2 The application embodiment provides an electrical characteristic diagram of a resistive device based on a cation-active electrode, as shown in Figure 3 During the forward voltage scanning process, the device changes from a high resistance state to a low resistance state (i.e. SET process). Under the subsequent reverse positive voltage scanning, the device remains in a low resistance state until the voltage polarity is reversed. Under the negative bias voltage, the device returns to the initial high resistance state (i.e. RESET process). This indicates a typical non-volatile characteristic. In the resistive array, the positive voltage from row to column causes the SET operation on the device, while the positive voltage from column to row drives the RESET operation. The selected row performs read and write operations under different bias voltages, and all other unselected rows and columns remain at half of the bias voltage. The resistive device based on an anion-active electrode is opened during the negative voltage scanning process. The combination of the two resistive devices based on the cation-active electrode (positive voltage opening) and the anion-active electrode (negative voltage opening) prepares the resistive array, which is sensitive to positive and negative voltages, respectively.

[0099] Further, the application also provides a planar schematic diagram of a resistive array, as shown in Figure 4 For example, a 3x3 array, the blue circles represent resistive devices based on cation-active electrodes, and the yellow circles represent resistive devices based on anion-active electrodes. When the input positive and negative voltages are the same as the arrangement direction of the cells, all cells can be opened, and when a certain deflection angle is generated, only part of the cells can be opened.

[0100] Further, the application also provides a schematic diagram of image recognition based on a resistive array, as shown in Figure 5As shown, taking the letter image recognition task as an example, the letter passing unit applies a positive voltage, and the rest applies a negative voltage. When it is the letter Z, 9 units can generate discharge current, and when it is the letter M, only 5 units can generate discharge current, thereby performing recognition. The small-scale array of 3x3 is only applicable to relatively simple images. When the image is more complex, a larger-scale array can be used to realize image recognition.

[0101] Embodiment II: When the image pixel is higher and more complex, the 3x3 array can be expanded to a larger-scale array, thereby improving the image recognition accuracy. Further, as shown in Figure 6 Figure 6 is a schematic diagram of a longitudinal alternating arrangement resistive array structure provided by an embodiment of the present application, wherein the n x n array (n is an odd number), two different types of devices are arranged longitudinally in alternation. The array of devices based on cation active electrodes and anion active electrodes is expanded to n x n in longitudinal alternation. Similarly, the area where the letter passes applies a positive voltage. The number of open cation active electrode devices corresponding to different letters can be calculated as shown in Table 1:

[0102] Table 1

[0103]

[0104] Table 1 is only used as an example for reference and does not limit the present application. As can be seen from Table 1, in the case that the on-state current of each device is equal, as the array size n increases, the output current difference of different letters becomes larger, and multiple letters can be recognized.

[0105] Further, as shown in Figure 7 Figure 7 is a schematic diagram of a one-by-one alternating arrangement resistive array structure provided by an embodiment of the present application, wherein the n x n array (n is an odd number), two different types of devices are arranged one by one in alternation. The devices based on cation active electrodes and anion active electrodes are arranged one by one in alternation to expand to n x n. That is, the four devices adjacent to the cation active electrode device are all anion active electrode devices. The recognition result of different letters is similar to Figure 6 .

[0106] The advantage of one-by-one alternating arrangement over longitudinal alternation is that it can reduce the impact on adjacent devices when the target unit is turned on. For example: when a positive voltage is applied to the blue device in Figure 7 , the state of the adjacent four yellow devices will not change.

[0107] ​​Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software on a general hardware platform as necessary, and of course can also be realized by hardware, but in many cases the former is a better embodiment.

[0108] The embodiment of the present application also provides an image recognition device based on a hybrid resistive array, Figure 8 A structural schematic diagram of an image recognition device based on a hybrid resistive array provided by the present application is shown in the figure, which comprises: Figure 8

[0109] The acquisition unit 81 is configured to acquire a pixel matrix of an image to be recognized.

[0110] The conversion unit 82 is configured to convert the pixel matrix into an image voltage signal.

[0111] The energization unit 83 is configured to apply bias voltages of different polarities to a plurality of resistive devices in the resistive array based on the image voltage signal, wherein the resistive array is obtained by arranging a plurality of first-type resistive devices based on cation-active electrodes and a plurality of second-type resistive devices based on anion-active electrodes in a preset arrangement manner.

[0112] The reading unit 84 is configured to count the conduction results of the resistive devices in the resistive array after the bias voltages are applied, and read the output current of the resistive array, wherein the first-type resistive devices are turned on under a positive bias voltage, and the second-type resistive devices are turned on under a negative bias voltage.

[0113] The determination unit 85 is configured to determine the image features of the image to be recognized according to the conduction results and the amplitude or distribution mode of the output current.

[0114] In an embodiment of the present application, the first-type resistive devices are turned on under the positive bias voltage and are converted from a high resistance state to a low resistance state, and the second-type resistive devices are turned on under the negative bias voltage and are converted from a high resistance state to a low resistance state.

[0115] The first-type resistive devices are reset under the negative bias voltage and are converted from a high resistance state to a low resistance state, and the second-type resistive devices are reset under the positive bias voltage and are converted from a high resistance state.

[0116] In an embodiment of the present application, the energization unit 83 is specifically configured to:

[0117] apply a positive bias voltage to a first target resistive device in the resistive array and apply a negative bias voltage to a second target resistive device in the resistive array based on the image voltage signal;

[0118] ​The first target resistance change device is a resistance change device corresponding to a target region of the image to be identified, and the second target resistance change device is a resistance change device corresponding to a non-target region of the image to be identified. The first target resistance change device and the second target resistance change device each include at least one of the first type of resistance change device and the second type of resistance change device.

[0119] In an embodiment of the present application, the energizing unit 83 is specifically configured to:

[0120] The first voltage is applied to the target row line of the resistance change array to apply a forward bias voltage to the first target resistance change device. The target row line is a row line in which the first target resistance change device is located in the resistance change array.

[0121] The second voltage is applied to the target column line of the resistance change array to apply a negative bias voltage to the second target resistance change device. The target column line is a column line in which the second target resistance change device is located in the resistance change array.

[0122] In an embodiment of the present application, the energizing unit 83 is specifically configured to:

[0123] The third voltage is applied to other row lines and other column lines of the resistance change array. The other row lines and the other column lines are row lines and column lines other than the target row line and the target column line of the resistance change array. The third voltage is not greater than a preset proportion of the first voltage or the second voltage.

[0124] In an embodiment of the present application, the converting unit 82 is specifically configured to:

[0125] The pixels corresponding to the bright areas in the pixel matrix are mapped to the forward bias voltage. The bright areas in the pixel matrix correspond to the target region of the image to be identified.

[0126] The pixels corresponding to the dark areas in the pixel matrix are mapped to the negative bias voltage. The dark areas in the pixel matrix correspond to the non-target region of the image to be identified.

[0127] In an embodiment of the present application, the determining unit 85 is specifically configured to:

[0128] The comparison result is obtained by comparing the conduction result and the output current with a preset identification condition. The preset identification condition includes at least a reference current amplitude or a reference distribution mode for reference, and a reference conduction result for reference.

[0129] Based on the consistency of the conduction result indicated by the comparison result and the reference conduction result, and the consistency of the output current and the reference current amplitude or the reference distribution mode, the image feature of the image to be identified is determined.

[0130] In an embodiment of the present application, the preset arrangement mode includes:

[0131] The first type of resistance change device and the second type of resistance change device are arranged in longitudinal alternation in the resistance change array, so that any column in the resistance change array only contains a single type of resistance change device;

[0132] Alternatively, the first type of resistance change device and the second type of resistance change device are arranged in individual alternation in the resistance change array, so that the four adjacent resistance change devices of each first type of resistance change device are all second type of resistance change devices.

[0133] In an embodiment of the present application, the first type of resistance change device and the second type of resistance change device are extended to an n by n array in longitudinal alternation or individual alternation, to obtain a resistance change array, where n is an odd number greater than 1.

[0134] The features of the embodiments of the image recognition device based on the hybrid resistance change array can be referred to the related descriptions of the embodiments of the image recognition method based on the hybrid resistance change array, which will not be repeated here.

[0135] Embodiments of the present application also provide an electronic device, comprising a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above-mentioned embodiments of the image recognition method based on the hybrid resistance change array.

[0136] Embodiments of the present application also provide a computer readable storage medium, which stores a computer program, wherein the computer program is configured to perform the steps in any of the above-mentioned embodiments of the image recognition method based on the hybrid resistance change array when running.

[0137] In an exemplary embodiment, the above-mentioned computer readable storage medium can include, but is not limited to, a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0138] Embodiments of the present application also provide a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement the steps in any of the above-mentioned embodiments of the image recognition method based on the hybrid resistance change array.

[0139] Embodiments of the present application also provide another computer program product, which comprises a non-volatile computer readable storage medium, and the non-volatile computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the steps in any of the above-mentioned embodiments of the image recognition method based on the hybrid resistance change array.

[0140] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0141] The foregoing has provided a detailed description of an image recognition method and electronic device based on a hybrid resistive array provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. An image recognition method based on a hybrid resistive variable array, characterized in that, include: Obtain the pixel matrix of the image to be identified, and convert the pixel matrix into an image voltage signal; Based on the image voltage signal, bias voltages of different polarities are applied to multiple resistive switching devices in the resistive switching array, wherein the resistive switching array is obtained by arranging multiple first-type resistive switching devices based on cation active electrodes and multiple second-type resistive switching devices based on anion active electrodes in a preset arrangement. The conduction results of the resistive switching devices in the resistive switching array after applying a bias voltage are statistically analyzed, and the output current of the resistive switching array after applying a bias voltage is read. The first type of resistive switching device conducts under a positive bias voltage, and the second type of resistive switching device conducts under a negative bias voltage. Based on the conduction result and the amplitude or distribution pattern of the output current, the image features of the image to be identified are determined; The step of applying bias voltages of different polarities to multiple resistive devices in the resistive array based on the image voltage signal includes: A positive bias voltage is applied to the first target resistive switching device in the resistive switching array based on the image voltage signal, and a negative bias voltage is applied to the second target resistive switching device in the resistive switching array. Wherein, the first target resistive switching device is the resistive switching device corresponding to the target area of ​​the image to be identified in situ, and the second target resistive switching device is the resistive switching device corresponding to the non-target area of ​​the image to be identified in situ. Both the first target resistive switching device and the second target resistive switching device include at least one of the first type of resistive switching device and the second type of resistive switching device.

2. The image recognition method based on a hybrid resistive variable array according to claim 1, characterized in that, After the first type of resistive switching device is turned on under a positive bias voltage, it changes from a high resistance state to a low resistance state. After the second type of resistive switching device is turned on under a negative bias voltage, it changes from a high resistance state to a low resistance state. The first type of resistive switching device undergoes a reset operation under a negative bias voltage and transitions to a high-resistivity state, while the second type of resistive switching device undergoes a reset operation under a positive bias voltage and transitions to a high-resistivity state.

3. The image recognition method based on a hybrid resistive variable array according to claim 1, characterized in that, The step of applying a positive bias voltage to the first target resistive switching device in the resistive switching array based on the image voltage signal, and applying a negative bias voltage to the second target resistive switching device in the resistive switching array, includes: By applying a first voltage to the target row line of the resistive switching array, a forward bias voltage is applied to the first target resistive switching device, wherein the target row line is the row line where the first target resistive switching device is located in the resistive switching array; By applying a second voltage to the target column line of the resistive switching array, a negative bias voltage is applied to the second target resistive switching device, wherein the target column line is the column line where the second target resistive switching device is located in the resistive switching array.

4. The image recognition method based on a hybrid resistive variable array according to claim 3, characterized in that, After applying a positive bias voltage to the first target resistive switching device in the resistive switching array based on the image voltage signal, and applying a negative bias voltage to the second target resistive switching device in the resistive switching array, the method further includes: A third voltage is applied to the other row lines and other column lines of the resistive array, wherein the other row lines and other column lines are the row lines and column lines of the resistive array other than the target row line and the target column line, and the third voltage is not greater than a preset ratio of the first voltage or the second voltage.

5. The image recognition method based on a hybrid resistive variable array according to claim 1, characterized in that, The step of converting the pixel matrix into an image voltage signal includes: The pixels corresponding to the bright areas in the pixel matrix are mapped to a positive bias voltage, wherein the bright areas in the pixel matrix correspond to the target area of ​​the image to be identified; The pixels corresponding to the dark areas in the pixel matrix are mapped to negative bias voltages, wherein the dark areas in the pixel matrix correspond to the non-target areas of the image to be identified.

6. The image recognition method based on a hybrid resistive variable array according to claim 1, characterized in that, The step of determining the image features of the image to be identified based on the conduction result and the amplitude or distribution pattern of the output current includes: The conduction result and the output current are compared with preset identification conditions to obtain a comparison result. The preset identification conditions include at least a reference current amplitude or reference distribution pattern and a reference conduction result. Based on the consistency between the conduction result indicated by the comparison result and the reference conduction result, and the consistency between the output current and the reference current amplitude or the reference distribution pattern, the image features of the image to be identified are determined.

7. The image recognition method based on a hybrid resistive array according to claim 1, characterized in that, The preset arrangement includes: The first type of resistive switching device and the second type of resistive switching device are arranged alternately in the longitudinal direction in the resistive switching array, so that any column in the resistive switching array contains only a single type of resistive switching device. Alternatively, the first type of resistive switching device and the second type of resistive switching device are arranged alternately in the resistive switching array, such that the four adjacent resistive switching devices of each first type of resistive switching device are all second type of resistive switching devices.

8. The image recognition method based on a hybrid resistive array according to claim 7, characterized in that, The first type of resistive switching device and the second type of resistive switching device are arranged alternately in the vertical direction or alternately one by one to expand to an n-by-n array to obtain the resistive switching array, where n is an odd number greater than 1.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the steps of the image recognition method based on a hybrid resistive array as described in any one of claims 1 to 8.

Images