Silicon through hole lap joint structure, display panel and display device

Abstract

The invention relates to the technical field of display devices, and discloses a silicon through hole lap joint structure, a display panel and a display device, and the structure comprises an insulating layer and a CMOS substrate which are laminated. Conductive units distributed in an array are arranged in the insulating layer; the conductive unit comprises at least two through silicon vias penetrating through the insulating layer, and conductive media are deposited in the through silicon vias; the lower ends of the at least two silicon through holes in the conductive unit are electrically connected with the integrated circuit in the CMOS substrate, and the upper ends of the at least two silicon through holes in the conductive unit are electrically connected with the same anode. According to the invention, by constructing a multi-hole parallel silicon through hole lap joint structure, an electrically connected redundant backup is established for each pixel unit. When a single conductive hole fails due to process abnormity or defects, current can ensure that the sub-pixels are normally lightened through other parallel circuits, so that the inherent defect that dark spots are caused by single-point failure in the prior art is fundamentally overcome, poor display caused by the problem of through holes is reduced, and the display quality is improved. And the factory yield of the product and the reliability in the long-term use process are improved.

Description

Technical Field

[0001] This invention belongs to the field of display device technology, specifically relating to a through-silicon via (TSV) overlap structure, a display panel, and a display device, and particularly to a TSV overlap structure that improves the fault tolerance of TSV overlap. Background Technology

[0002] The continuous innovation of display technology has driven the widespread application of OLED (Organic Light Emitting Diode) technology. Compared with traditional AMOLED display technology, Micro-OLED has become the mainstream display solution in the fields of virtual reality (VR) and augmented reality (AR) due to its superior performance, and most related terminal products currently use this type of screen.

[0003] In micro-display applications, higher resolution is required for display panels to achieve higher imaging quality. As resolution continues to improve, pixel size and pixel pitch continue to shrink. Each pixel typically consists of three sub-pixels: blue, green, and red. A conductive layer is fabricated on a stepped horizontal surface for electrode lead-out. This conductive layer is connected to the integrated circuit beneath the anode layer through a metal structure within a through-silicon via (TSV).

[0004] Currently, most through-silicon vias (TSVs) in CMOS processes employ a single-via design. If a single TSV malfunctions and fails to conduct, any of the connected blue, green, or red sub-pixels will fail to light up, resulting in a dark spot defect. Furthermore, the centered placement of TSVs limits the design freedom for irregularly shaped pixels.

[0005] Therefore, the existing through-silicon via (TSV) design has become one of the key bottlenecks restricting the improvement of Micro-OLED display performance and pixel design innovation. Summary of the Invention

[0006] The purpose of this invention is to provide a silicon through-hole (STB) interconnect structure, a display panel, and a display device to solve the problem of dark spots easily generated by conductive through-holes in single-hole designs, achieve redundant backup of conductive connections, improve conductivity reliability and pixel yield, and at the same time release pixel design freedom.

[0007] Based on the above concept, the technical solution adopted by this invention is as follows: According to a first aspect of the present invention, a through-silicon via (TSV) overlap structure is provided, comprising an insulating layer and a CMOS substrate stacked together; the insulating layer is provided with an array of conductive units. The conductive unit includes at least two through-silicon vias that penetrate the insulating layer, and a conductive dielectric is deposited within the through-silicon vias; The lower ends of at least two through-silicon vias in the conductive unit are electrically connected to the integrated circuit in the CMOS substrate, and the upper ends are electrically connected to the same anode.

[0008] In some embodiments, the through-silicon via (TSV) overlap structure includes two TSVs, the central axes of which are inclined at an acute angle to the normal direction of the insulating layer.

[0009] In some embodiments, the distance between the lower ends of the two through-silicon vias in the horizontal direction is less than the distance between the upper ends.

[0010] In some embodiments, the lower ends of the two through-silicon vias are cross-connected to the same node.

[0011] In some embodiments, the top view of the two through-silicon vias is circular and is centrally symmetrical about the center point of the conductive unit.

[0012] In some embodiments, the through-silicon via (TSV) overlap structure includes three TSVs, and the projections of the three TSVs onto the insulating layer are triangularly distributed.

[0013] In some embodiments, the lower ends of any two of the three through-silicon vias are cross-connected to the same node; Alternatively, all three through-silicon vias are cross-connected to the same node; Alternatively, the three through-silicon vias can be independent of each other.

[0014] According to a second aspect of the present invention, a display panel is provided, comprising an anode, an organic layer, a cathode, an encapsulation layer and a filter layer sequentially stacked above the insulating layer.

[0015] In some embodiments, the orthogonal projection of the anode onto the insulating layer completely covers the conductive unit.

[0016] According to a third aspect of the present invention, a display device is provided, including the display panel described above.

[0017] The beneficial effects of this invention are as follows: 1. This invention establishes redundant backups for electrical connections for each pixel unit by constructing a multi-hole parallel through-silicon via (TSV) overlapping structure. When a single conductive via fails due to process abnormalities or defects, current can flow through other parallel paths to ensure the sub-pixel lights up normally. This fundamentally overcomes the inherent defect in existing technologies where "single-point failure leads to dark spots," reduces display defects caused by via problems, and improves product yield and long-term reliability.

[0018] 2. This invention, through a flexible layout of multi-point interconnection, releases the design freedom of pixels, making it possible to design advanced pixel structures for higher visual performance. Attached Figure Description

[0019] Figure 1 This is a structural diagram of the first through-silicon via overlapping structure of the present invention; Figure 2This is a structural diagram of the second type of through-silicon via overlapping structure of the present invention; Figure 3 This is a structural diagram of the third type of through-silicon via overlapping structure of the present invention; Figure 4 This is a structural diagram of the fourth type of through-silicon via overlapping structure of the present invention; Figure 5 This is a structural diagram of the fifth type of through-silicon via overlapping structure of the present invention; Figure 6 This is a structural diagram of the display panel of the present invention; Figure 7 This is a top view of the two through-silicon vias of the present invention on the insulating layer; Figure 8 This is a top view of the three through-silicon vias of the present invention on the insulating layer.

[0020] Figure label: First type of through-silicon via (TSV) overlap structure 100, second type of TSV overlap structure 200, third type of TSV overlap structure 300, fourth type of TSV overlap structure 400, fifth type of TSV overlap structure 500, display panel 600, CMOS substrate 110, insulating layer 120, conductive unit 130, TSV 140, anode 150, organic layer 160, cathode 170, encapsulation layer 180, and filter layer 190. Detailed Implementation

[0021] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the invention as detailed in the appended claims.

[0022] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. Unless otherwise defined, the technical or scientific terms used in this application should be understood in their ordinary sense by one of ordinary skill in the art to which this invention pertains. The words “a” or “one” and similar terms used in this application specification and claims do not indicate a limitation of quantity, but rather indicate the presence of at least one. “A plurality” means two or more. The words “comprising” or “including” and similar terms mean that the element or object preceding “comprising” or “including” covers the element or object listed following “comprising” or “including” and its equivalents, and does not exclude other elements or objects. The words “connected” or “linked” and similar terms are not limited to physical or mechanical connections and can include electrical connections, whether direct or indirect. The words “above” and / or “below” and similar terms are for ease of description only and are not limited to a location or spatial orientation. The singular forms “a,” “the,” and “the” used in this application specification and appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0023] The technical concept of this invention includes: the existing single-hole TSV design has the problem of single-point failure, that is, an abnormality of a single conductive hole will directly cause the corresponding sub-pixel to fail to light up, forming an unrepairable dark spot, which seriously restricts the improvement of product yield; in addition, it also has the problem of design rigidity, that is, the centered single-hole structure seriously restricts the freedom of pixel layout, making it difficult to realize advanced pixel designs aimed at improving visual experience.

[0024] To address the aforementioned issues, this invention modifies the traditional single-point connection mode into a multi-point interconnection mode with redundancy. The solution involves designing multiple conductive holes within the overlapping area of ​​a single pixel or sub-pixel, and using a specific geometric layout to connect them in parallel with the upper electrode layer, thereby constructing a backup path for the electrical connection.

[0025] Based on this idea, the present invention specifically conceives of various structural forms that can realize redundant connections: Form 1 provides a basic dual-hole backup structure.

[0026] Form 2 adopts an equilateral triangular symmetrical layout, which aims to optimize the uniformity of electrical distribution.

[0027] Form 3 further explores the balance between space utilization and connection reliability through circular symmetry and diagonal intersection wiring design.

[0028] The present invention utilizes parallel paths to achieve functional redundancy. When a certain via malfunctions, the current can be transmitted through other paths, thereby ensuring that the pixel lights up normally, significantly reducing the yield loss caused by single-point failure, and providing greater flexibility for irregular pixel design.

[0029] This application provides a through-silicon via (TSV) 140 overlap structure, a display panel, and a display device, including an insulating layer 120 and a CMOS substrate 110 stacked together; the insulating layer 120 is provided with an array of conductive units 130. The conductive unit 130 includes at least two through-silicon vias 140 penetrating the insulating layer 120, and a conductive dielectric is deposited in the through-silicon vias 140. The lower ends of at least two through-silicon vias 140 in the conductive unit 130 are electrically connected to the integrated circuit in the CMOS substrate 110, and the upper ends are electrically connected to the same anode 150.

[0030] This invention establishes redundant backups for electrical connections for each pixel unit by constructing a multi-hole parallel through-silicon via (TSV) 140 overlapping structure. When a single conductive via fails due to process abnormalities or defects, current can flow through other parallel paths to ensure the sub-pixel lights up normally. This fundamentally overcomes the inherent defect in existing technologies where "single-point failure leads to dark spots," reduces display defects caused by via issues, and improves product yield and long-term reliability. Simultaneously, the flexible layout of multi-point interconnection releases design freedom for pixels, making it possible to design advanced pixel structures with higher visual performance.

[0031] The display panel described in this application includes an anode 150, an organic layer 160, a cathode 170, an encapsulation layer 180, and a filter layer 190 stacked sequentially on the insulating layer 120. It is mainly used in the field of near-eye micro-displays, such as VR / AR head-mounted smart display devices, as a display panel for products or components in the field of near-eye micro-displays.

[0032] The display device described in this application includes the display panel as described above.

[0033] The following is in conjunction with the appendix Figures 1 to 8 This application provides a detailed description of a through-silicon via (TSV) overlap structure, a display panel, and a display device.

[0034] like Figure 1 As shown, this application provides a first type of through-silicon via (TSV) overlap structure 100, including an insulating layer 120 and a CMOS substrate 110 stacked together; the insulating layer 120 is provided with an array of conductive units 130.

[0035] In this embodiment, the conductive unit 130 includes two through-silicon vias 140 that penetrate the insulating layer 120, and a conductive medium is deposited in the through-silicon vias 140.

[0036] The conductive medium can be selected from tungsten, copper, or aluminum; in this embodiment, tungsten is used as the conductive medium. Tungsten has excellent thermal stability and a high melting point, and can withstand the high-temperature steps in subsequent processes without significant diffusion or electromigration. Furthermore, it is a mature material used in standard CMOS processes, exhibits good filling performance, and balances reliability, performance, and manufacturing cost.

[0037] In this embodiment, the central axes of the two through-silicon vias 140 are inclined at an acute angle to the normal direction of the insulating layer 120. Compared with the vertical via wall, the inclined via wall structure can usually form a larger contact area with the filled conductive medium and the surrounding insulating layer 120. At the same time, the two inclined paths can form parallel conductive paths from different directions.

[0038] Furthermore, the horizontal distance between the lower ends of the two through-silicon vias 140 is less than the distance between their upper ends, and both through-silicon vias 140 are circular in their top view, and are centrally symmetrical about the center point of the conductive unit 130, as shown below. Figure 7 As shown.

[0039] In this embodiment, the lower ends of the two through-silicon vias 140 in the conductive unit 130 are electrically connected to the integrated circuit in the CMOS substrate 110, and the upper ends are electrically connected to the same anode 150.

[0040] The first type of through-silicon via (TSV) overlap structure 100 provides two independent and parallel conductive paths for a single anode 150. Ideally, the two paths share the current, reducing the current density of a single path. When one of the TSVs 140 becomes open-circuited or experiences high resistance due to process defects or long-term electromigration, the drive current can be automatically and seamlessly transferred to the anode 150 through the other normal TSV 140, thereby ensuring that the corresponding sub-pixel can be lit normally.

[0041] like Figure 2 As shown, this application provides a second type of through-silicon via (TSV) overlap structure 200, which is substantially the same as the first type of TSV overlap structure 100, except that the lower ends of the two TSVs 140 in the second type of TSV overlap structure 200 are cross-connected to the same node.

[0042] The two through-silicon vias 140 here are connected to the same electrical node at the lower end, meaning that the parasitic parameters such as resistance and inductance, viewed from the integrated circuit driver end to the anode 150, are more balanced and uniform. This symmetry helps ensure that the current is evenly distributed in the two paths, avoiding current bias caused by slight differences in parameters, thereby improving the consistency of pixel illumination response speed and the stability of long-term operation.

[0043] The cross-connection structure at the lower end reduces the alignment accuracy requirements of the lower metal wiring layer in the CMOS substrate 110. Since the two holes eventually converge at the same point, the contact holes or metal pads below them can be designed more compactly, or even merged into one, which simplifies the layout design of the lower integrated circuit and improves compatibility with existing CMOS processes.

[0044] like Figure 3 As shown, this application provides a third type of through-silicon via (TSV) overlap structure 300, which is substantially the same as the first type of TSV overlap structure 100, except that the third type of TSV overlap structure 300 includes three TSVs 140, and the three TSVs 140 are all independent of each other.

[0045] The three through-silicon vias 140 project onto the insulating layer 120 in a triangular arrangement. The horizontal distance between the lower ends of the three through-silicon vias 140 is smaller than the distance between their upper ends. Figure 8 As shown.

[0046] Furthermore, based on the same inventive concept, those skilled in the art should understand that the number of through-silicon vias 140 included in the conductive unit 130 of the aforementioned through-silicon via overlap structure is not limited to the two or three listed in the foregoing embodiments. Any design that uses at least two through-silicon vias 140 to form a redundant conductive path, regardless of whether the specific number is two, three, four, or more, falls within the protection scope of this invention. The arrangement of the through-silicon vias 140 in a top view can be triangular, rectangular, circular, or any other geometric pattern capable of achieving effective electrical connection. These simple transformations or equivalent substitutions based on the number and arrangement are all considered to cover the core design concept of this invention and should be covered by the patent scope of this invention.

[0047] like Figure 4 As shown, this application provides a fourth type of through-silicon via (TSV) overlap structure 400, which is substantially the same as the third type of TSV overlap structure 300 described above. The difference is that in the fourth type of TSV overlap structure 400, the lower ends of any two of the three TSVs 140 are cross-connected to the same node.

[0048] The projections of the three through-silicon vias 140 onto the insulating layer 120 are still triangularly distributed, and the distance between the lower ends of the three through-silicon vias 140 in the horizontal direction is smaller than the distance between the upper ends.

[0049] like Figure 5 As shown, this application provides a fifth type of through-silicon via (TSV) overlap structure 500, which is substantially the same as the third type of TSV overlap structure 300, except that the lower ends of the three TSVs 140 are all cross-connected to the same node.

[0050] The projections of the three through-silicon vias 140 onto the insulating layer 120 are still triangularly distributed, and the distance between the lower ends of the three through-silicon vias 140 in the horizontal direction is smaller than the distance between the upper ends.

[0051] Based on the core concept proposed in this invention, those skilled in the art will understand that the protection scope of the via 140 overlap structure is not limited to a specific number of vias. As long as at least two vias 140 in a conductive unit 130 composed of multiple vias 140 have their lower ends cross-connected to the same node, thus forming a local redundant backup path, the technical solution falls within the protection scope of this invention. Regardless of whether the total number of vias 140 in the conductive unit 130 is three, four, or more, and regardless of the specific combination of these cross-connections—for example, forming two pairs of cross-connections in four vias, or three vias interconnected in pairs—these are all equivalent transformations or simple extensions of the "partial cross-interconnection" concept described in this invention. This design, by introducing a defined backup subnet into the redundant network, further enhances the level of connection reliability assurance and should be covered by the patent scope of this invention.

[0052] A display panel 600 is characterized in that it comprises an anode 150, an organic layer 160, a cathode 170, an encapsulation layer 180, and a filter layer 190, which are sequentially stacked on top of the insulating layer 120.

[0053] A display device includes the display panel 600 described above.

[0054] Detailed implementation methods and principles: Within a single conductive unit 130, multiple independent conductive paths are established for the same anode 150 by providing at least two parallel through-silicon vias 140. This design constitutes a basic redundant unit for electrical connections. Under ideal operating conditions, current is transmitted through all available paths, reducing the current density and load of a single path. When any of the through-silicon vias 140 becomes open-circuited or in a high-resistance state due to manufacturing defects, electromigration, or physical damage, the drive current will automatically and seamlessly switch to other normal through-silicon vias 140 channels, ensuring a continuous current supply to the anode 150 and maintaining the normal illumination function of the sub-pixel.

[0055] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. The invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the following claims.

[0056] It should be understood that the present invention is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A silicon through-hole overlapping structure, characterized in that, It includes an insulating layer and a CMOS substrate stacked together; the insulating layer contains an array of conductive units. The conductive unit includes at least two through-silicon vias that penetrate the insulating layer, and a conductive dielectric is deposited within the through-silicon vias; The lower ends of at least two through-silicon vias in the conductive unit are electrically connected to the integrated circuit in the CMOS substrate, and the upper ends are electrically connected to the same anode.

2. The silicon through-hole overlapping structure according to claim 1, characterized in that, It includes two through-silicon vias, the central axes of which are inclined at an acute angle to the normal direction of the insulating layer.

3. The silicon through-hole overlapping structure according to claim 2, characterized in that, The distance between the lower ends of the two through-silicon vias in the horizontal direction is less than the distance between the upper ends.

4. A silicon through-hole overlapping structure according to claim 2 or 3, characterized in that, The lower ends of the two through-silicon vias are cross-connected to the same node.

5. A silicon through-hole overlapping structure according to claim 2, characterized in that, The top view of both through-silicon vias is circular, and they are centrally symmetrical about the center point of the conductive unit.

6. The silicon through-hole overlapping structure according to claim 1, characterized in that, It includes three through-silicon vias, and the projections of the three through-silicon vias onto the insulating layer are triangularly distributed.

7. A silicon through-hole overlapping structure according to claim 6, characterized in that, The lower ends of any two of the three through-silicon vias are cross-connected to the same node; Alternatively, all three through-silicon vias are cross-connected to the same node; Alternatively, the three through-silicon vias can be independent of each other.

8. A display panel, characterized in that, It includes an anode, an organic layer, a cathode, an encapsulation layer, and a filter layer, which are stacked sequentially on top of the insulating layer.

9. A display panel according to claim 8, characterized in that, The orthogonal projection of the anode onto the insulating layer completely covers the conductive unit.

10. A display device, characterized in that, Includes the display panel as described in any one of claims 8 to 9.

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