Semiconductor structure and forming method thereof

By introducing a dielectric buffer layer into the semiconductor structure, the problem of insufficient breakdown strength of MIM capacitors is solved, the breakdown capability of capacitors is enhanced, they are suitable for high-voltage environments, and the device performance of semiconductor structures is improved.

CN121532010APending Publication Date: 2026-02-13SEMICON MFG INT (SHANGHAI) CORP
0 Cites 0 Cited by

Patent Information

Application Number
CN202411104879.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-12
Publication Date
2026-02-13

AI Technical Summary

Technical Problem

Existing MIM capacitors have insufficient breakdown strength, making them prone to breakdown under high voltage conditions, which affects the device performance of semiconductor structures.

Method used

Introducing a dielectric buffer layer into a semiconductor structure allows multiple electrode layers to be stacked sequentially on the dielectric buffer layer from bottom to top. The dielectric buffer layer has a higher breakdown strength than the first dielectric layer. The material used is silicon nitride, silicon oxynitride, or silicon carbide nitride, with a thickness of 20-60 nanometers. This reduces stress in the capacitor and enhances its breakdown resistance.

Benefits of technology

The breakdown voltage of the MIM capacitor was increased, enhancing its breakdown resistance and enabling it to operate in high-voltage environments, thereby improving the device performance of the semiconductor structure.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

The invention discloses a semiconductor structure and a forming method thereof. A first dielectric layer on the substrate; the dielectric buffer layer is located on the first dielectric layer, and the anti-breakdown strength of the dielectric buffer layer is larger than that of the first dielectric layer; the multiple electrode layers are sequentially stacked on the dielectric buffer layer from bottom to top; the dielectric layers are located between the adjacent electrode layers in the longitudinal direction; the second dielectric layer is located on the substrate and covers the multi-layer electrode layer. The anti-breakdown strength of the dielectric buffer layer is greater than the anti-breakdown strength of the first dielectric layer, so that the anti-breakdown voltage of a capacitor (MiM) formed by the multi-layer electrode layer and the dielectric layer is increased, the anti-breakdown capability of the capacitor is improved, the capacitor can be suitable for a high-voltage working environment, and the device performance of the semiconductor structure is further improved.
Need to check novelty before this filing date? Find Prior Art