Solar cell and preparation method thereof, photovoltaic module and photovoltaic system

Abstract

The invention is suitable for the technical field of solar cells, provides a solar cell and a preparation method thereof, a photovoltaic module and a photovoltaic system, and can improve the power generation efficiency of the solar cell. Comprising a silicon substrate; the light receiving surface of the silicon substrate is provided with a plurality of concave parts and a plurality of convex parts; the convex parts and the concave parts are alternately arranged; suede structures are formed on the surfaces of the concave parts and the convex parts.

Description

Technical Field

[0001] This application belongs to the field of solar cell technology, and in particular relates to a solar cell and its preparation method, photovoltaic module and photovoltaic system. Background Technology

[0002] The power generation efficiency of a solar cell is positively correlated with its light-receiving area; allowing it to absorb more light helps improve the efficiency of the solar cell. The texturing process of solar cells creates a textured structure on the surface of the silicon substrate. This textured structure grows only on the surface of the silicon wafer, and its light-receiving area is the planar area of ​​the silicon wafer surface.

[0003] Thus, the light-receiving area of ​​solar cells is limited by the size of the silicon substrate, which makes it impossible to improve the power generation efficiency of solar cells. Therefore, how to increase the light-receiving area of ​​solar cells in order to improve the power generation efficiency of solar cells is an urgent technical problem to be solved. Summary of the Invention

[0004] This application provides a solar cell and its preparation method, a photovoltaic module and a photovoltaic system, aiming to solve the problem of how to improve the power generation efficiency of solar cells.

[0005] To achieve the above objectives, the present invention provides the following technical solution: In a first aspect, a solar cell is provided, comprising: a silicon substrate; the light-receiving surface of the silicon substrate having a plurality of recesses; and the surface of the recesses having a textured surface.

[0006] In some embodiments, the maximum depth of the recess is 15-50 micrometers.

[0007] In some embodiments, the velvet structure includes several types of pyramidal structures.

[0008] In some embodiments, the width of the recessed portion projected onto the silicon substrate is less than or equal to 100 micrometers.

[0009] In some embodiments, the height of the pyramidal structure is less than or equal to 3 micrometers.

[0010] In a second aspect, a method for manufacturing a solar cell is provided, comprising: providing a silicon substrate; forming a plurality of recesses on the light-receiving surface of the silicon substrate; and forming a textured surface on the surface of the recesses.

[0011] In some embodiments, forming a plurality of recesses on a silicon substrate includes: etching the silicon substrate with an etching material to form a plurality of the recesses on the light-receiving surface of the silicon substrate.

[0012] In some embodiments, the corrosive material is KOH or NaOH.

[0013] In some embodiments, etching a silicon substrate with an etchant to form a plurality of recesses on the light-receiving surface of the silicon substrate includes: forming a mask layer on the silicon substrate; the mask layer is used to isolate the etchant; breaking down the mask layer to form a plurality of breakdown regions; using the etchant to etch the silicon substrate in the plurality of breakdown regions; and removing the mask layer to form a plurality of recesses.

[0014] In some embodiments, the mask layer is penetrated to form a plurality of penetration regions, including: using a laser to penetrate the mask layer to form a plurality of penetration regions; the laser spot size is 30-100 micrometers.

[0015] In some embodiments, the temperature range corresponding to the reaction conditions for etching the silicon substrate in several breakdown regions is 50-80°C.

[0016] In some embodiments, the etching time for etching the silicon substrate in several breakdown regions is 30-300 s.

[0017] In some embodiments, removing the mask layer includes cleaning the silicon substrate with hydrofluoric acid to remove the mask layer.

[0018] In some embodiments, the time for cleaning the silicon substrate is 180-360 seconds.

[0019] In some embodiments, the reaction conditions for cleaning the silicon substrate with hydrofluoric acid correspond to room temperature.

[0020] In some embodiments, the method further includes polishing the silicon substrate with a polishing material before forming the mask layer on the silicon substrate.

[0021] In some embodiments, the reaction conditions for polishing the silicon substrate using polishing materials correspond to a temperature of 70-90°C.

[0022] In some embodiments, the polishing time for polishing the silicon substrate is 60-300 seconds.

[0023] Thirdly, the present invention provides a solar cell, which is made by the solar cell preparation method described above.

[0024] Fourthly, the present invention provides a photovoltaic module, which includes any of the possible solar cells described above.

[0025] Fifthly, the present invention provides a photovoltaic system, which includes the photovoltaic modules described above.

[0026] The beneficial effects of this invention are as follows: The solar cells, their fabrication methods, photovoltaic modules, and photovoltaic systems described in this application have a silicon substrate with several recesses on its surface, and these recesses have a textured surface. This increases the surface area of ​​the silicon substrate compared to a flat silicon substrate, thereby increasing the light-receiving area of ​​the textured surface and ultimately improving the power generation efficiency of the solar cell. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of the textured surface structure of a conventional solar cell provided in an embodiment of this application; Figure 2 This is a schematic diagram of the structure of a solar cell provided in an embodiment of this application; Figure 3 This is a schematic flowchart of a method for fabricating a solar cell according to an embodiment of this application; Figure 4 This is a schematic diagram of the structure of a silicon substrate provided in an embodiment of this application; Figure 5 This is a schematic diagram of a plurality of recesses formed on the light-receiving surface of a silicon substrate according to an embodiment of this application; Figure 6 This is a schematic flowchart of a method for preparing a solar cell according to another embodiment of this application; Figure 7 This is a schematic diagram of forming a mask layer on a silicon substrate according to another embodiment of this application; Figure 8 This is a schematic diagram of the mask layer after breakdown according to another embodiment of this application; Figure 9 This is a schematic diagram of a silicon substrate with several etched breakdown regions provided in another embodiment of this application; Figure 10 This is a schematic flowchart of a method for preparing a solar cell according to another embodiment of this application.

[0028] Explanation of key component symbols: 10, solar cell; 11, silicon substrate; 111, recess; 113, protrusion; 112, textured surface; 12, mask layer; 121, breakdown area. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. Examples of embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. Furthermore, it should be understood that the specific embodiments described herein are merely for explaining this application and are not intended to limit this application.

[0030] In the description of this application, it should be understood that the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0031] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0032] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0033] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0034] The following disclosure provides numerous different embodiments or examples for implementing various structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0035] The power generation efficiency of a solar cell is positively correlated with its light-receiving area; allowing it to absorb more light helps improve the efficiency of the solar cell. Figure 1 A schematic diagram of the textured surface structure 112 of a conventional solar cell 10 is shown, as follows: Figure 1 As shown, the texturing process of solar cell 10 forms a textured structure 112 on the surface of silicon substrate 11. The textured structure 112 grows only on the surface of the silicon wafer, and its light-receiving area is the planar area of ​​the silicon wafer surface.

[0036] Thus, the light-receiving area of ​​the solar cell 10 is limited by the size of the silicon substrate 11, which makes it impossible to improve the power generation efficiency of the solar cell 10. Therefore, how to increase the light-receiving area of ​​the solar cell 10 in order to improve the power generation efficiency of the solar cell 10 is an urgent technical problem to be solved.

[0037] According to one aspect of this application, a solar cell 10 is provided, such as... Figure 2 As shown, it includes: a silicon substrate 11; the light-receiving surface of the silicon substrate 11 has a plurality of recesses 111 and a plurality of protrusions 113; the protrusions 111 and the recesses 113 are arranged alternately; the surfaces of the recesses 111 and the plurality of protrusions 113 are formed with a textured surface structure 112.

[0038] The solar cell 10 and its fabrication method, photovoltaic module and photovoltaic system of the present application embodiment have a plurality of recesses 111 on the surface of the silicon substrate 11, and the surface of the recesses 111 is formed with a textured structure 112. In this way, compared with a flat silicon substrate 11, the surface area of ​​the silicon substrate 11 can be increased, the light-receiving area of ​​the solar cell 10 can be increased, and thus the power generation efficiency of the solar cell 10 can be improved.

[0039] It should be noted that the silicon substrate 11 is a single-crystal silicon substrate, including P-type and N-type.

[0040] It should be noted that the silicon substrate 11 has two opposing surfaces, including a light-receiving surface and a back-lighting surface. In this embodiment, the light-receiving surface and the back-lighting surface of the silicon substrate 11 may have the same or different textured structures 112, or the light-receiving surface may have a textured structure 112 and the back-lighting surface may be a polished surface; no specific limitation is made here.

[0041] It should be noted that the recesses 111 can be arranged uniformly or randomly, without restriction.

[0042] The recessed portion 111 can be an irregularly shaped pit.

[0043] In some embodiments, the maximum depth L of the recess 111 is 15-50 micrometers. For example, it can be any value between 15 micrometers, 25 micrometers, 35 micrometers, 45 micrometers, 50 micrometers or 15-50 micrometers, and there is no specific limitation herein.

[0044] In this way, the maximum depth L of the recess 111 is within a suitable range, which can avoid the maximum depth L being too large, causing the silicon substrate 11 to be too thin and reducing the mechanical strength of the solar cell 10. It can also effectively increase the light-receiving area of ​​the solar cell 10 and improve the power generation efficiency of the solar cell 10.

[0045] In some embodiments, the width of the recess 111 projected onto the silicon substrate 11 is less than or equal to 100 micrometers. For example, it can be any value between 10 micrometers, 20 micrometers, 30 micrometers, 40 micrometers, 50 micrometers, 60 micrometers, 70 micrometers, 80 micrometers, 90 micrometers, 100 micrometers, or 0-100 micrometers, and is not specifically limited herein.

[0046] Thus, the width of the recess 111 projected onto the silicon substrate 11 is within a suitable range, which can prevent the recess 111 from being too wide, thus weakening the scattering and trapping of light and reducing the light absorption efficiency.

[0047] In some embodiments, the velvet structure 112 includes several types of pyramidal structures.

[0048] Understandably, several pyramidal structures are provided on the silicon substrate 11. Since the light-receiving surface has several recesses 111, the light-trapping area of ​​the pyramidal structures on the surface of the silicon substrate 11 can be larger than the size of the silicon substrate 11, thereby increasing the light-receiving area of ​​the solar cell 10 and thus improving the power generation efficiency of the solar cell 10.

[0049] The following describes several different types of pyramid-like structures: 1. When there is one apex, the pyramidal structure includes at least four lateral edges and at least four lateral faces. For example, a pyramidal structure can have one apex, four lateral edges, and four lateral faces; or it can have one apex, five lateral edges, and five lateral faces; or it can have one apex, six lateral edges, and six lateral faces, and so on. In this case, the number of lateral edges and the number of lateral faces are the same.

[0050] II. When there are N vertices, the pyramid-like structure includes 4N lateral edges and 4N lateral faces, where N is greater than 1 and is a positive integer. This type of pyramid structure consists of multiple pyramid structures sharing a single base. In this case, the vertices of the multiple pyramid-like structures can have the same or different heights, and the lateral edges can have the same or different lengths; no specific limitations are imposed here. It should be noted that some lateral edges may overlap at a certain height above the base, and their other ends may extend to their respective vertices.

[0051] In some embodiments, the height h of the pyramidal structure is less than or equal to 3 micrometers. For example, it can be any value between 1 micrometer, 1.5 micrometers, 2 micrometers, 2.5 micrometers, 3 micrometers, or 0-3 micrometers, without any specific limitation herein.

[0052] Thus, by keeping the height h of the pyramidal structure within a suitable range, it is possible to avoid the pyramidal structure being too high, which could lead to breakage and wear during subsequent processing, thereby compromising the integrity of the textured surface. Moreover, an excessively high height may cause light to escape after multiple reflections between the pyramids, reducing the light-trapping effect, decreasing light absorption, and affecting the photoelectric conversion efficiency of the solar cell 10.

[0053] According to one aspect of this application, Figure 3 This invention provides a method for preparing a solar cell 10, as illustrated in the embodiments of the present invention. Figure 3 As shown, the preparation method for preparing the above-mentioned solar cell 10 includes: S201, Provides silicon substrate 11.

[0054] The silicon substrate 11 can be a P-type silicon substrate 11 or an N-type silicon substrate 11, and can be monocrystalline silicon or polycrystalline silicon, without limitation.

[0055] For example, the silicon substrate 11 can be as follows Figure 4 As shown.

[0056] As one possible approach, after obtaining the original silicon substrate 11, the original silicon substrate 11 can be cleaned to remove organic matter, metal impurities, and particles from its surface, thus obtaining the silicon substrate 11.

[0057] In one example, the raw silicon substrate 11 can be cleaned using the RCA standard cleaning method.

[0058] S202, Several recesses 111 are formed on the light-receiving surface of the silicon substrate 11.

[0059] As one possible implementation, an etching material can be used to etch the light-receiving surface of the silicon substrate 11 to form several recesses 111.

[0060] It should be noted that the specific details of using an etching material to etch the light-receiving surface of the silicon substrate 11 to form several recesses 111 can be found in the following descriptions, and will not be repeated here.

[0061] Understandably, using an etching material to etch the light-receiving surface of the silicon substrate 11 to form several recesses 111 can reduce the probability of damage to the silicon substrate 11 compared to mechanical means.

[0062] As another possible implementation, mechanical equipment can be used to mechanically work the light-receiving surface of the silicon substrate 11 to form several recesses 111.

[0063] In some embodiments, the corrosive material is KOH or NaOH.

[0064] Understandably, using KOH or NaOH to etch the silicon substrate 11 can not only increase the formation rate of the recess 111, but also reduce the probability of damage to the silicon substrate 11 compared to mechanical means.

[0065] In practical applications, other types of corrosive materials can also be used, which are not limited here.

[0066] In one example, a schematic diagram showing the formation of several recesses 111 on the light-receiving surface of the silicon substrate 11 can be shown as follows: Figure 5 As shown.

[0067] S203, A velvety structure 112 is formed on the surface of the recess 111.

[0068] As one possible implementation, the surface of the silicon substrate 11 can be treated with a texturing solution to form a textured structure 112 on the surface of the recess 111.

[0069] For example, the silicon substrate 11 can be placed in the first texturing solution for preliminary alkaline texturing to obtain the texturized silicon substrate 11. The initial texturized surface of the silicon substrate 11 is a dense and smooth pyramid structure.

[0070] Furthermore, a second texturing solution is used to texturize the monocrystalline silicon wafer after the initial cleaning, so as to form a texturized structure 112 on the surface of the silicon substrate 11.

[0071] The first texturing solution includes a first alkaline solution and a first additive.

[0072] The first alkaline solution may include, but is not limited to, one or more of the following strongly alkaline solutions: sodium hydroxide (NaOH), potassium hydroxide (KOH), ammonia hydroxide (NH4OH), or tetramethylhydroxylamine (TMAH).

[0073] The second texturing solution includes at least a second alkaline solution, which includes, but is not limited to, one or more of strongly alkaline solutions such as sodium hydroxide (NaOH), potassium hydroxide (KOH), ammonium hydroxide (NH4OH), or tetramethylhydroxylamine (TMAH).

[0074] The components of the first additive may include: surfactants, natural polysaccharide compounds, dispersants, emulsifiers, nucleating agents, chelating agents, naphthalene sulfonate formaldehyde condensates, inorganic bases, silicon reaction catalysts, and water.

[0075] Understandably, different types of the first additive will result in specific reaction rates of the first alkaline solution on different crystal planes of the monocrystalline silicon wafer. The type of the first additive can be selected according to requirements, and no specific limitation is made here.

[0076] In some embodiments, the second texturing solution further includes a second additive. The main components of the second additive include, but are not limited to: surfactants, natural polysaccharide compounds, dispersants, emulsifiers, nucleating agents, chelating agents, naphthalene sulfonate formaldehyde condensates, inorganic bases, silicon reaction catalysts, and water.

[0077] Understandably, appropriate additives can optimize the uniformity and microstructure of the velvet surface, thereby improving its photoelectric properties.

[0078] In one example, a schematic diagram of the textured structure 112 formed on the surface of the silicon substrate 11 can be referred to above. Figure 2 .

[0079] The solar cell 10, its fabrication method, photovoltaic module, and photovoltaic system of this application embodiment are achieved by forming a plurality of recesses 111 on the light-receiving surface of a silicon substrate 11 and forming a textured structure 112 on the surface of the silicon substrate 11. This alters the surface morphology of the silicon wafer, increasing the surface area of ​​the silicon substrate 11 compared to a flat silicon substrate 11, reducing reflectivity, and potentially improving the current of the cell. Simultaneously, the silicon wafer size remains unchanged, allowing for compatibility with existing cell and module processes without requiring equipment modifications.

[0080] In some embodiments, Figure 6 This is a schematic flowchart of a method for fabricating a solar cell 10 according to another embodiment of this application, as shown below. Figure 6 As shown, in order to etch the silicon substrate 11 using an etching material, a plurality of recesses 111 are formed on the silicon substrate 11. The above-mentioned S202 specifically includes the following steps: S301, A mask layer 12 is formed on a silicon substrate 11.

[0081] The mask layer 12 is used to isolate corrosive materials.

[0082] For example, a schematic diagram of forming a mask layer 12 on a silicon substrate 11 can be shown as follows: Figure 7 As shown.

[0083] As one possible implementation, the silicon substrate 11 can be placed in a deposition apparatus, and silane gas and nitrogen oxide gas can be introduced into the deposition apparatus to grow a silicon dioxide film on the surface of the silicon substrate 11 to form a mask layer 12.

[0084] The deposition equipment can be PECVD equipment, etc.

[0085] In some embodiments, the silicon substrate 11 may be placed in a deposition apparatus, and silane gas and ammonia gas may be introduced into the deposition apparatus to grow a silicon nitride film on the surface of the silicon substrate 11 to form a mask layer 12.

[0086] In practical applications, mask layers 12 can also be formed on silicon substrates 11 in other ways, which are not limited here.

[0087] S302, the mask layer 12 is broken down, forming several breakdown regions 121.

[0088] Among them, "penetrating the mask layer 12" means completely penetrating the mask layer 12.

[0089] For example, a schematic diagram after the mask layer 12 is broken down can be shown as follows: Figure 8 As shown.

[0090] As one possible implementation, a laser can be used to penetrate the mask layer 12 to form several penetration regions 121.

[0091] For example, a laser device can be provided, and the position coordinates of the area 121 to be penetrated can be input into the laser device. When the laser device receives the laser activation command, it can emit a laser to the area corresponding to the position coordinates. Under the action of the laser, the mask layer 12 in the area corresponding to the position coordinates is ablated and penetrated, forming several penetration areas 121.

[0092] It should be noted that the laser spot size is 30-100 micrometers. For example, the spot size can be any value between 30, 40, 50, 60, 70, 80, 90, 100 micrometers or 30-100 micrometers, and there is no specific limitation here.

[0093] In this way, the size of the laser spot is within a suitable range, which can avoid the breakdown area 121 being too small due to the spot size being too small, resulting in the subsequent recess 111 having too small a surface area, which cannot effectively increase the light-receiving area of ​​the silicon substrate 11. It can also avoid the laser energy distribution range being too wide due to the spot size being too large, causing the material around the mask layer 12 to undergo unexpected melting or phase change due to heat conduction, resulting in increased sidewall roughness.

[0094] As another possible implementation, a scanning ion beam can be used to bombard the region 121 to be broken down in the mask layer 12, locally breaking chemical bonds and forming several breakdown regions 121.

[0095] For example, the ion source for scanning ion beams can be a gallium ion source, etc.

[0096] As another possible implementation, the silicon substrate 11 covered by the mask layer 12 can be immersed in an electrolyte, with a platinum electrode as the counter electrode and the silicon substrate 11 as the working electrode, and a bias voltage applied. The electric field drives ion migration, selectively etching the mask layer 12 to the breakdown region 121, forming several breakdown regions 121.

[0097] In practical applications, other methods can be used to penetrate the mask layer 12, which are not limited here.

[0098] S303. Using an etching material, etch the silicon substrate 11 of several breakdown regions 121.

[0099] The corrosive material is an alkaline solution such as KOH or NaOH.

[0100] For example, a schematic diagram of the silicon substrate 11 after etching several breakdown regions 121 can be shown as follows: Figure 9 As shown.

[0101] As one possible implementation, an etchant can be used to cover the silicon substrate 11. In the area 121 where the mask layer 12 is not penetrated, the etchant cannot pass through. The etchant can only etch the silicon substrate 11 through the dry penetration area 121, eventually forming multiple arc-shaped etch pits.

[0102] It should be noted that additives containing protective agents can be added to corrosive materials.

[0103] For example, the additives for the protective agent can be one or more of sodium silicate, ammonium molybdate, thiourea, and hexamethylenetetramine.

[0104] In some embodiments, the temperature range corresponding to the reaction conditions for etching the silicon substrate of several breakdown regions is 50-80°C. For example, the temperature range corresponding to the reaction conditions for etching the silicon substrate of several breakdown regions can be any value between 50°C, 60°C, 70°C, 80°C, or 50-80°C, and there is no specific limitation herein.

[0105] In this way, the temperature range corresponding to the reaction conditions for etching the silicon substrate in several breakdown regions is within a suitable range. This can avoid the slow etching rate and long process time caused by the reaction temperature corresponding to the reaction conditions for etching the silicon substrate in several breakdown regions being too low. It can also avoid the excessive removal of silicon material under the breakdown region 121 caused by the reaction temperature corresponding to the reaction conditions for etching the silicon substrate in several breakdown regions being too high, thereby reducing the mechanical strength of the silicon substrate 11.

[0106] In some embodiments, the etching time for etching the silicon substrate 11 of the plurality of breakdown regions 121 is 30-300s. For example, it can be any value between 30s, 100s, 150s, 200s, 250s, 300s or 30-300s, and there is no specific limitation herein.

[0107] In this way, the etching time is within an appropriate range, which can avoid the small etching volume caused by too short an etching time, which would not effectively increase the light-receiving area of ​​the solar cell 10. It can also avoid the excessive removal of silicon material under the breakdown area 121 caused by too long an etching time, which would reduce the mechanical strength of the silicon substrate 11.

[0108] In practical applications, the process of using etching materials to etch several breakdown areas 121 of the silicon substrate 11 can specifically include: pre-cleaning, water washing, post-cleaning, acid washing, drying, etc.

[0109] S304. Remove the mask layer 12 to form several recesses 111.

[0110] As one possible approach, the silicon substrate 11 can be cleaned with hydrofluoric acid to remove the mask layer 12.

[0111] In this way, the residual mask layer 12 can be removed efficiently, and the hydrofluoric acid reacts with the natural oxide layer on the silicon surface to form soluble fluorosilicates, which can avoid excessive etching of the silicon substrate 11.

[0112] For example, the schematic diagram after removing the mask layer 12 to form several recesses 111 can be as described above. Figure 5 As shown.

[0113] In some embodiments, the cleaning time for the silicon substrate 11 is 180-360 seconds. For example, it can be any value between 180 seconds, 220 seconds, 260 seconds, 300 seconds, 330 seconds, 360 seconds, or 180-300 seconds, and there is no specific limitation herein.

[0114] In this way, the cleaning time is within an appropriate range, which can avoid the inability to effectively clean the mask layer 12 due to the cleaning time being too short, and can also avoid the excessive corrosion of the silicon substrate 11 due to the cleaning time being too long.

[0115] In practical applications, the process of removing the mask layer 12 can specifically include: pre-cleaning, water washing, post-cleaning, acid washing, drying, etc.

[0116] In some embodiments, the reaction conditions for cleaning the silicon substrate with hydrofluoric acid correspond to room temperature.

[0117] In this way, the excessive temperature of the reaction conditions for cleaning the silicon substrate with hydrofluoric acid can be avoided, which would lead to excessive corrosion of the silicon substrate 11.

[0118] In some embodiments, such as Figure 10 As shown, before the mask layer 12 is formed on the silicon substrate 11, the method further includes: S401. Polish the silicon substrate 11 using polishing material.

[0119] The polishing material can be an alkaline solution, such as NaOH or KOH.

[0120] As one possible implementation, the silicon substrate 11 can be immersed in a polishing material to polish the silicon substrate 11.

[0121] In this way, damage to the silicon substrate 11 can be removed to form a polished surface.

[0122] In some embodiments, the reaction conditions for polishing the silicon substrate using a polishing material correspond to a temperature of 70-90°C. For example, it can be any value between 70°C, 75°C, 80°C, 85°C, 90°C, or 70-90°C, and there is no specific limitation herein.

[0123] In this way, the reaction conditions for polishing the silicon substrate using polishing materials are within a suitable temperature range. This avoids the low chemical reactivity, slow dissolution rate, and reduced polishing efficiency caused by excessively low reaction conditions for polishing the silicon substrate using polishing materials. It also avoids the local over-corrosion and reduced surface flatness of the silicon substrate 11 caused by excessively high reaction conditions for polishing the silicon substrate using polishing materials.

[0124] In some embodiments, the polishing time for polishing the silicon substrate 11 is 60-300s. For example, it can be any value between 6s, 100s, 150s, 200s, 250s, 300s or 60-300s, and there is no specific limitation herein.

[0125] In this way, the polishing time is within an appropriate range, which can avoid the surface defects of the silicon substrate 11 not being completely dissolved due to the polishing time being too short, resulting in surface roughness, and can also avoid the local over-corrosion caused by the polishing time being too long, resulting in a decrease in the surface flatness of the silicon substrate 11.

[0126] In practical applications, the process of polishing the silicon substrate 11 using polishing materials can specifically include: pre-cleaning, water washing, post-cleaning, acid washing, drying, etc.

[0127] It is understood that in such embodiments, the photovoltaic module corresponding to the solar cell 10 may further include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film. The encapsulating film can be filled between the front and back of the solar cell 10, the photovoltaic glass, adjacent cells, etc. As a filler, it can be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulating film can be an EVA film or a POE film, and the specific choice can be made according to the actual situation, without limitation.

[0128] Photovoltaic glass can be applied to the encapsulating film on the front side of the solar cell 10. The photovoltaic glass can be ultra-clear glass, which has high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, ultra-clear glass can achieve a light transmittance of over 92%, protecting the solar cell 10 while minimizing impact on its efficiency. Simultaneously, the encapsulating film bonds the photovoltaic glass and the solar cell 10 together, providing sealing, insulation, and waterproofing / moisture protection for the solar cell 10.

[0129] The backsheet can be attached to the encapsulant film on the back of the solar cell 10. The backsheet provides protection and support for the solar cell 10, offering reliable insulation, water resistance, and aging resistance. Multiple backsheet options are available, typically including tempered glass, acrylic glass, and aluminum alloy TPT composite encapsulant film, with specific choices depending on the specific circumstances. The backsheet, solar cell 10, encapsulant film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire battery module, providing stable support and installation. For example, the battery module can be installed at the desired location using the metal frame.

[0130] The photovoltaic system of this application embodiment includes the photovoltaic module described above.

[0131] In this embodiment, the photovoltaic system can be applied in photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants. It can also be applied to equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it is understood that the application scenarios of the photovoltaic system are not limited to these; that is, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple battery modules; for example, multiple battery modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to achieve solar power supply.

[0132] In the description of this specification, the references to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0133] Furthermore, the above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A solar cell, characterized in that, include: Silicon substrate; The light-receiving surface of the silicon substrate has a plurality of recesses and a plurality of protrusions; the protrusions and the recesses are arranged alternately. The surfaces of the recessed portion and the raised portion are formed with a velvety structure.

2. The solar cell according to claim 1, characterized in that, The maximum depth of the recess is 15-50 micrometers.

3. The solar cell according to claim 2, characterized in that, The width of the recessed portion as an orthogonal projection onto the silicon substrate is less than or equal to 100 micrometers.

4. The solar cell according to claim 1, characterized in that, The velvet structure includes several types of pyramidal structures.

5. The solar cell according to claim 4, characterized in that, The height of the pyramidal structure is less than or equal to 3 micrometers.

6. A method for manufacturing a solar cell, characterized in that, include: Provide silicon substrate; Several recesses are formed on the light-receiving surface of the silicon substrate; A velvety texture is formed on the surface of the recess.

7. The method for manufacturing a solar cell according to claim 6, characterized in that, The method of forming a plurality of recesses on the light-receiving surface of the silicon substrate includes: The silicon substrate is etched using an etching material to form several recesses on the light-receiving surface of the silicon substrate.

8. The method for manufacturing a solar cell according to claim 7, characterized in that, The corrosive material is KOH or NaOH.

9. The method for manufacturing a solar cell according to claim 7, characterized in that, The process of etching the silicon substrate with an etching material to form a plurality of recesses on the light-receiving surface of the silicon substrate includes: A mask layer is formed on the silicon substrate; the mask layer is used to isolate the corrosive material. The mask layer is breached, forming several breach areas; The silicon substrate in the plurality of breakdown regions is etched using the aforementioned corrosive material; Remove the mask layer to form a plurality of the recesses.

10. The method according to claim 9, characterized in that, The breakdown of the mask layer forms several breakdown regions, including: The mask layer is penetrated by a laser to form several penetration areas; the laser spot size is 30-100 micrometers.

11. The method according to claim 9, characterized in that, The temperature range corresponding to the reaction conditions for corroding the silicon substrate in the aforementioned breakdown regions is 50-80℃.

12. The method according to claim 9, characterized in that, The etching time for etching the silicon substrate in the aforementioned breakdown regions is 30-300 seconds.

13. The method according to claim 9, characterized in that, The removal of the mask layer includes: The silicon substrate is cleaned with hydrofluoric acid to remove the mask layer.

14. The method according to claim 13, characterized in that, The time for cleaning the silicon substrate is 180-360 seconds.

15. The method according to claim 13, characterized in that... The reaction conditions for cleaning the silicon substrate with hydrofluoric acid are at room temperature.

16. The method according to claim 9, characterized in that, Before forming the mask layer on the silicon substrate, the method further includes: The silicon substrate is polished using a polishing material.

17. The method according to claim 16, characterized in that, The reaction conditions for polishing the silicon substrate using polishing materials correspond to a temperature of 70-90°C.

18. The method according to claim 16, characterized in that, The polishing time for the silicon substrate is 60-300 seconds.

19. A solar cell, characterized in that, Made by the method described in any one of claims 6-18.

20. A photovoltaic module, characterized in that, The photovoltaic module includes a solar cell as described in any one of claims 1-5 or claim 17.

21. A photovoltaic system, characterized in that, The photovoltaic system includes the photovoltaic module as described in claim 20.

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