Microwave power divider, high-frequency PCB substrate, test board and chip test system

Abstract

The invention relates to the technical field of semiconductors, and provides a microwave power divider, a high-frequency PCB substrate, a test board and a chip test system. According to the microwave power divider, power division networks from the first stage to the Nth stage are cascaded in sequence to form an N-stage cascaded structure, and N is greater than or equal to 2; the first-stage power division network comprises a first-stage main transmission line and a first-stage two-path power division unit; the first end of the first-stage main transmission line is connected with the input port, and the second end of the first-stage main transmission line is connected with the first-stage two-path power division unit through a first balance resistor; and the Nth-stage power division network comprises 2N-1 Nth-stage two-path power division units, and the two Nth-stage two-path power division units are respectively connected with the (N-1) th-stage two-path power division unit through an Nth balance resistor. The microwave power divider provided by the invention can adapt to the miniaturization and lightweight installation requirements of high-frequency communication equipment, can meet the simultaneous test of a plurality of radio frequency chips of the same model or different models, and can ensure the quality of high-frequency signals input to each radio frequency chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, and in particular to a microwave power divider, a high-frequency PCB substrate, a test board and a chip test system. BACKGROUND

[0002] As a core component of a wireless communication system, the performance of a radio frequency chip directly determines the communication quality of a terminal. The performance deviation is easily caused by wafer defects and packaging stress in the manufacturing of the radio frequency chip. In addition, the stability and accuracy of signal transmission are strictly required by the communication protocol. Therefore, before being shipped, the unqualified products must be screened through comprehensive testing to ensure the reliability of the terminal device. Therefore, when testing the radio frequency chip, the signal input to the radio frequency chip needs to meet strict quality requirements.

[0003] In the related art, scheme one, although the 1-path high-frequency signal generated by the signal generator is connected to the chip test board through the copper axis, and is only provided to one radio frequency chip on the chip test board for testing, the quality of the high-frequency signal input to the radio frequency chip can be ensured. However, this scheme can only realize that one signal generator supplies one radio frequency chip for testing. When batch testing of radio frequency chips is performed, that is, when multiple radio frequency chips are tested at the same time, multiple signal generators are needed to provide high-frequency signals to the corresponding radio frequency chips. Since the cost of the signal generator is relatively high, this will result in high testing cost of the radio frequency chip, and multiple signal generators also need to occupy a large experimental space. Scheme two, a conventional power divider is used to divide the 1-path high-frequency signal output by one signal generator into multiple high-frequency signals, so as to realize simultaneous testing of multiple radio frequency chips. However, the conventional power divider has large insertion loss (single-stage insertion loss is more than 4 dB) and low isolation (commonly less than 20 dB) in the 1-to-multiple division scene, and the crosstalk problem between the multiple output ports is prominent, which cannot guarantee the quality of the high-frequency signal input to the radio frequency chip. In addition, the conventional power divider has poor structural integration, and is difficult to adapt to the installation requirements of miniaturization and light weight of high-frequency communication equipment.

[0004] Therefore, it is of great significance to develop a microwave power divider which can meet the simultaneous testing of multiple radio frequency chips, guarantee the quality of the high-frequency signal input to each radio frequency chip, has high structural integration, and can adapt to the installation requirements of miniaturization and light weight of high-frequency communication equipment, to promote the technological innovation and development of the microwave power divider. SUMMARY

[0005] Therefore, the purpose of the present application is to provide a microwave power divider and a chip test system, which can meet the simultaneous testing of multiple radio frequency chips, guarantee the quality of the high-frequency signal input to each radio frequency chip, have high structural integration, and can adapt to the installation requirements of miniaturization and light weight of high-frequency communication equipment, to promote the technological innovation and development of the microwave power divider.

[0006] To achieve the above-mentioned objectives, the technical solution adopted in this application is as follows: In a first aspect, embodiments of this application provide a microwave power divider, which consists of a first stage to a second stage. N The power distribution network is cascaded in sequence to form a power distribution network. N Cascaded structure, where 2≤ N ; The first-stage power divider network includes a first-stage main transmission line and a first-stage two-way power divider unit; the first end of the first-stage main transmission line is connected to the input port, and the second end is connected to the first-stage two-way power divider unit through a first balancing resistor; the input port is adapted to a high-frequency excitation source. No. N The power distribution network includes 2 N-1 The first N Two-stage power divider unit, two first-stage power dividers N The two-stage power divider units each pass through a first-stage power divider. N Balance resistor and the first N -1 level two-way power divider unit connection; each of the first N Each of the two power dividers includes two output ports.

[0007] Secondly, embodiments of this application also provide a high-frequency PCB substrate on which the microwave power divider of the first aspect is deployed.

[0008] Thirdly, embodiments of this application provide a chip testing system, including: a signal generator, a high-frequency PCB substrate, a test board, and a driver board; the high-frequency PCB substrate is connected to the signal generator and the test board respectively, and the driver board is connected to the test board.

[0009] Fourthly, embodiments of this application provide a test board on which the microwave power divider of the first aspect is deployed.

[0010] Fifthly, embodiments of this application also provide another chip testing system, including: a signal generator, a test board as described in the fourth aspect, and a driver board; the signal generator and the test board are connected, and the driver board is connected to the test board.

[0011] Compared with the prior art, the beneficial effects of the technical solution provided in this application embodiment include at least the following: The microwave power divider is constructed by cascading power dividing networks from the first stage to the Nth stage, forming an N-stage cascaded structure, where 2≤N≤5. The integration of the power dividing network topology of each stage of the N-stage cascaded structure is high, which can adapt to the miniaturization and lightweight installation requirements of high-frequency communication equipment, and can branch 4 to 32 channels from one high-frequency signal output from one signal generator, thereby meeting the simultaneous testing of multiple RF chips of the same or different models. Secondly, the second end of the first-stage main transmission line of the first-stage power dividing network of the microwave power divider is connected to the two-way power dividing unit of the first stage through a first balancing resistor. N The power distribution network includes 2 N-1 The first N Two-stage power divider unit, two first-stage power dividers N The two-stage power divider units each pass through a first-stage power divider. N Balance resistor and the first N-1 The connection of two-way power dividers not only avoids signal crosstalk between different output branches and ensures that the output signals of each output port are independent and pure, but also reduces signal reflection at the output port, reduces return loss, and improves the signal transmission efficiency and quality of the entire RF link, thereby ensuring the quality of the high-frequency signals input to each RF chip. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a structural block diagram of a microwave power divider provided in an embodiment of this application; Figure 2 This is a schematic diagram of a two-stage cascaded topology of a microwave power divider provided in an embodiment of this application; Figure 3 This is a structural block diagram of another microwave power divider provided in the embodiments of this application; Figure 4 This is a schematic diagram of a five-level cascaded topology provided in an embodiment of this application; Figure 5 This is a schematic diagram illustrating the arrangement of the first to fifth balancing resistors in a microwave power divider according to an embodiment of this application. Figure 6 This is a topology diagram of a first-stage power dividing network in a microwave power divider provided in an embodiment of this application; Figure 7is a structure schematic diagram of a trace layer of a high-frequency PCB substrate provided by an embodiment of the present application; Figure 8 is a structure block diagram of a chip test system provided by an embodiment of the present application; Figure 9 is a deployment mode schematic diagram of deploying a microwave power divider on a test board provided by an embodiment of the present application; Figure 10 is a structure block diagram of another chip test system provided by an embodiment of the present application; Figure 11 is a schematic diagram of branch transmission lines of U1, U2 and U3 in the microwave power divider provided by an embodiment of the present application; Figure 12 is a simulation experiment result of a first-stage power division network of the microwave power divider provided by an embodiment of the present application; Figure 13 is a simulation experiment result of a second-stage power division network of the microwave power divider provided by an embodiment of the present application; Figure 14 is a simulation experiment result of a third-stage power division network of the microwave power divider provided by an embodiment of the present application; Figure 15 is a simulation experiment result of a fourth-stage power division network of the microwave power divider provided by an embodiment of the present application; Figure 16 is a simulation experiment result of a fifth-stage power division network of the microwave power divider provided by an embodiment of the present application. DETAILED DESCRIPTION

[0014] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clear and explicit, the present application will be further described in detail below with embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, but the implementation of the present application is not limited thereto.

[0015] The core content of the radio frequency chip test covers radio frequency performance, function and reliability, wherein the radio frequency performance includes key indicators such as gain, noise figure, output power and linearity; the function test verifies the effectiveness of the core functions such as signal modulation and demodulation and frequency band switching; and the reliability test examines the performance stability under extreme environment.

[0016] Therefore, when the radio frequency chip is tested, the signal input to the radio frequency chip needs to meet strict quality requirements, and the specific requirements are as follows: the modulation mode and symbol rate need to match the chip protocol, the modulation error rate is greater than or equal to 30 dB; the phase noise is less than or equal to -120 dBc / Hz@10 kHz offset; the spurious signal is less than or equal to -60 dBc to avoid interference; and the signal needs to be distortion-free to ensure accurate demodulation of the chip and accuracy of the performance test.

[0017] In the related art, although the quality of the high-frequency signal input into the radio frequency chip can be ensured by providing only one high-frequency signal output by one signal generator to one radio frequency chip for testing, when a batch of radio frequency chips need to be tested (i.e., multiple radio frequency chips are tested at the same time), multiple signal generators are needed to provide high-frequency signals to the corresponding radio frequency chips. Since the cost of the signal generator is relatively high, this will result in high cost of batch testing of the radio frequency chip, and multiple signal generators also need to occupy a large experimental space. Although the conventional power divider can divide one high-frequency signal output by one signal generator into multiple paths, the conventional power divider has large insertion loss (the single-stage insertion loss is generally more than 4 dB) and low isolation (generally less than 20 dB) in the one-to-multiple path distribution scenario, and the crosstalk problem between the output ports is prominent, which cannot ensure the quality of the high-frequency signal input into the radio frequency chip. In addition, the conventional power divider has poor structural integration and is difficult to adapt to the installation requirements of miniaturization and light weight of high-frequency communication equipment.

[0018] Therefore, the embodiments of the present application provide a microwave power divider, a high-frequency PCB substrate, a test board and a chip testing system. The microwave power divider is cascaded by first-stage to N-stage power division networks, and forms an N-stage cascaded structure, where 2≤N. The integration of the topology structure of each power division network of the N-stage cascaded structure is high, which can adapt to the installation requirements of miniaturization and light weight of high-frequency communication equipment, and can branch one high-frequency signal output by one signal generator into multiple paths, so as to meet the simultaneous testing of multiple radio frequency chips of the same type or different types. Secondly, the second end of the first-stage main transmission line of the first-stage power division network of the microwave power divider is connected with the first-stage two-path power division unit through a first balanced resistor, and the N-stage power division network includes two N-stage two-path power division units. N N-1 N N N N-1 This can not only avoid signal crosstalk between different output branches, ensure the independence and purity of the output signals of each output port, but also reduce the reflection of the signal at the output port, reduce the return loss, and improve the signal transmission efficiency and quality of the entire radio frequency link, so as to ensure the quality of the high-frequency signal input into each radio frequency chip.

[0019] In a first aspect, the embodiments of the present application provide a microwave power divider. The microwave power divider is cascaded by first-stage to N-stage power division networks, and forms an N-stage cascaded structure, where 2≤N. N N N ​​​​​​​; the first-stage power division network comprises a first-stage main transmission line and a first-stage two-way power division unit; a first end of the first-stage main transmission line is connected with the input port, and a second end thereof is connected with the first-stage two-way power division unit through a first balancing resistor; the input port is adapted to a high-frequency excitation source; the second-stage power division network comprises two second-stage two-way power division units, and the two second-stage two-way power division units are respectively connected with the first-stage two-way power division unit through a second balancing resistor. N N -1 N N N N-1 N Figure 1 is a structural block diagram of a microwave power divider provided by an embodiment of the present application. Figure 2 is a two-stage cascaded topological structure diagram of a microwave power divider provided by an embodiment of the present application. Figure 2 P0 in the figure represents an input port, P1 to P4 represent output ports, R1 represents a first balancing resistor, R2 to R3 represent second balancing resistors, “first stage” represents a first-stage power division network, and “second stage” represents a second-stage power division network.

[0020] As an example, referring to Figure 1 and Figure 2 , a microwave power divider (1-to-4 power divider) provided by an embodiment of the present application is cascaded by first-stage to second-stage power division networks in sequence, forming a two-stage cascaded structure (at this time, N=2). The first-stage power division network comprises a first-stage main transmission line and a first-stage two-way power division unit; a first end of the first-stage main transmission line is connected with the input port, and a second end thereof is connected with the first-stage two-way power division unit through a first balancing resistor; the input port is adapted to a high-frequency excitation source; the second-stage power division network comprises two second-stage two-way power division units, and the two second-stage two-way power division units are respectively connected with the first-stage two-way power division unit through a second balancing resistor.

[0021] It can be understood that when N=3, the microwave power divider (1-to-8 power divider) is cascaded by first-stage to third-stage power division networks in sequence, forming a three-stage cascaded structure. When N=4, the microwave power divider (1-to-16 power divider) is cascaded by first-stage to fourth-stage power division networks in sequence, forming a four-stage cascaded structure. When N=5, the microwave power divider (1-to-32 power divider) is cascaded by first-stage to fifth-stage power division networks in sequence, forming a five-stage cascaded structure.

[0022] Figure 3 is a structural block diagram of another microwave power divider provided by an embodiment of the present application. Figure 4 is a five-stage cascaded topological structure diagram provided by an embodiment of the present application. Figure 4 ​​​​​​​P0 represents an input port, P1-P32 represent output ports, the first stage represents the first-stage power division network, the second stage represents the second-stage power division network, the third stage represents the third-stage power division network, the fourth stage represents the fourth-stage power division network, and the fifth stage represents the fifth-stage power division network.

[0023] Referring to Figure 3~Figure 4 , the microwave power divider (1-to-32 power divider) provided by the embodiment of the present application is cascaded in sequence by the first-stage to fifth-stage power division networks, and forms a five-stage cascaded structure (at this time, N =5). The first-stage power division network comprises a first-stage main transmission line and a first-stage two-way power division unit. The first end of the first-stage main transmission line is connected with the input port, and the second end is connected with the first-stage two-way power division unit through a first balancing resistor. The input port is adapted to a high-frequency excitation source. The second-stage power division network comprises two second-stage two-way power division units, and the two second-stage two-way power division units are connected with the first-stage two-way power division unit through a second balancing resistor respectively. The third-stage power division network comprises four third-stage two-way power division units, and every two third-stage two-way power division units are connected with a second-stage two-way power division unit through a third balancing resistor respectively. The fourth-stage power division network comprises eight fourth-stage two-way power division units, and every two fourth-stage two-way power division units are connected with a third-stage two-way power division unit through a fourth balancing resistor respectively. The fifth-stage power division network comprises sixteen fifth-stage two-way power division units, and every two fifth-stage two-way power division units are connected with a fourth-stage two-way power division unit through a fifth balancing resistor respectively. Each fifth-stage two-way power division unit comprises two output ports.

[0024] As can be understood from the above, the microwave power divider of the present application is cascaded in sequence by the first-stage to fifth-stage power division networks, and forms a N five-stage cascaded structure, N wherein n is a positive integer greater than or equal to 2, for example, N n can be equal to 2, 3, 4, 5, 6, 7, etc. According to actual application, the number of stages of the cascaded structure is not specifically limited in the present application. Hereinafter, n=5 is taken as an example for description. N N

[0025] The high-frequency excitation source is a high-frequency signal with a frequency band of 25-32 GHz output by a signal generator (a radio frequency / microwave signal generating device).

[0026] ​​As an example, when the high-frequency excitation source is a 29 GHz high-frequency signal, the input port (P0) and the 32 output ports (P1-P32) can all use the same type of SMA (SubMiniature version A, super miniature A type radio frequency connector) radio frequency connector, the characteristic impedance of the SMA radio frequency connector is 50 Ω, and the working frequency range is DC (direct current signal) ~ 40 GHz, which meets the transmission requirements of the 29 GHz high-frequency signal.

[0027] Figure 5 is a schematic diagram of a layout mode of the first to fifth balancing resistors of a microwave power divider provided by an embodiment of the present application. Figure 5 The red circles in are the distribution positions of the 31 balancing resistors R1-R31. Among them, R1 represents the first balancing resistor, R2-R3 represents the second balancing resistor, R4-R7 represents the third balancing resistor, R8-R15 represents the fourth balancing resistor, and R16-R31 represents the fifth balancing resistor.

[0028] In some embodiments, the first balancing resistor, the second balancing resistor, the third balancing resistor, the fourth balancing resistor, and the fifth balancing resistor described above can all use high-frequency resistors of the same type. The resistance value of the high-frequency resistor is 100 Ω, the power is 1 / 16 W, the parasitic inductance is 0.08 nH, the parasitic capacitance is 0.03 pF, and the high-frequency loss is ≤0.05 dB. The resistance pad size can be designed as 0.6 mm x 0.3 mm (pad pitch 0.3 mm) according to the packaging specification of the resistor of this type, and the spacing between the branch transmission lines is 0.2 mm, which is fixed by the reflow soldering process (soldering temperature is 240 ℃, holding time is 10 s). After soldering, the solder joints are detected by an X-ray detection device to ensure that there are no false welding, cold welding, and bridging problems, to ensure stable electrical connection under high-frequency signals and to avoid increasing the insertion loss due to solder joint problems.

[0029] By connecting balancing resistors (R1-R31) in parallel between the branch transmission lines of the 3-31 two-way power division units of the 2-5 level power division network, not only can the signal crosstalk between different output branches be avoided to ensure that the signals output by each output port are independent and pure, but also the reflection of the signals at the output ports can be reduced, the return loss can be reduced, and the signal transmission efficiency and quality of the entire radio frequency link can be improved.

[0030] The microwave power divider provided by the embodiments of the present application can not only meet the simultaneous testing of multiple radio frequency chips, but also ensure the quality of the high-frequency signals input to each radio frequency chip, while having high structural integration and being able to adapt to the installation requirements of small and light high-frequency communication equipment, which has important significance for promoting the technological innovation and development of microwave power dividers.

[0031] In some embodiments, each stage power division network of the microwave power divider is laid out and routed by high-end board-level EDA (electronic design automation) software, and the high-frequency constraint management module of the software is used to preset the transmission line impedance tolerance (±3 Ω), the line width precision (±0.02 mm) and the equal length control rule (error ≤0.1 mm), the transmission line corner is designed by using a 40-degree to 45-degree circular arc routing, and the dynamic copper skin avoidance function of the software is used to ensure that there is no copper skin coverage within a range of 1 mm around the transmission line, so as to avoid additional insertion loss caused by signal reflection and parasitic coupling.

[0032] In some embodiments, a microstrip line gradual transition section is arranged between the input port and the first end of the first stage main transmission line; the width of the microstrip line gradual transition section gradually increases along the extension path of the input port pointing to the first end of the first stage main transmission line. The length value and the change value of the width of the microstrip line gradual transition section can be determined by simulation according to the impedance line width and the overall impedance of the cascaded circuit after the first stage power division network in actual application.

[0033] Figure 6 is a topological structure diagram of a first stage power division network in a microwave power divider provided by the present application. Please refer to Figure 4 and Figure 6 A microstrip line gradual transition section (i.e., a microstrip line gradual transition structure) is arranged between the input port (P0) and the first end of the first stage main transmission line (L1), and the width of the microstrip line gradual transition section gradually increases along the extension path of the input port (P0) pointing to the first end of the first stage main transmission line (L1). The length of the microstrip line gradual transition section is 2 mm, and the width gradually changes from 0.3 mm (the pin width of the SMA radio frequency connector arranged at the input port (P0)) to 0.5 mm (the width of the first stage main transmission line (L1)) in the direction from the input port to the first end of the first stage main transmission line, which can reduce the reflection loss of high-frequency signals at the port, and the reflection loss is ≤-28 dB.

[0034] In some embodiments, the first stage two-way power division unit includes a first stage branch transmission line one and a first stage branch transmission line two; the first end of the first stage main transmission line is connected with the input port, the first end of the first stage branch transmission line one and the first end of the first stage branch transmission line two are respectively connected with the second end of the first stage main transmission line through a first balanced resistor; and a quarter wavelength matching section is arranged between the second end of the first stage main transmission line and the first end of the first stage branch transmission line one and the first end of the first stage branch transmission line two.

[0035] Please refer to Figure 4~Figure 6, the first-stage power division network comprises one first-stage two-way power division unit (U1), the first-stage two-way power division unit (U1) comprises a first-stage branch transmission line one (L1-1) and a first-stage branch transmission line two (L1-2), the first end of the first-stage branch transmission line one (L1-1) and the first end of the first-stage branch transmission line two (L1-2) are connected with the second end of the first-stage main transmission line (L1) through a first balanced resistor (R1) respectively; a quarter wavelength matching section (or λ / 4 matching section) (M1-1) is arranged between the second end of the first-stage main transmission line (L1) and the first end of the first-stage branch transmission line one (L1-1), and a quarter wavelength matching section (or λ / 4 matching section) (M1-2) is arranged between the second end of the first-stage main transmission line (L1) and the first end of the first-stage branch transmission line two (L1-2).

[0036] In some embodiments, the second-stage power division network comprises two second-stage two-way power division units, which are a second-stage two-way power division unit one (U2) and a second-stage two-way power division unit two (U3) respectively; the second-stage two-way power division unit one comprises a second-stage main transmission line one and a second-stage main transmission line two, the first ends of the second-stage main transmission line one and the second-stage main transmission line two are connected with the second end of the first-stage branch transmission line one through a second balanced resistor respectively; the second-stage two-way power division unit two comprises a second-stage main transmission line three and a second-stage main transmission line four, the first ends of the second-stage main transmission line three and the second-stage main transmission line four are connected with the second end of the first-stage branch transmission line two through a second balanced resistor respectively.

[0037] In some embodiments, the third-stage power division network comprises four third-stage two-way power division units, which are a third-stage two-way power division unit one (U4), a third-stage two-way power division unit two (U5), a third-stage two-way power division unit three (U6) and a third-stage two-way power division unit four (U7) respectively; the third-stage two-way power division unit one comprises a third-stage main transmission line one and a third-stage main transmission line two, the first ends of the third-stage main transmission line one and the third-stage main transmission line two are connected with the second end of the second-stage main transmission line one through a third balanced resistor respectively; the third-stage two-way power division unit two comprises a third-stage main transmission line three and a third-stage main transmission line four, the first ends of the third-stage main transmission line three and the third-stage main transmission line four are connected with the second end of the second-stage main transmission line two through a third balanced resistor respectively; the third-stage two-way power division unit three comprises a third-stage main transmission line five and a third-stage main transmission line six, the first ends of the third-stage main transmission line five and the third-stage main transmission line six are connected with the second end of the second-stage main transmission line three through a third balanced resistor respectively; the third-stage two-way power division unit four comprises a third-stage main transmission line seven and a third-stage main transmission line eight, the first ends of the third-stage main transmission line seven and the third-stage main transmission line eight are connected with the second end of the second-stage main transmission line four through a third balanced resistor respectively.

[0038] In some embodiments, the fourth-stage power division network includes eight fourth-stage two-way power division units, namely, a first fourth-stage two-way power division unit (U8), a second fourth-stage two-way power division unit (U9), a third fourth-stage two-way power division unit (U10), a fourth fourth-stage two-way power division unit (U11), a fifth fourth-stage two-way power division unit (U12), a sixth fourth-stage two-way power division unit (U13), a seventh fourth-stage two-way power division unit (U14), and an eighth fourth-stage two-way power division unit (U15). The first fourth-stage two-way power division unit includes a first fourth-stage main transmission line and a second fourth-stage main transmission line, and the first ends of the first fourth-stage main transmission line and the second fourth-stage main transmission line are connected to the second end of the first third-stage main transmission line through a first fourth balance resistor and a second fourth balance resistor, respectively. The second fourth-stage two-way power division unit includes a third fourth-stage main transmission line and a fourth fourth-stage main transmission line, and the first ends of the third fourth-stage main transmission line and the fourth fourth-stage main transmission line are connected to the second end of the second third-stage main transmission line through a third fourth balance resistor and a fourth fourth balance resistor, respectively. The third fourth-stage two-way power division unit includes a fifth fourth-stage main transmission line and a sixth fourth-stage main transmission line, and the first ends of the fifth fourth-stage main transmission line and the sixth fourth-stage main transmission line are connected to the second end of the third third-stage main transmission line through a fifth fourth balance resistor and a sixth fourth balance resistor, respectively. The fourth fourth-stage two-way power division unit includes a seventh fourth-stage main transmission line and an eighth fourth-stage main transmission line, and the first ends of the seventh fourth-stage main transmission line and the eighth fourth-stage main transmission line are connected to the second end of the fourth third-stage main transmission line through a seventh fourth balance resistor and an eighth fourth balance resistor, respectively. The fifth fourth-stage two-way power division unit includes a ninth fourth-stage main transmission line and a tenth fourth-stage main transmission line, and the first ends of the ninth fourth-stage main transmission line and the tenth fourth-stage main transmission line are connected to the second end of the fifth third-stage main transmission line through a ninth fourth balance resistor and a tenth fourth balance resistor, respectively. The sixth fourth-stage two-way power division unit includes an eleventh fourth-stage main transmission line and a twelfth fourth-stage main transmission line, and the first ends of the eleventh fourth-stage main transmission line and the twelfth fourth-stage main transmission line are connected to the second end of the sixth third-stage main transmission line through an eleventh fourth balance resistor and a twelfth fourth balance resistor, respectively. The seventh fourth-stage two-way power division unit includes a thirteenth fourth-stage main transmission line and a fourteenth fourth-stage main transmission line, and the first ends of the thirteenth fourth-stage main transmission line and the fourteenth fourth-stage main transmission line are connected to the second end of the seventh third-stage main transmission line through a thirteenth fourth balance resistor and a fourteenth fourth balance resistor, respectively. The eighth fourth-stage two-way power division unit includes a fifteenth fourth-stage main transmission line and a sixteenth fourth-stage main transmission line, and the first ends of the fifteenth fourth-stage main transmission line and the sixteenth fourth-stage main transmission line are connected to the second end of the eighth third-stage main transmission line through a fifteenth fourth balance resistor and a sixteenth fourth balance resistor, respectively.

[0039] In some embodiments, the fifth-stage power division network includes 16 fifth-stage two-way power division units, namely, a first fifth-stage two-way power division unit (U16), a second fifth-stage two-way power division unit (U17), a third fifth-stage two-way power division unit (U18), a fourth fifth-stage two-way power division unit (U19), a fifth fifth-stage two-way power division unit (U20), a sixth fifth-stage two-way power division unit (U21), a seventh fifth-stage two-way power division unit (U22), an eighth fifth-stage two-way power division unit (U23), a ninth fifth-stage two-way power division unit (U24), a tenth fifth-stage two-way power division unit (U25), an eleventh fifth-stage two-way power division unit (U26), a twelfth fifth-stage two-way power division unit (U27), a thirteenth fifth-stage two-way power division unit (U28), a fourteenth fifth-stage two-way power division unit (U29), a fifteenth fifth-stage two-way power division unit (U30), and a sixteenth fifth-stage two-way power division unit (U31). The first fifth-stage two-way power division unit includes a first fifth-stage main transmission line and a second fifth-stage main transmission line, and the first ends of the first fifth-stage main transmission line and the second fifth-stage main transmission line are respectively connected to the second end of the first fourth-stage main transmission line through a first fifth balancing resistor. The second fifth-stage two-way power division unit includes a third fifth-stage main transmission line and a fourth fifth-stage main transmission line, and the first ends of the third fifth-stage main transmission line and the fourth fifth-stage main transmission line are respectively connected to the second end of the second fourth-stage main transmission line through a second fifth balancing resistor. The third fifth-stage two-way power division unit includes a fifth fifth-stage main transmission line and a sixth fifth-stage main transmission line, and the first ends of the fifth fifth-stage main transmission line and the sixth fifth-stage main transmission line are respectively connected to the second end of the third fourth-stage main transmission line through a third fifth balancing resistor. The fourth fifth-stage two-way power division unit includes a seventh fifth-stage main transmission line and an eighth fifth-stage main transmission line, and the first ends of the seventh fifth-stage main transmission line and the eighth fifth-stage main transmission line are respectively connected to the second end of the fourth fourth-stage main transmission line through a fourth fifth balancing resistor. The fifth fifth-stage two-way power division unit includes a ninth fifth-stage main transmission line and a tenth fifth-stage main transmission line, and the first ends of the ninth fifth-stage main transmission line and the tenth fifth-stage main transmission line are respectively connected to the second end of the fifth fourth-stage main transmission line through a fifth fifth balancing resistor. The sixth fifth-stage two-way power division unit includes an eleventh fifth-stage main transmission line and a twelfth fifth-stage main transmission line, and the first ends of the eleventh fifth-stage main transmission line and the twelfth fifth-stage main transmission line are respectively connected to the second end of the sixth fourth-stage main transmission line through a sixth fifth balancing resistor. The seventh fifth-stage two-way power division unit includes a thirteenth fifth-stage main transmission line and a fourteenth fifth-stage main transmission line, and the first ends of the thirteenth fifth-stage main transmission line and the fourteenth fifth-stage main transmission line are respectively connected to the second end of the seventh fourth-stage main transmission line through a seventh fifth balancing resistor. The eighth fifth-stage two-way power division unit includes a fifteenth fifth-stage main transmission line and a sixteenth fifth-stage main transmission line, and the first ends of the fifteenth fifth-stage main transmission line and the sixteenth fifth-stage main transmission line are respectively connected to the second end of the eighth fourth-stage main transmission line through an eighth fifth balancing resistor.The fifth two-way power dividing unit nine includes a fifth main transmission line seventeen and a fifth main transmission line eighteen, the first ends of the fifth main transmission line seventeen and the fifth main transmission line eighteen are connected with the second end of the fourth main transmission line nine through a fifth balance resistor respectively; the fifth two-way power dividing unit ten includes a fifth main transmission line nineteen and a fifth main transmission line twenty, the first ends of the fifth main transmission line nineteen and the fifth main transmission line twenty are connected with the second end of the fourth main transmission line ten through a fifth balance resistor respectively; the fifth two-way power dividing unit eleven includes a fifth main transmission line twenty-one and a fifth main transmission line twenty-two, the first ends of the fifth main transmission line twenty-one and the fifth main transmission line twenty-two are connected with the second end of the fourth main transmission line eleven through a fifth balance resistor respectively; the fifth two-way power dividing unit twelve includes a fifth main transmission line twenty-three and a fifth main transmission line twenty-four, the first ends of the fifth main transmission line twenty-three and the fifth main transmission line twenty-four are connected with the second end of the fourth main transmission line twelve through a fifth balance resistor respectively; the fifth two-way power dividing unit thirteen includes a fifth main transmission line twenty-five and a fifth main transmission line twenty-six, the first ends of the fifth main transmission line twenty-five and the fifth main transmission line twenty-six are connected with the second end of the fourth main transmission line thirteen through a fifth balance resistor respectively; the fifth two-way power dividing unit fourteen includes a fifth main transmission line twenty-seven and a fifth main transmission line twenty-eight, the first ends of the fifth main transmission line twenty-seven and the fifth main transmission line twenty-eight are connected with the second end of the fourth main transmission line fourteen through a fifth balance resistor respectively; the fifth two-way power dividing unit fifteen includes a fifth main transmission line twenty-nine and a fifth main transmission line thirty, the first ends of the fifth main transmission line twenty-nine and the fifth main transmission line thirty are connected with the second end of the fourth main transmission line fifteen through a fifth balance resistor respectively; the fifth two-way power dividing unit sixteen includes a fifth main transmission line thirty-one and a fifth main transmission line thirty-two, the first ends of the fifth main transmission line thirty-one and the fifth main transmission line thirty-two are connected with the second end of the fourth main transmission line sixteen through a fifth balance resistor respectively.

[0040] In some embodiments, the first-stage insertion loss corresponding to the first-stage power division network and the Nth-stage insertion loss corresponding to the Nth-stage power division network are both less than 4 dB. For example, when N = 2, the microwave power divider is a 1-to-4 power divider, which is formed by cascading the first-stage to the second-stage power division networks in sequence to form a two-stage cascaded structure; the first-stage to the second-stage insertion losses corresponding to the first-stage to the second-stage power division networks are both less than 4 dB. When N = 3, the microwave power divider is a 1-to-8 power divider, which is formed by cascading the first-stage to the third-stage power division networks in sequence to form a three-stage cascaded structure; the first-stage to the third-stage insertion losses corresponding to the first-stage to the third-stage power division networks are all less than 4 dB. When N = 4, the microwave power divider is a 1-to-16 power divider, which is formed by cascading the first-stage to the fourth-stage power division networks in sequence to form a four-stage cascaded structure; the first-stage to the fourth-stage insertion losses corresponding to the first-stage to the fourth-stage power division networks are all less than 4 dB. When N = 5, the microwave power divider is a 1-to-32 power divider, which is formed by cascading the first-stage to the fifth-stage power division networks in sequence to form a five-stage cascaded structure; the first-stage to the fifth-stage insertion losses corresponding to the first-stage to the fifth-stage power division networks are all less than 4 dB.

[0041] The conventional 1-to-multiple power divider is basically formed by combining discrete modules. For example, to achieve a 1-to-32 power division function, a 1-to-2 power divider module and two 1-to-16 power divider modules are needed, and the two output ends of the 1-to-2 power divider module are connected to the input ends of the two 1-to-16 power divider modules by coaxial lines. The overall structure of the power divider is bulky, and a fixing bracket and a connecting cable need to be additionally designed, which is difficult to adapt to the installation requirements of miniaturization and light weight of high-frequency communication equipment; at the same time, the discrete structure can easily increase the phase consistency deviation between the output ports, and cannot meet the requirements of high-precision phase in scenarios such as phased array radars.

[0042] The microwave power divider (1-to-4-to-32 power divider) provided in the embodiments of the present application has a high overall structure integration by optimizing the topological structures of the power division networks, and does not need to additionally design a fixing bracket and a connecting cable, which can adapt to the installation requirements of miniaturization and light weight of high-frequency communication equipment, and the single-stage insertion loss of the optimized topological structures of the power division networks is not more than 4 dB, which can reduce the total insertion loss and improve the isolation and phase consistency of the output ports.

[0043] In a second aspect, the embodiments of the present application also provide a high-frequency PCB substrate, which is provided with the microwave power divider of the first aspect.

[0044] The high-frequency PCB substrate is used to divide the 1-path high-frequency signal output by a signal generator into multiple paths (such as 4-to-32 paths) by the microwave power divider disposed thereon.

[0045] The aforementioned high-frequency PCB substrate preferably uses a substrate with low dielectric loss and high dimensional stability. The high-frequency PCB substrate includes a single layer of traces and three layers of GND shielding, wherein the traces are located on the top layer and the three layers of GND shielding are located below the top layer.

[0046] Figure 7 This is a schematic diagram of the wiring layer structure of a high-frequency PCB substrate provided in an embodiment of this application. Please refer to... Figure 7 When the 1-to-32 power divider provided in this application embodiment is deployed on the high-frequency PCB substrate, the wiring layer includes the wiring structure of the first to fifth level power divider network, as well as the input port P0 and the output ports P1 to P32.

[0047] Understandably, when the 1-to-4 power divider provided in this application embodiment is deployed on the high-frequency PCB substrate, the routing layer includes the routing structure of the first-stage and second-stage power divider networks, the input port P0, and the four output ports corresponding to the first-stage and second-stage power divider networks. When the 1-to-8 power divider provided in this application embodiment is deployed on the high-frequency PCB substrate, the routing layer includes the routing structure of the first-stage and third-stage power divider networks, the input port P0, and the eight output ports corresponding to the first-stage and third-stage power divider networks. When the 1-to-16 power divider provided in this application embodiment is deployed on the high-frequency PCB substrate, the routing layer includes the routing structure of the first-stage and fourth-stage power divider networks, the input port P0, and the sixteen output ports corresponding to the first-stage and fourth-stage power divider networks.

[0048] In practical applications, two or more output ports of the microwave power divider can be used for chip testing according to actual needs (such as the number of RF chips to be tested, performance test items, etc.). For example, when there are 10 RF chips to be tested, and each RF chip has 2 input ports, then only 20 output ports of the 1 to 32 power divider provided in this application embodiment can be used for testing, and the other output ports can be equipped with 50Ω load plugs as redundant ports for backup.

[0049] In some implementations, all output ports of the Nth stage power divider network of the microwave power divider are located at the edge of the high-frequency PCB substrate, and the spacing between any two adjacent output ports is ≥5 mm.

[0050] As an example, please refer to Figure 4~Figure 5The microwave power divider (1-to-32 power divider) provided by the embodiments of the present application has two output ports in each fifth stage two-way power division unit, all the output ports (P1-P32) are distributed on the edge of the high-frequency PCB substrate, the distance between every two adjacent output ports is greater than or equal to 5 mm, for example, the distance between the output port P1 and the output port P2 is greater than or equal to 5 mm, and the distance between the output port P3 and the output port P4 is greater than or equal to 5 mm. In this way, the crosstalk between the output ports can be avoided.

[0051] In some embodiments, the input port and each output port of the microwave power divider are provided with a microstrip line designed by impedance matching.

[0052] As an example, please refer to Figure 4~Figure 5 The input port P0 and all the output ports of the microwave power divider (1-to-4-to-32 power divider) deployed on the high-frequency PCB substrate are provided with a microstrip line designed by impedance matching, that is, a 50Ω impedance trace design is adopted, which is consistent with the impedance of the signal source and the load end. In this way, the impedance continuity in the signal transmission process can be ensured, and the insertion loss of the microwave power divider can be further controlled.

[0053] In some embodiments, the surface of the high-frequency PCB substrate is provided with an electrolytic copper foil conductor layer, and the thickness of the electrolytic copper foil conductor layer is 17 µm and the roughness is less than or equal to 1.5 µm. In this way, the influence of conductor loss on the signal can be reduced, and the single-stage insertion loss of the microwave power divider deployed thereon can be controlled to be less than or equal to 4 dB, thereby improving the transmission quality and efficiency of high-frequency signals.

[0054] In some embodiments, the high-frequency PCB substrate has a thickness of 0.508 mm, a dielectric constant of 3.48 at 25°C and 10 GHz, and a dielectric loss tangent value of less than or equal to 0.0037. In this way, the signal transmission loss in the high-frequency frequency band (such as 29 GHz) can be minimized.

[0055] In a third aspect, the embodiments of the present application also provide a chip test system, which comprises a signal generator, a high-frequency PCB substrate of the second aspect, a test board and a driving board. The high-frequency PCB substrate is connected with the signal generator and the test board respectively, and the driving board is connected with the test board.

[0056] Figure 8 is a structural block diagram of a chip test system provided by the embodiments of the present application. Please refer to Figure 8The chip test system provided by the embodiment of the application comprises: a signal generator 801, a high-frequency PCB substrate 802, a test board 803 and a driving board 804; the high-frequency PCB substrate 802 is disposed with the microwave power divider provided by the embodiment of the application; the high-frequency PCB substrate 802 is connected with the signal generator 801 and the test board 803 respectively, and the driving board 804 is connected with the test board 803. Each output port on the high-frequency PCB substrate 802 can be connected with the test board 803 or the driving board 804, so as to finally realize input of the high-frequency test signal to the chip under test.

[0057] The signal generator 801 is used for providing a high-frequency signal meeting the radio frequency chip test.

[0058] The high-frequency PCB substrate 802 is used for dividing the one-way high-frequency signal output by the signal generator 801 into multiple ways (for example, 4-32 ways) through the microwave power divider disposed thereon.

[0059] The test board 803 is used for carrying and connecting the chip under test (for example, a radio frequency chip). The test board 803 provides a loading platform for multiple chips under test (DUTs), and ensures that the chip under test can be accurately fixed at a specific position. Meanwhile, the test board 803 can indirectly connect the chip under test with the driving board 804 through a spring needle or a cable, establish electrical connection, make the test signal accurately transmitted to the chip under test, and feed back the response signal of the chip under test to the driving board 804, so as to realize the test of the chip under test.

[0060] In actual application, the chip under test (for example, a radio frequency chip) can be placed in a chip under test clamp, and then the electrical connection between the chip under test and the pad on the test board 803 can be realized through the probe arranged on the chip under test clamp.

[0061] In some embodiments, multiple chip loading areas are arranged on the test board 803, and one chip loading area can load one chip under test, so that multiple chips under test can be simultaneously tested, the test efficiency of the chip is greatly improved, the demand of rapid test on a large number of chips in the semiconductor mass production process is met, and the test cost is reduced and the test period is shortened.

[0062] The driving board 804 is used for providing a test excitation signal. The digital measurement board card can generate various different types, frequencies, amplitudes and time sequences of digital or analog signals, and apply the signals to the chip under test as the test excitation. The excitation signals simulate the input signals of the chip under test in actual work, and are used for exciting various functions and operations of the chip under test, so as to check whether the functions of the chip under test are normal or to perform aging test on the chip under test.

[0063] In a fourth aspect, the embodiment of the application further provides a test board, and the test board is disposed with the microwave power divider of the first aspect.

[0064] Figure 9 is a schematic diagram of a deployment manner of the microwave power divider provided by the embodiment of the present application. The microwave power divider is deployed on the test board, and thus the high-frequency PCB substrate in the chip test system shown in Figure 8 can be omitted, thereby saving the procurement cost of the high-frequency PCB substrate.

[0065] In some embodiments, the input port P0 and all the output ports of the microwave power divider (1-to-4-to-32-way) deployed on the test board are provided with microstrip lines designed with impedance matching, i.e., all the output ports are designed with 50 Ω impedance lines, which are consistent with the impedances of the signal source and the load end, so as to ensure the impedance continuity in the signal transmission process and further control the insertion loss of the microwave power divider.

[0066] Figure 10 is another structural block diagram of a chip test system provided by the embodiment of the present application. Please refer to Figure 10 , which comprises a signal generator 801, a test board 803 and a driving board 804; the test board 803 is deployed with the microwave power divider (1-to-4-to-32-way power divider) described above; the signal generator 801 is connected with the test board 803, and the driving board 804 is connected with the test board 803.

[0067] The following will take the deployment of the microwave power divider (e.g., 1-to-32-way power divider) provided by the embodiment of the present application on the high-frequency PCB substrate as an example to further illustrate the performance test results of the microwave power divider provided by the embodiment of the present application.

[0068] In the embodiment, the width of the first main transmission line (L1) in the first-stage power-dividing network of the microwave power divider is 0.5 mm, the length is 5 mm, and the loss is 0.15 dB; the width of the first-stage branch transmission line one (L1-1) and the first-stage branch transmission line two (L1-2) in the first-stage two-way power-dividing unit (U1) is 0.3 mm, the length is 3 mm, and the loss of a single branch transmission line is 0.1 dB; the width of the λ / 4 matching section (M1-1) between the first main transmission line (L1) and the first-stage branch transmission line one (L1-1) and the width of the λ / 4 matching section (M1-2) between the first main transmission line (L1) and the first-stage branch transmission line two (L1-2) are both 0.35 mm, the length is 0.78 mm, and the loss of a single section of M1-1 and M1-2 is 0.05 dB. The second-stage two-way power-dividing unit one (U2) in the second-stage power-dividing network of the microwave power divider includes a second main transmission line one (L2), which is connected with the second end of the first-stage branch transmission line one (L1-1) in the first-stage power-dividing network; the transmission line width of L2 is 0.5 mm, the length is 8 mm, and the loss is 0.2 dB. The second-stage two-way power-dividing unit two (U3) in the second-stage power-dividing network includes a second main transmission line two (L3), which is connected with the second end of the first-stage branch transmission line two (L1-2) in the first-stage power-dividing network; the transmission line width of L3 is 0.5 mm, the length is 8 mm, and the loss is 0.2 dB. Please refer to Figure 11, the width and length dimension of the branch transmission line of U2, U3, and the width and length dimension of the λ / 4 matching section are consistent with the branch transmission line and the λ / 4 matching section of U1. The connection mode, transmission line and λ / 4 matching section of the third two-way power division unit one (U4), the third two-way power division unit two (U5), the third two-way power division unit three (U6), and the third two-way power division unit four (U7) in the third power division network of the microwave power divider; the fourth two-way power division unit one (U8), the fourth two-way power division unit two (U9), the fourth two-way power division unit three (U10), the fourth two-way power division unit four (U11), the fourth two-way power division unit five (U12), the fourth two-way power division unit six (U13), the fourth two-way power division unit seven (U14), and the fourth two-way power division unit eight (U15) in the fourth power division network; and the fifth two-way power division unit one (U16), the fifth two-way power division unit two (U17), the fifth two-way power division unit three (U18), the fifth two-way power division unit four (U19), the fifth two-way power division unit five (U20), the fifth two-way power division unit six (U21), the fifth two-way power division unit seven (U22), the fifth two-way power division unit eight (U23), the fifth two-way power division unit nine (U24), the fifth two-way power division unit ten (U25), the fifth two-way power division unit eleven (U26), the fifth two-way power division unit twelve (U27), the fifth two-way power division unit thirteen (U28), the fifth two-way power division unit fourteen (U29), the fifth two-way power division unit fifteen (U30), and the fifth two-way power division unit sixteen (U31) in the fifth power division network are the same as the first two-way power division unit (U1) described above. The lengths of the main transmission lines of the power division networks of the same level are equal, which ensures that the transmission paths of the 32-way output signals are equal in length.

[0069] wherein U2-U31 in the above embodiments are the same as U1, L2-L3 are the same as L1, and the reference signs U2-U31 and L2-L3 are not marked in the drawings.

[0070] The microwave power divider described above is tested for performance, and the test conditions are: input signal frequency 29 GHz, input power 10 dBm, and the test results are as shown in Figure 12~Figure 16 Figure 12 The red line and the green line in the above are the insertion loss curves of the input port to the two output ports of the first power division network, Port1 represents the input port of the first power division network, and Port2 and Port3 represent the two output ports of the first power division network. Figure 13 ​The red and green lines in the diagram represent the insertion loss curves from the input port to the two output ports of one of the second-stage two-way power dividers in the second-stage power divider network. Since the two second-stage two-way power dividers in the second-stage power divider network are symmetrically designed, one of the second-stage two-way power dividers was arbitrarily selected for testing in the simulation experiment. Port1 represents the input port of one of the second-stage two-way power dividers in the second-stage power divider network, and Port2 and Port3 represent the two output ports belonging to the same second-stage two-way power divider as Port1. Figure 14 The red and green lines in the diagram represent the insertion loss curves from the input port to the two output ports of one of the third-stage two-way power dividers in the third-stage power divider network. Port1 represents the input port of one of the third-stage two-way power dividers in the third-stage power divider network, while Port2 and Port3 represent the two output ports belonging to the same third-stage two-way power divider as Port1. Figure 15 The red and green lines in the diagram represent the insertion loss curves from the input port to the two output ports of one of the fourth-stage two-way power dividers in the fourth-stage power divider network. Port1 represents the input port of one of the fourth-stage two-way power dividers in the fourth-stage power divider network, while Port2 and Port3 represent the two output ports belonging to the same fourth-stage two-way power divider as Port1. Figure 16 The red and green lines in the diagram represent the insertion loss curves from the input port to the two output ports of one of the fifth-stage two-way power dividers in the fifth-stage power divider network. Port1 represents the input port of one of the fifth-stage two-way power dividers in the fifth-stage power divider network, while Port2 and Port3 represent the two output ports belonging to the same fifth-stage two-way power divider as Port1.

[0071] like Figure 12 As shown, the first-stage insertion loss of the first-stage power dividing network of this microwave power divider is 3.2 dB. Figure 13 As shown, the second-stage insertion loss of the second-stage power divider network is 3.4 dB. Figure 14 As shown, the insertion loss of the third stage of the third-stage power divider network is 3.4 dB. Figure 15 As shown, the insertion loss of the fourth stage of the fourth-stage power divider network is 3.2 dB. Figure 16 As shown, the insertion loss of the fifth stage of the fifth-stage power divider network is 3.2 dB. Therefore, it can be seen that the single-stage insertion loss of the microwave power divider provided in this embodiment is controlled within the target range of 3.2 dB to 3.4 dB.

[0072] The microwave power divider provided in the embodiments of the present application contains input / output connector loss (0.2 dB for single end, 0.4 dB in total), the total insertion loss of 32 output ports (P1-P32) ranges from 16.0 dB to 16.6 dB, and the average total insertion loss is 16.3 dB, which meets the design requirement of ≤17 dB. Compared with the conventional power divider (total insertion loss ≥20 dB), the average total insertion loss is reduced by more than 3.7 dB, and the total insertion loss is further reduced by 0.2 dB due to the reduction of 0.1 dB in connector insertion loss compared with the scheme using ordinary SMA connectors.

[0073] Ten groups of output ports (such as P1&P2, P5&P12, P18&P32, etc.) in the microwave power divider provided in the embodiments of the present application are randomly selected for isolation test, and the test results are all ≥22.5 dB, with the highest isolation of 24.3 dB (P10&P25), which meets the isolation requirement of ≥22 dB.

[0074] The transmission line length and width of each power division network of the microwave power divider provided in the embodiments of the present application have strict requirements. Through multiple simulation verifications, the optimal values of the transmission line length and width of each power division network are obtained, so as to ensure that the single-stage insertion loss of each power division network can be controlled to be below 4 dB.

[0075] When the input signal frequency band is other frequency bands except 25-32 GHz, the transmission line impedance of the microwave power divider needs to be adjusted to 70.2 Ω and simulation verification is performed to ensure that the single-stage insertion loss, total insertion loss, return loss and isolation of the microwave power divider meet the relevant index requirements, so as to ensure the transmission efficiency and quality of high-frequency signals.

[0076] In summary, the microwave power divider provided in the embodiments of the present application overcomes the defects of the conventional power divider in the high-frequency 1-to-32-way distribution scene, such as large insertion loss (single-stage insertion loss exceeding 4 dB), low isolation, and poor integration. By optimizing the selection of PCB substrate, power division network topology and impedance matching design, the single-stage insertion loss is controlled to be below 4 dB, high-frequency signals of 25-32 GHz are efficiently distributed to 32 ways, the total insertion loss is reduced, the isolation and phase consistency of each output port are improved, and the miniaturization installation and high reliability requirements of high-frequency communication systems are met.

[0077] The above embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A microwave power divider, characterized in that, The microwave power divider consists of the first stage to the second stage. N The power distribution network is cascaded in sequence to form a power distribution network. N Cascaded structure, where 2≤ N ; The first-stage power divider network includes a first-stage main transmission line and a first-stage two-way power divider unit; the first end of the first-stage main transmission line is connected to the input port, and the second end is connected to the first-stage two-way power divider unit through a first balancing resistor; the input port is adapted to a high-frequency excitation source. The first N The power distribution network includes 2 N-1 The first N Two-stage power divider units, two of the aforementioned first-stage power dividers N The two-stage power divider units each pass through a first-stage power divider. N Balance resistor and the first N-1 Two-way power divider unit connection at each stage; each of the first... N Each of the two power dividers includes two output ports.

2. The microwave power divider according to claim 1, characterized in that, The first level to the second level N The transmission line length error of the power distribution network is ≤0.1 mm, the transmission line impedance tolerance is ±3 Ω, the transmission line width accuracy is ±0.02 mm, the transmission line corners are all designed with 40°~45° arcs, and there is no copper foil covering within 1 mm around the transmission line.

3. The microwave power divider according to claim 1, characterized in that, The first-stage insertion loss corresponding to the first-stage power divider network, the first-stage insertion loss of ... N The first level of the power distribution network N The insertion loss of each stage is less than 4 dB.

4. The microwave power divider according to claim 1, characterized in that, A microstrip line gradient transition section is provided between the input port and the first end of the first-stage main transmission line. The width of the microstrip line gradient transition section gradually increases along the extension path from the input port to the first end of the first-stage main transmission line.

5. The microwave power divider according to claim 1, characterized in that, The first-stage two-way power divider unit includes a first-stage branch transmission line one and a first-stage branch transmission line two; the first end of the first-stage main transmission line is connected to the input port, and the first ends of the first-stage branch transmission line one and the first ends of the first-stage branch transmission line two are respectively connected to the second end of the first-stage main transmission line through a first balancing resistor; A quarter-wavelength matching section is provided between the second end of the first-stage main transmission line and the first end of the first-stage branch transmission line one and the first end of the first-stage branch transmission line two, respectively.

6. A high-frequency PCB substrate, characterized in that, The high-frequency PCB substrate is provided with a microwave power divider as described in any one of claims 1 to 5.

7. The high-frequency PCB substrate according to claim 6, characterized in that, The microwave power divider's first N All output ports of the power divider network are located on the edge of the high-frequency PCB substrate, and the spacing between any two adjacent output ports is ≥5mm.

8. The high-frequency PCB substrate according to claim 6, characterized in that, The input port and each of the output ports are equipped with microstrip lines designed with impedance matching.

9. The high-frequency PCB substrate according to claim 6, characterized in that, The surface of the high-frequency PCB substrate is provided with an electrolytic copper foil conductor layer; the thickness of the electrolytic copper foil conductor layer is 17 µm and the roughness is ≤1.5 µm; the dielectric constant of the high-frequency PCB substrate is 3.48 and the dielectric loss tangent is ≤0.0037 under the conditions of 25 ℃ and 10 GHz.

10. A chip testing system, characterized in that, include: The signal generator, the high-frequency PCB substrate as described in any one of claims 6 to 9, the test board, and the driver board; The high-frequency PCB substrate is connected to the signal generator and the test board respectively, and the driver board is connected to the test board.

11. A test board, characterized in that, The test board is equipped with a microwave power divider as described in any one of claims 1 to 5.

12. The test board according to claim 11, characterized in that, The input port and each of the output ports are equipped with microstrip lines designed with impedance matching.

13. A chip testing system, characterized in that, include: Signal generator, test board as described in claim 11 or 12, and driver board; The signal generator is connected to the test board, and the driver board is connected to the test board.

Images