Hot steam bubble type ink jet nozzle heating device structure and preparation method thereof

Abstract

The invention discloses a hot steam bubble type ink jet nozzle heating device structure and a preparation method thereof. The structure comprises a substrate layer; the field oxide layer is located on the substrate layer; the heating resistance layer formed by polycrystalline silicon is located on the field oxide layer, the two ends of the heating resistance layer formed by polycrystalline silicon are connected with the Metal1 through via holes, and then the heating resistance layer formed by polycrystalline silicon is connected with a control circuit through the Metal1 at the two ends; the insulating layer is located on the heating resistance layer formed by the polycrystalline silicon, and the insulating layer is used for isolating the polycrystalline silicon layer from other media; the passivation layer is deposited on the surface of the chip and used for protecting the interior of the chip from being eroded by external water vapor and pollutants and meanwhile preventing stress damage in the packaging process; the protective layer is used for preventing process gas and metal atoms in the subsequent process from polluting the CMOS / BCD device; meanwhile, the metal oxide semiconductor layer is used as a protective layer of a CMOS / BCD-MEMS interface; the flow path layer is located on the protection layer, and the flow path layer is used for arranging an emission cavity and a flow channel for fluid flowing.

Description

Technical Field

[0001] This invention belongs to the field of inkjet printhead technology, specifically relating to a thermal device structure and preparation method of a thermal bubble inkjet printhead. Background Technology

[0002] The core of a thermal bubble MEMS inkjet printhead is the integration of microstructures such as CMOS / BCD driving circuits, heating resistors, ink cavities, and nozzles on a silicon substrate. Its MEMS manufacturing process integrates semiconductor processes and micromachining technologies, and the general process flow of its mainstream technology is as follows:

[0003] The first step is substrate pretreatment and CMOS / BCD driver circuit fabrication. Single-crystal silicon is preferentially chosen as the substrate due to its excellent thermal stability and mechanical properties. The silicon wafer is first cut, ground, and polished to obtain a smooth surface and uniform thickness. Then, it undergoes thermal oxidation in a high-temperature, humid oxygen environment to form a silicon dioxide insulating layer for subsequent electrical insulation. Following this, semiconductor processes such as doping (ion implantation or thermal diffusion), photolithography, and thin-film deposition are used to fabricate the CMOS / BCD driver circuit on the silicon substrate. This circuit is used to precisely control the energizing pulses of the heating element; this step is crucial for achieving inkjet timing and power control of the printhead.

[0004] The second step is the fabrication of the heating resistance layer. The heating element is the core of hot bubble generation, and commonly used materials with high temperature resistance and stable resistivity include TaAl alloy, Ti / Pt / Ti, or polycrystalline silicon. Using physical vapor deposition (such as sputtering) or chemical vapor deposition (CVD) techniques, a 100-300 nm thick resistive film is deposited in a designated area on a wafer with CMOS / BCD driving circuitry. This thickness needs to balance heating efficiency and power consumption to form an array of heating resistance units. A heat dissipation layer composed of a SiN thin film and a tantalum layer is deposited around the heating resistor to accelerate heat transfer and protect the component. Simultaneously, an insulating oxide layer is added between the heating resistor and the driving circuitry to prevent short circuits and ensure electrical isolation performance.

[0005] The third step is the formation of the cavity structure. The mainstream process uses deep silicon etching to create the ink cavity. After the pattern of the ink cavity and ink supply channel is defined by photolithography, the silicon material is selectively removed using dry etching technology to form an ink storage cavity and ink supply channel with a depth of 10-100 micrometers.

[0006] The fourth step is capping and nozzle fabrication. A substrate-compatible silicon or insulating material is selected as the capping sheet. Nozzle apertures corresponding to the ink cavity are pre-fabricated on the capping sheet using photolithography and etching processes. The nozzle size is typically controlled between 10-50 micrometers to ensure that the bubble pressure can effectively propel the ink droplets out. Using processes such as aluminum-germanium bonding or gold-tin bonding, the capping sheet is bonded to the substrate containing the heating element and ink cavity to form a sealed ink cavity structure. The bonding process requires strict control of temperature and pressure to ensure the bonding layer is airtight and prevent ink leakage.

[0007] The fifth step is nozzle surface treatment, which involves depositing a 10-20 nanometer hydrophobic layer on the nozzle surface of the cover plate. Al2O3ALD layer or DLC film is commonly used to reduce ink adhesion at the nozzle and avoid clogging problems caused by ink droplet residue.

[0008] As mentioned above, in mainstream processes, the fabrication of the CMOS / BCD driving circuit and the fabrication of the heating resistor layer are separated into two independent stages, requiring two different process flows. For example... Figure 1 The diagram illustrates the process hierarchy of the CMOS / BCD driver circuit and the heating resistor layer in a mainstream manufacturing process. In the CMOS / BCD process, semiconductor processes such as doping (ion implantation or thermal diffusion), photolithography, and thin-film deposition are used to fabricate the CMOS / BCD driver circuit on a silicon substrate. A 2M1P CMOS / BCD process is employed to realize the CMOS / BCD driver circuit. After completing the CMOS / BCD driver circuit fabrication, using pre-reserved PAD pads and heating resistor pads, photolithography and thin-film deposition are used to deposit a 100-300 nm thick resistive film on a designated area of ​​the wafer containing the CMOS / BCD driver circuit, forming an array of heating resistor units. A heat dissipation layer composed of SiN thin films is deposited on top of the heating resistor units to accelerate heat transfer and protect the components. The subsequent steps involve a normal cavity structure forming process, cover glass bonding, and nozzle fabrication. Summary of the Invention

[0009] In view of the above-mentioned problems, the present invention provides a thermal device structure and preparation method for a thermal bubble inkjet printhead, which is used to embed the preparation of the heating resistance layer into the CMOS / BCD driving circuit process, thereby reducing the overall process steps.

[0010] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0011] This invention provides a thermal device structure for a thermal bubble inkjet printhead, comprising:

[0012] Substrate layer;

[0013] A field oxygen layer is located on the substrate layer;

[0014] A polycrystalline silicon heating resistance layer is located on the field oxide layer. The two ends of the polycrystalline silicon heating resistance layer are connected to Metal1 through vias, and then connected to the control circuit through the two ends of Metal1.

[0015] An insulating layer is located on top of the polycrystalline silicon heating resistor layer, the insulating layer serving to isolate the polycrystalline silicon heating resistor layer from other media.

[0016] Passivation layer: A passivation layer is deposited on the chip surface to protect the chip from external moisture and contaminants, while also preventing stress damage during the packaging process.

[0017] A protective layer is provided to prevent process gases and metal atoms from contaminating the CMOS / BCD device in subsequent processes; it also serves as a protective layer for the CMOS / BCD-MEMS interface.

[0018] The flow path layer is located on the protective layer, and the flow path layer is used to set up the emission cavity and flow channel for fluid flow.

[0019] In one possible implementation, the thickness of the field oxygen layer ranges from 0.6 μm to 1 μm.

[0020] In one possible implementation, the polycrystalline silicon heating resistor formed by the polycrystalline silicon layer has a length ranging from 16um to 60um and a width ranging from 15um to 40um, forming a sheet resistor.

[0021] In one possible implementation, the unit resistance value of the sheet resistor ranges from 100 ohms to 300 ohms.

[0022] In one possible implementation, the thickness of the insulating layer ranges from 200 nm to 1000 nm.

[0023] In one possible implementation, the thickness of the protective layer ranges from 300 nm to 1000 nm.

[0024] Another embodiment of the present invention provides a method for fabricating a thermal device structure for a thermally vaporized inkjet printhead, used to fabricate a thermally vaporized inkjet printhead heating device structure as described above, comprising the following steps:

[0025] S10, a substrate layer is provided, and a field oxide layer is formed on the substrate layer;

[0026] S20, based on CMOS / BCD process, forms a polysilicon heating resistance layer on the field oxide layer;

[0027] S30, based on CMOS / BCD technology, forms corresponding layers including vias, Metal1 and Metal2 to complete the CMOS / BCD driving circuit;

[0028] S40, forming a passivation layer on the CMOS / BCD circuit wafer, the passivation layer covering all non-open pad window surfaces to protect the CMOS / BCD circuit;

[0029] S50, an insulating layer is covered on the heating resistance layer region formed by polysilicon;

[0030] S60, a protective layer is formed on the insulating layer, the protective layer covering the surface of the insulating layer and the exposed sidewalls formed by deep silicon etching during the formation of the insulating layer;

[0031] S70, a flow path layer is formed on the protective layer.

[0032] The present invention has the following advantages: by embedding the polycrystalline silicon heating resistor layer in the standard CMOS / BCD process layer, the integrated design of the CMOS / BCD driving circuit and the heating resistor unit is realized, and the fabrication process of the thin film heating resistor in the standard MEMS process is reduced. Attached Figure Description

[0033] Figure 1 This is a schematic diagram of the process hierarchy of CMOS / BCD driving circuit technology and MEMS heating resistor layer in the prior art.

[0034] Figure 2 This is a schematic diagram of the heating device structure of a hot-bubble inkjet printhead according to an embodiment of the present invention;

[0035] Figure 3 This is a process hierarchy diagram after the CMOS / BCD process is completed in the embodiment of the method of the present invention.

[0036] Figure 4 This is a schematic diagram of the layered structure formed after deep silicon etching of the polysilicon heating resistor region in an embodiment of the method of the present invention. Detailed Implementation

[0037] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0038] See Figure 2 The diagram shows a schematic of the heating element structure of a hot-bubble inkjet printhead according to an embodiment of the present invention, comprising:

[0039] Substrate 1;

[0040] Field oxygen layer 2 is located on substrate layer 1;

[0041] The polycrystalline silicon heating resistance layer 3 is located on the field oxide layer 2. The two ends of the polycrystalline silicon heating resistance layer 3 are connected to Metal1 through vias, and then connected to the control circuit through Metal1 at both ends.

[0042] Insulating layer 4 is located on the polycrystalline silicon heating resistance layer 3. The insulating layer 4 is used to isolate the polycrystalline silicon layer from other media and protect the polycrystalline silicon heating resistance layer 3 from external moisture and pollutants.

[0043] Passivation layer 5 is deposited on the chip surface to protect the internal components of the chip from external moisture and contaminants, while also preventing stress damage during the packaging process. The chip contains MOSFETs, resistors, interconnect metals, and other structures.

[0044] Protective layer 6 is used to prevent process gases and metal atoms from contaminating the CMOS / BCD device in subsequent processes; it also serves as a protective layer for the CMOS / BCD-MEMS interface.

[0045] The flow path layer 7 is located on the protective layer 6, and the flow path layer 7 is used to set up the emission cavity and flow channel for fluid flow.

[0046] In specific application examples, the thickness of the field oxide layer 2 can range from 0.6 μm to 1 μm. The polycrystalline silicon heating resistor layer 3, formed from polycrystalline silicon, has a length ranging from 16 μm to 60 μm and a width ranging from 15 μm to 40 μm, forming a sheet resistance. Its sheet resistance is precisely set by controlling the concentration of lightly doped ions. The unit resistance value of its sheet resistance ranges from 100 ohms to 300 ohms. The insulating layer 4 can be made of heterogeneous or mixed materials, including but not limited to at least one of silicon oxynitride and silicon oxide, and its thickness ranges from 200 nm to 1000 nm. The protective layer 6 can be made of heterogeneous or mixed materials, including but not limited to at least one of nitrogen-doped polycrystalline silicon, silicon oxynitride, silicon oxide, aluminum oxide, tantalum oxide, and hafnium oxide. The thickness of the protective layer 6 ranges from 300 nm to 1000 nm.

[0047] Corresponding to the structural embodiment, another embodiment of the present invention provides a method for fabricating the above-mentioned thermal bubble inkjet printhead heating device structure, including the following steps:

[0048] S10, a substrate layer is provided, and a field oxide layer is formed on the substrate layer;

[0049] S20, based on CMOS / BCD process, forms a polysilicon heating resistance layer on the field oxide layer;

[0050] S30, based on CMOS / BCD technology, forms corresponding layers including vias, Metal1 and Metal2 to complete the CMOS / BCD driving circuit;

[0051] S40 forms the passivation layer of the CMOS / BCD circuit wafer. The passivation layer covers all non-open pad window surfaces to protect the CMOS / BCD circuit.

[0052] S50, an insulating layer is covered on the resistive region of the polysilicon layer;

[0053] S60, a protective layer is formed on the insulating layer, the protective layer covering the surface of the insulating layer and the exposed sidewalls formed by deep silicon etching during the formation of the insulating layer;

[0054] S70, forming a flow path layer on the protective layer.

[0055] Specifically, such as Figure 3 As shown, in S10, a substrate layer 1 is provided, and a field oxide layer 2 is formed on the substrate layer 1 by physical vapor deposition or other suitable methods. The substrate layer 1 may be a semiconductor substrate, including but not limited to silicon, germanium, germanium-silicon, III-V compound semiconductors, silicon-on-insulator, etc. The field oxide layer 2 includes but is not limited to a silicon dioxide layer.

[0056] In S20, a polysilicon heating resistor layer 3 is formed on the field oxide layer 2 using physical vapor deposition or other suitable methods. A layer of polysilicon is uniformly deposited over the entire wafer using physical vapor deposition or other suitable methods. This polysilicon layer is used to form both the gate and resistor of the transistor. The polysilicon layer is etched into the desired shape using photolithography and dry etching. A special lightly doped ion implantation is performed in the heating resistor region to precisely set its sheet resistance.

[0057] In S30, all CMOS / BCD driving circuits are implemented through semiconductor processes such as doping (ion implantation or thermal diffusion), photolithography, and thin film deposition. The polysilicon resistive layer is connected to the Metal1 layer through vias formed by semiconductor processes, forming effective circuit control.

[0058] In S40, a passivation layer is formed on the CMOS / BCD circuit wafer using physical vapor deposition or other suitable methods to protect the CMOS / BCD circuit. Pad areas are then formed using etching or other suitable methods.

[0059] In S50, photolithography, deep silicon etching, or other suitable methods are used to remove excessively thick insulating layers from the polysilicon heating resistor region, leaving only an insulating layer of appropriate thickness, such as... Figure 4 As shown; or by using photolithography, deep silicon etching or other suitable methods, the dielectric layer on the polycrystalline heating resistor region is removed, and an insulating layer is formed by chemical vapor deposition, physical vapor deposition or other suitable methods.

[0060] In S60, a protective layer is formed using chemical vapor deposition, physical vapor deposition, or other suitable methods. The protective layer covers the surface of the insulating layer and the exposed sidewalls formed by deep silicon etching during the formation of the insulating layer.

[0061] In S70, the flow path layer is formed by thin film pressing or other suitable methods, and the flow path layer 7 is placed before the protective layer 6.

[0062] The above-described method for fabricating the thermal device structure of the hot-bubble inkjet printhead involves using semiconductor processes such as doping (ion implantation or thermal diffusion), photolithography, and thin-film deposition in the CMOS / BCD process to fabricate the CMOS / BCD driving circuit on a silicon substrate. Simultaneously, in the CMOS / BCD process, the design of the heating resistor unit is realized at the polysilicon level. The connection between the via and the Metal level is achieved to realize the integrated design of the CMOS / BCD driving circuit and the heating resistor unit.

[0063] It should be understood that the exemplary embodiments described herein are illustrative and not restrictive. Although one or more embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A heating element structure for a thermal bubble inkjet printhead, characterized in that, include: Substrate (1); A field oxygen layer (2) is located on the substrate layer (1); The polycrystalline silicon heating resistance layer (3) is located on the field oxide layer (2). The two ends of the polycrystalline silicon heating resistance layer (3) are connected to Metal1 through vias, and then connected to the control circuit through Metal1 at both ends. An insulating layer (4) is located on top of the heating resistance layer (3) formed of polycrystalline silicon, and the insulating layer (4) serves as an insulator between the polycrystalline silicon layer and other media. Passivation layer (5): A passivation layer (5) is deposited on the chip surface to protect the inside of the chip from external moisture and contaminants, and to prevent stress damage during the packaging process. The protective layer (6) is used to prevent process gases and metal atoms in subsequent processes from contaminating the CMOS / BCD device; and at the same time, it serves as a protective layer for the CMOS / BCD-MEMS interface. The flow path layer (7) is located on the protective layer 6, and the flow path layer (7) is used to set the emission cavity and flow channel for fluid flow.

2. The heating element structure of the thermal bubble inkjet printhead as described in claim 1, characterized in that, The thickness of the field oxygen layer (2) ranges from 0.6 μm to 1 μm.

3. The thermal bubble inkjet printhead heating device structure as described in claim 1, characterized in that, The polycrystalline silicon heating resistor layer (3) has a length range of 16um to 60um and a width range of 15um to 40um, forming a sheet resistor.

4. The heating element structure of the thermal bubble inkjet printhead as described in claim 3, characterized in that, The unit resistance value of the sheet resistor ranges from 100 ohms to 300 ohms.

5. The heating element structure of the thermal bubble inkjet printhead as described in claim 1, characterized in that, The thickness of the insulating layer (4) ranges from 200nm to 1000nm.

6. The heating element structure of the thermal bubble inkjet printhead as described in claim 1, characterized in that, The thickness of the protective layer (6) ranges from 300nm to 1000nm.

7. A method for fabricating a heating element structure for a thermal bubble inkjet printhead, characterized in that, The method for preparing the thermal device structure of the thermal bubble inkjet printhead according to any one of claims 1 to 6 includes the following steps: S10, a substrate layer (1) is provided, and a field oxygen layer (2) is formed on the substrate layer (1); S20, according to CMOS / BCD process, a polysilicon heating resistance layer (3) is formed on the field oxide layer (2); S30, based on CMOS / BCD technology, forms corresponding layers including vias, Metal1 and Metal2 to complete the CMOS / BCD driving circuit; S40, forming a passivation layer (5) of the CMOS / BCD circuit wafer, the passivation layer (5) covering all non-open pad window surfaces to protect the CMOS / BCD circuit; S50, an insulating layer (4) is covered on the region of the heating resistance layer (3) formed by polycrystalline silicon. S60, a protective layer (6) is formed on the insulating layer (4), the protective layer (6) covering the surface of the insulating layer (4) and the exposed sidewalls formed by deep silicon etching when the insulating layer (4) is formed; S70, a flow path layer (7) is formed on the protective layer (6).

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