Low dropout regulator
By introducing a low-output-impedance buffer into the low-dropout regulator, the problems of instability and high power consumption in the existing technology are solved, achieving low power consumption and stable load regulation and transient response.
Patent Information
- Application Number
- CN202411174040.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-26
- Publication Date
- 2026-03-03
AI Technical Summary
Existing low dropout regulators suffer from instability in frequency response. Using N-type transistors increases power consumption and affects load regulation and transient response.
Introducing a buffer with low output impedance into a low dropout regulator, by paralleling the output impedance of the buffer with that of the transistor, reduces the output impedance and increases the frequency of the second pole, ensuring that the frequency difference between the two poles is large enough to stabilize the circuit.
While achieving low power consumption, it maintains the stability of load regulation and transient response, ensuring the stability of the low dropout regulator.
Smart Images
Figure CN121596944A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to low dropout regulators (LDOs). Background Technology
[0002] Typical low-dropout regulators (LDVs) usually have two poles in their frequency response, and these two poles need to have a significant difference in the frequency domain, such as more than 10 times the frequency, to ensure the stability of the LTV. To ensure stability, LTVs sometimes use N-type transistors as the power transistors at the output. If P-type transistors are used as the power transistors at the output, a resistor is sometimes connected in series with the output capacitor of the LTV. However, using N-type transistors as the power transistors at the output increases additional power consumption, and adding a resistor in series with the output capacitor of the LTV degrades load regulation and transient response. Summary of the Invention
[0003] Therefore, one of the objectives of this invention is to provide a low-dropout regulator that has low power consumption and does not affect the load regulation and transient response of the low-dropout regulator, so as to solve the problems mentioned in the prior art while ensuring the stability of the low-dropout regulator.
[0004] In one embodiment of the present invention, a low-dropout regulator is disclosed, comprising an operational amplifier, a first transistor, and a buffer. The operational amplifier receives a reference voltage and a feedback voltage to generate a control signal. A gate of the first transistor receives the control signal, a first terminal of the first transistor is coupled to a supply voltage, and a second terminal of the first transistor is coupled to a terminal point, wherein the terminal point is used to generate an output voltage of the low-dropout regulator. An input terminal of the buffer is connected to a bias voltage, and an output terminal of the buffer is connected to the terminal point. Attached Figure Description
[0005] Figure 1 This is a schematic diagram of a low-dropout regulator according to an embodiment of the present invention.
[0006] Figure 2 This is a schematic diagram of a low-dropout regulator according to an embodiment of the present invention.
[0007] Figure 3 This is a schematic diagram illustrating the effect of adding a buffer on a low-dropout regulator.
[0008] Symbol Explanation
[0009] 100: Low dropout voltage regulator
[0010] 110: Operational amplifier
[0011] 120: Transistor
[0012] 130: Buffer
[0013] Cout: Output capacitor
[0014] N1: Endpoint
[0015] N2: Endpoint
[0016] R: Resistance
[0017] RF: Resistance
[0018] rob: Output impedance of the buffer
[0019] rop: The output impedance of a transistor in parallel with resistors RF and R.
[0020] RO: Output impedance of the low dropout voltage regulator
[0021] Vb: Bias voltage
[0022] Vc: Control signal
[0023] VDD: Supply voltage
[0024] VREF: Reference Voltage
[0025] Vout: Output voltage
[0026] M1: P-type transistor
[0027] M2: P-type transistor
[0028] M3: N-type transistor
[0029] R1: Resistor
[0030] p1, p2, p2': Extreme points Detailed Implementation
[0031] Figure 1 This is a schematic diagram of a low-dropout regulator 100 according to an embodiment of the present invention, wherein the low-dropout regulator 100 is used to receive a reference voltage VREF to generate an output voltage Vout. Figure 1As shown, the low-dropout regulator 100 includes an operational amplifier 110, a transistor 120, a buffer 130, resistors RF and R, and an output capacitor Cout. In this embodiment, the operational amplifier 110 can have any suitable form, such as a 5-transistor amplifier, a telescopic amplifier, a folded cascode amplifier, etc. One input terminal of the operational amplifier 110 is connected to a reference voltage VREF, another input terminal is connected to a terminal N2, and an output terminal is connected to the transistor 120. The transistor 120 can be an N-type transistor or a P-type transistor, such as an N-type or P-type metal-oxide-semiconductor field-effect transistor (MOSFET), wherein the gate, a first terminal, and a second terminal of the transistor 120 are respectively connected to the output terminal of the operational amplifier 110, a supply voltage VDD, and a terminal N1 (for generating the output voltage Vout). Resistor RF is connected between terminals N1 and N2, and resistor R is connected between terminal N2 and ground. The input of buffer 130 is connected to a bias voltage Vb with a fixed value, and the output is connected to terminal N1. The first terminal of the output capacitor Cout is connected to terminal N1, and the second terminal is connected to ground.
[0032] exist Figure 1 In the low-dropout regulator 100, operational amplifier 110 receives a reference voltage VREF and a feedback voltage from terminal N2 to generate a control signal Vc to transistor 120, thereby controlling the current of transistor 120 to stabilize the output voltage Vout. In the circuit architecture of the low-dropout regulator 100, it has two poles: the first pole is at the output of operational amplifier 110, and the second pole is at the output of low-dropout regulator 100. To increase the frequency difference between the second and first poles to ensure the stability of the low-dropout regulator 100, this embodiment designs a buffer 130 with low output impedance characteristics to reduce the output impedance of the low-dropout regulator 100 and push the second pole to a higher frequency. Figure 1For example, assuming the output impedance of transistor 120 in parallel with resistors RF and R is denoted as "rop", and the output impedance of buffer 130 is "rob", then the output impedance "RO" of low-dropout regulator 100 will be equal to the result of "rop" and "rob" in parallel. Furthermore, since the output impedance "rob" of buffer 130 is much smaller than the output impedance of transistor 120 in parallel with resistors RF and R, the output impedance "RO" of low-dropout regulator 100 will approximate the output impedance "rob" of buffer 130, and the frequency of the second pole can be expressed as follows:
[0033]
[0034] As shown in formula (1), since the buffer 130 has a very small output impedance "rob", the second pole of the low dropout regulator 100 will have a higher frequency, which makes the two poles of the low dropout regulator 100 have a large frequency difference, so as to increase the stability of the overall circuit operation.
[0035] In one embodiment, reference Figure 2 The low-dropout regulator 100 uses a P-type transistor M1 as its transistor 120. The source of the P-type transistor M1 is coupled to the supply voltage VDD, and its drain is coupled to terminal N1. Compared to an N-type transistor, by using the P-type transistor M1, the operational amplifier 110 only needs to generate a lower voltage control signal Vc to drive the P-type transistor M1, thus reducing the power consumption of the low-dropout regulator 100. Furthermore, since the P-type transistor M1 has a higher output impedance, the lower output impedance "rob" provided by the buffer 130 avoids the problem of excessively high output impedance "RO" of the low-dropout regulator 100 caused by using the P-type transistor M1.
[0036] In one embodiment, reference Figure 2 The buffer 130 is implemented using a source follower, comprising a P-type transistor M2, a resistor R1, and an N-type transistor M3. The gate, source, and drain of the P-type transistor M2 are coupled to a bias voltage Vb, a terminal N1, and a first terminal of the resistor R1, respectively. The second terminal of the resistor R1 is coupled to a reference voltage (in this embodiment, the reference voltage is ground). The gate of the N-type transistor M3 is coupled to the drain of the P-type transistor M2, and the drain and source of the N-type transistor M3 are coupled to a terminal N1 and ground, respectively. Figure 2 In this embodiment, the output impedance "rob" of buffer 130 can be represented as follows:
[0037] Where “gm1” is the transconductance of P-type transistor M2, “gm2” is the transconductance of N-type transistor M3, and “ro1” is the impedance of P-type transistor M2. Since the output impedance “rob” of buffer 130 in formula (2) has a very small value, the output impedance “RO” of low dropout regulator 100 can be effectively reduced to increase the frequency of the second pole.
[0038] In another embodiment, Figure 2 The transistors M2 and M3 shown are not limited to being P-type and N-type transistors, respectively. That is, as long as the gate, first terminal, and second terminal of transistor M2 are respectively coupled to the bias voltage Vb, terminal N1, and a reference voltage, and the first terminal and second terminal of transistor M3 are respectively coupled to terminal N1 and the reference voltage, the relevant design variations should fall within the scope of this invention. For example, if... Figure 2 M2 and M3 are implemented as N-type transistors and P-type transistors, respectively. The lower end of resistor R1 can be connected to the supply voltage VDD, and the drain and source of transistor M3 will be coupled to the terminal N1 and the supply voltage VDD, respectively.
[0039] It should be noted that, Figure 2 The buffer 130 shown is merely an illustrative example and not a limitation of the invention. In other embodiments, the resistor R1 and the N-type transistor M3 of the buffer 130 can be removed, and the output impedance "rob" of the buffer 130 can then be expressed as follows:
[0040]
[0041] In one embodiment, in order to avoid affecting the load regulation rate and transient response of the low dropout regulator 100, no resistor is set between the output capacitor Cout and the terminal N1, that is, the first end of the output capacitor Cout is directly connected to the terminal N1.
[0042] Figure 3 for Figure 1 , Figure 2 The effect of adding buffer 130 on the low dropout regulator 100. For example... Figure 3 As shown, if the low-dropout regulator 100 does not include the buffer 130, the frequency difference between the second pole p2 and the first pole p1 will be relatively small, causing the system to be prone to instability. However, if the low-dropout regulator 100 includes the buffer 130, the frequency difference between the second pole p2' and the first pole p1 will be relatively large, thus stabilizing the operation of the low-dropout regulator 100.
[0043] In summary, by adding a buffer with low output impedance to the output terminal of a low-dropout regulator, the overall output impedance of the low-dropout regulator can be effectively reduced, thereby enabling a large frequency difference between the two poles of the low-dropout regulator and increasing the stability of the overall circuit operation.
[0044] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made within the scope of the claims of the present invention shall be covered by the present invention.
Claims
1. A low-dropout voltage regulator, comprising: An operational amplifier is used to receive a reference voltage and a feedback voltage to generate a control signal; A first transistor, wherein a gate of the first transistor receives the control signal, a first terminal of the first transistor is coupled to a supply voltage, and a second terminal of the first transistor is coupled to a terminal point, wherein the terminal point is used to generate an output voltage of the low-dropout regulator; and A buffer, wherein one input of the buffer is connected to a bias voltage and one output of the buffer is connected to the bias voltage.
2. The low dropout regulator as described in claim 1, wherein the buffer is a source follower.
3. The low dropout regulator of claim 1, wherein the first transistor is a P-type transistor, a source of the first transistor is coupled to the supply voltage, and a drain of the first transistor is coupled to the terminal.
4. The low dropout regulator as described in claim 3, wherein the buffer is a source follower.
5. The low-dropout regulator of claim 4, wherein the buffer comprises: A second transistor, wherein a gate, a first terminal and a second terminal of the second transistor are respectively coupled to the bias voltage, the terminal and a reference voltage.
6. The low dropout regulator of claim 5, wherein the reference voltage is a ground voltage, and the second transistor is a P-type transistor, wherein a source and a drain of the second transistor are respectively coupled to the terminal and the ground voltage.
7. The low-dropout regulator of claim 5, wherein the buffer further comprises: A resistor, wherein a first terminal of the resistor is coupled to the second terminal of the second transistor, and a second terminal of the resistor is coupled to the reference voltage; and A third transistor, wherein a gate of the third transistor is coupled to the second terminal of the second transistor, and a first terminal and a second terminal of the third transistor are respectively coupled to the terminal and the reference voltage.
8. The low dropout regulator of claim 7, wherein the second transistor is a P-type transistor, wherein a source and a drain of the second transistor are respectively coupled to the terminal and the first terminal of the resistor.
9. The low-dropout regulator of claim 8, wherein the reference voltage is a ground voltage, the first terminal of the resistor is coupled to the drain of the second transistor, and the second terminal of the resistor is coupled to the ground voltage.
10. The low dropout regulator of claim 8, wherein the reference voltage is a ground voltage, and the third transistor is an N-type transistor, wherein a drain and a source of the third transistor are respectively coupled to the terminal and the ground voltage.