A data caching method and device

Abstract

The application discloses a data caching method and device, and relates to the technical field of storage, which comprises the following steps: judging whether the data size of target data exceeds a preset threshold value, so as to adaptively select a first mirror caching strategy or a second mirror caching strategy. For small data block writing which is not greater than the preset threshold value, a traditional synchronous mirror is adopted, that is, the target data is written into the local cache of the first controller and the local cache of the second controller, so as to ensure the real-time synchronization of double-control caching, and also ensure the instant redundancy and low delay of data. For large data block writing which is greater than the preset threshold value, only the second controller is informed to clean invalid cache, and the data is directly written into a shared disk array, so that the bandwidth occupation of the inter-controller interconnection link is greatly reduced, and the bandwidth bottleneck of the target communication link is broken. Meanwhile, since the data has been persisted to the shared disk, even if a single controller fails after sending the invalid message, the data will not be lost.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of storage, in particular to a data caching method and device. BACKGROUND

[0002] In a storage system, a cache mirroring technology is usually adopted to guarantee the high availability and reliability of data. That is, when a controller receives a write request sent by a host and writes data into its local cache, the data is synchronized and mirrored to the local cache of another controller through an inter-controller interconnection link. This strategy can ensure that when any controller fails, the data still has a complete backup in another controller, thereby effectively preventing data loss, and is particularly suitable for business scenarios such as online transaction processing and virtual desktop.

[0003] However, with the popularization of application scenarios such as high-performance computing and artificial intelligence training, the I / O (Input / Output) mode faced by the storage system has changed. Such applications usually involve large-scale, sequential large data block writing, which puts forward a requirement of tens of GB or even hundreds of GB per second on the write bandwidth of the storage system. Under this background, the bandwidth of the inter-controller interconnection link has become a key factor restricting the overall write performance of the system. Due to cost and technical limitations, the bandwidth of the interconnection link is often difficult to match the massive data writing needs of such applications. When a large amount of data needs to be synchronized and mirrored, the limited link bandwidth will be quickly occupied, causing I / O congestion and increasing write latency, thereby failing to meet the needs of high-throughput applications.

[0004] In summary, how to solve the performance bottleneck caused by the bandwidth limitation of the inter-controller interconnection link is a problem to be solved at present. SUMMARY

[0005] The present application provides a data caching method and device to at least solve the problem that the bandwidth of the inter-controller interconnection link has become a key factor restricting the overall write performance of the system in the related art.

[0006] The present application provides a data caching method applied to a first controller in a storage system, the storage system further comprising a second controller, comprising:

[0007] Obtaining a write request carrying target data sent by a target host;

[0008] In response to the write request, writing the target data into a first cache, and determining whether the data size of the target data is greater than a preset threshold; the first cache is a cache of the first controller;

[0009] If the data size is not greater than the preset threshold, a first mirroring cache strategy is executed to transmit the target data to the second controller through a target communication link and write the target data into a second cache; the second cache is a cache of the second controller;

[0010] if greater than the preset threshold, writing the target data into the shared disk array, and performing a second mirror cache strategy to send a notification message carrying a target data identifier to the second controller through the target communication link to inform the second controller to delete old cache data corresponding to the target data identifier in the second cache; the target data identifier is a data identifier of the target data.

[0011] The application further provides a data cache device applied to a first controller in a storage system, the storage system further comprising a second controller, and comprising:

[0012] The request obtaining module is configured to obtain a write request carrying target data sent by a target host.

[0013] The judging module is configured to respond to the write request to write the target data into the first cache and to judge whether a data size of the target data is greater than a preset threshold; the first cache is a cache of the first controller.

[0014] The first strategy executing module is configured to, if not greater than the preset threshold, perform a first mirror cache strategy to transmit the target data to the second controller through the target communication link and write the target data into a second cache; the second cache is a cache of the second controller.

[0015] The second strategy executing module is configured to, if greater than the preset threshold, write the target data into the shared disk array and perform a second mirror cache strategy to send a notification message carrying a target data identifier to the second controller through the target communication link to inform the second controller to delete old cache data corresponding to the target data identifier in the second cache; the target data identifier is a data identifier of the target data.

[0016] The application further provides an electronic device comprising a memory configured to store a computer program and a processor configured to execute the computer program to implement the steps of any of the data cache methods.

[0017] The application further provides a computer readable storage medium, and the computer readable storage medium stores a computer program, wherein the computer program is executed by a processor to implement the steps of any of the data cache methods.

[0018] The application further provides a computer program product comprising a computer program, and the computer program is executed by a processor to implement the steps of any of the data cache methods.

[0019] By the present application, by judging whether the data size of the target data exceeds a preset threshold, the first mirror cache strategy or the second mirror cache strategy is adaptively selected. Wherein, for small data block writing not greater than the preset threshold, the traditional synchronous mirroring is adopted, that is, the target data is written into both the local cache of the first controller and the local cache of the second controller, which guarantees the real-time synchronization of the dual-control cache and also guarantees the instant redundancy and low delay of the data; for large data block writing greater than the preset threshold, the data is written into the shared disk array and the second controller is notified to delete the old cache data possibly existing in the local cache, which ensures that even in the large data block writing mode, the consistency of the data of the entire system is maintained and the host reading the expired data from the second controller is prevented; meanwhile, since the data has been persisted to the shared disk, even after sending the invalid message, the single controller fails, the data will not be lost, which guarantees the reliability of the system. That is, under the second mirror cache strategy, the present application only notifies the second controller to clean the invalid cache and directly writes the data into the shared disk array, which greatly reduces the bandwidth occupation of the inter-controller interconnection link, thereby breaking through the bandwidth bottleneck of the target communication link. Through the present scheme, the system can simultaneously efficiently serve two completely different business loads of low-latency transaction processing and high-throughput sequential writing. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0021] Figure 1 A read request processing flowchart provided for the embodiments of the present application;

[0022] Figure 2 Another read request processing flowchart provided for the embodiments of the present application;

[0023] Figure 3 A write request processing flowchart provided for the embodiments of the present application;

[0024] Figure 4 A data cache method flowchart provided for the embodiments of the present application;

[0025] Figure 5 An execution diagram of a first mirror cache strategy provided for the embodiments of the present application;

[0026] Figure 6 An execution diagram of a second mirror cache strategy provided for the embodiments of the present application;

[0027] Figure 7 A mapping relationship diagram in a cache address mapping table provided by an embodiment of the present application;

[0028] Figure 8 A cache address mapping table updating diagram of a dual-controller provided by an embodiment of the present application;

[0029] Figure 9 A data cache device structure schematic diagram provided by an embodiment of the present application. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0031] It should be noted that, in the description of the present application, the terms “include”, “contain” or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. The terms “first”, “second” and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0032] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0033] In combination with the specific application environment architecture or specific hardware architecture on which the data cache method is executed, the specific application environment architecture or specific hardware architecture is described here.

[0034] The data cache method of the present application is mainly implemented by relying on a storage system of a dual-control storage array architecture, mainly including a dual-controller, a shared disk array (Redundant Arrays of Independent Disks, namely RAID) and a host.

[0035] In the dual-controller, both controllers can use high-performance multi-core processors as master control units, and are equipped with large-capacity DRAM (Dynamic Random Access Memory) caches to realize data caching. That is, by using the locality principle of data access, hot data is put into the DRAM to degrade the access latency of the data. Both controllers can provide read and write services, and the two controllers use an Active-Active (dual-active) peer-to-peer mode, without a master and a backup, and can independently receive read and write requests from the host and directly access the shared disk array. In addition, the dual controllers can be interconnected through a high-speed link (such as PCIe, Ethernet, or a dedicated high-speed link).

[0036] In the traditional storage array method, for a read request, if the data to be accessed is in the cache, the data is directly read from the cache and returned to the host, as shown in Figure 1 ; if not in the cache, the data needs to be read from the shared disk array in the back end, and then returned to the host, and the hot data is simultaneously stored in the cache, as shown in Figure 2 ; for a write request, after the data is written to the cache of a controller, the written data is sent to the other controller through the high-speed link between the two controllers, and is written to the cache of the other controller. After the data is written to the caches of the two controllers, the write completion can be returned to the host, as shown in Figure 3 .

[0037] The host side can establish a connection with the dual controllers through multi-path software, support load balancing and fault switching of I / O requests, and the host and the controller can be connected through 100G Ethernet or fiber channel, to ensure high-throughput data transmission between the host and the storage system. In addition, the host side can deploy online transaction processing, artificial intelligence training, and other business applications, and can send write requests of different granularities.

[0038] Referring to Figure 4 , the embodiment of the present application provides a data caching method applied to a first controller in a storage system, and the storage system further includes a second controller. The method specifically includes the following steps.

[0039] Step S11: obtaining a write request carrying target data sent by a target host.

[0040] In the embodiment, the storage system includes dual controllers, i.e., a first controller and a second controller, and the first controller and the second controller use an Active-Active (dual-active) peer-to-peer mode to independently receive read and write requests from the host. The embodiment describes the overall scheme from the perspective of the first controller, i.e., the first controller obtains a write request carrying target data sent by a target host.

[0041] Step S12: Respond to the write request to write the target data to the first cache, and determine whether the size of the target data is greater than a preset threshold; the first cache is the cache of the first controller.

[0042] In this embodiment, after the first controller responds to the write request of the target host, it first writes the target data into the local first cache and determines whether the data size of the target data is greater than a preset threshold, and then selects the first mirror caching strategy or the second mirror caching strategy based on the determination result.

[0043] This application does not limit the specific value of the preset threshold; it can be set according to the specific scenario. For example, for transaction-type services such as online transaction processing, services with high latency requirements generally access smaller data blocks, typically less than 64KB. For services with high write bandwidth requirements, such as high-performance computing and artificial intelligence training, latency is not a critical requirement; the corresponding bandwidth requirement is the key indicator. These applications typically write larger data blocks, generally greater than 64KB. Therefore, this application can set the preset threshold to 64K.

[0044] Step S13: If the value is not greater than the preset threshold, the first mirror caching strategy is executed to transmit the target data to the second controller through the target communication link and write it into the second cache; the second cache is the cache of the second controller.

[0045] In this embodiment, if the size of the target data is not greater than a preset threshold, it is determined that the current data is being written as a small data block, and therefore the first image caching strategy is executed. Figure 5 As shown, the traditional synchronous mirroring method is used, which writes the target data into both the local cache of the first controller and the local cache of the second controller to ensure real-time synchronization of the dual controller caches, as well as ensuring data redundancy and low latency.

[0046] It should also be noted that in the scenario of writing small data blocks, after the data is written to the caches of the two controllers, the host can be returned with confirmation that the write is complete. Then, at the appropriate time (e.g., when the cache space is insufficient, during periodic flushing, or when the system is idle), the data is flushed from the cache to the disk in batches, with extremely low latency and high performance.

[0047] Step S14: If the value is greater than the preset threshold, the target data is written to the shared disk array and the second mirror caching strategy is executed to send a notification message carrying the target data identifier to the second controller through the target communication link, so as to notify the second controller to delete the old cache data corresponding to the target data identifier in the second cache; the target data identifier is the data identifier of the target data.

[0048] In this embodiment, if the size of the target data is greater than a preset threshold, it is determined that a large data block is being written. Therefore, the target data is written to the shared disk array while simultaneously executing the second mirror caching strategy. For example... Figure 6 As shown, the first controller does not mirror data to the second controller. Instead, it sends a notification message carrying a target data identifier to the second controller via the target communication link. This notifies the second controller to delete any old cached data in the second cache that corresponds to the target data identifier. The target data identifier refers to the data identifier of the target data, specifically used to identify the write address (location) of the data. In other words, the first controller notifies the second controller that data at a certain address has been updated. Upon receiving this notification message, the second controller checks whether it has cached the data at the corresponding address. If it has, it discards the data from its cache because the data at that address has already been updated by the first controller (e.g., updating data A to B). The data in the second controller is no longer up-to-date, and the two controllers are inconsistent. Therefore, the second controller needs to discard the old data (i.e., invalidate data A). This mechanism ensures that even in large data block write mode, the entire system maintains data consistency, preventing the host from reading expired data from the second controller. Simultaneously, since the data is persisted to the shared disk, even if a single controller fails after sending the invalidation message, the data will not be lost, ensuring system reliability.

[0049] In other words, under the second mirroring caching strategy, this application only notifies the second controller to clear invalid caches, while directly writing data to the shared disk array. This significantly reduces the bandwidth consumption of the interconnection links between controllers, thereby overcoming the bandwidth bottleneck of the target communication link. Because the notification message only needs to send location information indicating the target data, which can be represented by just a few bytes, the bandwidth consumption is reduced by three orders of magnitude compared to mirrored data. This solution enables the system to simultaneously and efficiently serve two distinct business workloads: low-latency transaction processing and high-throughput sequential writes.

[0050] It should also be noted that once the second mirror caching strategy is completed and the target data has been written to the backend shared disk array, the response host will then complete the write.

[0051] Furthermore, when determining whether to implement the second mirrored caching strategy, the decision can be based not only on the data size but also on the current free space and pressure of the local cache. When the controller's own cache space is insufficient, even for medium-sized write requests, the second mirrored caching strategy may be preferred, proactively writing data to disk and notifying the peer of the invalidation to quickly release local cache space. This prevents the cache from being completely occupied by large-volume sequential writes, protects the cache hit rate of small-scale random I / O, and improves the stability of the system under extreme pressure. For example, this application can monitor the current free space of the local cache. If the free space is greater than a space threshold, the current cache space is considered sufficient, and the first or second mirrored caching strategy can be determined solely by referring to the data size. If the free space is less than a space threshold, the threshold value is further reduced based on the original preset threshold, such as from 64K to 48K. In this case, the data originally considered to be written as small data blocks (i.e., the data from 48K to 64K) also only requires the second mirrored caching strategy.

[0052] As can be seen, this application adaptively selects either a first or second mirror caching strategy by determining whether the size of the target data exceeds a preset threshold. Specifically, for small data block writes not exceeding the preset threshold, traditional synchronous mirroring is used, writing the target data to both the local cache of the first controller and the local cache of the second controller, ensuring real-time synchronization of the dual-controller caches and guaranteeing immediate data redundancy and low latency. For large data block writes exceeding the preset threshold, the data is written to the shared disk array, and the second controller is notified to delete any existing old cached data. This mechanism ensures that even in large data block write mode, the entire system maintains data consistency, preventing the host from reading expired data from the second controller. Furthermore, since the data is persisted to the shared disk, even if a single controller fails after sending an invalidation message, the data will not be lost, ensuring system reliability. In other words, under the second mirror caching strategy, this application only notifies the second controller to clear invalid caches while directly writing the data to the shared disk array, greatly reducing the bandwidth consumption of the inter-controller interconnection link, thereby overcoming the bandwidth bottleneck of the target communication link. This solution enables the system to efficiently serve two distinct business workloads simultaneously: low-latency transaction processing and high-throughput sequential writes.

[0053] Based on the foregoing embodiments, this application further discloses the process by which the controller writes data to the cache. In a specific implementation, the target data is identified as the target write address of the target data in the shared disk array. Both the first controller and the second controller maintain a cache address mapping table, which is used to record the mapping relationship between the storage address of data in the shared disk array and the cache address in the cache. Accordingly, the process by which any controller writes the target data to the cache includes: querying the cache address mapping table to see if there is a first storage address corresponding to the target write address, and obtaining a first query result; determining the target cache address in the cache based on the first query result, and writing the target data to the target cache address.

[0054] In other words, the target data identifier specifically refers to the target write address of the target data in the shared disk array. Both the first and second controllers maintain a cache address mapping table to manage the association between storage addresses in the shared disk array and cache addresses in the local cache. It can be understood that when data at a certain storage address in the shared disk array is written to the cache, a mapping relationship is established between the storage address and the cache address, and this mapping relationship is stored in the cache address mapping table. Therefore, when new target data is written to the cache, the system first checks whether the cache address mapping table records a first storage address corresponding to the target write address; that is, it checks whether historical data is already stored at the location corresponding to the target write address in the shared disk array, thus obtaining the first query result. Then, based on the first query result, the target cache address is determined in the controller's local cache, and the target data is written to that target cache address.

[0055] It should be noted that the target write address and the first storage address are actually the same. The target write address refers to the address where the target data is to be written in the shared disk array. After the target data is actually written to the target write address, the address becomes the storage address of the target data.

[0056] Specifically, determining the target cache address in the cache based on the first query result includes: if a first storage address corresponding to the target write address exists in the cache address mapping table, then the first cache address matching the first storage address is obtained from the cache address mapping table, and the first cache address is used as the target cache address; if a first storage address corresponding to the target write address does not exist in the cache address mapping table, then an idle cache address is obtained, and the idle cache address is used as the target cache address, and a mapping relationship between the first storage address and the idle cache address is established in the cache address mapping table.

[0057] In one specific implementation, if a first storage address corresponding to the target write address exists in the cache address mapping table, it indicates that historical data has already been stored at the location corresponding to the target write address in the shared disk array, and this historical data is also already in the cache, meaning that the current operation is an overwrite of existing data. Therefore, this embodiment needs to obtain a first cache address matching the first storage address from the cache address mapping table, i.e., a first cache address that has a mapping relationship with the first storage address, and then use the first cache address as the target cache address to prepare for overwrite writing.

[0058] In another specific implementation, if the cache address mapping table does not contain a first storage address corresponding to the target write address, it indicates that the location corresponding to the target write address in the shared disk array is not stored. Therefore, it is necessary to request the cache to allocate new space, i.e., obtain a free cache address, and use the free cache address as the target cache address. Furthermore, after the target data is written to the target cache address, a mapping relationship between the first storage address and the free cache address needs to be established in the cache address mapping table, that is, a mapping relationship between the target write address and the free cache address needs to be established.

[0059] Furthermore, it should be noted that the cache address mapping table is constructed based on a hash table. The cache address mapping table includes at least two hash buckets, and each hash bucket is pre-assigned a corresponding number. Accordingly, the mapping relationship between the first storage address and the free cache address is established in the cache address mapping table, including: performing a hash calculation on the first storage address to obtain the target hash key; traversing each hash bucket in the cache address mapping table to determine the target hash bucket whose hash bucket number matches the target hash key; and storing the mapping relationship between the first storage address and the free cache address in the target hash bucket. In this embodiment, in order to quickly retrieve a certain mapping information, the massive mapping information in the cache is organized in the form of a hash table. It should be noted that for the query speed of a single cache data block, the time complexity can be O(1) in the absence of hash collisions, and the hash table is simple to implement and easy to maintain later. Furthermore, the hash bucket is the basic storage unit in the hash table. The cache address mapping table of this application includes at least two hash buckets, and each hash bucket is pre-assigned a corresponding number (i.e., bucket 0 - bucket n), such as Figure 7 As shown in the diagram. The hash bucket is primarily used to store cached mapping information that yields the same hash key after being calculated using a hash function. If a hash collision occurs, the conflicting mapping information will be linked together in the same hash bucket, thus ensuring retrieval efficiency.

[0060] Therefore, when establishing the mapping relationship between the first storage address and the free cache address in the cache address mapping table, this application can first use a hash function to perform hash calculation on the first storage address to obtain the target hash key, and then traverse each hash bucket in the cache address mapping table to determine the target hash bucket whose hash bucket number matches the target hash key, and then store the mapping relationship between the first storage address and the free cache address in the target hash bucket.

[0061] It should also be noted that the shared disk array is pre-divided into a predetermined number of logical volumes, and each logical volume is pre-divided into at least two data blocks. Each logical volume corresponds to a different number, each data block is the same size, and each data block is pre-numbered in ascending order of address. Correspondingly, the storage address in the shared disk array recorded in the cache address mapping table is the logical volume location determined based on the logical volume number and the data block number.

[0062] It's understandable that when a host application accesses a storage array, it does so through LUNs (Logical Unit Numbers, or logical volumes in storage) mapped to the host. That is, the storage system partitions physical disks (or disk arrays) into logical volumes as needed. A logical volume can correspond to a single physical disk, or it can be a virtual storage space created by a RAID group composed of multiple physical disks. These are storage units that the host can directly see and access. Disk arrays do not allow the host to directly access the underlying physical storage media (such as a single hard drive or SSD). Instead, they allocate the partitioned logical storage resources (i.e., logical volumes) to specific hosts or host groups through LUN mapping. Therefore, as... Figure 7 As shown, this embodiment divides the shared disk array into multiple logical volumes, each with a different number, such as LUN0, LUN1, etc. Furthermore, the address space of each LUN is also divided into multiple data blocks (tracks), for example, using a 32K granularity. Each 32K data block is called a data block, and these data blocks are numbered sequentially from smallest to largest address (0, 1, 2, ...). Figure 7 As shown in the diagram, the data address can be accurately identified by LUN ID + Track ID. If the cache contains information about a certain data block, a mapping relationship of (LUN ID + Track ID → cache address) will be generated.

[0063] It should also be pointed out that, such as Figure 8As shown, in a dual-controller storage array, each controller internally stores the aforementioned hash table to store mapping information for cached data on its local node. If a data block X is written from the first controller, the first controller, while writing to its own cache, simultaneously mirrors data block X to the second controller. The second controller then writes the data to its own cache. Both controllers will store the same data mapping information in their local hash tables.

[0064] Furthermore, the process of querying the cache address mapping table to determine if a first storage address corresponding to the target write address exists includes: parsing the target write address to obtain the target logical volume number and logical block start address; determining the target data block number based on the logical block start address and the data block size; determining the target logical volume location based on the target logical volume number and the target data block number; and querying the cache address mapping table to determine if the target logical volume location exists. In other words, when a host accesses data on a logical volume, it sends the logical volume number to be accessed and the block start address (LBA) of the logical volume to be accessed to the storage system via the storage protocol. Upon receiving the request, the storage system parses the logical volume number and logical block start address to be accessed, and then queries the cache to determine if the data to be accessed exists. Specifically, this application determines the target data block number based on the logical block start address and the data block size, for example, by dividing the LBA by 32KB to calculate the target data block number (i.e., Track ID). In this way, the target logical volume location can be determined based on the target logical volume number and the target data block number, and the cache address mapping table can be consulted to determine if the target logical volume location exists.

[0065] In a specific implementation, a notification message carrying a target data identifier is sent to the second controller via the target communication link to notify the second controller to delete the old cached data corresponding to the target data identifier in the second cache. This includes: sending a notification message carrying a target write address to the second controller via the target communication link, so that the second controller can parse the target write address from the notification message and query its local cache address mapping table to see if there is a second storage address corresponding to the target write address; if there is a second storage address corresponding to the target write address in the second controller's cache address mapping table, the second controller obtains the second cache address matching the second storage address from its local cache address mapping table to delete the old cached data stored in the second cache address, and deletes the mapping relationship between the second storage address and the second cache address in its local cache address mapping table; if there is no second storage address corresponding to the target write address in the second controller's cache address mapping table, no processing is performed.

[0066] In other words, when the second controller receives a notification message carrying the target write address, it first parses the target write address from the notification message, and then checks its local cache address mapping table to see if a second storage address corresponding to the target write address exists. If it exists, it indicates that the second controller has cached data at the corresponding address. Therefore, the second controller needs to retrieve the second cache address matching the second storage address from its local cache address mapping table to delete the old cached data stored at the second cache address, and delete the mapping relationship between the second storage address and the second cache address from its local cache address mapping table. If the second controller's cache address mapping table does not contain a second storage address corresponding to the target write address, no processing is required.

[0067] Furthermore, this application also discloses a process for processing read requests. The above method further includes: parsing the read request sent by the target host to obtain the target read address; querying the cache address mapping table to find whether there is a third storage address corresponding to the target read address, and obtaining a second query result; reading data based on the second query result, and returning the read data to the target host.

[0068] In other words, when a read request is received, the target read address is first parsed, and then the cache address mapping table is checked to see if a third storage address corresponding to the target read address exists, thus obtaining the second query result. It should be noted that the values ​​of the target read address and the third storage address are actually the same. The target read address refers to the address of the data to be read in the shared disk array. If the data has already been written to the shared disk array, then the target read address is the storage location of the data in that disk array. Then, this application reads the data based on the second query result and returns the read data to the target host.

[0069] Specifically, reading data based on the second query result includes: if a third storage address corresponding to the target read address exists in the cache address mapping table, then the third cache address matching the third storage address is obtained from the cache address mapping table, and data is read from the third cache address; if no third storage address corresponding to the target read address exists in the cache address mapping table, then data is read from the shared disk array. That is, if a third storage address corresponding to the target read address exists in the cache address mapping table, it means that the data to be read has already been written to the cache, therefore the third cache address matching the third storage address is obtained from the cache address mapping table, and then data is read directly from the third cache address; conversely, if no third storage address corresponding to the target read address exists in the cache address mapping table, it means that the data has not been written to the cache, therefore data still needs to be read from the shared disk array.

[0070] As can be seen from the above scheme, this application supports a cache mapping data organization method for high-speed lookup. The space on the logical volume is divided into data blocks according to a certain size granularity. The cached data is organized into a hash table according to the data block granularity, which facilitates fast lookup. Both dual-controller storage arrays maintain a local cache address mapping table to store mapping information.

[0071] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0072] See Figure 9 As shown, an embodiment of this application provides a data caching device, applied to a first controller in a storage system, the storage system further including a second controller, the device comprising:

[0073] The request acquisition module 11 is used to acquire write requests carrying target data sent by the target host;

[0074] The judgment module 12 is used to respond to write requests, write the target data into the first cache, and determine whether the size of the target data is greater than a preset threshold; the first cache is the cache of the first controller;

[0075] The first strategy execution module 13 is used to execute the first mirror caching strategy if the target data is not greater than a preset threshold, so as to transmit the target data to the second controller through the target communication link and write it into the second cache; the second cache is the cache of the second controller.

[0076] The second strategy execution module 14 is used to write the target data to the shared disk array if the target data exceeds a preset threshold, and execute the second mirror caching strategy to send a notification message carrying the target data identifier to the second controller through the target communication link, so as to notify the second controller to delete the old cached data corresponding to the target data identifier in the second cache; the target data identifier is the data identifier of the target data.

[0077] As can be seen, this application adaptively selects either a first or second mirror caching strategy by determining whether the size of the target data exceeds a preset threshold. Specifically, for small data block writes not exceeding the preset threshold, traditional synchronous mirroring is used, writing the target data to both the local cache of the first controller and the local cache of the second controller, ensuring real-time synchronization of the dual-controller caches and guaranteeing immediate data redundancy and low latency. For large data block writes exceeding the preset threshold, the data is written to the shared disk array, and the second controller is notified to delete any existing old cached data. This mechanism ensures that even in large data block write mode, the entire system maintains data consistency, preventing the host from reading expired data from the second controller. Furthermore, since the data is persisted to the shared disk, even if a single controller fails after sending an invalidation message, the data will not be lost, ensuring system reliability. In other words, under the second mirror caching strategy, this application only notifies the second controller to clear invalid caches while directly writing the data to the shared disk array, greatly reducing the bandwidth consumption of the inter-controller interconnection link, thereby overcoming the bandwidth bottleneck of the target communication link. This solution enables the system to efficiently serve two distinct business workloads simultaneously: low-latency transaction processing and high-throughput sequential writes.

[0078] For a description of the features in the embodiment corresponding to the data caching device, please refer to the relevant description in the embodiment corresponding to the data caching method, which will not be repeated here.

[0079] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above-described data caching method embodiments.

[0080] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described data caching method embodiments at runtime.

[0081] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0082] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described data caching method embodiments.

[0083] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described data caching method embodiments.

[0084] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0085] The data caching method and device provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A data caching method, characterized in that, A first controller applied in a storage system, the storage system further including a second controller, the method comprising: Obtain the write request sent by the target host that carries the target data; In response to the write request, the target data is written to the first cache, and it is determined whether the size of the target data is greater than a preset threshold; the first cache is the cache of the first controller; If the value is not greater than the preset threshold, the first mirror caching strategy is executed to transmit the target data to the second controller via the target communication link and write it into the second cache; the second cache is the cache of the second controller. If the value exceeds the preset threshold, the target data is written to the shared disk array, and the second mirror caching strategy is executed to send a notification message carrying the target data identifier to the second controller through the target communication link, so as to notify the second controller to delete the old cached data corresponding to the target data identifier in the second cache; the target data identifier is the data identifier of the target data.

2. The data caching method according to claim 1, characterized in that, The target data identifier is the target write address of the target data in the shared disk array. Both the first controller and the second controller maintain a cache address mapping table. The cache address mapping table is used to record the mapping relationship between the storage address of the data in the shared disk array and the cache address in the cache. Accordingly, the process of any controller writing the target data into the cache includes: Query the cache address mapping table to see if there is a first storage address corresponding to the target write address, and obtain the first query result; Based on the first query result, the target cache address is determined in the cache, and the target data is written to the target cache address.

3. The data caching method according to claim 2, characterized in that, Determining the target cache address in the cache based on the first query result includes: If a first storage address corresponding to the target write address exists in the cache address mapping table, then the first cache address matching the first storage address is obtained from the cache address mapping table, and the first cache address is used as the target cache address; If there is no first storage address corresponding to the target write address in the cache address mapping table, then an idle cache address is obtained, and the idle cache address is used as the target cache address. A mapping relationship between the first storage address and the idle cache address is established in the cache address mapping table.

4. The data caching method according to claim 3, characterized in that, The cache address mapping table is constructed based on a hash table, and the cache address mapping table includes at least two hash buckets, each hash bucket being pre-assigned a corresponding number. Accordingly, establishing the mapping relationship between the first storage address and the free cache address in the cache address mapping table includes: Perform a hash calculation on the first storage address to obtain the target hash key; Traverse each hash bucket in the cache address mapping table to determine the target hash bucket whose hash bucket number matches the target hash key; The mapping relationship between the first storage address and the free cache address is stored in the target hash bucket.

5. The data caching method according to claim 2, characterized in that, The step of sending a notification message carrying a target data identifier to the second controller via the target communication link to notify the second controller to delete the old cached data corresponding to the target data identifier in the second cache includes: The target communication link sends a notification message carrying the target write address to the second controller, so that the second controller can parse the target write address from the notification message and query the local cache address mapping table to see if there is a second storage address corresponding to the target write address. If the cache address mapping table of the second controller contains a second storage address corresponding to the target write address, then the second controller obtains the second cache address matching the second storage address from the local cache address mapping table to delete the old cache data stored in the second cache address, and deletes the mapping relationship between the second storage address and the second cache address in the local cache address mapping table. If the second controller's cache address mapping table does not contain a second storage address corresponding to the target write address, no action is taken.

6. The data caching method according to claim 2, characterized in that, The shared disk array is pre-divided into a predetermined number of logical volumes, and each logical volume is pre-divided into at least two data blocks; wherein, each logical volume corresponds to a different number, each data block is the same size, and each data block is pre-numbered in ascending order of address. Accordingly, the storage address in the shared disk array recorded in the cache address mapping table is the logical volume location determined based on the logical volume number and the data block number.

7. The data caching method according to claim 6, characterized in that, The process of querying the cache address mapping table to determine if there exists a first storage address corresponding to the target write address includes: Parse the target write address to obtain the target logical volume number and logical block start address; The target data block number is determined based on the logical block start address and the data block size; The location of the target logical volume is determined based on the target logical volume number and the target data block number, and the location of the target logical volume is checked in the cache address mapping table.

8. The data caching method according to claim 2, characterized in that, Also includes: The read request sent by the target host is parsed to obtain the target read address; Query the cache address mapping table to see if there is a third storage address corresponding to the target read address, and obtain the second query result; Data is read based on the second query result and returned to the target host.

9. The data caching method according to claim 8, characterized in that, The step of reading data based on the second query result includes: If a third storage address corresponding to the target read address exists in the cache address mapping table, then a third cache address matching the third storage address is obtained from the cache address mapping table, and data is read from the third cache address; If there is no third storage address corresponding to the target read address in the cache address mapping table, then data is read from the shared disk array.

10. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the data caching method as described in any one of claims 1 to 9 when executing the computer program.

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