Display panel and display device

Abstract

The invention provides a display panel and a display device. According to the display panel, the first parts and the second parts of at least part of first scanning signal lines are in one-to-one correspondence connection through the third parts, so that each first scanning signal line is independently wound from the left side of a hole digging area to the right side of the hole digging area; the impedance of the first scanning signal lines wound from the hole digging area is similar to or even consistent with that of the first scanning signal lines in other areas, and / or the fourth parts and the fifth parts of at least part of the third scanning signal lines are connected in a one-to-one correspondence manner through the sixth parts; the second scanning signal lines are independently wound from the left side of the hole digging area to the right side of the hole digging area, so that the impedance of the second scanning signal lines wound from the hole digging area is close to or even consistent with that of the second scanning signal lines in other areas, the load of the hole digging area is close to or even consistent with that of the other areas, and the display effect is improved.

Description

[0001] This divisional application is a divisional application of Chinese patent application No. 202310439309.X, filed on April 21, 2023, entitled "Display Panel and Display Device". Technical Field

[0002] This application relates to the field of display technology, and in particular to a display panel and display device. Background Technology

[0003] With the development of display devices, the requirements for power consumption and screen-to-body ratio are becoming increasingly stringent. To reduce power consumption and increase screen-to-body ratio, existing display devices employ LTPO (Low Temperature Polysilicon Oxide) technology and O-cut technology. To address the frequency-switching flicker issue in 7T2C LTPO circuits, existing display devices often use 8T2C circuits. Simultaneously, to reduce the bezel of the O-cut area, existing display devices combine adjacent rows of signal lines into a single trace to bypass the O-cut area, thus achieving electrical connection between the signal lines on both sides of the O-cut area and reducing the bezel. However, in actual verification, it was found that the load on the signal lines in the O-cut area is inconsistent with the load on the signal lines in other areas, resulting in uneven display during operation. Specifically, this manifests as a split screen between the O-cut area and other areas, leading to display defects.

[0004] Therefore, existing display devices have a technical problem where the load on the signal lines in the O-cut area is inconsistent with the load on the signal lines in other areas, resulting in uneven display. Summary of the Invention

[0005] This application provides a display panel and a display device to alleviate the technical problem of uneven display caused by the inconsistent load of signal lines in the O-cut area and signal lines in other areas of existing display devices.

[0006] This application embodiment provides a display panel, the display panel including: A display area and a punch-hole area are provided, the display area surrounding the punch-hole area. The display panel includes an array of multiple light-emitting devices and a pixel driving circuit for driving the light-emitting devices. The pixel driving circuit includes: Drive transistors; A switching transistor is connected to the driving transistor at the first node; A compensation transistor is connected to the first scan signal line, and the compensation transistor, the driving transistor, and the light-emitting device are connected to the second node; A first initialization transistor is connected to a second scan signal line, and the first initialization transistor, the driving transistor, and the compensation transistor are connected to a third node; Wherein, at least a portion of the first scanning signal line includes a first portion located on the left side of the cutout area, a second portion located on the right side of the cutout area, and a third portion corresponding to the first portion and the second portion, the extension of the first portion passing through the cutout area; and / or at least a portion of the second scanning signal line includes a fourth portion located on the left side of the cutout area, a fifth portion located on the right side of the cutout area, and a sixth portion corresponding to the fourth portion and the fifth portion, the extension of the fourth portion passing through the cutout area.

[0007] In some embodiments, the display panel includes: Substrate; The first active layer is disposed on one side of the substrate; A first metal layer is disposed on the side of the first active layer away from the substrate; The second metal layer is disposed on the side of the first metal layer away from the first active layer; The second active layer is disposed on the side of the second metal layer away from the first metal layer; A third metal layer is disposed on the side of the second active layer away from the second metal layer; The third part is disposed in at least one of the first metal layer, the second metal layer and the third metal layer, and the sixth part is disposed in at least one of the first metal layer, the second metal layer and the third metal layer.

[0008] In some embodiments, the first portion includes a first sub-part and a second sub-part located in different metal layers, and the second portion includes a third sub-part and a fourth sub-part disposed in the same layer as the first sub-part and the second sub-part, respectively, and the first sub-part and the second sub-part are connected to the third sub-part and the fourth sub-part through the third portion.

[0009] In some embodiments, the third portion is disposed on the same layer as one of the first sub-part and the second sub-part. At the junction of the cutout area and the display area, the first sub-part is connected to the second sub-part, and the third sub-part is connected to the fourth sub-part. The first sub-part is connected to the third sub-part through the third portion.

[0010] In some embodiments, the third portion is disposed on the first metal layer, or the third portion is disposed on the second metal layer, or the third portion is disposed on the third metal layer.

[0011] In some embodiments, the third part includes a fifth sub-part and a sixth sub-part disposed on the same layer as the first sub-part and the second sub-part, respectively, wherein the first sub-part is connected to the third sub-part through the fifth sub-part, and the second sub-part is connected to the fourth sub-part through the sixth sub-part.

[0012] In some embodiments, the fifth sub-part is disposed on the first metal layer and the sixth sub-part is disposed on the second metal layer; or the fifth sub-part is disposed on the first metal layer and the sixth sub-part is disposed on the third metal layer; or the fifth sub-part is disposed on the second metal layer and the sixth sub-part is disposed on the third metal layer.

[0013] In some embodiments, the projection of the fifth sub-part onto the substrate overlaps with the projection of the sixth sub-part onto the substrate.

[0014] In some embodiments, the fourth portion includes a seventh sub-part and an eighth sub-part located in different metal layers, and the fifth portion includes a ninth sub-part and a tenth sub-part disposed in the same layer as the seventh sub-part and the eighth sub-part, respectively, and the seventh sub-part and the eighth sub-part are connected to the ninth sub-part and the tenth sub-part through the sixth portion.

[0015] In some embodiments, the sixth portion is disposed on the same layer as one of the seventh and eighth sub-parts. At the junction of the cutout area and the display area, the seventh sub-part is connected to the eighth sub-part, and the ninth sub-part is connected to the tenth sub-part. The seventh sub-part is connected to the ninth sub-part through the sixth portion.

[0016] In some embodiments, the sixth portion is disposed on the first metal layer, or the sixth portion is disposed on the second metal layer, or the sixth portion is disposed on the third metal layer.

[0017] In some embodiments, the sixth part includes an eleventh sub-part and a twelfth sub-part disposed on the same layer as the seventh sub-part and the eighth sub-part, respectively. The seventh sub-part is connected to the ninth sub-part through the eleventh sub-part, and the eighth sub-part is connected to the tenth sub-part through the twelfth sub-part.

[0018] In some embodiments, the eleventh sub-part is disposed on the first metal layer and the twelfth sub-part is disposed on the second metal layer; or the eleventh sub-part is disposed on the first metal layer and the twelfth sub-part is disposed on the third metal layer; or the eleventh sub-part is disposed on the second metal layer and the twelfth sub-part is disposed on the third metal layer.

[0019] In some embodiments, the projection of the eleventh sub-part onto the substrate overlaps with the projection of the twelfth sub-part onto the substrate.

[0020] In some embodiments, the display panel further includes a gate driving unit, which includes a first gate driving unit and a second gate driving unit. Two adjacent rows of the first scan signal lines are connected to the same first gate driving unit, and two adjacent rows of the second scan signal lines are connected to the same second gate driving unit.

[0021] Meanwhile, this application provides a display device, which includes a display panel as described in any of the above embodiments.

[0022] Beneficial Effects: This application provides a display panel and a display device; the display panel includes a display area and a punch-hole area, the display area surrounding the punch-hole area, the display panel including an array of multiple light-emitting devices and a pixel driving circuit for driving the light-emitting devices, the pixel driving circuit including a driving transistor, a switching transistor, a compensation transistor and a first initialization transistor, the gate of the driving transistor being connected to a first node, the first electrode of the driving transistor being electrically connected to a second node, the driving transistor being used to drive the light-emitting devices to emit light under the control of the potentials of the first node and the second node, the gate of the switching transistor being connected to a first scan signal line, the switching transistor being used to input a data signal to the second node under the control of the first scan signal, the gate of the compensation transistor being connected to the first scan signal line, the first electrode and the second electrode of the compensation transistor being... The first and third nodes are connected to the driving transistor. The switching transistor is used to compensate the threshold voltage of the driving transistor under the control of the second scan signal. The gate of the first initialization transistor is connected to the second scan signal line. The first initialization transistor is used to input the first initialization signal to the first node under the control of the third scan signal. At least a portion of the first scan signal line includes a first part located on the left side of the hole area, a second part located on the right side of the hole area, and a third part that corresponds to the first part and the second part. The extension line of the first part passes through the hole area. And / or at least a portion of the second scan signal line includes a fourth part located on the left side of the hole area, a fifth part located on the right side of the hole area, and a sixth part that corresponds to the fourth part and the fifth part. The extension line of the fourth part passes through the hole area. This application improves the display effect by connecting at least a portion of the first scan signal lines to the second portion through a third portion, so that each first scan signal line independently winds from the left side of the punch-hole area to the right side of the punch-hole area, making the impedance of the first scan signal lines winding from the punch-hole area similar to or even the same as that of the first scan signal lines in other areas; and / or by connecting at least a portion of the third scan signal lines to the fourth and fifth portions through a sixth portion, so that each second scan signal line independently winds from the left side of the punch-hole area to the right side of the punch-hole area, making the impedance of the second scan signal lines winding from the punch-hole area similar to or even the same as that of the second scan signal lines in other areas. Attached Figure Description

[0023] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0024] Figure 1 A circuit diagram of a display panel provided in an embodiment of this application.

[0025] Figure 2 This is a first schematic diagram of a display panel provided in an embodiment of this application.

[0026] Figure 3 This is a second schematic diagram of a display panel provided in an embodiment of this application.

[0027] Figure 4 This is a third schematic diagram of a display panel provided in an embodiment of this application.

[0028] Figure 5 This is a first schematic diagram of a first scan signal line provided in an embodiment of this application.

[0029] Figure 6 for Figure 5 An exploded view of the first scan signal line in the image.

[0030] Figure 7 This is a first schematic diagram of the second scan signal line provided in an embodiment of this application.

[0031] Figure 8 This is a second schematic diagram of the first scan signal line provided in an embodiment of this application.

[0032] Figure 9 This is a second schematic diagram of the second scan signal line provided in an embodiment of this application.

[0033] Figure 10 This is a schematic diagram of the first type of existing display device.

[0034] Figure 11 This is a product diagram of existing display devices.

[0035] Figure 12 This is a second schematic diagram of an existing display device.

[0036] Figure 13 This is a brightness curve of each row of pixels in an existing display device.

[0037] Figure 14 This is a fourth schematic diagram of a display panel provided in an embodiment of this application.

[0038] Figure 15 This is a timing diagram of the pixel driving circuit provided in an embodiment of this application. Detailed Implementation

[0039] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0040] This application addresses the technical problem of uneven display caused by inconsistent loads on signal lines in the O-cut area compared to signal lines in other areas of existing display devices.

[0041] Figure 1 A circuit diagram of a display panel provided in an embodiment of this application. Figure 2 This is a first schematic diagram of a display panel provided in an embodiment of this application. Figure 3 This is a second schematic diagram of a display panel provided in an embodiment of this application. Figure 4 This is a third schematic diagram of a display panel provided in an embodiment of this application. Figure 5 This is a first schematic diagram of a first scan signal line provided in an embodiment of this application. Figure 6 for Figure 5 An exploded view of the first scan signal line in the image. Figure 6 (a) in the diagram is an exploded view of the portion of the first scan signal line located in the first metal layer. Figure 6 (b) is an exploded view of the portion of the first scan signal line located in the second metal layer. Figure 7 This is a first schematic diagram of the second scan signal line provided in an embodiment of this application. Figure 8 This is a second schematic diagram of the first scan signal line provided in an embodiment of this application. Figure 9 This is a second schematic diagram of the second scan signal line provided in an embodiment of this application. Figure 10 This is a schematic diagram of the first type of existing display device. Figure 11 This is a product diagram of existing display devices. Figure 12 This is a second schematic diagram of an existing display device. Figure 13 This is a brightness curve of each row of pixels in an existing display device. Figure 14 This is a fourth schematic diagram of a display panel provided in an embodiment of this application. Figure 15 This is a timing diagram of the pixel driving circuit provided in an embodiment of this application.

[0042] like Figures 1 to 4 As shown, this application embodiment provides a display panel 1, which includes a display area 11 and a punch-hole area 12. The display area 11 is disposed around the punch-hole area 12. The display panel 1 includes a plurality of light-emitting devices (LEDs) arranged in an array and a pixel driving circuit for driving the light-emitting devices (LEDs). The pixel driving circuit includes: Drive transistor T1; Switching transistor T2 is connected to the driving transistor T1 at the first node A; The compensation transistor T3 is connected to the first scan signal line Nscan1, and the compensation transistor T3, the driving transistor T1, and the light-emitting device LED are connected to the second node B; The first initialization transistor T4 is connected to the second scan signal line Nscan2. The first initialization transistor T4, the driving transistor T1 and the compensation transistor T3 are connected to the third node Q. Wherein, at least a portion of the first scanning signal line 31 includes a first portion 311 located on the left side of the cutout area 12, a second portion 312 located on the right side of the cutout area 12, and a third portion 313 corresponding to the first portion 311 and the second portion 312, the extension of the first portion 31 passing through the cutout area 12; and / or at least a portion of the second scanning signal line 32 includes a fourth portion 321 located on the left side of the cutout area 12, a fifth portion 322 located on the right side of the cutout area 12, and a sixth portion 323 corresponding to the fourth portion 321 and the fifth portion 322, the extension of the fourth portion 321 passing through the cutout area 12.

[0043] This application provides a display panel that, by connecting at least a portion of the first scan signal lines to the second portion via a third portion, allows each first scan signal line to independently wind from the left side of the punch-hole area to the right side of the punch-hole area, making the impedance of the first scan signal lines winding from the punch-hole area similar to or even the same as that of the first scan signal lines in other areas. And / or by connecting at least a portion of the third scan signal lines to the fourth and fifth portions via a sixth portion, allows each second scan signal line to independently wind from the left side of the punch-hole area to the right side of the punch-hole area, making the impedance of the second scan signal lines winding from the punch-hole area similar to or even the same as that of the second scan signal lines in other areas. Thus, the load on the punch-hole area is similar to or even the same as that on other areas, improving the display effect.

[0044] It should be noted that this application describes each structure using both circuit diagrams and film layer diagrams. Therefore, different labels will be used to represent the same structure. For example, the first scan signal line is labeled Nscan1 in the circuit diagram and 31 in the film layer diagram. It can be understood that both labels represent the first scan signal line. Similarly, for other structures existing in the circuit and film layer structures, the description of the first scan signal line can be referred to. These will not be repeated in the following embodiments.

[0045] It should be noted that since no traces are set in the punch-hole area 12, and some pixels are located on the left and right sides of the punch-hole area, in order to achieve normal pixel display, the traces of the pixel rows corresponding to the punch-hole area will be connected by winding from the top or bottom of the punch-hole area. Specifically, the extension line of the first part 311 of the first scan signal line 31 corresponding to the aforementioned pixel will pass through the punch-hole area 12. This application connects the first part 311 and the second part 312 of the aforementioned pixel one-to-one through the third part 313, so that the impedance of the traces of the pixel rows corresponding to the punch-hole area is close to or even the same as that of the traces of the pixel rows corresponding to other areas, thereby improving the display uniformity of the display panel. Similarly, the design of the second scan signal line 32 can refer to the description of the first scan signal line 31 above.

[0046] Specifically, such as Figure 10 As shown, it can be seen that the O-cut area of ​​the current display device exhibits a split-screen phenomenon when displaying other areas. In the current display device, such as... Figure 11 , Figure 12 As shown, rows 49 to 114 correspond to the pixel rows of the O-cut area. Current display devices, in order to reduce the bezel of the O-cut area, connect the traces of adjacent rows of pixels within the corresponding O-cut area and then use a single trace for routing. However, during product verification, as... Figure 13 As shown, Figure 13 The horizontal axis represents the row number, and the vertical axis represents the normalized brightness. This curve represents the brightness variation curve for odd-numbered rows at 600 nits G64 (64th gray level). Figure 13 As can be seen, the brightness difference between the fixed lines from row 49 to row 113 and the other pixel lines is relatively large, resulting in uneven display.

[0047] Specifically, for the pixel row corresponding to the punch-hole area, compared to the current display device which connects the left side of the first scan signal lines of two adjacent rows and then connects them to the right side of the first scan signal lines of two adjacent rows through the same trace, this embodiment connects the first part 311 and the second part 312 of each row of first scan signal lines one-to-one through the third part 313, so that the impedance of each row of first scan signal lines 31 in the display panel is close or even consistent, thereby improving the display uniformity of the display panel.

[0048] Specifically, for the pixel row corresponding to the punch-hole area, compared to the current display device which connects the left side of the second scan signal lines of two adjacent rows and then connects them to the right side of the second scan signal lines of two adjacent rows through the same trace, this embodiment connects the fourth part 321 and the fifth part 322 of each row of second scan signal lines one-to-one through the sixth part 323, so that the impedance of each row of second scan signal lines 32 in the display panel is close or even consistent, thereby improving the display uniformity of the display panel.

[0049] In one embodiment, the first scan signal line includes a first portion located on the left side of the punch-hole area, a second portion located on the right side of the punch-hole area, and a third portion that corresponds to and connects the first portion and the second portion. When the extension line of the first portion passes through the punch-hole area, it can connect the left portions of two adjacent rows of second scan signal lines in the punch-hole area through the same trace to the right portions of the adjacent second scan signal lines in the punch-hole area. This makes the impedance of each row of first scan signal lines in the display panel close or even consistent, thereby improving the display uniformity of the display panel. At the same time, the two adjacent rows of second scan signal lines are routed around the punch-hole area through the same trace, reducing the bezel of the punch-hole area and increasing the screen ratio of the display panel.

[0050] In one embodiment, the second scan signal line includes a fourth portion located on the left side of the punch-hole area, a fifth portion located on the right side of the punch-hole area, and a sixth portion that corresponds to and connects the fourth and fifth portions. When the extension line of the fourth portion passes through the punch-hole area, it can connect the left portions of two adjacent rows of first scan signal lines in the punch-hole area through the same trace to the right portions of the adjacent first scan signal lines in the punch-hole area. This makes the impedance of each row of second scan signal lines in the display panel close or even consistent, thereby improving the display uniformity of the display panel. At the same time, the two adjacent rows of first scan signal lines are routed around the punch-hole area through the same trace, reducing the bezel of the punch-hole area and increasing the screen ratio of the display panel.

[0051] In one embodiment, such as Figures 3 to 5 As shown, the display panel 1 includes: Substrate 21; The first active layer 241 is disposed on one side of the substrate 21; The first metal layer 243 is disposed on the side of the first active layer 241 away from the substrate 21; The second metal layer 245 is disposed on the side of the first metal layer 243 away from the first active layer 241; The second active layer 247 is disposed on the side of the second metal layer 245 away from the first metal layer 243; The third metal layer 249 is disposed on the side of the second active layer 247 away from the second metal layer 245; The third portion 313 is disposed in at least one of the first metal layer 243, the second metal layer 245, and the third metal layer 249, and the sixth portion 323 is disposed in at least one of the first metal layer 243, the second metal layer 245, and the third metal layer 249. This application improves the uniformity of the display panel by disposing the third portion in at least one of the first, second, and third metal layers, allowing the third portion to connect one-to-one with the first and second portions, making the impedances of each first scan signal line close to or even consistent. Similarly, by disposing the sixth portion in at least one of the first, second, and third metal layers, the sixth portion can connect one-to-one with the fourth and fifth portions, making the impedances of each second scan signal line close to or even consistent, further improving the uniformity of the display panel.

[0052] In one embodiment, such as Figure 5 , Figure 6 As shown, the first portion 311 includes a first sub-part 311a and a second sub-part 311b located on different metal layers. The second portion 312 includes a third sub-part 312a and a fourth sub-part 312b respectively disposed on the same layer as the first sub-part 311a and the second sub-part 311b. The first sub-part 311a and the second sub-part 311b are connected to the third sub-part 312a and the fourth sub-part 312b through the third portion 313. By making the first portion include the first and second sub-parts located on different metal layers, and the second portion include the third and fourth sub-parts respectively disposed on the same layer as the first and second sub-parts, the first scan signal line can control the two gates of the compensation transistor, improving the control capability of the compensation transistor. Furthermore, the third portion connects the first, second, third, and fourth sub-parts, enabling the first scan signal line to control the compensation transistor in a row of pixels.

[0053] Specifically, such as Figure 3 , Figure 5 , Figure 6 As shown, taking the first sub-part 311a disposed on the first metal layer 243 and the second sub-part 311b disposed on the second metal layer 245 as an example, the first sub-part 311a can be connected to the bottom gate of the compensation transistor, and the second sub-part 311b can be connected to the top gate of the compensation transistor, thereby controlling the compensation transistor.

[0054] Specifically, the first sub-part 311a, the second sub-part 311b, the third sub-part 312a, and the fourth sub-part 312b are connected through the third part, so that the potentials of each part in the first scan signal line are consistent.

[0055] This addresses the technical problem in existing display devices where the impedance of signal lines in the O-cut region differs from that of signal lines in other regions, leading to uneven display performance. In one embodiment, such as... Figures 4 to 6 As shown, the third part 313 is disposed on the same layer as one of the first sub-parts 311a and the second sub-part 311b. At the junction of the punch-hole area 12 and the display area 11, the first sub-part 311a is connected to the second sub-part 311b, and the third sub-part 312a is connected to the fourth sub-part 312b. The first sub-part 311a is connected to the third sub-part 312a through the third part 313. By connecting the first sub-part to the second sub-part, the third sub-part to the fourth sub-part, and the first sub-part to the third sub-part, the various parts of the first scan signal line can be connected together when the first scan signal line winds around the punch-hole area, making the potential of each part consistent. Since the third part is disposed on the same layer as one of the first and second sub-parts, the third part only occupies one layer of metal, which can reduce the bezel of the punch-hole area and increase the screen ratio of the display panel.

[0056] Specifically, when connecting sub-sections on different layers, they can be connected via connecting lines from other layers, such as... Figure 5 As shown, reference numeral 51 indicates the connection point of different metal layers. For example, if the first sub-part 311a is disposed on the first metal layer, the second sub-part 311b is disposed on the second metal layer, and the third part 313 is disposed on the first metal layer, then the third part 313 can be directly connected to the first sub-part 311a. At the same time, a first connecting part 314 is provided, which passes through a via to connect to the third part 313, and the first connecting part 314 also passes through a via to connect to the second sub-part 311b. However, the embodiments of this application are not limited to this; for example, the connecting parts can pass through vias to connect the first sub-part, the second sub-part, and the third part respectively. For example, without the connecting portion, the first sub-part 311a is disposed on the first metal layer, the second sub-part 311b is disposed on the second metal layer, and the third part 313 is disposed on the second metal layer. Then, the second sub-part 311b can be connected to the first sub-part 311a through a via, the fourth sub-part 312b can be connected to the third sub-part 312a through a via, and the third part 313 can be connected to both the first and third sub-parts 311a through a via. Alternatively, without the connecting portion, the third part can be directly connected to the second and fourth sub-parts, the second sub-part can be directly connected to the first sub-part through a via, and the fourth sub-part can be directly connected to the third sub-part through a via. This reduces the number of vias, improves the manufacturing efficiency of the display panel, and reduces the impedance of the first scan signal line. For the connection methods of other sub-parts or other parts, refer to the above-described connection methods of the first and second sub-parts, and the third part and the first sub-part, which will not be repeated in the following embodiments.

[0057] Specifically, the first connection portion can be located in the first source-drain layer.

[0058] Specifically, in order to distinguish the third part from other sub-parts, Figure 5 The example given is that the line width of the third part is smaller than that of the other sub-parts. However, the embodiments of this application are not limited to this. For example, the line width of the third part may be greater than or equal to the line width of the other sub-parts.

[0059] In one embodiment, the third portion is disposed on the first metal layer, or the third portion is disposed on the second metal layer, or the third portion is disposed on the third metal layer.

[0060] Specifically, when the third part is disposed on the first metal layer, one of the first sub-part and the second sub-part can be disposed on the first metal layer, or the first sub-part and the second sub-part can be disposed on the second metal layer and the third metal layer respectively. Similarly, when the third part is disposed on the second metal layer or the third metal layer, one of the first sub-part and the second sub-part can be disposed on the same layer as the third part, or the first sub-part and the second sub-part can be disposed on different layers from the third part.

[0061] Specifically, for the compensation transistor, the bottom gate and top gate are respectively disposed on the second metal layer and the third metal layer. The first sub-part and the second sub-part can be disposed on the second metal layer and the third metal layer respectively, so that the first sub-part is directly connected to the bottom gate and the second sub-part is directly connected to the top gate.

[0062] Specifically, when the third part is set on the same layer as one of the first and second sub-parts, for example, when the third part is set on the same layer as the second sub-part, the second sub-part, the third part, and the fourth sub-part can be formed simultaneously without etching the metal traces to form the second, third, and fourth sub-parts separately, thus improving the manufacturing efficiency of the display panel.

[0063] Specifically, to make it easier to distinguish the different parts, Figure 5 , Figure 7 , Figure 8 , Figure 9 The connection or boundary between each part or sub-part is shown, but it is understood that when each part or sub-part is set on the same layer, there may be no connection or boundary between the parts or sub-parts. For example, if the first sub-part 311a and the third part 313 are set on the same layer, then the first sub-part 311a and the third part 313 are two parts of the same metal trace, and there is no need to use a connection or boundary. Similarly, there may be no connection or boundary between other parts and other sub-parts.

[0064] This addresses the issue of impedance inconsistencies between the first and second sub-sections connected to the same trace and the signal lines in other areas. In one embodiment, such as... Figure 8As shown, the third part 313 includes a fifth sub-part 313a and a sixth sub-part 313b disposed on the same layer as the first sub-part 311a and the second sub-part 311b, respectively. The first sub-part 311a is connected to the third sub-part 312a through the fifth sub-part 313a, and the second sub-part 311b is connected to the fourth sub-part 312b through the sixth sub-part 313b. By including the fifth and sixth sub-parts in the third part, and connecting the first sub-part to the third sub-part through the fifth sub-part, and the second sub-part to the fourth sub-part through the sixth sub-part, each layer of the first scan signal line is wound separately from the punch-hole area. This ensures that the first scan signal line in the corresponding punch-hole area is connected to the first scan signal lines in other areas in a one-to-one correspondence manner, making the impedance of the first scan signal line in the corresponding punch-hole area close to or even the same as that in other areas, thereby improving the yield of the display panel.

[0065] In one embodiment, the fifth sub-part is disposed on the first metal layer and the sixth sub-part is disposed on the second metal layer; or the fifth sub-part is disposed on the first metal layer and the sixth sub-part is disposed on the third metal layer; or the fifth sub-part is disposed on the second metal layer and the sixth sub-part is disposed on the third metal layer.

[0066] Specifically, when setting the fifth and sixth sub-parts, the fifth sub-part can be set in one of the first, second, and third metal layers, and the sixth sub-part can be set in another of the first, second, and third metal layers. Correspondingly, the first and second sub-parts can be set in the same layer as the fifth and sixth sub-parts, respectively, reducing the process steps of the display panel and improving the manufacturing efficiency of the display panel.

[0067] In one embodiment, the projection of the fifth sub-part onto the substrate does not overlap with the projection of the sixth sub-part onto the substrate.

[0068] In one embodiment, the projection of the first sub-part onto the substrate does not overlap with the projection of the second sub-part onto the substrate.

[0069] In one embodiment, the projection of the third sub-part onto the substrate does not overlap with the projection of the fourth sub-part onto the substrate.

[0070] To address the issue that a non-overlapping fifth and sixth sub-parts would result in a large bezel on the display panel, one embodiment incorporates an overlap between the projections of the fifth and sixth sub-parts onto the substrate. This overlap reduces the space occupied by the fifth and sixth sub-parts, avoids increasing the bezel size of the punch-hole area, and improves the display effect.

[0071] Specifically, the projection of the fifth sub-part onto the substrate coincides with the projection of the sixth sub-part onto the substrate.

[0072] Specifically, the projections of the first sub-part on the substrate overlap with the projections of the second sub-part on the substrate, and the projections of the third sub-part on the substrate overlap with the projections of the fourth sub-part on the substrate. This results in a smaller space occupied by each first scan signal line, thereby improving the resolution of the display panel and increasing the screen-to-body ratio of the display panel.

[0073] In one embodiment, such as Figure 9 As shown, the fourth part 321 includes a seventh sub-part 321a and an eighth sub-part 321b located on different metal layers, and the fifth part 322 includes a ninth sub-part 322a and a tenth sub-part 322b respectively disposed on the same layer as the seventh sub-part 321a and the eighth sub-part 321b. The seventh sub-part 321a and the eighth sub-part 321b are connected to the ninth sub-part 322a and the tenth sub-part 322b through the sixth part 323. By making the fourth part include the seventh and eighth sub-parts located on different metal layers, and the fifth part include the ninth and tenth sub-parts respectively disposed on the same layer as the seventh and eighth sub-parts, the second scan signal line can control the two gates of the first initialization transistor, thereby improving the control capability of the first initialization transistor. Furthermore, the sixth part connects the seventh, eighth, ninth, and tenth sub-parts, allowing the second scan signal line to control the first initialization transistor in a row of pixels.

[0074] Specifically, such as Figure 3 , Figure 7 As shown, taking the seventh sub-part 321a disposed on the first metal layer 243 and the eighth sub-part 321b disposed on the second metal layer 245 as an example, the seventh sub-part 321a can be connected to the bottom gate of the first initialization transistor, and the eighth sub-part 321b can be connected to the top gate of the first initialization transistor, thereby controlling the first initialization transistor.

[0075] Specifically, the seventh sub-section 321a, the eighth sub-section 321b, the ninth sub-section 322a, and the tenth sub-section 322b are connected through the sixth part, so that the potentials of each part in the second scan signal line are consistent.

[0076] This addresses the technical problem in existing display devices where the impedance of signal lines in the O-cut region differs from that of signal lines in other regions, leading to uneven display performance. In one embodiment, such as... Figure 4 , Figure 7As shown, the sixth part 323 is disposed on the same layer as one of the seventh sub-parts 321a and the eighth sub-part 321b. At the junction of the punch-hole area 12 and the display area 11, the seventh sub-part 321a is connected to the eighth sub-part 321b, and the ninth sub-part 322a is connected to the tenth sub-part 322b. The seventh sub-part 321a is connected to the ninth sub-part 322a through the sixth part 323. By connecting the seventh sub-part to the eighth sub-part, the ninth sub-part to the tenth sub-part, and the seventh sub-part to the ninth sub-part through the sixth part, the various parts of the second scanning signal line can be connected together when the second scanning signal line winds around the punch-hole area, making the potential of each part consistent. Since the sixth part is disposed on the same layer as one of the seventh and eighth sub-parts, the sixth part only occupies one layer of metal, which can reduce the bezel of the punch-hole area and increase the screen ratio of the display panel.

[0077] Specifically, when connecting sub-sections on different layers, they can be connected via connecting lines from other layers, such as... Figure 7 As shown, for example, if the seventh sub-part 321a is disposed on the first metal layer, the eighth sub-part 321b is disposed on the second metal layer, and the sixth part 323 is disposed on the first metal layer, then the sixth part 323 can be directly connected to the seventh sub-part 321a. Simultaneously, a second connecting part 324 is provided, which passes through a via to connect to the sixth part 323 and also passes through a via to connect to the eighth sub-part 321b. However, the embodiments of this application are not limited to this. For example, the connecting parts can pass through vias to connect the seventh sub-part, the eighth sub-part, and the sixth part respectively; or, for example, without providing connecting parts, if the seventh sub-part 321a is disposed on the first metal layer, the eighth sub-part 321b is disposed on the second metal layer, and the sixth part 323 is disposed on the second metal layer, then the eighth sub-part 321b can pass through a via to connect to the seventh sub-part 321a, the tenth sub-part 322b can pass through a via to connect to the ninth sub-part 322a, and the sixth part 323 can pass through a via to connect to both the seventh sub-part 321a and the ninth sub-part 322a. For example, without a connection section, the sixth part can be directly connected to the seventh and eighth sub-parts, the eighth sub-part can be directly connected to the seventh sub-part through a via, and the tenth sub-part can be directly connected to the ninth sub-part through a via. This reduces the number of vias, improves the manufacturing efficiency of the display panel, and reduces the impedance of the first scan signal line.

[0078] Specifically, the second connection portion can be located in the first source-drain layer.

[0079] Specifically, in order to distinguish Part VI from other sub-parts, Figure 7 The example given is that the line width of the sixth part is smaller than that of the other sub-parts. However, the embodiments of this application are not limited to this. For example, the line width of the sixth part may be greater than or equal to the line width of the other sub-parts.

[0080] In one embodiment, the sixth portion is disposed on the first metal layer, or the sixth portion is disposed on the second metal layer, or the sixth portion is disposed on the third metal layer.

[0081] Specifically, when the sixth part is set on the first metal layer, one of the seventh and eighth sub-parts can be set on the first metal layer, or the seventh and eighth sub-parts can be set on the second and third metal layers respectively. Similarly, when the sixth part is set on the second or third metal layer, one of the seventh and eighth sub-parts can be set on the same layer as the sixth part, or the seventh and eighth sub-parts can be set on a different layer from the sixth part.

[0082] Specifically, the bottom gate and top gate of the first initialization transistor are respectively disposed on the second metal layer and the third metal layer, and the seventh sub-part and the eighth sub-part can be respectively disposed on the second metal layer and the third metal layer, so that the seventh sub-part is directly connected to the bottom gate and the eighth sub-part is connected to the top gate.

[0083] Specifically, when the sixth part and one of the seventh and eighth sub-parts are set on the same layer, for example, when the sixth part and the seventh sub-part are set on the same layer, the seventh sub-part, the sixth part and the ninth sub-part can be formed at the same time, without the need to etch the metal traces to form the seventh sub-part, the sixth part and the ninth sub-part separately, thus improving the manufacturing efficiency of the display panel.

[0084] The issue of impedance inconsistency between the seventh and eighth sub-sections connected to the same trace and the signal lines in other areas is addressed. In one embodiment, such as... Figure 9 As shown, the sixth part 323 includes an eleventh sub-part 323a and a twelfth sub-part 323b respectively disposed on the same layer as the seventh sub-part 321a and the eighth sub-part 321b. The seventh sub-part 321a is connected to the ninth sub-part 322a through the eleventh sub-part 323a, and the eighth sub-part 321b is connected to the tenth sub-part 322b through the twelfth sub-part 323b. By including the eleventh and twelfth sub-parts in the sixth part, and connecting the seventh sub-part to the ninth sub-part through the eleventh sub-part, and the eighth sub-part to the tenth sub-part through the twelfth sub-part, each layer of the second scan signal line can be wound independently from the punch-hole area. This allows the second scan signal line in the corresponding punch-hole area to be connected to the second scan signal lines in other areas in a one-to-one correspondence manner, resulting in an impedance progression or even consistency between the second scan signal lines in the corresponding punch-hole area and the second scan signal lines in other areas, thereby improving the yield of the display panel.

[0085] In one embodiment, the eleventh sub-part is disposed on the first metal layer and the twelfth sub-part is disposed on the second metal layer; or the eleventh sub-part is disposed on the first metal layer and the twelfth sub-part is disposed on the third metal layer; or the eleventh sub-part is disposed on the second metal layer and the twelfth sub-part is disposed on the third metal layer.

[0086] Specifically, when setting the eleventh and twelfth sub-parts, the eleventh sub-part can be set in a different layer among the first, second, and third metal layers, and the twelfth sub-part can be set in another layer among the first, second, and third metal layers. Correspondingly, the seventh and eighth sub-parts can be set in the same layer as the eleventh and twelfth sub-parts, respectively, reducing the process steps of the display panel and improving the manufacturing efficiency of the display panel.

[0087] In one embodiment, the projection of the eleventh sub-part onto the substrate does not overlap with the projection of the twelfth sub-part onto the substrate.

[0088] In one embodiment, the projection of the seventh sub-part onto the substrate does not overlap with the projection of the eighth sub-part onto the substrate.

[0089] In one embodiment, the projection of the ninth sub-part onto the substrate does not overlap with the projection of the tenth sub-part onto the substrate.

[0090] To address the issue that a non-overlapping arrangement of the eleventh and twelfth sub-parts would result in a large bezel on the display panel, one embodiment proposes an overlap between the projections of the eleventh and twelfth sub-parts onto the substrate. By ensuring this overlap, the space occupied by the eleventh and twelfth sub-parts is reduced, avoiding an increase in the bezel area of ​​the punch-hole area and improving the display effect.

[0091] Specifically, the projection of the eleventh sub-part onto the substrate coincides with the projection of the twelfth sub-part onto the substrate.

[0092] Specifically, the projections of the seventh sub-part on the substrate overlap with the projections of the eighth sub-part on the substrate, and the projections of the ninth sub-part on the substrate overlap with the projections of the tenth sub-part on the substrate. This results in a smaller space occupied by the second scan signal line, improving the resolution of the display panel and increasing the screen-to-body ratio of the display panel.

[0093] Connecting each scan signal line individually to the gate drive unit results in a large bezel on the display panel. In one embodiment, such as... Figure 4As shown, the display panel further includes a gate driving unit 41, which includes a first gate driving unit 411 and a second gate driving unit 412. Two adjacent rows of first scan signal lines 31 are connected to the same first gate driving unit 411, and two adjacent rows of second scan signal lines 32 are connected to the same second gate driving unit 412. By connecting two adjacent rows of first scan signal lines to the same first gate driving unit and two adjacent rows of second scan signal lines to the same second gate driving unit, the space occupied by the gate driving unit can be reduced, thus reducing the bezel of the display panel.

[0094] Specifically, taking an OLED display panel as an example, with a display image of 600 nits and the 64th gray level, and taking three different pixels connected by the first scan signal line corresponding to the punch-hole area as an example, the current of the current display device and the current of the display panel in this embodiment are compared. The three pixels can be selected to have distances of 0, 1 / 2 the width of the display area, and the width of the display area from the first gate driving unit, respectively.

[0095] Specifically, taking the current display device as the first solution, in this embodiment, except that the third part is disposed on the same layer as one of the first sub-part and the second sub-part, the first sub-part is connected to the second sub-part at the junction of the punched area and the display area, the third sub-part is connected to the fourth sub-part, and the first sub-part is connected to the third sub-part through the third part, the other design is the same as the current display device design, which is the second solution. In this embodiment, except that the third part includes a fifth sub-part and a sixth sub-part disposed on the same layer as the first sub-part and the second sub-part, the first sub-part is connected to the third sub-part through the fifth sub-part, the second sub-part is connected to the fourth sub-part through the sixth sub-part, the other design is the same as the current display device design, which is the third solution.

[0096] Specifically, simulations show that in the first scheme, the luminous currents of the first pixel to the third pixel in the direction from away from the first gate driving unit to near the first gate driving unit are 950.5 pA, 939.5 pA, and 895.4 pA, respectively. For the second scheme, the luminous currents of the first pixel to the third pixel in the direction from away from the first gate driving unit to near the first gate driving unit are 976 pA, 981 pA, and 902 pA, respectively. For the third scheme, the luminous currents of the first pixel to the third pixel in the direction from away from the first gate driving unit to near the first gate driving unit are 975.4 pA, 986.7 pA, and 900.9 pA, respectively. The luminous currents of the pixels in other areas are similar to or even the same as those in the third scheme. It can be seen that in the current display device, the luminous current of the pixel corresponding to the O-cut area is inconsistent with the luminous current of the pixel in other areas, resulting in uneven display. However, this application can make the luminous current of the pixel corresponding to the punch-hole area similar to or even the same as that of the pixel in other areas, thus improving the display effect.

[0097] In one embodiment, such as Figure 1 As shown, the first initialization transistor T4 is connected to the first initialization signal line Vi1.

[0098] In one embodiment, such as Figure 1 As shown, the gate of the switching transistor T2 is connected to the third scan signal line Pscan1, and the first electrode of the switching transistor T2 is connected to the data signal line Data.

[0099] In one embodiment, such as Figure 1 As shown, the pixel driving circuit further includes a second initialization transistor T7. The first electrode of the second initialization transistor T7 is connected to the second initialization signal line Vi2, the second electrode of the second initialization transistor T7 is connected to the light-emitting device LED at the fourth node C, and the gate of the second initialization transistor T7 is connected to the fourth scan signal line Pscan2. The first light-emitting control transistor T5 is connected to the driving transistor T1 through the first node A, and the first light-emitting control transistor T5 is connected to the light-emitting control signal line EM. The second light-emitting control transistor T6 is connected to the driving transistor T1 through the second node B; The third initialization transistor T8 is connected to the third initialization signal line Vi3.

[0100] In one embodiment, such as Figure 1 As shown, the light-emitting device LED is connected to the low-potential signal line VSS.

[0101] In one embodiment, such as Figure 1As shown, the pixel driving circuit also includes a storage capacitor Cst and a boost capacitor Cboost. One end of the storage capacitor Cst is connected to the high-potential power supply signal line VDD, and the other end of the storage capacitor Cst is connected to the third node Q. One end of the boost capacitor Cboost is connected to the gate of the switching transistor T2, and the other end of the boost capacitor Cboost is connected to the third node Q.

[0102] Specifically, such as Figure 14 As shown, the gate driving unit 41 also includes a third gate driving unit 413, a fourth gate driving unit 414 and a fifth gate driving unit 415. Two adjacent rows of light emission control signal lines 33 are connected to the same third gate driving unit 413, one row of third scan signal lines 34 are connected to two fourth gate driving units, and two adjacent rows of fourth scan signal lines 35 are connected to the same fifth gate driving unit.

[0103] Specifically, such as Figure 14 , Figure 15 As shown, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are controlled by the light-emitting control signal line EM, the compensation transistor T3 is controlled by the first scan signal line Nscan1, the first initialization transistor T4 is controlled by the second scan signal line Nscan2, the switching transistor T2 is controlled by the third scan signal line Pscan1, and the second initialization transistor T7 and the third initialization transistor T8 are controlled by the fourth scan signal line Pscan2, so as to realize the normal operation of the display panel.

[0104] In one embodiment, such as Figure 3 As shown, the display panel also includes a light-shielding layer 22, a buffer layer 23, a first gate insulating layer 242, a second gate insulating layer 244, a third gate insulating layer 246, a fourth gate insulating layer 248, a first interlayer insulating layer 251, a first source-drain layer 252, a second interlayer insulating layer 253, a second source-drain layer 254, a third interlayer insulating layer 255, a third source-drain layer 256, a planarization layer 257, a pixel electrode layer 261, a pixel definition layer 262, a light-emitting material layer 263, a common electrode layer 264, and an encapsulation layer 27.

[0105] Specifically, the above embodiments describe the design of the first and second scan signal lines respectively. It is understood that when there is no conflict between the embodiments, the embodiments can be combined to achieve better results. For example, the third part includes a fifth sub-part and a sixth sub-part respectively arranged on the same layer as the first sub-part and the second sub-part. The first sub-part is connected to the third sub-part through the fifth sub-part, and the second sub-part is connected to the fourth sub-part through the sixth sub-part. After the left part of two adjacent rows of second scan signal lines in the hole area is connected, they are connected to the right part of the adjacent second scan signal lines in the hole area through the same trace. For example, the third part includes a fifth sub-part and a sixth sub-part respectively arranged on the same layer as the first and second sub-parts. The first sub-part is connected to the third sub-part through the fifth sub-part, and the second sub-part is connected to the fourth sub-part through the sixth sub-part. The sixth part includes an eleventh sub-part and a twelfth sub-part respectively arranged on the same layer as the seventh and eighth sub-parts. The seventh sub-part is connected to the ninth sub-part through the eleventh sub-part, and the eighth sub-part is connected to the tenth sub-part through the twelfth sub-part.

[0106] Meanwhile, this application provides a display device, which includes a display panel as described in any of the above embodiments.

[0107] As can be seen from the above embodiments: This application provides a display panel and a display device. The display panel includes a display area and a punch-hole area, with the display area surrounding the punch-hole area. The display panel includes an array of multiple light-emitting devices and a pixel driving circuit for driving the light-emitting devices. The pixel driving circuit includes a driving transistor, a switching transistor, a compensation transistor, and a first initialization transistor. The gate of the driving transistor is connected to a first node, and the first electrode of the driving transistor is electrically connected to a second node. The driving transistor is used to drive the light-emitting devices to emit light under the control of the potentials of the first and second nodes. The gate of the switching transistor is connected to a first scan signal line, and the switching transistor is used to input a data signal to the second node under the control of the first scan signal. The gate of the compensation transistor is connected to the first scan signal line, and the first and second electrodes of the compensation transistor are respectively... The first and third nodes are connected to the driving transistor. The switching transistor is used to compensate the threshold voltage of the driving transistor under the control of the second scan signal. The gate of the first initialization transistor is connected to the second scan signal line. The first initialization transistor is used to input the first initialization signal to the first node under the control of the third scan signal. At least a portion of the first scan signal line includes a first part located on the left side of the cutout area, a second part located on the right side of the cutout area, and a third part that corresponds to the first part and the second part. The extension line of the first part passes through the cutout area. And / or at least a portion of the second scan signal line includes a fourth part located on the left side of the cutout area, a fifth part located on the right side of the cutout area, and a sixth part that corresponds to the fourth part and the fifth part. The extension line of the fourth part passes through the cutout area. This application improves the display effect by connecting at least a portion of the first scan signal lines to the second portion through a third portion, so that each first scan signal line independently winds from the left side of the punch-hole area to the right side of the punch-hole area, making the impedance of the first scan signal lines winding from the punch-hole area similar to or even the same as that of the first scan signal lines in other areas; and / or by connecting at least a portion of the third scan signal lines to the fourth and fifth portions through a sixth portion, so that each second scan signal line independently winds from the left side of the punch-hole area to the right side of the punch-hole area, making the impedance of the second scan signal lines winding from the punch-hole area similar to or even the same as that of the second scan signal lines in other areas.

[0108] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0109] The above provides a detailed description of a display panel and display device provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display panel, characterized in that, The display panel includes a display area and a punch-hole area, the display area surrounding the punch-hole area, the display panel including an array of multiple light-emitting devices and a pixel driving circuit for driving the light-emitting devices, the pixel driving circuit being connected to a scan signal line; the display panel includes at least two metal layers; Wherein, at least a portion of the scanning signal line includes a left portion located on the left side of the cutout area, a right portion located on the right side of the cutout area, and a middle portion that connects the left portion and the right portion in a one-to-one correspondence; The left portion includes two left sub-parts located in different metal layers, and the two left sub-parts are connected near the hole area. The right portion includes two right sub-parts respectively disposed in the same layer as the two left sub-parts, and the two right sub-parts are connected near the hole area. The middle portion is disposed within a metal layer.

2. The display panel as described in claim 1, characterized in that, The pixel driving circuit includes a driving transistor, a switching transistor, a compensation transistor, and a first initialization transistor. The switching transistor and the driving transistor are connected to a first node. The compensation transistor is connected to a first scan signal line. The compensation transistor, the driving transistor, and the light-emitting device are connected to a second node. The first initialization transistor is connected to the second scan signal line, and the first initialization transistor, the driving transistor, and the compensation transistor are connected to the third node; Wherein, at least a portion of the first scanning signal line includes a first part located on the left side of the cutout area, a second part located on the right side of the cutout area, and a third part that connects the first part and the second part in a one-to-one correspondence, and the extension line of the first part passes through the cutout area. And / or, at least a portion of the second scan signal line includes a fourth portion located to the left of the cutout area, a fifth portion located to the right of the cutout area, and a sixth portion that corresponds to and connects the fourth portion and the fifth portion, wherein the extension of the fourth portion passes through the cutout area.

3. The display panel as described in claim 2, characterized in that, The display panel includes: Substrate; The first active layer is disposed on one side of the substrate; A first metal layer is disposed on the side of the first active layer away from the substrate; The second metal layer is disposed on the side of the first metal layer away from the first active layer; The second active layer is disposed on the side of the second metal layer away from the first metal layer; A third metal layer is disposed on the side of the second active layer away from the second metal layer; The third part is disposed in one of the first metal layer, the second metal layer and the third metal layer, and / or the sixth part is disposed in one of the first metal layer, the second metal layer and the third metal layer.

4. The display panel as described in claim 3, characterized in that, The first part includes a first sub-part and a second sub-part located on different metal layers. The second part includes a third sub-part and a fourth sub-part respectively disposed on the same layer as the first sub-part and the second sub-part. At the junction of the punched area and the display area, the first sub-part is connected to the second sub-part, and the third sub-part is connected to the fourth sub-part. The first sub-part is connected to the third sub-part through the third part.

5. The display panel as described in claim 4, characterized in that, The third part is disposed on the same layer as one of the first sub-part and the second sub-part.

6. The display panel as described in claim 5, characterized in that, The third part is disposed on the first metal layer, or the third part is disposed on the second metal layer, or the third part is disposed on the third metal layer.

7. The display panel as described in claim 3, characterized in that, The fourth part includes a seventh sub-part and an eighth sub-part located on different metal layers. The fifth part includes a ninth sub-part and a tenth sub-part respectively disposed on the same layer as the seventh sub-part and the eighth sub-part. At the junction of the punched area and the display area, the seventh sub-part is connected to the eighth sub-part, and the ninth sub-part is connected to the tenth sub-part. The seventh sub-part is connected to the ninth sub-part through the sixth part.

8. The display panel as described in claim 7, characterized in that, The sixth part is located on the same layer as one of the seventh and eighth sub-parts.

9. The display panel as described in claim 8, characterized in that, The sixth part may be disposed on the first metal layer, or the sixth part may be disposed on the second metal layer, or the sixth part may be disposed on the third metal layer.

10. The display panel as described in any one of claims 2 to 9, characterized in that, The display panel further includes a gate driving unit, which includes a first gate driving unit and a second gate driving unit. Two adjacent rows of the first scan signal lines are connected to the same first gate driving unit, and two adjacent rows of the second scan signal lines are connected to the same second gate driving unit.

11. A display panel, characterized in that, The display panel includes a display area and a punch-hole area, the display area surrounding the punch-hole area, the display panel including an array of multiple light-emitting devices and a pixel driving circuit for driving the light-emitting devices, the pixel driving circuit being connected to a scan signal line; the display panel includes at least two metal layers; Wherein, at least a portion of the scanning signal line includes a left portion located on the left side of the cutout area, a right portion located on the right side of the cutout area, and a middle portion that connects the left portion and the right portion in a one-to-one correspondence; The left portion includes two left sub-parts located in different metal layers, the right portion includes two right sub-parts located in the same layer as the two left sub-parts, and the middle portion includes two middle sub-parts located in the same layer as the two left sub-parts. The left sub-parts, middle sub-parts and right sub-parts located in the same metal layer are connected one-to-one.

12. The display panel as claimed in claim 11, characterized in that, The pixel driving circuit includes a driving transistor, a switching transistor, a compensation transistor, and a first initialization transistor. The switching transistor and the driving transistor are connected to a first node. The compensation transistor is connected to a first scan signal line. The compensation transistor, the driving transistor, and the light-emitting device are connected to a second node. The first initialization transistor is connected to the second scan signal line, and the first initialization transistor, the driving transistor, and the compensation transistor are connected to the third node; Wherein, at least a portion of the first scanning signal line includes a first part located on the left side of the cutout area, a second part located on the right side of the cutout area, and a third part that connects the first part and the second part in a one-to-one correspondence, and the extension line of the first part passes through the cutout area. And / or, at least a portion of the second scan signal line includes a fourth portion located to the left of the cutout area, a fifth portion located to the right of the cutout area, and a sixth portion that corresponds to and connects the fourth portion and the fifth portion, wherein the extension of the fourth portion passes through the cutout area.

13. The display panel as claimed in claim 12, characterized in that, The display panel includes: Substrate; The first active layer is disposed on one side of the substrate; A first metal layer is disposed on the side of the first active layer away from the substrate; The second metal layer is disposed on the side of the first metal layer away from the first active layer; The second active layer is disposed on the side of the second metal layer away from the first metal layer; A third metal layer is disposed on the side of the second active layer away from the second metal layer; The third part is disposed in two of the first metal layer, the second metal layer and the third metal layer, and / or the sixth part is disposed in two of the first metal layer, the second metal layer and the third metal layer.

14. The display panel as claimed in claim 13, characterized in that, The first part includes a first sub-part and a second sub-part located in different metal layers. The second part includes a third sub-part and a fourth sub-part disposed in the same layer as the first sub-part and the second sub-part, respectively. The third part includes a fifth sub-part and a sixth sub-part disposed in the same layer as the first sub-part and the second sub-part, respectively. The first sub-part is connected to the third sub-part through the fifth sub-part, and the second sub-part is connected to the fourth sub-part through the sixth sub-part.

15. The display panel as claimed in claim 14, characterized in that, The fifth sub-part is disposed on the first metal layer, and the sixth sub-part is disposed on the second metal layer; or the fifth sub-part is disposed on the first metal layer, and the sixth sub-part is disposed on the third metal layer; or the fifth sub-part is disposed on the second metal layer, and the sixth sub-part is disposed on the third metal layer.

16. The display panel as claimed in claim 15, characterized in that, The projection of the fifth sub-part onto the substrate overlaps with the projection of the sixth sub-part onto the substrate.

17. The display panel as claimed in claim 13, characterized in that, The fourth part includes a seventh sub-part and an eighth sub-part located on different metal layers. The fifth part includes a ninth sub-part and a tenth sub-part disposed on the same layer as the seventh sub-part and the eighth sub-part, respectively. The sixth part includes an eleventh sub-part and a twelfth sub-part disposed on the same layer as the seventh sub-part and the eighth sub-part, respectively. The seventh sub-part is connected to the ninth sub-part through the eleventh sub-part, and the eighth sub-part is connected to the tenth sub-part through the twelfth sub-part.

18. The display panel as claimed in claim 17, characterized in that, The eleventh sub-part is disposed on the first metal layer, and the twelfth sub-part is disposed on the second metal layer; or the eleventh sub-part is disposed on the first metal layer, and the twelfth sub-part is disposed on the third metal layer; or the eleventh sub-part is disposed on the second metal layer, and the twelfth sub-part is disposed on the third metal layer.

19. The display panel as claimed in claim 18, characterized in that, The projection of the eleventh sub-part onto the substrate overlaps with the projection of the twelfth sub-part onto the substrate.

20. The display panel as described in any one of claims 12 to 19, characterized in that, The display panel further includes a gate driving unit, which includes a first gate driving unit and a second gate driving unit. Two adjacent rows of the first scan signal lines are connected to the same first gate driving unit, and two adjacent rows of the second scan signal lines are connected to the same second gate driving unit.

21. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 20.

Images