Communication method, communication device, computer readable storage medium, chip and computer program product

Abstract

The invention provides a communication method, a communication device, a computer readable storage medium, a chip and a computer program product. The communication method comprises the following steps: determining a log-likelihood ratio (LLR) vector associated with a receiving vector; at least part of elements in the LLR vector are sorted after absolute values are obtained; the elements in the system bit vector are divided into a plurality of groups according to the ascending order of the sorting result, the system bit vector comprises the first element to the kth element in the receiving vector, and k is an integer larger than or equal to 1; determining the flipping order of the bits in each of the plurality of groups to be non-incremental; flipping the bits in each group based on the flipping order to obtain a plurality of flipped system bit vectors; determining a plurality of coding vectors based on the plurality of flipped system bit vectors and the coding matrix; and selecting a first coding vector with the minimum Euclidean distance with the LLR vector from the plurality of coding vectors as a decoding result of the receiving vector. The method provided by the invention can be regarded as a decoding method combining the advantages of the OSD and the GRAND, is an efficient GRAND for narrowing the flipping range through LLR sorting, and can also be regarded as a Gaussian elimination-free OSD.

Description

Technical Field

[0001] This application relates to the field of communications, and more specifically, to communication methods, communication devices, computer-readable storage media, chips, and computer program products. Background Technology

[0002] In communication systems, to enhance the ability of data to withstand various interferences during transmission and improve system reliability, transmitting equipment needs to perform channel coding on the digital signals to be transmitted. Receiving equipment needs to decode and recover the channel-coded and transmitted signals to restore the original digital information.

[0003] Random Additive Noise Decoding (GRAND) and Ordered Statistics Decoding (OSD) are two commonly used decoding methods. The advantage of GRAND decoding is that it only requires a parity check matrix. For extremely high code rates or very short code lengths, GRAND can quickly obtain the decoding result. However, as the code rate decreases or the code length increases, the average and maximum complexity of GRAND decoding increases by the order of combinatorial numbers. Therefore, GRAND decoding has limited application scope and is not suitable for current mainstream communication systems.

[0004] The biggest drawback of OSD decoding is that it requires Gaussian elimination to transform the column-permuted G' matrix into a new generating matrix through row permutation. Gaussian elimination is complex, and if linearly dependent rows appear in the selected K columns, the matrix may not reach its full rank. In this case, a generating matrix G' cannot be generated, and one of the K columns needs to be replaced with a new column to perform Gaussian elimination again. Therefore, a decoding method with lower complexity is needed. Summary of the Invention

[0005] This application provides a scheme for communication.

[0006] In a first aspect of this application, a communication method is provided. The method includes: determining a log-likelihood ratio (LLR) vector associated with a received vector; sorting at least a portion of the elements in the LLR vector by taking their absolute values; dividing the elements in a system bit vector into multiple groups in ascending order of the sorting result, wherein the system bit vector includes the first to k elements of the received vector, where k is an integer greater than or equal to 1; determining the flip order of the bits in each group as non-increasing; flipping the bits in each group based on the flip order to obtain multiple flipped system bit vectors; determining multiple coded vectors based on the multiple flipped system bit vectors and a coding matrix; and selecting the first coded vector with the smallest Euclidean distance to the LLR vector from the multiple coded vectors as the decoding result of the received vector.

[0007] The method in this application can be seen as a decoding method that combines the advantages of OSD and GRAND. It is an efficient GRAND that narrows the flip range through LLR sorting, and it can also be seen as an OSD that avoids Gaussian elimination.

[0008] In one possible implementation, sorting at least some of the elements in the LLR vector after taking their absolute values ​​includes: sorting the elements in the LLR vector that correspond to the system bit vector after taking their absolute values.

[0009] In one possible implementation, sorting by taking the absolute values ​​of at least some elements in the LLR vector includes: sorting by taking the absolute values ​​of all elements in the LLR vector.

[0010] In one possible implementation, dividing the elements in the system bit vector into multiple groups in ascending order of the sorting result includes: determining the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; determining m1 elements from the nk elements, where the m1 elements correspond to the m1 elements in the system bit vector, and m1 is an integer greater than or equal to 1; dividing the m1 elements in the system bit vector into the initial group of multiple groups; and dividing the other k-m1 elements in the system bit vector into subsequent groups of the initial group.

[0011] In one possible implementation, dividing the elements in the system bit vector into multiple groups in ascending order of the sorting result includes: determining the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; determining x elements from the nk elements, which correspond to x elements in the system bit vector, where x is an integer greater than or equal to 1; dividing the x elements in the system bit vector into y groups; and dividing the remaining kx elements in the system bit vector into subsequent my groups of the y groups.

[0012] In one possible implementation, the method further includes: determining the Hamming distance between a second coding vector and an LLR vector among a plurality of coding vectors, wherein the second coding vector is the same as or different from the first coding vector; and stopping the decoding of the received vector if the Hamming distance is less than or equal to half of the minimum code distance of the codeword space formed by or corresponding to the coding matrix.

[0013] In a second aspect of this application, a communication device is provided. The communication device includes a processing unit.

[0014] The processing unit is configured to: determine a log-likelihood ratio (LLR) vector associated with the received vector; sort at least a portion of the elements in the LLR vector after taking their absolute values; divide the elements in the system bit vector into multiple groups in ascending order of the sorting result, wherein the system bit vector includes the first to k elements in the received vector, where k is an integer greater than or equal to 1; determine the non-increasing order of the bit flips in each of the multiple groups; flip the bits in each group based on the flip order to obtain multiple flipped system bit vectors; determine multiple coded vectors based on the multiple flipped system bit vectors and the coding matrix; and select the first coded vector with the smallest Euclidean distance to the LLR vector from the multiple coded vectors as the decoding result of the received vector.

[0015] In one possible implementation, sorting at least some of the elements in the LLR vector after taking their absolute values ​​includes: sorting the elements in the LLR vector that correspond to the system bit vector after taking their absolute values.

[0016] In one possible implementation, sorting by taking the absolute values ​​of at least some elements in the LLR vector includes: sorting by taking the absolute values ​​of all elements in the LLR vector.

[0017] In one possible implementation, dividing the elements in the system bit vector into multiple groups in ascending order of the sorting result includes: determining the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; determining m1 elements from the nk elements, where the m1 elements correspond to the m1 elements in the system bit vector, and m1 is an integer greater than or equal to 1; dividing the m1 elements in the system bit vector into the initial group of multiple groups; and dividing the other k-m1 elements in the system bit vector into subsequent groups of the initial group.

[0018] In one possible implementation, dividing the elements in the system bit vector into multiple groups in ascending order of the sorting result includes: determining the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; determining x elements from the nk elements, which correspond to x elements in the system bit vector, where x is an integer greater than or equal to 1; dividing the x elements in the system bit vector into y groups; and dividing the remaining kx elements in the system bit vector into subsequent my groups of the y groups.

[0019] In one possible implementation, the processing unit is further configured to: determine the Hamming distance between a second coding vector and an LLR vector among a plurality of coding vectors, wherein the second coding vector is the same as or different from the first coding vector; and stop decoding the received vector if the Hamming distance is less than or equal to half of the minimum code distance of the codeword space formed by or corresponding to the coding matrix.

[0020] In a third aspect of this application, a computer-readable storage medium is provided. The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method described in the first aspect above.

[0021] In a fourth aspect of this application, a computer program product is provided. This computer program product is tangibly stored on a computer-readable medium and includes computer-executable instructions that, when executed, cause a device to perform the method according to the first aspect described above.

[0022] In a fifth aspect of this application, a chip is provided. The chip is configured to perform the method described in the first aspect above. Attached Figure Description

[0023] The features, advantages, and other aspects of various implementations of this application will become more apparent from the accompanying drawings and the following detailed description. Several implementations of this application are illustrated herein by way of example and not limitation, in the accompanying drawings:

[0024] Figure 1 A schematic block diagram of a communication system in which one possible implementation of this application may be carried out is shown;

[0025] Figure 2 A schematic diagram of the basic flow of wireless communication according to one possible implementation of this application is shown;

[0026] Figure 3 , 4 5 and 6 respectively show flowcharts of a communication method according to one possible implementation of this application;

[0027] Figure 7Simulation results of decoding according to one possible implementation of this application are shown;

[0028] Figure 8 A schematic block diagram of a communication device according to one possible implementation of this application is shown; and

[0029] Figure 9 This is a simplified block diagram of an example device suitable for implementing possible implementations of this application.

[0030] In the various figures, the same or similar reference numerals represent the same or similar elements. Detailed Implementation

[0031] Possible implementations of this application will now be described in more detail with reference to the accompanying drawings.

[0032] In the description of possible implementations of this application, the term "comprising" and similar terms should be understood as open inclusion, i.e., "including but not limited to". The term "based on" should be understood as "at least partially based on". The term "one possible implementation" or "the possible implementation" should be understood as "at least one possible implementation". The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below. Expressions such as "at least one of A, B, and C" or "at least one of A, B, or C" should be understood as any of the following: at least one A; at least one B; at least one C; at least one A and at least one B; at least one A and at least one C; at least one B and at least one C; at least one A, at least one B, and at least one C. The above examples use three elements, A, B, and C, for illustration. When there are more elements in the expression, the meaning of the expression can be obtained according to the aforementioned rules.

[0033] Figure 1 A schematic block diagram of a communication system 100 in which one possible implementation of this application may be carried out is shown. As shown, the communication system 100 includes terminal devices 110-1, 110-2...110-M and network device 120. In the following, terminal devices 110-1, 110-2...110-M are also referred to as UE#1, UE#2...UE#M (M is a positive integer). Furthermore, in the following, terminal devices 110-1, 110-2...110-M are collectively referred to as terminal device 110 or simply as terminal device 110.

[0034] Terminal device 110 is a device with wireless transceiver capabilities. Terminal device 110 can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; it can also be deployed on water (such as on ships); and it can be deployed in the air (such as on airplanes, balloons, and satellites). Terminal device 110 can be a mobile phone, tablet, vehicle-mounted mobile device, personal digital assistant (PDA), computer with wireless transceiver capabilities, virtual reality (VR) terminal device, augmented reality (AR) terminal device, wearable device, Internet of Things (IoT) device, wireless terminal device in industrial control, wireless terminal device in self-driving, wireless terminal device in remote medical, wireless terminal device in smart grid, wireless terminal device in transportation safety, wireless terminal device in smart city, wireless terminal device in smart home, or user equipment (UE), etc.

[0035] Network device 120 is a radio access network (RAN) device that connects terminal device 110 to a wireless network. The coverage area of ​​network device 120 is referred to as cell 122. Examples of RAN devices may include, but are not limited to: Next generation Node B (gNB), Transmission Reception Point (TRP), Evolved Node B (eNB), Radio Network Controller (RNC), Node B (NB), Base Station Controller (BSC), Base Transceiver Station (BTS), femtocell (e.g., femtocell evolved Node B, or femtocell Node B), Base Band Unit (BBU), or Wireless Fidelity (WiFi) Access Point (AP), Integrated Access and Backhaul (IAB) node, etc. In one possible implementation, network device 120 may include a centralized unit (CU), a distributed unit (DU), or both a CU and a DU.

[0036] Examples of communication systems 100 may include, but are not limited to: Narrow Band-Internet of Things (NB-IoT), Global System for Mobile Communications (GSM), Enhanced Data Rate for GSM Evolution (EDGE), Wideband Code Division Multiple Access (WCDMA), Code Division Multiple Access 2000 (CDMA2000), Time Division-Synchronization Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), and the three major application scenarios of next-generation 5G mobile communication systems: Enhanced Mobile Broadband (eMBB), Ultra-reliable and Low Latency Communications (URLLC), and Enhanced Machine-Type Communication (eMTC).

[0037] Understandable. Figure 1 The number of terminal devices and network devices shown is merely an example and is not intended to impose any limitation. The communication system 100 may include any appropriate number of terminal devices and network devices as needed.

[0038] Figure 2 A basic flowchart illustrating a possible implementation of wireless communication according to this application is shown. Figure 2 As shown, the transmitting device performs source coding, channel coding, and modulation on the bit stream generated by the information source, and then transmits it to the receiving device through a noisy channel. The receiving device demodulates the received signal, performs channel decoding, and source decoding to recover the bit stream generated by the information source. In uplink transmission, the transmitting device can be... Figure 1 The terminal device 110 in the middle, the receiving device can be Figure 1 Network device 120. In downlink transmission, the sending device can be... Figure 1 The network device 120 in the middle, the receiving device can be Figure 1 Terminal device 110 in the middle.

[0039] The transmitting device can perform channel coding on the digital signal to be transmitted based on the coding matrix (also known as the generator matrix). In coding theory, the coding matrix is ​​a matrix whose rows are a basis of linear codes. All codewords are linear combinations of the rows of this matrix; that is, a linear code is the row space of its coding matrix.

[0040] If G represents the encoding matrix, then it generates codewords for a linear code C as follows: w = s * G, where w is a codeword of the linear code C, and s is the information to be encoded, which can be any vector. The encoding matrix of a linear (n,k,d,q) code has the format k * n, where n is the length of the codeword, k is the number of information bits (as the dimension of the vector subspace C), d is the minimum distance of the code, and q is the size of the finite field, i.e., the number of symbols in the dictionary (therefore q = 2 represents a binary code, etc.). The number of redundant bits is represented by r = nk.

[0041] The standard form of the encoding matrix is ​​G = [I k |P], where I k It is a k×k identity matrix, and P is a k×r matrix. When the encoding matrix is ​​in standard form, code C is the systematic code at its first k coordinate positions.

[0042] The receiving device can verify whether the received symbols conform to codeword characteristics based on the parity-check matrix. For example, the receiving device can use... This is used to check whether the received symbols conform to the codeword characteristics, where H represents a (nk)*n parity check matrix. This is the received symbol vector (also called the "received vector"), and E represents the verification result. When E is all 0, it means the verification passed. It is a codeword in the linear space C. However, it does not mean that... It must be the correct codeword. When the error occurs by a sufficiently coincidental coincidence, the receive vector can be exactly equal to another codeword in the C space, at which point the error cannot be detected based on the parity check matrix.

[0043] The receiving device can use the encoding matrix to construct a parity check matrix for the code, and vice versa. If the encoding matrix is ​​in standard form G = [I k |P], then the parity check matrix C is H=[-P] T |I n-k ]. Where P T It is the transpose of matrix P.

[0044] As mentioned earlier, GRAND decoding and OSD decoding are two commonly used decoding methods. GRAND decoding requires a parity check matrix H and a receive vector. The general process of GRAND decoding is as follows. First, the receiving device... Perform a verification; if If the result is all zeros, the verification passes and decoding ends. If the verification fails, the receiving device will process the received vector. Randomly flip a certain position of the vector (e.g., flip 0 to 1 or 1 to 0), and then flip the vector. Perform a verification. If the verification passes, decoding ends. Otherwise, proceed with the received vector. Flip it at another position and check it until a flipped vector that passes the check is found, or the received vector is... Flip it once at any position.

[0045] In receiving vector If the verification fails even after flipping the vector once at any position, the receiving device will receive the vector. Flip any two positions and determine if the check passes.

[0046] In receiving vector After trying all the combinations of flipping two positions, proceed to flipping combinations of 3, 4, 5, ... positions, until the result that has been verified is correct.

[0047] Therefore, GRAND decoding is a decoding method that finds the codeword closest to the receiving vector by continuously trying to flip 1, 2, 3... symbols and uses it as the decoding result.

[0048] The advantage of GRAND decoding is that it only requires a parity check matrix for decoding, can be used for any code, and can always find the codeword with the closest Hamming distance to the received symbol as the decoding result. For example, in 4G, Tail-biting Convolutional Code (TBCC) and Turbo codes (TURBO) are used; in 5G, Polar codes and Low Density Parity Check Code (LDPC) are used. For extremely high code rates or very short code lengths, GRAND can quickly obtain the decoding result. However, as the code rate decreases or the code length increases, the average / maximum decoding complexity increases by the order of combinatorial complexity. Therefore, its application scope is limited and it is not suitable for current mainstream communication systems.

[0049] OSD decoding is a suboptimal maximum likelihood decoding method, with performance approaching that of maximum likelihood decoding. Furthermore, its performance can be improved by increasing the decoding order at lower signal-to-noise ratios. The drawback of OSD decoding is that its computational complexity increases exponentially with the order o.

[0050] The general process of OSD decoding is as follows: The receiving device sorts the log-likelihood ratio (LLR) values ​​of the (N, K) encoded received symbols, where N represents the encoded transmitted code length and K represents the number of information bits. After sorting by the absolute values ​​of the LLR, the K largest positions are marked and their symbols are recorded. The encoding matrix G is reordered, and the marked K positions are placed in the first K positions through column permutations, resulting in matrix G'. Gaussian elimination (row permutations and addition / subtraction operations) is performed on matrix G', so that after Gaussian elimination, a new encoding matrix G' is obtained (the first K columns form an identity matrix).

[0051] Then, the receiving device multiplies the symbols at the K largest positions with the coding matrix G' to obtain the 0th-order recovery codeword. The Euclidean distance between the 0th-order codeword and the received symbols' LLR is calculated, and the codeword and distance value are recorded.

[0052] Subsequently, the receiving device flips the symbols at the K largest positions by one position and multiplies them by the encoding matrix G' to obtain the first-order recovered codewords. The receiving device calculates the Euclidean distance of the first-order recovered codewords, compares it with the recorded codeword Euclidean distances, retains the smaller value, and keeps the corresponding codeword. The total number of first-order codewords is K.

[0053] Then, the receiving device flips the symbols at the K largest positions by 2, 3, 4... positions and multiplies them by the encoding matrix G' to obtain the 2nd, 3rd, 4th... order recovery codewords. The receiving device calculates the Euclidean distance between the 2nd, 3rd, 4th... order recovery codewords and the LLR of the received symbols, compares it with the Euclidean distance of the recorded codewords, retains the smaller value, and retains the corresponding codeword. The total number of 2nd, 3rd, 4th... order codewords are respectively... (Where C represents the calculation of combinations).

[0054] The o-order OSD decoding has 0, 1, 2, 3... o flips. After all flips are completed, the codeword with the smallest Euclidean distance is selected as the output.

[0055] The biggest drawback of OSD decoding is that it requires Gaussian elimination to transform the column-permuted G' matrix into a new generating matrix through row permutation. Gaussian elimination is complex, and if linearly dependent rows appear in the selected K columns, the matrix may not reach its full rank. In this case, a generating matrix G' cannot be generated, and one of the K columns needs to be replaced with a new column to perform Gaussian elimination again. Therefore, a decoding method with lower complexity is needed.

[0056] Figure 3A flowchart of a communication method 300 according to one possible implementation of this application is shown. In one possible implementation, method 300 may be implemented by a terminal device 110 in the example communication system 100, for example, by a processor or processing unit of the terminal device 110 in conjunction with other components (e.g., a transceiver). In another possible implementation, method 300 may be implemented by a network device 120 in the example communication system 100, for example, by a processor or processing unit of the network device 120 in conjunction with other components (e.g., a transceiver). The possible implementations of this application will be described below using terminal device 110 as an example. In other possible implementations, method 300 may also be implemented by other communication devices independent of the example communication system 100.

[0057] In step 310, the terminal device 110 determines the log-likelihood ratio (LLR) vector associated with the received vector.

[0058] In step 320, the terminal device 110 sorts at least some of the elements in the LLR vector after taking their absolute values.

[0059] In step 330, the terminal device 110 divides the elements in the system bit vector into multiple groups according to the ascending order of the sorting result. The system bit vector includes the first to k elements in the receive vector, where k is an integer greater than or equal to 1.

[0060] In step 340, the terminal device 110 determines the flip order of the bits in each of the multiple groups to be non-incremental.

[0061] In step 350, the terminal device 110 flips the bits in each group based on the flip order to obtain multiple flipped system bit vectors.

[0062] In step 360, the terminal device 110 determines multiple encoding vectors based on multiple flipped system bit vectors and the encoding matrix.

[0063] In step 370, the terminal device 110 selects the first encoding vector with the smallest Euclidean distance to the LLR vector from multiple encoding vectors as the decoding result of the received vector.

[0064] The scheme presented in this application can be viewed as a decoding method combining the advantages of OSD and GRAND. It is an efficient GRAND that reduces the flipping range through LLR sorting, and can also be seen as an OSD that avoids Gaussian elimination. In this scheme, after sorting the LLR vector, the k systematic bits are divided into multiple groups according to the sorting result. Different flipping orders can be used for different groups, thereby reducing the total number of flips. After flipping the systematic bits, the flipped systematic bits are obtained, and then an n-length encoding result is obtained through the generator matrix G. Since the encoding result is obtained from the encoding matrix, the encoding result must be a codeword. By flipping a sufficient number of systematic bits, codewords within a certain flipping range are obtained. These codewords are compared with the received symbol, and the flipped encoding result with the smallest Euclidean distance to the received symbol is selected as the decoding result output.

[0065] In one possible implementation, sorting by taking the absolute values ​​of at least a portion of the elements in the LLR vector can include sorting by taking the absolute values ​​of the elements in the LLR vector that correspond to the system bit vector. This will refer to... Figure 4 Describe it.

[0066] Figure 4 A flowchart of a communication method 400 according to one possible implementation of this application is shown. Method 400 can be considered as an example implementation of method 300. In one possible implementation, method 400 can be implemented by a terminal device 110 in the example communication system 100, for example, by a processor or processing unit of the terminal device 110 in conjunction with other components (e.g., a transceiver). In another possible implementation, method 400 can be implemented by a network device 120 in the example communication system 100, for example, by a processor or processing unit of the network device 120 in conjunction with other components (e.g., a transceiver). The possible implementations of this application will be described below using terminal device 110 as an example. In other possible implementations, method 400 can also be implemented by other communication devices independent of the example communication system 100.

[0067] In method 400, the receive vector received by terminal device 110 from network device 120 is... Representation. Receive vector This can be a modulation symbol sequence (e.g., a {-1, +1} sequence). Receive vector The number of elements in the vector is represented by n, for example, n = 100. (Receive vector) The first to k elements are system bits (also called information bits), and the k system bits constitute the system bit vector. Where k is an integer greater than or equal to 1, for example, k = 10.

[0068] Furthermore, in method 400, the encoding matrix is ​​represented by G, which is a k*n matrix.

[0069] like Figure 4 As shown, in step 410, the terminal device 110 can determine the receiving vector. The associated log-likelihood ratio (LLR) vector. For example, terminal device 110 can determine the received vector. The LLR value for each element is determined by taking the logarithm of the ratio of the probability of each element being 0 to the probability of each element being 1. (Receive vector) The LLR values ​​of n elements in the vector form an LLR vector, where the LLR vector contains n elements. For example, the receive vector The LLR value of element x in the matrix can be determined based on the following:

[0070]

[0071] Where LLR(x) represents the LLR value of element x, P(x=0) represents the probability that element x takes the value 0, and P(x=1) represents the probability that element x takes the value 1.

[0072] In step 415, the terminal device 110 can sort the elements in the LLR vector that correspond to the system bit vector by taking their absolute values. For example, the LLR vector is [r1, r2, ..., r100], where ri represents the receive vector. The LLR value of the i-th element in the vector is used to sort the elements [r1,r2,...,r10] corresponding to the system bit vector in the LLR vector by taking their absolute values. For example, the elements in the vector [rs1,rs2,...,rs10] can be arranged in ascending or descending order.

[0073] In step 420, the terminal device 110 can transmit the system bit vector The elements in the data are divided into m groups in ascending order according to the above sorting results. Each group includes m1, m2, m3, ..., m m There are elements, among which The absolute value of the LLR value corresponding to any element in the array is less than 1. Any one of them, The absolute value of the LLR value corresponding to any element in the array is less than 1. Any one of them, ... The absolute value of the LLR value corresponding to any element in the array is less than 1. Any one of them. In this application, the group They are also referred to as the first group, the second group, ... the mth group, respectively.

[0074] In step 425, terminal device 110 can determine the flip order of the bits in the m groups as non-increasing. For example, ... The order of bit flipping in the data is determined to be O1. The flip order of the bits in the array is determined to be o2, ..., The order of bit flipping in the data is determined to be 0. m such that o1≥o2≥…o m .

[0075] Consider the first example. In this example, the system bit vector The values ​​are [u1,u2,u3,u4,u5,u6,……,u15]. For [u1,u2,u3], [u4, u5] Let the range be [u6, ..., u15]. m1 = 3, o1 = 2; m2 = 2, o2 = 1; m3 = 10, o3 = 0. Method 400 will be described below with reference to the first example.

[0076] In step 430, the terminal device 110 can use the encoding matrix G to process the system bit vector. Encoding yields vector a0, where Then, the terminal device 110 can determine the Euclidean distance x between vector a0 and LLR vector, and denote a0 as the decoding result b, i.e., b = a0.

[0077] In step 435, the terminal device 110 can be flipped. The first bit (e.g., u1) in the first group is used to obtain the flipped system bit vector. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set.

[0078] In step 440, terminal device 110 can determine the Euclidean distance x' between vector a0 and LLR vector. If x' is less than x, terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0079] In step 445, the terminal device 110 can be flipped respectively. The 2nd, 3rd...m1th bits (e.g., u2 and u3) are used to obtain the corresponding flipped system bit vectors. The current decoding result a is obtained by encoding the corresponding flipped system bit vectors using the coding matrix G. y , let a=a yAnd repeat step 435, “encode the flipped system bit vector using the encoding matrix G to obtain the current decoding result a0, and let a = a0” and repeat step 440.

[0080] In step 450, terminal device 110 can select respectively Flip the two bits in the sequence and repeat steps 435 and 440, looping this process until the combination of the two bits has been selected.

[0081] For example, firstly, terminal device 110 can select The system bit vector is obtained by flipping u1 and u2 in the code. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set. Further, the terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, the terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0082] Then, terminal device 110 can select The system bit vector is obtained by flipping u1 and u3 in the code. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set. Further, the terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, the terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0083] Finally, terminal device 110 can choose The system bit vector is obtained by flipping u2 and u3 in the code. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set. Further, the terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, the terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0084] In step 455, terminal device 110 can select respectively Flip 3...o1 bits and repeat steps 425 and 430, looping this process until the combination of that number of bits is complete. It can be understood that in the example above, The flip order of the element in the array is o1 = 2, therefore the terminal device 110 will not perform step 455.

[0085] In step 460, terminal device 110 can select respectively Flip the 1, 2...o2 bits in the second group and repeat steps 425 to 455 until the combination of that number of bits is complete.

[0086] For example, firstly, terminal device 110 can select u4 and The system bit vector is obtained by flipping u1 in the code. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set. Further, the terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, the terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0087] Then, terminal device 110 can select u4 and The system bit vector is obtained by flipping u2 in the code. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set. Further, the terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, the terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0088] Subsequently, terminal device 110 can select u4 and The system bit vector is obtained by flipping u3 in the code. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set. Further, the terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, the terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0089] Furthermore, terminal device 110 can select u5 and The system bit vector is obtained by flipping u1 in the code. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set. Further, the terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, the terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0090] Then, terminal device 110 can select u5 and The system bit vector is obtained by flipping u2 in the code. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set. Further, the terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, the terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0091] Subsequently, terminal device 110 can select u5 and The system bit vector is obtained by flipping u3 in the code. The flipped system bit vector is then encoded using the encoding matrix G to obtain the current decoding result a0, and a = a0 is set. Further, the terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, the terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'.

[0092] In step 465, terminal device 110 can select respectively The 1st, 2nd...03rd bits in the third group are flipped, and steps 425 to 460 are repeated until the combination of that number of bits is complete. It can be understood that in the example above, Since the flip order of the element in the array is o3 = 0, the terminal device 110 will not execute step 465.

[0093] In step 470, the terminal device 110 may use the currently retained decoding result b as the final decoding result.

[0094] In method 400, under the same constraint of the maximum order of flipping o, the maximum number of flips to achieve performance by flipping the system bits will be less than the number of flips of the parity check matrix.

[0095] For example, dividing the 106 bits in the (127, 106) BCH (Bose-Chaudhuri-Hocquenghem Code) into groups results in fewer flips and better performance compared to directly flipping the 106 bits. Directly flipping the 106 bits in one order would require 1 + 106 + 106*(106-1) / 2 = 5672 flips. Dividing the K bits into three groups (m1 = 10, m2 = 30, m3 = 66, o1 = 2, o2 = 1, o3 = 0) reduces the number of flips to (1 + 10 + 10*(10-1) / 2)*30 = 1680, thus reducing the complexity.

[0096] Furthermore, if the existing GRAND parity-check matrix is ​​used for decoding, the number of flips required is 1 + 127 + 127 * 126 / 2 = 8130. Therefore, method 400 has a lower complexity than GRAND decoding.

[0097] Alternatively, in one possible implementation, sorting by taking the absolute values ​​of at least some elements in the LLR vector may include sorting by taking the absolute values ​​of all elements in the LLR vector. In this possible implementation, the terminal device 110 may divide the elements in the system bit vector into multiple groups in ascending order of the sorting result by the following steps: determining the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; determining m1 elements from the nk elements, the m1 elements corresponding to the m1 elements in the system bit vector, where m1 is an integer greater than or equal to 1; dividing the m1 elements in the system bit vector into the initial group of multiple groups; and dividing the remaining k-m1 elements in the system bit vector into subsequent groups of the initial group. This will refer to... Figure 5 Describe it.

[0098] Figure 5 A flowchart of a communication method 500 according to one possible implementation of this application is shown. Method 500 can be considered as another example implementation of method 300. In one possible implementation, method 500 can be implemented by a terminal device 110 in the example communication system 100, for example, by a processor or processing unit of the terminal device 110 in conjunction with other components (e.g., a transceiver). In another possible implementation, method 500 can be implemented by a network device 120 in the example communication system 100, for example, by a processor or processing unit of the network device 120 in conjunction with other components (e.g., a transceiver). The possible implementations of this application will be described below using terminal device 110 as an example. In other possible implementations, method 500 can also be implemented by other communication devices independent of the example communication system 100.

[0099] In method 500, the receive vector received by terminal device 110 from network device 120 is determined by... Representation. Receive vector This can be a modulation symbol sequence (e.g., a {-1, +1} sequence). Receive vector The number of elements in the vector is represented by n, for example, n = 100. (Receive vector) The first to k elements are system bits (also called information bits), and the k system bits constitute the system bit vector. Where k is an integer greater than or equal to 1, for example, k = 10.

[0100] Furthermore, in method 500, the encoding matrix is ​​represented by G, which is a k*n matrix.

[0101] like Figure 5 As shown, in step 510, the terminal device 110 can determine the receiving vector. The associated log-likelihood ratio (LLR) vector. For example, the LLR vector contains n elements. Step 510 is similar to step 410 in method 400, and therefore will not be described again.

[0102] In step 515, the terminal device 110 can sort the LLR vector by taking the absolute values ​​of all elements. For example, the LLR vector is [r1, r2, ..., r100], where ri represents the received vector. The LLR value of the i-th element in the vector is obtained by taking the absolute value of all elements in the LLR vector and sorting them to obtain the vector [rt1,rt2,……,rt100].

[0103] In step 520, terminal device 110 can determine the smallest nk elements in the LLR vector. In other words, terminal device 110 can determine the smallest nk elements in the vector [rt1,rt2,...,rt100].

[0104] In step 525, the terminal device 110 can determine m1 elements from the nk elements, and the m1 elements are compared with the system bit vector. The system bit vector contains m1 elements, where m1 is an integer greater than or equal to 1. Terminal device 110 can divide these m1 elements into a starting group from multiple groups. This starting group can be determined by... express.

[0105] In step 530, the terminal device 110 can transmit the system bit vector The other k-m1 elements in the vector are divided into subsequent groups of the initial group. For example, terminal device 110 can divide the system bit vector into... The other k-m1 elements are divided into m-1 groups. Each group includes m2, m3, ..., m m There are elements, among which The absolute value of the LLR value corresponding to any element in the array is less than 1. Any one of them, The absolute value of the LLR value corresponding to any element in the array is less than 1. Any one of them, ... The absolute value of the LLR value corresponding to any element in the array is less than 1. Any one of them.

[0106] Subsequently, terminal device 110 can execute steps 425 to 470 of method 400 to determine the decoding result of the received vector. For simplicity, Figure 5 Steps 425 to 470 are not shown in the text.

[0107] It is understandable that the main difference between Method 500 and Method 400 is that the value of m1 is not fixed; m1 is the number of corresponding elements in the system bit vector for the smallest nk elements in the LLR vector. In other words, in Method 500, the terminal device 110 can dynamically group the elements in the system bit vector. Therefore, Method 500 outperforms Method 400.

[0108] Alternatively, in method 500, terminal device 110 can determine the smallest n-k+x elements in the LLR vector, and then determine m1 elements from the n-k+x elements as a starting group, where x is a positive integer. When the value of x is small, its performance is roughly the same as that of method 500.

[0109] Alternatively, in one possible implementation, sorting by taking the absolute values ​​of at least some elements in the LLR vector may include sorting by taking the absolute values ​​of all elements in the LLR vector. In this possible implementation, terminal device 110 may divide the elements in the system bit vector into multiple groups in ascending order of the sorting result by the following steps: determining the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; determining x elements from the nk elements, where x elements correspond to x elements in the system bit vector, and x is an integer greater than or equal to 1; dividing the x elements in the system bit vector into y groups; and dividing the remaining kx elements in the system bit vector into subsequent my groups of the y groups. This will refer to... Figure 6 Describe it.

[0110] Figure 6 A flowchart of a communication method 600 according to one possible implementation of this application is shown. Method 600 can be considered as another example implementation of method 300. In one possible implementation, method 600 can be implemented by a terminal device 110 in the example communication system 100, for example, by a processor or processing unit of the terminal device 110 in conjunction with other components (e.g., a transceiver). In another possible implementation, method 600 can be implemented by a network device 120 in the example communication system 100, for example, by a processor or processing unit of the network device 120 in conjunction with other components (e.g., a transceiver). The possible implementations of this application will be described below using terminal device 110 as an example. In other possible implementations, method 600 can also be implemented by other communication devices independent of the example communication system 100.

[0111] In method 600, the receive vector received by terminal device 110 from network device 120 is... Representation. Receive vector This can be a modulation symbol sequence (e.g., a {-1, +1} sequence). Receive vector The number of elements in the vector is represented by n, for example, n = 100. (Receive vector) The first to k elements are system bits (also called information bits), and the k system bits constitute the system bit vector. Where k is an integer greater than or equal to 1, for example, k = 10.

[0112] Furthermore, in method 600, the encoding matrix is ​​represented by G, which is a k*n matrix.

[0113] like Figure 6 As shown, in step 610, the terminal device 110 can determine the receiving vector. The associated log-likelihood ratio (LLR) vector. For example, the LLR vector contains n elements. Step 610 is similar to step 410 in method 400, and therefore will not be described again.

[0114] In step 615, the terminal device 110 can sort the LLR vector by taking the absolute values ​​of all elements. For example, the LLR vector is [r1, r2, ..., r100], where ri represents the received vector. The LLR value of the i-th element in the vector is obtained by taking the absolute value of all elements in the LLR vector and sorting them to obtain the vector [rt1, rt2, ..., rt100]. Step 615 is similar to step 515 in method 500.

[0115] In step 620, terminal device 110 can determine the smallest nk elements in the LLR vector. In other words, terminal device 110 can determine the smallest nk elements in the vector [rt1,rt2,...,rt100]. Step 620 is similar to step 520 in method 500.

[0116] In step 625, the terminal device 110 can determine x elements from the nk elements, and these x elements are related to the system bit vector. The x elements in the array correspond to each other, where x is an integer greater than or equal to 1.

[0117] In step 630, the terminal device 110 can transmit the system bit vector The x elements in the data are divided into y groups. Each group includes m1, m2, ..., m y 1 element.

[0118] In step 635, terminal device 110 can transmit the system bit vector The other kx elements in the vector are divided into y groups followed by my groups. For example, terminal device 110 can divide the system bit vector into... The other kx elements in the dataset are divided into my groups. Each group includes m y+1 m y+2 ,…,m m There are elements, among which The absolute value of the LLR value corresponding to any element in the array is less than 1. Any one of them, The absolute value of the LLR value corresponding to any element in the array is less than 1. Any one of them, ... The absolute value of the LLR value corresponding to any element in the array is less than 1. Any one of them.

[0119] Subsequently, terminal device 110 can execute steps 425 to 470 of method 400 to determine the decoding result of the received vector. For simplicity, Figure 6 Steps 425 to 470 are not shown in the text.

[0120] In method 600, terminal device 110 can perform fine-grained dynamic grouping of elements in the system bit vector, resulting in lower complexity and better performance.

[0121] In one possible implementation, terminal device 110 may further determine the Hamming distance between a second coded vector and an LLR vector among a plurality of coded vectors. The second coded vector may be the same as or different from the first coded vector. If the Hamming distance is less than or equal to half the minimum code distance of the codeword space formed by or corresponding to the coded matrix, terminal device 110 may stop decoding the received vector.

[0122] For example, in step 400, terminal device 110 can determine the Euclidean distance x' between vector a0 and the LLR vector. If x' is less than x, terminal device 110 updates the decoding result b to a and updates the minimum Euclidean distance x to x'. Furthermore, terminal device 110 can also determine the Hamming distance h between the current decoding result a and the LLR vector. When h ≤ d / 2, terminal device 110 can stop decoding the received vector and output the result with the minimum Euclidean distance as the decoding result, where d represents the minimum code distance of the codeword space formed or corresponding to the coding matrix G. Alternatively, terminal device 110 can also determine the recorded minimum Euclidean distance decoding result b and the Hamming distance h of the LLR vector. When h ≤ d / 2, terminal device 110 can stop decoding the received vector and output the result with the minimum Euclidean distance as the decoding result.

[0123] Since the terminal device 110 can stop decoding the received vector earlier when h≤d / 2, the complexity of this method can be reduced.

[0124] For example, taking BCH code as an example, n=127, k=99, M (original order of the primitive)=7, T=4 (maximum number of correctable bits, equal to the minimum code distance (d-1) / 2). When the maximum flip order is limited to 4, the performance is slightly better than the existing scheme, and the average number of flips is halved compared to the existing scheme under all EsN0 conditions.

[0125] It should be understood that although the above-described method 400 describes an implementation of the terminal device 110 stopping decoding earlier, this implementation can be used in combination with any of the methods 400, 500 and 600, and the scope of protection of this application is not limited in this respect.

[0126] Figure 7 Simulation results of decoding according to one possible implementation of this application are shown. Figure 7 The simulation results can be obtained, for example, by executing method 500. Figure 7 In this context, o represents the total flip order (or the maximum flip order), and o = o1 + o2 + ... + o m , oh = o2.

[0127] When using only the encoding matrix for flipping, the total flip order o is set to 5 (i.e., o = 5), where the smallest x bits in the system bit vector are flipped 5 times and the kx bits are flipped 0 times, or the smallest x bits are flipped 4 times and the kx bits are flipped 1 time. Figure 7 As can be seen, the decoding performance of the possible implementation according to this application is 0.9dB better than the existing GRAND decoding, and the complexity is basically less than 1 / 30 of GRAND decoding.

[0128] Furthermore, if the total number of flip orders is set to 6 (i.e., o = 6), where the smallest x bits are flipped 6 times and the kx bits are flipped 0 times, or the smallest x bits are flipped 5 times and the kx bits are flipped 1 time, the decoding performance according to the possible implementation of this application is 1.2 dB better than the existing GRAND decoding, and the complexity is basically less than 1 / 10 of GRAND decoding.

[0129] Compared to OSD decoding that requires Gaussian elimination, the decoding performance loss according to the possible implementation of this application is about 0.25 dB, but the decoding according to the possible implementation of this application can eliminate the Gaussian elimination process.

[0130] Figure 8A schematic block diagram of a communication device 800 according to one possible implementation of this application is shown. The communication device 800 can be implemented as a device or a chip within a device, and the scope of this application is not limited in this respect. The communication device 800 may include multiple units for performing functions such as... Figures 3 to 6 The corresponding steps in methods 300, 400, 500, and 600 discussed herein. The communication device 800 can be implemented as follows: Figure 1 The terminal device 110 or a part of the terminal device 110 shown is illustrated. Alternatively, the communication device 800 can be implemented as shown in the diagram. Figure 1 The network device 120 or a part of the network device 120 shown in the figure.

[0131] like Figure 8 As shown, the communication device 800 includes a processing unit 810.

[0132] Processing unit 810 is configured to: determine a log-likelihood ratio (LLR) vector associated with the received vector; sort at least a portion of the elements in the LLR vector after taking their absolute values; divide the elements in the system bit vector into multiple groups in ascending order of the sorting result, wherein the system bit vector includes the first to k elements in the received vector, where k is an integer greater than or equal to 1; determine the non-increasing order of the bit flips in each of the multiple groups; flip the bits in each group based on the flip order to obtain multiple flipped system bit vectors; determine multiple coded vectors based on the multiple flipped system bit vectors and the coding matrix; and select the first coded vector with the smallest Euclidean distance to the LLR vector from the multiple coded vectors as the decoding result of the received vector.

[0133] In one possible implementation, sorting at least some of the elements in the LLR vector after taking their absolute values ​​includes: sorting the elements in the LLR vector that correspond to the system bit vector after taking their absolute values.

[0134] In one possible implementation, sorting by taking the absolute values ​​of at least some elements in the LLR vector includes: sorting by taking the absolute values ​​of all elements in the LLR vector.

[0135] In one possible implementation, dividing the elements in the system bit vector into multiple groups in ascending order of the sorting result includes: determining the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; determining m1 elements from the nk elements, where the m1 elements correspond to the m1 elements in the system bit vector, and m1 is an integer greater than or equal to 1; dividing the m1 elements in the system bit vector into the initial group of multiple groups; and dividing the other k-m1 elements in the system bit vector into subsequent groups of the initial group.

[0136] In one possible implementation, dividing the elements in the system bit vector into multiple groups in ascending order of the sorting result includes: determining the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; determining x elements from the nk elements, which correspond to x elements in the system bit vector, where x is an integer greater than or equal to 1; dividing the x elements in the system bit vector into y groups; and dividing the remaining kx elements in the system bit vector into subsequent my groups of the y groups.

[0137] In one possible implementation, the processing unit 810 is further configured to: determine the Hamming distance between a second coding vector and an LLR vector among a plurality of coding vectors, wherein the second coding vector is the same as or different from the first coding vector; and stop decoding the received vector if the Hamming distance is less than or equal to half of the minimum code distance of the codeword space formed or corresponding to the coding matrix.

[0138] Figure 9 This is a simplified block diagram of an example device 900 suitable for implementing possible implementations of this application. Device 900 can be used to implement, for example... Figure 1 The terminal device 110 or network device 120 shown Figure 8 The communication device shown is described. As shown, the device 900 includes one or more processors (or processing units) 910, and may also include one or more memories 920 coupled to the processor 910, and may also include a communication interface 940 coupled to the processor 910.

[0139] The communication interface 940 can be used to communicate with other devices or apparatuses, such as transmitting or receiving data and / or signals. The communication interface 940 may have at least one communication interface for communication. The communication interface may include any interface necessary for communicating with other devices. Exemplarily, the communication interface may be a transceiver, circuit, bus, module, or other type of communication interface.

[0140] Processor 910 may include, but is not limited to, one or more of the following: a general-purpose computer, a special-purpose computer, a microcontroller, a digital signal processor (DSP), or a controller-based multi-core controller architecture. Device 900 may have multiple processors, such as application-specific integrated circuit chips, which are time-dependent on a clock synchronized with the main processor.

[0141] Memory 920 may include one or more non-volatile memories and one or more volatile memories. Examples of non-volatile memories include, but are not limited to, at least one of the following: Read-Only Memory (ROM) 924, Electrically Programmable Read-Only Memory (EPROM), flash memory, hard disk, Compact Disc (CD), Digital Video Disk (DVD), or other magnetic and / or optical storage. Examples of volatile memories include, but are not limited to, at least one of the following: Random Access Memory (RAM) 922, or other volatile memories that do not persist during the duration of a power outage.

[0142] Computer program 930 includes computer-executable instructions that are executed by associated processor 910. Program 930 may be stored in ROM 920. Processor 910 can perform any suitable actions and processes by loading program 930 into RAM 920.

[0143] The possible implementations of this application can be achieved by means of program 930, enabling device 900 to execute the reference. Figures 1 to 7 Any process discussed. Possible implementations of this application may also be achieved via hardware or a combination of software and hardware.

[0144] In some implementations, program 930 may be tangibly contained in a computer-readable medium, which may include in device 900 (such as in memory 920) or other storage device accessible by device 900. Program 930 may be loaded from the computer-readable medium into RAM 922 for execution. The computer-readable medium may include any type of tangible non-volatile memory, such as ROM, EPROM, flash memory, hard disk, CD, DVD, etc.

[0145] This application also provides a communication system. The communication system includes the communication device 800 as described above.

[0146] Generally, various possible implementations of this application can be implemented in hardware or special-purpose circuitry, software, logic, or any combination thereof. Some aspects can be implemented in hardware, while others can be implemented in firmware or software, which can be executed by a controller, microprocessor, or other computing device. Although various aspects of possible implementations of this application are shown and described as block diagrams, flowcharts, or represented using some other illustrations, it should be understood that the blocks, apparatuses, systems, techniques, or methods described herein can be implemented as, as non-limiting examples, in hardware, software, firmware, special-purpose circuitry or logic, general-purpose hardware or controllers or other computing devices, or some combination thereof.

[0147] This application also provides at least one computer program product tangibly stored on a non-transitory computer-readable storage medium. The computer program product includes computer-executable instructions, such as instructions included in program modules, which execute in a device on a target's real or virtual processor to perform the above-mentioned... Figures 1 to 8 The process / method described herein. Typically, a program module includes routines, programs, libraries, objects, classes, components, data structures, etc., that perform specific tasks or implement specific abstract data types. In various possible implementations, the functionality of program modules can be combined or divided as needed. The machine-executable instructions used in a program module can execute locally or on a distributed device. In a distributed device, program modules can reside on both local and remote storage media.

[0148] The program code used to implement the methods of this application may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0149] In the context of this application, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0150] Furthermore, although the operations are described in a specific order, this should be understood as requiring that such operations be performed in the specific order shown or in sequential order, or requiring that all illustrated operations be performed to achieve the desired result. In certain environments, multitasking and parallel processing may be advantageous. Similarly, although several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of this application. Certain features described in the context of individual possible implementations can also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation can also be implemented individually or in any suitable sub-combination in multiple implementations.

[0151] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.

Claims

1. A communication method, comprising: Determine the log-likelihood ratio (LLR) vector associated with the received vector; Sort at least some of the elements in the LLR vector after taking their absolute values; The elements in the system bit vector are divided into multiple groups in ascending order according to the sorting result, wherein the system bit vector includes the first to k elements in the receiving vector, and k is an integer greater than or equal to 1; The flip order of the bits in each of the plurality of groups is determined to be non-incremental; The bits in each group are flipped based on the flip order to obtain multiple flipped system bit vectors; Based on the multiple flipped system bit vectors and the encoding matrix, multiple encoding vectors are determined; as well as The first encoding vector with the smallest Euclidean distance to the LLR vector is selected from the plurality of encoding vectors and used as the decoding result of the received vector.

2. The method according to claim 1, wherein sorting at least a portion of the elements in the LLR vector after taking their absolute values ​​comprises: The elements in the LLR vector that correspond to the system bit vector are sorted after taking their absolute values.

3. The method according to claim 1, wherein sorting at least a portion of the elements in the LLR vector after taking their absolute values ​​comprises: Sort the elements in the LLR vector by taking the absolute value of all elements.

4. The method according to claim 3, wherein dividing the elements in the system bit vector into multiple groups in ascending order according to the sorting result includes: Determine the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; From the nk elements, determine m1 elements, which correspond to m1 elements in the system bit vector, where m1 is an integer greater than or equal to 1; The m1 elements in the system bit vector are divided into the starting group among the plurality of groups; as well as The other k-m1 elements in the system bit vector are divided into subsequent groups of the initial group.

5. The method of claim 3, wherein dividing the elements in the system bit vector into multiple groups according to the ascending order of the sorting result comprises: Determine the smallest nk elements in the LLR vector, where n represents the total number of elements in the LLR vector; Determine x elements from the nk elements, wherein the x elements correspond to x elements in the system bit vector, and x is an integer greater than or equal to 1; Divide the x elements in the system bit vector into y groups; and The other kx elements in the system bit vector are divided into the subsequent my groups of the y groups.

6. The method according to claim 1, further comprising: Determine the Hamming distance between the second encoding vector and the LLR vector among the plurality of encoding vectors, wherein the second encoding vector is the same as or different from the first encoding vector; as well as If the Hamming distance is less than or equal to half the minimum code distance of the codeword space formed by or corresponding to the coding matrix, then the decoding of the received vector is stopped.

7. A communication device, comprising: processor; as well as Memory, including computer program code; The computer program code, when run by the processor, causes the method according to any one of claims 1-6 to be executed.

8. A computer-readable storage medium having a computer program stored thereon, the computer program implementing the method according to any one of claims 1-6 when executed by a processor.

9. A chip comprising processing circuitry configured to perform the method according to any one of claims 1-6.

10. A computer program product comprising instructions configured to, when executed by a device, cause the device to perform the method according to any one of claims 1-6.

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