Detection circuit

Abstract

The embodiment of the invention belongs to the detection technology of a television mainboard, and provides a detection circuit, which comprises a signal input module and a detection module, the output end of the signal input module is connected with the first end of a to-be-detected circuit, and the to-be-detected circuit is arranged in a system-on-chip of a television mainboard and used for being connected with a screen end interface of the television mainboard; the input end of the detection module is connected with the second end of the line to be detected; the signal input module is configured to input a detection signal to the line to be detected; and the detection module is configured to obtain a signal output by the to-be-detected line based on the detection signal, and determine a detection result of the to-be-detected line based on the output signal. According to the method and the device, the problem of how to reduce the detection cost and improve the accuracy of the detection result in the detection of the functional region between the SOC and the output screen end interface can be solved.

Description

Technical Field

[0001] This application relates to detection technology for television motherboards. In particular, it relates to a detection circuit. Background Technology

[0002] V-By-One is a digital interface standard. A TV motherboard with a V-By-One interface can generally be divided into three functional areas: the area between the input interface and the System-on-Chips (SOC), the SOC image processing area, and the area between the SOC and the output screen interface. To ensure the normal operation of the TV motherboard, these three functional areas need to be tested to ensure they function correctly.

[0003] For the testing of functional areas between the SOC and the output screen interface, the currently used graphical testing schemes require a lot of testing instruments and sometimes fail to record image signals, resulting in high costs and inaccurate test results.

[0004] Therefore, for the testing of functional areas between the SOC and the output screen interface, how to reduce testing costs and improve the accuracy of testing results remains an urgent problem to be solved. Summary of the Invention

[0005] This application provides a detection circuit that can solve the problem of how to reduce detection costs and improve the accuracy of detection results for the detection of functional areas between the SOC and the output screen interface.

[0006] In a first aspect, embodiments of this application provide a detection circuit, including: a signal input module and a detection module;

[0007] The output terminal of the signal input module is connected to the first terminal of the line to be tested, wherein the line to be tested is located in the system-on-a-chip of the TV motherboard and is used to connect to the screen interface of the TV motherboard.

[0008] The input terminal of the detection module is connected to the second terminal of the circuit to be tested;

[0009] The signal input module is configured to input a detection signal to the line under test;

[0010] The detection module is configured to acquire the signal output by the line under test based on the detection signal, and to determine the detection result of the line under test based on the output signal.

[0011] The detection circuit provided in the embodiments of this application includes a signal input module and a detection module. The signal input module inputs a detection signal to the circuit under test, and the detection module acquires the signal output by the circuit under test based on the detection signal. The detection result of the circuit under test is then determined based on the output signal. Therefore, when detecting the functional area between the SOC and the output screen interface, patterned detection is not required; instead, patternless detection is performed based on the detection signal. This not only enables efficient detection of the functional area between the SOC and the output screen interface but also reduces the cost of testing equipment and improves the accuracy of the detection results.

[0012] In some embodiments of this application, the signal input module includes: a constant current power supply module, a signal processing module, and a switching module;

[0013] The output terminal of the constant current power supply module is connected to the input terminal of the signal processing module; the output terminal of the signal processing module is connected to the input terminal of the switching module; the switching module is connected to the first terminal of the circuit to be tested.

[0014] The constant current power supply module is configured to output a DC signal to the signal processing module;

[0015] The signal processing module is configured to convert the DC signal into a detection signal and output the detection signal to the switching module;

[0016] The switch module is configured to control the detection signal to enter the circuit to be detected.

[0017] The detection circuit provided in this embodiment includes a constant current power supply module, a signal processing module, and a switching module. The constant current power supply module is configured to provide a DC signal, and the signal processing module is configured to convert the DC signal into a detection signal. The switching module is configured to control the detection signal to enter the circuit under test. After the detection signal enters the circuit under test, the circuit under test responds to the detection signal and outputs a signal to the detection module. The detection module then determines the detection result of the circuit under test based on the signal output by the circuit under test. This achieves patternless detection of the circuit under test. Patternless detection not only efficiently enables the detection of functional areas between the SOC and the output screen interface, but also reduces the cost of testing tooling and improves the accuracy of the detection results.

[0018] In some embodiments of this application, the signal processing module includes a first switch and a pull-down circuit;

[0019] The first terminal of the first switch is connected to the output terminal of the constant current power supply module, the second terminal is connected to the input terminal of the switch module, and the second terminal is also connected to the first terminal of the pull-down circuit;

[0020] The second terminal of the pull-down circuit is connected to the first power supply terminal, wherein the voltage of the first power supply terminal is less than the voltage of the constant current power supply module.

[0021] The first switch and the pull-down circuit are configured to not be turned on at the same time and not be turned off at the same time.

[0022] The signal processing module provided in this embodiment includes a first switch and a pull-down circuit. The first switch and the pull-down circuit are configured to not be simultaneously turned on and off. When the first switch is on, the DC signal generates a high-level signal through the first switch. When the pull-down circuit is on, the DC signal generates a low-level signal through the pull-down circuit. By controlling the first switch and the pull-down circuit to not be simultaneously turned on and off, the DC signal can be converted into a square wave signal, which is an AC signal. Thus, the conversion of the DC signal is completed. This embodiment uses a simple circuit structure to convert a DC signal into an AC signal, which is simple in structure and reduces the testing cost for the functional area between the SOC and the output screen interface.

[0023] In some embodiments of this application, the pull-down circuit includes a second switch and a pull-down resistor;

[0024] The first end of the second switch is connected to the second end of the first switch, and the second end is connected to the first end of the pull-down circuit;

[0025] The second end of the pull-down resistor is connected to the first power supply terminal.

[0026] The pull-down circuit provided in this embodiment has a simple structure, which can reduce the complexity of the detection circuit and lower the detection cost for the functional area between the SOC and the output screen interface.

[0027] In some embodiments of this application, the circuit to be tested includes a capacitor, an upper transistor, and a lower transistor;

[0028] The first end of the capacitor is connected to the screen interface, and the second end is connected to the first end of the upper transistor and the second end of the lower transistor; the second end of the upper transistor is connected to the second power supply terminal, and the first end of the lower transistor is connected to the first power supply terminal; the voltage of the second power supply terminal is greater than the voltage of the first power supply terminal; the detection signal is an AC signal.

[0029] The switching module includes an upper tube with a switching module, a lower tube with a switching module, a first external line, and a second external line;

[0030] The first end of the upper tube with switch module and the first end of the lower tube with switch module are both connected to the output end of the signal processing module; the third end of the upper tube with switch module and the third end of the lower tube with switch module are both connected to the first power supply end.

[0031] The second end of the upper tube with switch module is connected to the screen interface; the first end of the first external line is connected to the second end of the upper tube; the first end of the second external line is connected to the first end of the lower tube.

[0032] The second end of the lower tube switch module is connected to the second end of the first external line and the second end of the second external line.

[0033] In some embodiments of this application, the upper tube with switch module is configured to receive the detection signal and input the detection signal to the screen interface; the first external line is configured to receive a first conduction signal from the second end of the upper tube and transmit the first conduction signal to the lower tube with switch module;

[0034] The lower tube with switch module is configured to receive the detection signal and input the detection signal to the second external line; the second external line is configured to input the detection signal to the first end of the lower tube; the upper tube with switch module is configured to receive a second conduction signal from the screen interface.

[0035] The switching module provided in this embodiment includes an upper transistor switching module, a lower transistor switching module, a first external line, and a second external line. The upper transistor switching module, the lower transistor switching module, and the first external line constitute a detection circuit for the upper transistor. The upper transistor switching module, the lower transistor switching module, and the second external line constitute a detection circuit for the lower transistor. The detection module determines the detection result of the circuit under test by sampling the voltage or current signal of the detection circuit. The switching module provided in this embodiment can realize the detection of both the upper and lower transistors with a simple structure, resulting in low detection cost and high efficiency. It reduces detection costs while improving the detection efficiency of the functional area between the SOC and the output screen interface.

[0036] In some embodiments of this application, the upper tube switch module includes: a first single-pole double-throw switch, a single-pole N-throw switch, and a first interface switch module; wherein, N is equal to the number of lines in the system-on-a-chip used to connect to the screen interface;

[0037] The lower tube with switch module includes: a second single-pole double-throw switch and a second interface switch module;

[0038] The first terminal of the first single-pole double-throw switch and the first terminal of the second single-pole double-throw switch are both connected to the output terminal of the signal processing module; the third terminal of the first single-pole double-throw switch and the third terminal of the second single-pole double-throw switch are both connected to the first power supply terminal.

[0039] The second end of the first single-pole double-throw switch is connected to the first end of the single-pole N-throw switch; the second end of the single-pole N-throw switch is connected to the first end of the first interface switch module; the second end of the first interface switch module is the second end of the upper tube switch module.

[0040] The second end of the second single-pole double-throw switch is connected to the first end of the second interface switch module; the second end of the second interface switch module is the second end of the lower tube switch module.

[0041] In some embodiments of this application, the detection module includes a rectifier filter module, an analog-to-digital converter module, and a processing module;

[0042] The input terminal of the rectifier and filter module acquires the signal from the detection point, and the output terminal is connected to the input terminal of the analog-to-digital converter module; wherein, the detection point is set on the connection line between the second terminal of the upper tube switch module and the screen terminal interface;

[0043] The output of the analog-to-digital converter module is connected to the input of the processing module;

[0044] The rectifier and filter module is configured to process the signal at the detection point into a signal with a fixed level.

[0045] The analog-to-digital converter module is configured to convert the fixed-level signal into a digital signal;

[0046] The processing module is configured to determine the detection result of the line to be tested based on the digital signal.

[0047] In some embodiments of this application, the constant current power supply module includes a step-down unit and a constant current processing unit;

[0048] The output terminal of the step-down unit is connected to the input terminal of the constant current processing unit, and the output terminal of the constant current processing unit is the output terminal of the constant current power supply module.

[0049] The step-down unit is configured to receive a reference voltage, step down the reference voltage, and then output a voltage.

[0050] The constant current processing unit is configured to process the voltage output by the buck unit into the DC signal.

[0051] In some embodiments of this application, the signal processing module and the switching module are controlled by the processing module. Attached Figure Description

[0052] To more clearly illustrate the implementation methods in the embodiments of this application or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0053] Figure 1 A schematic diagram of the partitioning of the system-on-a-chip provided in this application;

[0054] Figure 2 A schematic diagram of a detection circuit provided for an embodiment of this application;

[0055] Figure 3 A partial schematic diagram of the detection circuit provided for an embodiment of this application;

[0056] Figure 4 A partial schematic diagram of the detection circuit provided for an embodiment of this application;

[0057] Figure 5 A schematic diagram of control signals for a control signal processing module provided in an embodiment of this application;

[0058] Figure 6 A partial schematic diagram of the detection circuit provided for an embodiment of this application;

[0059] Figure 7 A partial schematic diagram of the detection circuit provided for an embodiment of this application;

[0060] Figure 8 A schematic diagram of a detection circuit provided for an embodiment of this application. Detailed Implementation

[0061] To make the objectives, implementation methods and advantages of this application clearer, the exemplary implementation methods of this application will be clearly and completely described below with reference to the accompanying drawings of the exemplary embodiments of this application. Obviously, the described exemplary embodiments are only some embodiments of this application, and not all embodiments.

[0062] It should be noted that the brief descriptions of terms in this application are only for the convenience of understanding the embodiments described below, and are not intended to limit the embodiments of this application. Unless otherwise stated, these terms should be understood in their ordinary and common meaning.

[0063] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover but not exclusively include, for example, a product or device that includes a series of components is not necessarily limited to those that are explicitly listed, but may include other components that are not explicitly listed or that are inherent to such product or device.

[0064] In the description of this application, it should be understood that the terms "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0065] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0066] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0067] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0068] First, let's explain the terms used in this application:

[0069] V-By-One: A digital interface standard specifically developed for image transmission.

[0070] HDMI: High Definition Multimedia Interface.

[0071] USB: Universal Serial Bus.

[0072] WIFI: Wireless network communication technology.

[0073] BT: Bit Torrent, is a communication protocol.

[0074] Please see Figure 1 A TV motherboard with a V-By-One interface can generally be divided into three functional areas: the area between the input interface and the SOC (System on Chip, or SOC for short) (area A in the figure), the SOC image processing area (area B in the figure), and the area between the SOC and the output screen interface (area C in the figure). To ensure the normal operation of the TV motherboard, it is necessary to test these three functional areas to ensure that they function correctly.

[0075] For the testing of area C, a graphical testing solution has been developed. Specifically, the video signal input from area A is processed by the SOC and output to the screen interface via area C. During testing, area C is connected to a High Definition Multimedia Interface (HDMI) converter, and the final HDMI signal is connected to the display screen. However, this graphical testing solution has drawbacks: it requires a large number of testing instruments, and sometimes the image signal is not recorded, resulting in high costs and inaccurate test results.

[0076] Based on this, this application provides a detection circuit, including a signal input module and a detection module. The signal input module inputs a detection signal to the circuit under test, and the detection module acquires the signal output by the circuit under test based on the detection signal, and determines the detection result of the circuit under test based on the output signal. Therefore, when detecting the functional area (C area) between the SOC and the output screen interface, patterned detection is not required; instead, patternless detection is performed based on the detection signal. This not only enables efficient detection of the C area but also reduces the cost of testing equipment and improves the accuracy of the detection results.

[0077] Please see Figure 2 This application provides a detection circuit 10, which is used to detect whether the circuit 20 to be tested can operate normally.

[0078] The circuit to be tested, 20, is located in the SOC (System-on-a-Chip) of the TV motherboard, specifically in the functional area between the SOC and the output screen interface (e.g., Figure 1 (as shown in area C).

[0079] The circuit 20 under test is used to connect to the screen interface of the TV motherboard. This screen interface can be a V-By-One screen interface.

[0080] There are typically multiple lines between the SOC and the V-By-One screen interface. When a line needs to be tested, it becomes the line to be tested 20. Testing the functional area between the SOC and the output screen interface can be done on all of these lines or on one or more of them. The testing circuit 10 is configured to test the line to be tested 20 to achieve testing of the functional area between the SOC and the output screen interface.

[0081] The detection circuit 10 includes a signal input module 11 and a detection module 12.

[0082] The output terminal of the signal input module 11 is connected to the first terminal of the line 20 to be tested. The input terminal of the detection module 12 is connected to the second terminal of the line 20 to be tested.

[0083] The signal input module 11 is configured to input a detection signal to the line under test 20. When the screen interface is a V-By-One screen interface, if the line under test 20 contains a capacitor 21, the detection signal must be an AC signal.

[0084] The detection module 12 is configured to acquire the signal output by the circuit under test 20 based on the detection signal, and to determine the detection result of the circuit under test 20 based on the output signal. After the detection signal passes through the circuit under test 20, the signal output by the circuit under test 20 can be used to measure the circuit under test 20. When the detection signal is an AC signal, if the amplitude of the output signal meets the conduction condition of the circuit under test 20, it proves that the circuit under test 20 can operate normally.

[0085] The detection circuit 10 provided in this embodiment includes a signal input module 11 and a detection module 12. The signal input module 11 inputs a detection signal to the line under test 20, and the detection module 12 acquires the signal output by the line under test 20 based on the detection signal, and determines the detection result of the line under test 20 based on the output signal. Therefore, when detecting the functional area (C area) between the SOC and the output screen interface, patterned detection is not required; instead, patternless detection is performed based on the detection signal. This not only enables efficient detection of the C area but also reduces the cost of detection tooling and improves the accuracy of the detection results.

[0086] Please see Figure 3 In some embodiments, the signal input module 11 includes a constant current power supply module 13, a signal processing module 14, and a switching module 15.

[0087] The output terminal of the constant current power supply module 13 is connected to the input terminal of the signal processing module 14. The output terminal of the signal processing module 14 is connected to the input terminal of the switch module 15. The switch module 15 is connected to the first terminal of the circuit under test 20. The detection module 12 is connected to the second terminal of the circuit under test 20.

[0088] The constant current power supply module 13 is configured to output a DC signal to the signal processing module 14. Specifically, it is configured to output a constant current DC signal to the signal processing module 14. This DC signal can be obtained by converting a reference voltage; that is, the input of the constant current power supply module 13 is a reference voltage, and the output is this DC signal.

[0089] The signal processing module 14 is configured to convert the DC signal into a detection signal and output the detection signal to the switch module 15. The detection signal can be an AC signal. The signal processing module 14 is configured to convert the DC signal into an AC signal. The signal processing module 14 may include an inverter bridge circuit, a control logic circuit, a filter circuit, etc., or may include a controllable switch; this embodiment is not limited to any particular type. When the signal processing module 14 includes a controllable switch, the switch is controlled to be turned on and off by the processing module, which can be a microcontroller unit (MCU).

[0090] The switch module 15 is configured to control the detection signal to enter the line under test 20. As described above, there are generally multiple lines between the SOC and the V-By-One screen interface. When a line needs to be detected, it becomes the line under test 20. The switch module 15 is configured to connect one of the lines, making that line the line under test 20, and control the detection signal to enter the line under test 20. In other words, by controlling the switch module 15, it is possible to control which line becomes the line under test 20. The switch module 15 can be controlled by a processing module, which can be an MCU.

[0091] After the detection signal enters the line under test 20, the line under test 20 responds to the detection signal and outputs a signal to the detection module 12. The detection module 12 then determines the detection result of the line under test 20 based on the signal output by the line under test 20.

[0092] Optionally, after testing one of the lines 20 to be tested, another line can be connected through the switch module 15, making that other line the line to be tested 20. This process can be repeated to achieve testing of multiple lines or each line in the functional area between the SOC and the output screen interface.

[0093] The detection circuit 10 provided in this embodiment includes a constant current power supply module 13, a signal processing module 14, and a switching module 15. The constant current power supply module 13 is configured to provide a DC signal, and the signal processing module 14 is configured to convert the DC signal into a detection signal. The switching module 15 is configured to control the detection signal to enter the line under test 20. After the detection signal enters the line under test 20, the line under test 20 responds to the detection signal and outputs a signal to the detection module 12. The detection module 12 determines the detection result of the line under test 20 based on the signal output by the line under test 20. Thus, patternless detection of the line under test 20 is achieved. Patternless detection not only enables efficient detection of area C, but also reduces the cost of detection tooling and improves the accuracy of the detection results.

[0094] Please see Figure 4 In some embodiments, the signal processing module 14 includes a first switch 100 and a pull-down circuit 200.

[0095] The first end of the first switch 100 is connected to the output end of the constant current power supply module 13, the second end is connected to the input end of the switch module 15, and the second end is also connected to the first end of the pull-down circuit 200.

[0096] The second terminal of the pull-down circuit 200 is connected to the first power supply terminal, wherein the voltage of the first power supply terminal is less than the voltage of the constant current power supply module 13. The first power supply terminal can be ground. The function of the pull-down circuit 200 is to connect to the first power supply terminal to generate a stable low-level signal. The pull-down circuit 200 may include a switch, a resistor, or a transistor, as long as it can generate a stable low-level signal; this embodiment does not impose any restrictions.

[0097] The first switch 100 and the pull-down circuit 200 are configured to not be turned on at the same time and not be turned off at the same time.

[0098] Optionally, the first switch 100 and the pull-down circuit 200 can be controlled by a processing module, such as an MCU, to not be simultaneously turned on and off. The MCU controls the first switch 100 via a CTL1 signal and the pull-down circuit 200 via a CTL2 signal. Figure 5 As shown, CTL1 and CTL2 are two signals with opposite polarities emitted by the MCU.

[0099] When the DC signal enters the signal processing module 14, the first switch 100 is first turned on via the CTL1 signal, and the pull-down circuit 200 is turned off (cut-off) via the CTL2 signal. After a certain period of time, the control signals of the first switch 100 and the pull-down circuit 200 are reversed; that is, the CTL1 signal is output at a low level to turn off the first switch 100, and the CTL2 signal is output at a high level to turn on the pull-down circuit 200. This process is repeated to form a stable square wave signal after entering the signal processing module 14. This square wave signal is an AC signal. Optionally, the certain period of time is preferably no more than 50 milliseconds (ms), which is calculated based on the frequency of the CTL1 signal and the frequency of the CTL2 signal being 100 kHz and the duty cycle being 50%.

[0100] Optionally, the frequencies of the CTL1 and CTL2 signals must be at least 100 kHz, with no special requirements for the duty cycle.

[0101] Optionally, the DC signal is 100μA. The amplitude range of the detection signal is 0 volts (V) to 3.3V.

[0102] The signal processing module 14 provided in this embodiment includes a first switch 100 and a pull-down circuit 200. The first switch 100 and the pull-down circuit 200 are configured not to be simultaneously turned on and off. When the first switch 100 is on, the DC signal generates a high-level signal through the first switch 100. When the pull-down circuit 200 is on, the DC signal generates a low-level signal through the pull-down circuit 200. By controlling the first switch 100 and the pull-down circuit 200 to not be simultaneously turned on and off, the DC signal can be converted into a square wave signal, which is an AC signal. Thus, the conversion of the DC signal is completed. This embodiment uses a simple circuit structure to convert a DC signal into an AC signal, which is simple in structure and reduces the testing cost for the functional area between the SOC and the output screen interface.

[0103] In some embodiments, please refer to Figure 6 The pull-down circuit 200 includes a second switch 210 and a pull-down resistor 220. The first terminal of the second switch 210 is connected to the second terminal of the first switch 100, and the second terminal is connected to the first terminal of the pull-down circuit 200. The second terminal of the pull-down resistor 220 is connected to the first power supply terminal. The first power supply terminal can be ground.

[0104] To obtain a better low-level signal, the pull-down resistor 220 can be 1 kΩ.

[0105] The MCU can control the second switch 210 to turn on and off via the CTL2 signal, and control the first switch 100 to turn on and off via the CTL1 signal. The pull-down circuit 200 is as follows: Figure 5 In the structure shown, the first switch 100 is normally closed, and the second switch 210 closes once at regular intervals. When the second switch 210 is closed, the DC signal generates a low-level signal; when the second switch 210 is closed, the DC signal generates a high-level signal. This process repeats, thereby generating a stable square wave signal after the signal processing module 14. This square wave signal is an AC signal.

[0106] It should be noted that the selection of the first switch 100 and the second switch 210 requires attention to the switch's on-resistance and leakage current during switching on and off, with the leakage current being as low as possible. Generally, the on-resistance should be within 10Ω and the leakage current within 2μA. In addition, the selection of the first switch 100 and the second switch 210 requires consideration of a certain switching and signal conduction bandwidth to ensure no attenuation; the conduction bandwidth should be at least greater than 1MHz.

[0107] The pull-down circuit 200 provided in this embodiment has a simple structure, which can reduce the complexity of the detection circuit 10 and reduce the detection cost of the functional area between the SOC and the output screen interface.

[0108] Please see Figure 7 In some embodiments, the circuit to be tested 20 includes a capacitor 21, an upper diode 22, and a lower diode 23.

[0109] The first terminal of capacitor 21 is connected to the screen interface, and the second terminal is connected to the first terminal of upper transistor 22 and the second terminal of lower transistor 23. The second terminal of upper transistor 22 is connected to a second power supply terminal, and the first terminal of lower transistor 23 is connected to a first power supply terminal. The voltage at the second power supply terminal is greater than the voltage at the first power supply terminal. The first power supply terminal can be ground. The first terminal of upper transistor 22 is positive, and the second terminal is negative. The first terminal of lower transistor 23 is positive, and the second terminal is negative.

[0110] The capacitor 21, the upper transistor 22, and the lower transistor 23 constitute the structure of the pin portion of the SOC, which is located in the functional area between the SOC and the output screen interface. The detection of the circuit under test 20 includes the detection of the upper transistor 22 and the lower transistor 23. The upper transistor 22 and the lower transistor 23 can only be detected through the capacitor 21 when the detection signal is an AC signal; therefore, in this embodiment, the detection signal must be an AC signal.

[0111] Correspondingly, the switch module 15 includes an upper tube switch module 300, a lower tube switch module 400, a first external line 500, and a second external line 600.

[0112] The first end of the upper tube with switch module 300 is connected to the output end of the signal processing module 14. The first end of the lower tube with switch module 400 is connected to the output end of the signal processing module 14.

[0113] The third terminal of the upper tube switch module 300 is connected to the first power supply terminal. The third terminal of the lower tube switch module 400 is also connected to the first power supply terminal. The first power supply terminal can be a ground terminal.

[0114] The second end of the upper tube with switch module 300 is connected to the screen interface.

[0115] The first end of the first external line 500 is connected to the second end of the upper electrode 22.

[0116] The first end of the second external line 600 is connected to the first end of the lower electrode 23.

[0117] The second end of the lower tube switch module 400 is connected to the second end of the first external line 500 and the second external line 600.

[0118] When testing the upper diode 22, the upper diode-connected switch module 300 is configured to receive the detection signal and input it to the screen interface. The first external line 500 is configured to receive a first conduction signal from the second end of the upper diode 22 and transmit it to the lower diode-connected switch module 400. The upper diode-connected switch module 300 and the lower diode-connected switch module 400 form a loop. That is, when testing the upper diode 22, the detection signal enters the screen interface through the upper diode-connected switch module 300, enters the capacitor 21 through the screen interface, and then outputs the first conduction signal after passing through the upper diode 22. The first conduction signal enters the lower diode-connected switch module 400 via the first external line 500. The third end of the lower diode-connected switch module 400 is connected to the first power supply terminal to discharge the first conduction signal.

[0119] When testing the lower diode 23, the lower diode-with-switch module 400 is configured to receive the detection signal and input it to the second external line 600. The second external line 600 is configured to input the detection signal to the first terminal of the lower diode 23. The upper diode-with-switch module 300 is configured to receive a second conduction signal from the screen interface. The upper diode-with-switch module 300 and the lower diode-with-switch module 400 form a loop. That is, when testing the lower diode 23, the detection signal passes through the lower diode-with-switch module 400 and then enters the second external line 600, then the lower diode 23, and is output as a second conduction signal through the second terminal of the lower diode 23. This second conduction signal is then output to the screen interface through the capacitor 21, and finally output to the upper diode-with-switch module 300 through the screen interface. The third terminal of the upper tube switch module 300 is connected to the first power supply terminal to discharge the second conduction signal.

[0120] The upper diode switching module 300 and the lower diode switching module 400 can be controlled by a processing module, such as an MCU. The processing module controls the detection signal to enter the upper diode switching module 300 to detect the upper diode 22 of the circuit under test 20. Similarly, the processing module controls the detection signal to enter the lower diode switching module 400 to detect the lower diode 23 of the circuit under test 20.

[0121] Optionally, the processing module can also control which line in the functional area between the SOC and the output screen interface is the line to be tested 20 by controlling the upper tube switch module 300 and the lower tube switch module 400.

[0122] The switch module 15 provided in this embodiment includes an upper transistor switch module 300, a lower transistor switch module 400, a first external line 500, and a second external line 600. The upper transistor switch module 300, the lower transistor switch module 400, and the first external line 500 constitute a detection circuit for the upper transistor 22. The upper transistor switch module 300, the lower transistor switch module 400, and the second external line 600 constitute a detection circuit for the lower transistor 23. The detection module 12 determines the detection result of the circuit 20 to be tested by sampling the voltage or current signal of the detection circuit. The switch module 15 provided in this embodiment can realize the detection of both the upper transistor 22 and the lower transistor 23 with a simple structure, resulting in low detection cost and high efficiency. It reduces detection costs while improving the detection efficiency for the functional area between the SOC and the output screen interface.

[0123] Please see Figure 8In some embodiments, the upper tube switch module 300 includes a first single-pole double-throw switch 310, a single-pole N-throw switch 320, and a first interface switch module 330. The lower tube switch module 400 includes a second single-pole double-throw switch 410 and a second interface switch module 420.

[0124] Where N equals the number of lines in the SOC used to connect to the screen interface. Assuming there are 16 lines in the SOC used to connect to the screen interface, then N = 16, and the single-pole N-throw switch 320 is a single-pole 16-throw switch.

[0125] The first terminal of the first single-pole double-throw switch 310 is connected to the output terminal of the signal processing module 14. The first terminal of the second single-pole double-throw switch 410 is connected to the output terminal of the signal processing module 14. The third terminal of the first single-pole double-throw switch 310 is connected to the first power supply terminal. The third terminal of the second single-pole double-throw switch 410 is connected to the first power supply terminal. The first power supply terminal may be ground.

[0126] The second terminal of the first single-pole double-throw switch 310 is connected to the first terminal of the single-pole N-throw switch 320. The second terminal of the single-pole N-throw switch 320 is connected to the first terminal of the first interface switch module 330. The second terminal of the first interface switch module 330 is the second terminal of the upper tube switch module 300. The second terminal of the second single-pole double-throw switch 410 is connected to the first terminal of the second interface switch module 420. The second terminal of the second interface switch module 420 is the second terminal of the lower tube switch module 400.

[0127] The first single-pole double-throw switch 310, the single-pole N-throw switch 320, the first interface switch module 330, the second single-pole double-throw switch 410, and the second interface switch module 420 are all controlled by the processing module. Specifically, the processing module can control the circuit to become the circuit to be tested 20 by controlling the single-pole N-throw switch 320. For example... Figure 8 As shown, the processing module can control the circuit corresponding to VB1 to be the line to be tested 20 by controlling the conduction of VB1 of the single-pole N-throw switch 320, and can control the circuit corresponding to VBN to be the line to be tested 20 by controlling the conduction of VBN of the single-pole N-throw switch 320. The processing module can control the conduction and disconnection of the detection circuit by controlling the first interface switch module 330 or the second interface switch module 420. Optionally, the first interface switch module 330 and the second interface switch module 420 can be single-pole double-throw switches.

[0128] When the first single-pole double-throw switch 310, the single-pole N-throw switch 320, and the first interface switch module 330 are all turned on, the upper tube switch module 300 is turned on. The upper tube switch module 300 is controlled to be turned on in two situations: first, when receiving the detection signal, and second, when receiving the first turn-on signal from the screen interface.

[0129] When both the second single-pole double-throw switch 410 and the second interface switch module 420 are turned on, the lower tube switch module 400 is turned on. The upper tube switch module 300 is controlled to turn on in two situations: first, when it receives the detection signal, and second, when it receives the second turn-on signal from the second external line 600.

[0130] The upper tube switch module 300 and the lower tube switch module 400 provided in this embodiment are both formed by switch combinations, which have a simple structure and can reduce the testing cost of functional areas between the SOC and the output screen interface.

[0131] Please also see Figure 8 In some embodiments, the detection module 12 includes a rectifier filter module 121, an analog-to-digital converter module 122, and a processing module 123.

[0132] The input terminal of the rectifier-filter module 121 acquires the signal from the detection point, which is located on the connection line between the second terminal of the upper tube switch module 300 and the screen interface. The detection point is as follows: Figure 8 The TP1 and TPN shown are as follows: TP1 is the detection point of the line corresponding to VB1 in the single-pole N-throw switch 320, and TPN is the detection point of the line corresponding to VBN in the single-pole N-throw switch 320.

[0133] The output of the rectifier-filter module 121 is connected to the input of the analog-to-digital converter module 122. The output of the analog-to-digital converter module 122 is connected to the input of the processing module 123.

[0134] The rectifier-filter module 121 is configured to process the signal at the detection point into a signal with a fixed level. It is understood that the signal at the detection point is a signal with fluctuating amplitude. To facilitate detection, the rectifier-filter module 121 is used to process the signal at the detection point into a signal with a fixed level. The specific structure of the rectified and filtered signal can be selected according to actual needs; this embodiment does not impose any limitations.

[0135] The analog-to-digital converter module 122 is configured to convert the fixed-level signal into a digital signal. The analog-to-digital converter module 122 may be an analog-to-digital converter.

[0136] The processing module 123 is configured to determine the detection result of the circuit under test 20 based on the digital signal. If the voltage amplitude determined by the digital signal meets the conduction condition of the circuit under test 20, it proves that the circuit under test 20 is operating normally. If the voltage amplitude determined by the digital signal does not meet the conduction condition of the circuit under test, it proves that the circuit under test 20 has failed. Optionally, the conduction condition of the circuit under test 20 is a voltage amplitude within a certain range of around 0.7V. The processing module 123 can be an MCU.

[0137] Optionally, the processing module 123 can also be connected to a display device to display the digital signal and the detection result. The display device can be a display screen, and the type of display screen can be selected according to actual needs; this embodiment does not limit the type.

[0138] Please also see Figure 8 In some embodiments, the constant current power supply module 13 includes a step-down unit 131 and a constant current processing unit 132.

[0139] The output terminal of the step-down unit 131 is connected to the input terminal of the constant current processing unit 132, and the output terminal of the constant current processing unit 132 is the output terminal of the constant current power supply module 13.

[0140] The step-down unit 131 is configured to receive a reference voltage, step down the reference voltage, and then output a voltage. The reference voltage is, for example, 12V, and the output voltage of the step-down unit 131 after processing the reference voltage can be 1.8V.

[0141] The constant current processing unit 132 is configured to process the voltage output by the buck unit 131 into a DC signal. For example, the constant current processing unit 132 processes a 1.8V voltage into a DC signal with a current value of 100μA.

[0142] The constant current processing unit 132 is used to output a stable DC signal.

[0143] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

[0144] For ease of explanation, the above description has been provided in conjunction with specific embodiments. However, the above exemplary discussion is not intended to be exhaustive or to limit the embodiments to the specific forms disclosed above. Various modifications and variations can be obtained based on the above teachings. The selection and description of the above embodiments are for the purpose of better explaining the principles and practical applications, thereby enabling those skilled in the art to better use the embodiments and various different variations of the embodiments suitable for specific application considerations.

Claims

1. A detection circuit, characterized in that, include: Signal input module and detection module; The output terminal of the signal input module is connected to the first terminal of the line to be tested, wherein the line to be tested is located in the system-on-a-chip of the TV motherboard and is used to connect to the screen interface of the TV motherboard. The input terminal of the detection module is connected to the second terminal of the circuit to be tested; The signal input module is configured to input a detection signal to the line under test; The detection module is configured to acquire the signal output by the line under test based on the detection signal, and to determine the detection result of the line under test based on the output signal.

2. The detection circuit according to claim 1, characterized in that, The signal input module includes: a constant current power supply module, a signal processing module, and a switching module; The output terminal of the constant current power supply module is connected to the input terminal of the signal processing module; the output terminal of the signal processing module is connected to the input terminal of the switching module; the switching module is connected to the first terminal of the circuit to be tested. The constant current power supply module is configured to output a DC signal to the signal processing module; The signal processing module is configured to convert the DC signal into a detection signal and output the detection signal to the switching module; The switch module is configured to control the detection signal to enter the circuit to be detected.

3. The detection circuit according to claim 2, characterized in that, The signal processing module includes a first switch and a pull-down circuit; The first terminal of the first switch is connected to the output terminal of the constant current power supply module, the second terminal is connected to the input terminal of the switch module, and the second terminal is also connected to the first terminal of the pull-down circuit; The second terminal of the pull-down circuit is connected to the first power supply terminal, wherein the voltage of the first power supply terminal is less than the voltage of the constant current power supply module. The first switch and the pull-down circuit are configured to not be turned on at the same time and not be turned off at the same time.

4. The detection circuit according to claim 3, characterized in that, The pull-down circuit includes a second switch and a pull-down resistor; The first end of the second switch is connected to the second end of the first switch, and the second end is connected to the first end of the pull-down circuit; The second end of the pull-down resistor is connected to the first power supply terminal.

5. The detection circuit according to any one of claims 2-4, characterized in that, The circuit under test includes a capacitor, an upper diode, and a lower diode; The first end of the capacitor is connected to the screen interface, and the second end is connected to the first end of the upper transistor and the second end of the lower transistor; the second end of the upper transistor is connected to the second power supply terminal, and the first end of the lower transistor is connected to the first power supply terminal; the voltage of the second power supply terminal is greater than the voltage of the first power supply terminal; the detection signal is an AC signal. The switching module includes an upper tube with a switching module, a lower tube with a switching module, a first external line, and a second external line; The first end of the upper tube with switch module and the first end of the lower tube with switch module are both connected to the output end of the signal processing module; the third end of the upper tube with switch module and the third end of the lower tube with switch module are both connected to the first power supply end. The second end of the upper tube with switch module is connected to the screen interface; the first end of the first external line is connected to the second end of the upper tube; the first end of the second external line is connected to the first end of the lower tube. The second end of the lower tube switch module is connected to the second end of the first external line and the second end of the second external line.

6. The detection circuit according to claim 5, characterized in that, The upper tube with switch module is configured to receive the detection signal and input the detection signal to the screen interface; the first external line is configured to receive a first conduction signal from the second end of the upper tube and transmit the first conduction signal to the lower tube with switch module. The lower tube with switch module is configured to receive the detection signal and input the detection signal to the second external line; The second external line is configured to input the detection signal to the first end of the lower diode; the upper diode with switch module is configured to receive a second conduction signal from the screen interface.

7. The detection circuit according to claim 5, characterized in that, The upper tube switch module includes: a first single-pole double-throw switch, a single-pole N-throw switch, and a first interface switch module; wherein, N is equal to the number of lines in the system-on-a-chip used to connect to the screen interface; The lower tube with switch module includes: a second single-pole double-throw switch and a second interface switch module; The first terminal of the first single-pole double-throw switch and the first terminal of the second single-pole double-throw switch are both connected to the output terminal of the signal processing module; the third terminal of the first single-pole double-throw switch and the third terminal of the second single-pole double-throw switch are both connected to the first power supply terminal. The second end of the first single-pole double-throw switch is connected to the first end of the single-pole N-throw switch; the second end of the single-pole N-throw switch is connected to the first end of the first interface switch module; the second end of the first interface switch module is the second end of the upper tube switch module. The second end of the second single-pole double-throw switch is connected to the first end of the second interface switch module; the second end of the second interface switch module is the second end of the lower tube switch module.

8. The detection circuit according to claim 5, characterized in that, The detection module includes a rectification and filtering module, an analog-to-digital conversion module, and a processing module; The input terminal of the rectifier and filter module acquires the signal from the detection point, and the output terminal is connected to the input terminal of the analog-to-digital converter module; wherein, the detection point is set on the connection line between the second terminal of the upper tube switch module and the screen terminal interface; The output of the analog-to-digital conversion module is connected to the input of the processing module; The rectifier and filter module is configured to process the signal at the detection point into a signal with a fixed level. The analog-to-digital converter module is configured to convert the fixed-level signal into a digital signal; The processing module is configured to determine the detection result of the line to be tested based on the digital signal.

9. The detection circuit according to any one of claims 2-4, characterized in that, The constant current power supply module includes a step-down unit and a constant current processing unit; The output terminal of the step-down unit is connected to the input terminal of the constant current processing unit, and the output terminal of the constant current processing unit is the output terminal of the constant current power supply module. The step-down unit is configured to receive a reference voltage, step down the reference voltage, and then output a voltage. The constant current processing unit is configured to process the voltage output by the buck unit into the DC signal.

10. The detection circuit according to any one of claims 2-4, characterized in that, The signal processing module and the switching module are controlled by the processing module.

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