Reference voltage circuit

Abstract

The present disclosure provides a reference voltage circuit, and relates to the technical field of semiconductor technology. The reference voltage circuit comprises a bandgap reference module and an operational amplifier module. The operational amplifier module is configured to make the bandgap reference module output an initial reference voltage based on negative feedback operation. The operational amplifier module is configured with a first group of chopping switches, and the bandgap reference module is configured with a second group of chopping switches. The first group of chopping switches has a first switching signal period, and the second group of chopping switches has a second switching signal period. One of the first switching signal period and the second switching signal period is in a nested relationship with the other, so that error signals generated by the bandgap reference module and the operational amplifier module are reversely superimposed. A low-pass filtering module is configured to perform low-pass filtering on the initial reference voltage. Through the technical scheme of the present disclosure, a reference voltage circuit meeting the reference voltage requirements of high-precision analog integrated circuits can be obtained.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and more particularly to a reference voltage circuit. Background Technology

[0002] A bandgap reference (BG) is a circuit that provides a stable voltage (or current) reference that is unaffected by temperature, power supply voltage, and process variations. It is a core module of analog integrated circuits. The accuracy of a bandgap reference is easily affected by error factors, including the input offset voltage of operational amplifiers. The error suppression effect of using a single chopper switch to suppress certain types of errors is limited and cannot meet the reference voltage requirements of high-precision analog circuits.

[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0004] The purpose of this disclosure is to provide a reference voltage circuit that, at least to some extent, overcomes the problem in related technologies where the scheme of using a single chopper switch to suppress a certain type of error is difficult to meet the reference voltage requirements of high-precision analog circuits.

[0005] Other features and advantages of this disclosure will become apparent from the following detailed description, or may be learned in part from practice of this disclosure.

[0006] According to one aspect of this disclosure, a reference voltage circuit is provided, comprising: a bandgap reference module and an operational amplifier module electrically connected, the operational amplifier module being configured to output an initial reference voltage based on negative feedback operation, the operational amplifier module being configured with a first set of chopper switches, the bandgap reference module being configured with a second set of chopper switches, the first set of chopper switches having a first switching signal period, the second set of chopper switches having a second switching signal period, one of the first switching signal period and the second switching signal period being nested with the other, so that error signals generated by the bandgap reference module and the operational amplifier module are inversely superimposed; and a low-pass filter module being configured to connect to the initial reference voltage and perform low-pass filtering on the initial reference voltage.

[0007] In one embodiment of this disclosure, the bandgap reference module and the operational amplifier module have a first connection point and a second connection point. The bandgap reference module includes: a first resistor and a second resistor connected in parallel, configured to output equivalent first current and second current from the first connection point and the second connection point based on the negative feedback operation of the operational amplifier module; a bipolar transistor assembly connected to the first connection point and the second connection point to receive the first current and the second current, and having a negative temperature drift signal and a positive temperature drift signal; and an adjustment component having a third connection point and a fourth connection point with the bipolar transistor assembly, configured to cancel out the decrease in the negative temperature drift signal and the increase in the positive temperature drift signal when the temperature changes, so that the bipolar transistor assembly outputs the initial reference voltage based on the canceled negative temperature drift signal and the positive temperature drift signal.

[0008] In one embodiment of this disclosure, the second set of chopper switches includes a first chopper switch, the second switch signal period includes a first sub-signal period of the first chopper switch, the input terminal of the first chopper switch is connected to the first resistor and the second resistor respectively, the output terminal of the first chopper switch is connected to the first connection point and the second connection point respectively, and the first sub-signal period is half of the first switch signal period.

[0009] In one embodiment of this disclosure, the chopping signal of the first chopper switch is at a first level, the first resistor is connected to the first connection point, and the second resistor is connected to the second connection point; or the chopping signal of the first chopper switch is at a second level, the first resistor is connected to the second connection point, and the second resistor is connected to the first connection point.

[0010] In one embodiment of this disclosure, the bipolar transistor assembly includes a first bipolar transistor, a second bipolar transistor, and a third bipolar transistor, wherein one of the first bipolar transistor and the third bipolar transistor is connected in parallel with the second bipolar transistor, and the other is connected to the common base of the second bipolar transistor, with the initial reference voltage connected at the common base terminal; the emitter area ratio of the first bipolar transistor to the third bipolar transistor is 1:1, and the emitter area ratio of the first bipolar transistor to the second bipolar transistor is 1:(M-1), where M is an integer greater than 1.

[0011] In one embodiment of this disclosure, the second set of chopper switches includes a second chopper switch and a third chopper switch. The second switch signal period includes a second sub-signal period of the second chopper switch and the third chopper switch. The input terminal of the second chopper switch is connected to the collector of the first bipolar transistor and the collector of the third bipolar transistor, respectively, and the output terminal of the second chopper switch is connected to the first connection point and the second connection point, respectively. The input terminal of the third chopper switch is connected to the emitter of the first bipolar transistor and the emitter of the third bipolar transistor, respectively, and the output terminal of the third chopper switch is connected to the third connection point and the fourth connection point, respectively. The second sub-signal period is twice the first switch signal period.

[0012] In one embodiment of this disclosure, the chopping signals of the second chopper switch and the third chopper switch are at a first level, the first bipolar transistor is connected to the first connection point and the third connection point, and the third bipolar transistor is connected to the second connection point and the fourth connection point; the chopping signals of the second chopper switch and the third chopper switch are at a second level, the first bipolar transistor is connected to the second connection point and the fourth connection point, and the third bipolar transistor is connected to the first connection point and the third connection point.

[0013] In one embodiment of this disclosure, one end of the adjustment component has the third connection point between it and the second bipolar transistor, and the other end of the adjustment component is grounded. The adjustment component includes a third resistor, a fourth resistor, and a fifth resistor connected in series, and the fourth connection point and the fifth connection point are respectively between the two connected resistors, wherein the resistance values ​​of the third resistor and the fourth resistor are the same.

[0014] In one embodiment of this disclosure, the second set of chopper switches includes a fourth chopper switch and a fifth chopper switch. The second switch signal period includes a third sub-signal period of the fourth chopper switch and the fifth chopper switch. The input terminals of the fourth chopper switch are respectively connected to the third connection point and the fourth connection point, and the output terminals of the fourth chopper switch are respectively connected to the first terminal of the third resistor and the first terminal of the fourth resistor. The input terminals of the fifth chopper switch are respectively connected to the fourth connection point and the fifth connection point, and the output terminals of the fifth chopper switch are respectively connected to the second terminal of the third resistor and the second terminal of the fourth resistor.

[0015] The period of the third sub-signal is four times the period of the first switching signal.

[0016] In one embodiment of this disclosure, the chopping signals of the fourth chopper switch and the fifth chopper switch are at a first level; the first terminal of the third resistor and the second bipolar transistor have a third connection point; the second terminal of the third resistor and the first terminal of the fourth resistor have a fourth connection point; and the second terminal of the fourth resistor and the fifth resistor have a fifth connection point. Alternatively, the chopping signals of the fourth chopper switch and the fifth chopper switch are at a second level; the first terminal of the fourth resistor and the second bipolar transistor have a third connection point; the second terminal of the fourth resistor and the first terminal of the third resistor have a fourth connection point; and the second terminal of the third resistor and the fifth resistor have a fifth connection point.

[0017] In one embodiment of this disclosure, the operational amplifier module includes: an operational amplifier; a first transistor, the gate of which is connected to the output terminal of the operational amplifier, the source of which is connected to the common base terminal; and a second transistor, the drain and gate of which are both connected to the drain of the first transistor, and the source of which is connected to the first resistor and the second resistor, respectively.

[0018] In one embodiment of this disclosure, the first set of chopper switches includes: a sixth chopper switch, the input terminals of which are respectively connected to the first connection point and the second connection point, and the output terminals of which are respectively connected to the first input terminal and the second input terminal of the operational amplifier; and a seventh chopper switch, the input terminals of which are respectively connected to the first differential output terminal and the second differential output terminal of the operational amplifier, and the output terminals of which are respectively connected to the output terminal and the positive bias voltage terminal of the operational amplifier.

[0019] The voltage conversion scheme provided by the embodiments of this disclosure, by configuring a first set of chopper switches in the operational amplifier module and a second set of chopper switches in the bandgap reference module, and adopting a periodically nested timing design, causes the error signals generated by different error sources to be superimposed in reverse as the chopper switches switch, forming a periodic fluctuation signal. In addition, a low-pass filter module is used to filter out this high-frequency fluctuation error. This can simultaneously reduce the adverse effects of at least two types of errors, including operational amplifier input offset voltage, resistor mismatch, and BJT characteristic mismatch. This is beneficial to improving the output accuracy and stability of the reference voltage. Moreover, the circuit structure is easy to integrate and can meet the requirements of high-precision analog integrated circuits for reference voltage.

[0020] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0021] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0022] Figure 1 A schematic diagram of a reference voltage circuit in the related art is shown;

[0023] Figure 2 A schematic block diagram of a reference voltage circuit according to an embodiment of the present disclosure is shown;

[0024] Figure 3 A schematic block diagram of another reference voltage circuit in an embodiment of this disclosure is shown;

[0025] Figure 4A A signal schematic diagram of a chopper switch according to an embodiment of the present disclosure is shown;

[0026] Figure 4B A schematic diagram of the structure of a chopper switch according to an embodiment of the present disclosure is shown;

[0027] Figure 5 A connection diagram of the first chopper switch in an embodiment of this disclosure is shown;

[0028] Figure 6 A schematic diagram of a reference voltage circuit according to an embodiment of this disclosure is shown;

[0029] Figure 7 A schematic diagram of another reference voltage circuit according to an embodiment of this disclosure is shown;

[0030] Figure 8 A schematic diagram of yet another reference voltage circuit according to an embodiment of this disclosure is shown;

[0031] Figure 9 This diagram illustrates a timing sequence of a nested chopper signal according to an embodiment of the present disclosure.

[0032] Figure 10 A schematic diagram of yet another reference voltage circuit according to an embodiment of this disclosure is shown;

[0033] Figure 11A A schematic diagram of an operational amplifier according to an embodiment of the present disclosure is shown;

[0034] Figure 11B A schematic diagram of one of the first group of chopper switches in an embodiment of this disclosure is shown;

[0035] Figure 11CA schematic diagram of another of the first group of chopper switches in an embodiment of this disclosure is shown;

[0036] Figure 12A A schematic diagram is shown of an operational amplifier receiving a low-level chopped signal in an embodiment of this disclosure;

[0037] Figure 12B This diagram illustrates an operational amplifier receiving a high-level chopped signal according to an embodiment of the present disclosure. Detailed Implementation

[0038] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0039] Furthermore, the accompanying drawings are merely illustrative of this disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0040] A bandgap reference (BG) is a circuit that provides a stable voltage (or current) reference unaffected by temperature, power supply voltage, and process variations. It is a core module in analog integrated circuits (such as DC-DC converters and analog-to-digital / digital-to-analog converters). However, in practical applications, the accuracy of a bandgap reference is susceptible to various error factors, including: the input offset voltage of the operational amplifier, which can disrupt the ideal distribution of current and voltage in the reference circuit, directly causing the output to deviate from the design value; the proportional error introduced by the process mismatch of the internal resistors (such as voltage divider resistors and load resistors) of the bandgap reference module, which can also affect the voltage division accuracy of the reference voltage; and the characteristic mismatch of bipolar junction transistors (BJTs), which can disrupt temperature drift complementarity, further reducing the stability of the reference output.

[0041] Figure 1This diagram illustrates a common bandgap reference source circuit in related technologies. By controlling the negative feedback of the operational amplifier BG_OP, PMOS current mirrors M1 and M2 are made to match the current in the R1-Q1 branch and the R2-Q2 branch. Utilizing the difference in emitter area between the multi-emitter transistor Q1 and the single-emitter transistor Q2 (with an area ratio of M:1), a positive temperature coefficient thermal voltage difference is generated. Combined with the negative temperature coefficient base-emitter voltage of Q2, the positive and negative temperature drifts are complementaryly canceled by adjusting the voltage divider of resistors R3 and R4, thereby outputting a stable reference voltage.

[0042] The main factors affecting the accuracy of this reference source circuit include: the matching degree of resistors R1 and R2; the offset of operational amplifier BG_OP; the matching degree of Q1 and Q2; and the matching degree of R3 and R4. Among these, the offset of the operational amplifier is usually the main factor affecting the accuracy of BG. To improve the accuracy of BG, BG_OP is usually chopping to significantly reduce the impact of BG_OP offset on the accuracy of BG. However, for applications requiring very high BG accuracy, this operation alone is insufficient to obtain a satisfactory BG.

[0043] Although a single chopper switch is used to suppress a certain type of error (such as suppressing only op-amp offset or single resistor mismatch), it is difficult to reduce the impact of at least two types of errors at the same time. Furthermore, the periodic design of a single chopper cannot achieve the reverse superposition and cancellation of multiple error sources, resulting in limited error suppression effect and difficulty in meeting the reference voltage requirements of high-precision analog circuits.

[0044] Therefore, there is an urgent need for a reference voltage circuit with better error suppression performance.

[0045] like Figure 2 As shown, a reference voltage circuit according to an embodiment of the present disclosure includes: an operational amplifier module 202, a bandgap reference module 204, and a low-pass filter module 206.

[0046] The operational amplifier module is connected to the bandgap reference module and is configured to output an initial reference voltage to the bandgap reference module based on negative feedback operation. The operational amplifier module is equipped with a first set of chopper switches, and the bandgap reference module is equipped with a second set of chopper switches. The first set of chopper switches has a first switching signal period, and the second set of chopper switches has a second switching signal period. One of the first switching signal period and the second switching signal period is nested with the other so that the error signals generated by the bandgap reference module and the operational amplifier module are superimposed in reverse.

[0047] In some embodiments, the operational amplifier module detects the voltage difference at a specified node in the bandgap reference module and outputs a feedback signal to adjust the current distribution of the bandgap reference module, so that the voltages of the two specified nodes tend to be equal, thereby forming a stable operating current and voltage relationship inside the bandgap reference module, so as to output an initial reference voltage with temperature drift complementary characteristics.

[0048] In some embodiments, a chopper switch refers to a high-speed switching switch controlled by a clock signal, which switches to different levels by controlling the signal to switch the connection relationship between the input and output terminals.

[0049] In some embodiments, the nesting relationship refers to the relationship between two signal periods being an integer multiple of each other, and one period being completely within the other period, i.e., one period completely contains the other period. This nesting setting enables the error signals generated by the bandgap reference module and the operational amplifier module to be superimposed in reverse.

[0050] In some embodiments, under the control of nested timing, the error signals generated by different error sources will exhibit reverse change characteristics as the chopper switch switches. After the reverse-changing error signals are superimposed on the initial reference voltage, they can form a comprehensive error signal that fluctuates periodically with the chopper clock cycle.

[0051] In some embodiments, the switching operation based on the first set of chopper switches can reduce the impact of the input offset voltage of the operational amplifier module, and the switching operation based on the second set of chopper switches can reduce the impact of at least one type of error, such as the resistance mismatch in the bandgap reference module or the characteristic mismatch of the bipolar transistor (BJT). Through the nested timing configuration of the two sets of chopper switches, the error signals generated by different error sources are superimposed in reverse in the time dimension to form a periodically fluctuating comprehensive error, which can prevent the error from accumulating and amplifying.

[0052] In some embodiments, a dynamic element matching (DEM) circuit may be used to replace part of the chopper switch, and error averaging may be achieved by periodically rotating the device connection relationship.

[0053] In some embodiments, a calibration circuit may be used to perform static calibration of resistor mismatch and / or BJT mismatch, in conjunction with the operational amplifier offset calibration module to reduce the impact of operational amplifier offset.

[0054] The low-pass filter module is configured to connect to the initial reference voltage and perform low-pass filtering on the initial reference voltage.

[0055] In some embodiments, since the target reference in the initial reference voltage has low-frequency characteristics, while the periodic error signal generated by nested chopping is a high-frequency fluctuation component, by setting a specific cutoff frequency in the low-pass filter module, the low-frequency target reference component is allowed to pass smoothly, while the high-frequency periodic error signal is attenuated and suppressed, thereby separating a reference voltage output with higher accuracy.

[0056] In some embodiments, an integrator can be used instead of a low-pass filter module to offset the cumulative effects of periodic errors through integration.

[0057] In some embodiments, a phase-locked loop (PLL) synchronous filter circuit may also be used to specifically filter out error signals based on the clock frequency of the chopper switch.

[0058] In this embodiment, by configuring a first set of chopper switches in the operational amplifier module and a second set of chopper switches in the bandgap reference module, and adopting a periodically nested timing design, the error signals generated by different error sources are superimposed in reverse as the chopper switches switch to form a periodic fluctuation signal. In addition, the low-pass filter module filters out this high-frequency fluctuation error, which can simultaneously reduce the adverse effects of at least two types of errors, such as operational amplifier input offset voltage, resistor mismatch, and BJT characteristic mismatch. This is beneficial to improving the output accuracy and stability of the reference voltage, and the circuit structure is easy to integrate, which can meet the requirements of high-precision analog integrated circuits for reference voltage.

[0059] like Figure 3 As shown, in one embodiment of this disclosure, a first connection point VA and a second connection point VB are provided between the bandgap reference module and the operational amplifier module 202. The bandgap reference module includes:

[0060] The first resistor R1 and the second resistor R2, which are set in parallel, are configured to operate based on the negative feedback of the operational amplifier module, and output equivalent first current and second current through the first connection point VA and the second connection point VB.

[0061] In some embodiments, the input terminals of the operational amplifier module 202 are connected to the first connection point VA and the second connection point VB, respectively. The voltages of the first connection point VA and the second connection point VB are compared in real time through a negative feedback mechanism. If VA is not equal to VB, the current source of the bandgap reference module is adjusted through the output signal of the operational amplifier module 202 to adjust the current distribution of the first resistor R1 and the second resistor R2 until the voltages of the first connection point VA and the second connection point VB are the same, so as to provide a stable bias current for subsequent circuits.

[0062] In some embodiments, corresponding chopper switches can be configured between the first resistor R1 and the second resistor R2 and the first connection point VA and the second connection point VB to periodically switch the connection relationship between one of the first resistor R1 and the second resistor R2 and one of the first connection point VA and the second connection point VB. Since there is a process mismatch between the first resistor R1 and the second resistor R2, when the switch is in different states, the corresponding reverse error can be converted into a periodically fluctuating signal. This fluctuation can be filtered out by low-pass filtering, thereby reducing the impact of resistor mismatch.

[0063] The bipolar transistor assembly 2042 is connected to a first connection point and a second connection point to receive a first current and a second current, and has a negative temperature drift signal and a positive temperature drift signal.

[0064] In some embodiments, the negative temperature drift signal refers to the base-emitter voltage of a bipolar transistor. When the temperature rises Linearly decreasing, positive temperature drift signal refers to the difference between bipolar transistors with different emitter areas. Difference, i.e., Δ It increases with increasing temperature.

[0065] The regulating component 2044, having a third connection point VE0 and a fourth connection point VE1 between itself and the bipolar transistor component, is configured to cancel out the decreasing effect of the negative temperature drift signal and the increasing effect of the positive temperature drift signal when the temperature changes, so that the bipolar transistor component outputs an initial reference voltage based on the negative and positive temperature drift signals with the effect canceled out.

[0066] In some embodiments, the regulating component can be a resistor divider network, which adjusts the resistance ratio to control the positive temperature drift signal Δ. Perform partial compression and amplification to superimpose the signal onto the negative temperature drift signal at a specified ratio. Above, the increase in the positive temperature drift signal is made numerically equal to the decrease in the negative temperature drift signal. When the temperature changes, The decrease and △ The increases can offset each other.

[0067] In this embodiment, the branch currents corresponding to the first resistor R1 and the second resistor R2 are stably matched through operational amplifier negative feedback. The positive and negative temperature drift signals of the bipolar transistor component are combined with the temperature drift of the adjustment component to cancel each other out, so as to ensure the stability of the reference voltage. Furthermore, at least one of the first resistor R1, the second resistor R2, the bipolar transistor, and the adjustment component is configured with a chopper switch to convert the resistor mismatch and / or BJT mismatch into periodic fluctuation error. Combined with low-pass filtering, the influence of fluctuation error can be effectively reduced, and the final output has a reference voltage with low temperature drift and resistance to process deviation.

[0068] In one embodiment of this disclosure, the second set of chopper switches includes a first chopper switch, the second switch signal period includes a first sub-signal period of the first chopper switch, the input terminals of the first chopper switch are respectively connected to a first resistor and a second resistor, the output terminals of the first chopper switch are respectively connected to a first connection point and a second connection point, and the first sub-signal period is half of the first switch signal period.

[0069] As shown in Figure 4, according to an embodiment of the present disclosure, a chopper switch generates complementary control signals CHOPB and CHOPA by passing the CHOP signal through two stages of inverters. If CHOP=1, then CHOPA=1 and CHOPB=0. IN1 is connected to OUT1 through the switch controlled by CHOPB, and IN2 is connected to OUT2 through the switch controlled by CHOPA. If CHOP=0, then CHOPA=0 and CHOPB=1. IN1 is connected to OUT2 through the switch controlled by CHOPA, and IN2 is connected to OUT1 through the switch controlled by CHOPB, thus allowing the input and output to be interchanged.

[0070] In some embodiments, the first switching signal period is the operating period of the first set of chopper switches of the operational amplifier module, and the first sub-signal period is the operating period of the first chopper switch. The first chopper switch is used to control the connection point of the first resistor R1 and the second resistor R2 with the operational amplifier module. The first sub-signal period is configured to be half of the first switching signal period, so that the first chopper switch completes two switching within one cycle of operational amplifier chopping. This makes the reverse frequency of the resistor mismatch error twice the reverse frequency of the operational amplifier offset error. This not only prevents the switching actions of the two sets of chopper switches from conflicting, but also allows the resistor mismatch error and the operational amplifier offset error to be fully superimposed in the time dimension, forming a high-frequency periodic comprehensive error.

[0071] In some embodiments, the ratio between the first sub-signal period and the first switching signal period can be set to 1:4 or 1:3, etc.

[0072] In this embodiment, by designing the first sub-signal period of the first chopper switch to be half of the first switching signal period, the nested coordination of switching chopper of the first resistor R1 and the second resistor R2 and operational amplifier chopper is achieved. This ensures high-frequency separation and superposition of the two types of error signals, and eliminates the need for complex clock divider circuits. This simplifies timing design and prevents additional performance loss.

[0073] In one embodiment of this disclosure, the chopping signal of the first chopper switch is at a first level, the first resistor is connected to the first connection point, and the second resistor is connected to the second connection point; or the chopping signal of the first chopper switch is at a second level, the first resistor is connected to the second connection point, and the second resistor is connected to the first connection point.

[0074] like Figure 5As shown, in some embodiments, the chopping signal corresponding to the first chopper switch, i.e. the first sub-signal, is CHOP1. If the chopping signal CHOP1 is at the first level (e.g., high level), the internal channel of the first chopper switch can be forward-conducting, i.e., the first resistor R1 is connected to the first connection point VA and the second resistor R2 is connected to the second connection point VB. At this time, the process mismatch between the first resistor R1 and the second resistor R2 will introduce a positive error. If the chopping signal CHOP1 is switched to the second level (e.g., low level), the internal channel of the first chopper switch is cross-conducting, i.e., the first resistor R1 is connected to the second connection point VB and the second resistor R2 is connected to the first connection point VA. At this time, the mismatch direction between the first resistor R1 and the second resistor R2 is reversed, introducing a reverse error. Through the periodic alternation of the dual-level signal, the resistor mismatch error in the output exhibits periodic reverse fluctuations, rather than a fixed deviation.

[0075] In this embodiment, by using the cross-switching design of the first chopper switch at different levels, the process mismatch error between the first resistor and the second resistor is converted into a periodic reverse fluctuation signal to replace the fixed mismatch deviation. The frequency of this fluctuation signal is determined based on the period of the first sub-signal and can be matched with the cutoff frequency of the subsequent low-pass filter module to effectively filter out the resistor mismatch error, while not affecting the temperature drift complementary characteristics of the reference voltage.

[0076] like Figure 6 As shown, in one embodiment of this disclosure, the operational amplifier module includes: an operational amplifier BG_OP; a first transistor MN1, the gate of which is connected to the output terminal of the operational amplifier, the source of which is connected to the common base terminal; a second transistor MN2, the drain and gate of which are both connected to the drain of the first transistor MN1, and the source of which is connected to a first resistor R1 and a second resistor R2.

[0077] like Figure 6 As shown, the bipolar transistor assembly includes a first bipolar transistor Q12, a second bipolar transistor Q11, and a third bipolar transistor Q2. One of the first bipolar transistor Q12 and the third bipolar transistor Q2 is connected in parallel with the second bipolar transistor Q11, and the other is connected to the common base of the second bipolar transistor Q11, with an initial reference voltage connected at the common base terminal. The emitter area ratio of the first bipolar transistor Q12 to the third bipolar transistor Q2 is 1:1, and the emitter area ratio of the first bipolar transistor Q12 to the second bipolar transistor Q11 is 1:(M-1), where M is an integer greater than 1.

[0078] In some embodiments, if the chopper signal CHOP1 is at a first level (e.g., high level), the connection method of the first resistor R1 and the second resistor R2 is as follows: Figure 6As shown, if the chopper signal CHOP1 switches to the second level, the connection method of the first resistor R1 and the second resistor R2 is as follows. Figure 7 As shown.

[0079] In some embodiments, no chopping operation is performed, such as Figure 6 As shown, the emitter, base, and collector of the first bipolar transistor Q12 and the second bipolar transistor Q11 are connected together, as shown in the figure. Figure 6 As shown, the collectors of all transistors are connected to the VB node, while the collector of the third bipolar transistor Q2 is connected to the VA node. The emitter area ratio of the first bipolar transistor Q12 to the third bipolar transistor Q2 is 1:1. A chopping operation is performed, that is, the connection relationship between the first bipolar transistor Q12 and the third bipolar transistor Q2 is periodically switched by a chopper switch, switching to a configuration where the emitter, base, and collector of the third bipolar transistor Q2 are connected to the second bipolar transistor Q11, respectively. Figure 7 As shown, the characteristic mismatch error of the first bipolar transistor Q12 and the third bipolar transistor Q2 is reversed.

[0080] In addition, by configuring a first bipolar transistor Q12 with the same area as the third bipolar transistor Q2, and connecting the first bipolar transistor Q12 and the second bipolar transistor Q11 in parallel, the whole is equivalent to a transistor with an emitter area of ​​M, retaining the function of generating a positive temperature drift signal with an area ratio of M:1, providing a pairable switching device for the chopper switch, thereby realizing the dynamic cancellation of BJT mismatch error.

[0081] In this embodiment, by configuring the first bipolar transistor Q12 and the second bipolar transistor Q11 in parallel, and the first bipolar transistor Q12 and the third bipolar transistor Q2 having the same emitter area, regardless of whether the original first bipolar transistor Q12 and the second bipolar transistor Q11 are connected in parallel, or the third bipolar transistor Q2 and the second bipolar transistor Q11 are connected in parallel after switching, an emitter area ratio of M:1 can be achieved to generate a positive temperature drift signal. Furthermore, by matching and switching the chopper switch, the characteristic mismatch error of the first bipolar transistor Q12 and the third bipolar transistor Q2 is reversed with the chopper periodicity. This achieves both dynamic cancellation of BJT mismatch error and maintenance of temperature drift complementary reference voltage generation, effectively improving the reference voltage's resistance to process deviations.

[0082] In one embodiment of this disclosure, the second set of chopper switches includes a second chopper switch and a third chopper switch. The second switch signal period includes a second sub-signal period of the second chopper switch and the third chopper switch. The input terminal of the second chopper switch is connected to the collector of the first bipolar transistor Q12 and the collector of the third bipolar transistor Q2, respectively, and the output terminal of the second chopper switch is connected to the first connection point and the second connection point, respectively. The input terminal of the third chopper switch is connected to the emitter of the first bipolar transistor Q12 and the emitter of the third bipolar transistor Q2, respectively, and the output terminal of the third chopper switch is connected to the third connection point and the fourth connection point, respectively. The second sub-signal period is twice the first switch signal period.

[0083] In some embodiments, the input terminal of the second chopper switch is connected to the collector of the first bipolar transistor Q12 and the collector of the third bipolar transistor Q2, and the output terminal is connected to the first connection point and the second connection point. It can act on the bipolar transistor node of the reference voltage base bias path. When there is a characteristic mismatch in the transistor, the periodic switching of the chopper switch will reverse the mismatch error. The input terminal of the third chopper switch is connected to the emitter of the first bipolar transistor Q12 and the emitter of the third bipolar transistor Q2, and the output terminal is connected to the third connection point and the fourth connection point. It acts on the bipolar transistor node of the temperature drift signal adjustment path to convert the mismatch error of the transistor in this path into a periodic fluctuation signal.

[0084] In some embodiments, setting the period of the second sub-signal to twice the period of the first switching signal is to construct a stable nested timing relationship, which can prevent the switching actions of the two sets of chopper switches from interfering with each other, and also allows the fluctuation frequency of the mismatch error of the bipolar transistor and the offset error of the operational amplifier module to complement each other, ensuring that both types of error signals can be effectively processed by the subsequent filtering stage.

[0085] In this embodiment, by deploying chopper switches on the collector paths and emitter paths of the first bipolar transistor Q12 and the third bipolar transistor Q2 respectively, the two processing paths for the reference voltage generation can be covered. Combined with the nested timing design where the second sub-signal period is twice the first switch signal period, switching conflicts can be prevented and frequency adaptation of the error signal can be guaranteed. The combined effects of operational amplifier offset and BJT mismatch can be filtered out synchronously through low-pass filtering, thereby maintaining the current matching accuracy of the first resistor branch and the second resistor branch, and ensuring the compression and amplification effect of the adjustment component on the temperature drift signal.

[0086] In one embodiment of this disclosure, the chopping signals of the second chopper switch and the third chopper switch are at a first level, the first bipolar transistor Q12 is connected to the first connection point and the third connection point, and the third bipolar transistor Q2 is connected to the second connection point and the fourth connection point; the chopping signals of the second chopper switch and the third chopper switch are at a second level, the first bipolar transistor Q12 is connected to the second connection point and the fourth connection point, and the third bipolar transistor Q2 is connected to the first connection point and the third connection point.

[0087] In some embodiments, when the chopping signal is at the first level, the path between the collector of the first bipolar transistor Q12 and the first connection point of the second chopping switch, the path between the collector of the third bipolar transistor Q2 and the second connection point, the path between the emitter of the first bipolar transistor Q12 and the third connection point of the third chopping switch, and the path between the emitter of the third bipolar transistor Q2 and the fourth connection point are all connected. The characteristic mismatch between the first bipolar transistor Q12 and the third bipolar transistor Q2 introduces a positive error in the VA-VB current branch and the VE0-VE1 voltage divider branch. When the signal is switched to the second level, the internal paths of the two switches are synchronously reversed, and the mismatch error is reversed to a negative error. Through the periodic high and low level switching of the chopping signal, the fixed mismatch error is converted into a high-frequency alternating fluctuation signal, thereby realizing the chopping function.

[0088] In some embodiments, the chopping signal of the second chopper switch and the third chopper switch is CHOP3. If CHOP3 is at a first level (e.g., high level), the connection method of the first bipolar transistor Q12 and the third bipolar transistor Q2 is as follows: Figure 6 As shown, if the chopper signal CHOP3 switches to the second level, the connection method of the first bipolar transistor Q12 and the third bipolar transistor Q2 is as follows. Figure 8 As shown.

[0089] In this embodiment, by setting chopper switches on the collector and emitter sides of the bipolar transistor respectively, and the chopper switches can be synchronously controlled by the same signal, the mismatch error of the VA-VB current branch and the VE0-VE1 voltage divider branch is synchronously reversed, which is beneficial to improving the error cancellation effect. Furthermore, the cross-switching method can ensure the stability of the voltage division ratio during the temperature drift signal adjustment process, thereby improving the output accuracy of the reference voltage and the reliability of temperature drift suppression.

[0090] In one embodiment of this disclosure, the adjustment component includes a third resistor R3, a fourth resistor R41, and a fifth resistor R42 connected in series. In one connection configuration, a third connection point is formed between the first end of the third resistor and the second bipolar transistor Q11, a fourth connection point is formed between the second end of the third resistor and the first end of the fourth resistor, and a fifth connection point is formed between the second end of the fourth resistor and the fifth resistor. In another connection configuration, the connection positions of the third resistor and the fourth resistor can be interchanged, wherein the resistance values ​​of the third resistor and the fourth resistor are the same.

[0091] In some embodiments, the adjustment component is a resistor divider network, and the resistance values ​​of the third resistor R3 and the fourth resistor R41 are connected to the bipolar transistor component through the third connection point VE0 and the fourth connection point VE1. This enables the positive temperature drift signal to be compressed and amplified, so that the temperature change amplitude of the scaled positive temperature drift signal is equal in magnitude and opposite in direction to the temperature change amplitude of the negative temperature drift signal. This ensures that when the temperature changes, the decrease in the negative temperature drift signal cancels out the increase in the positive temperature drift signal, thereby suppressing the temperature drift of the initial reference voltage VBG.

[0092] In this embodiment, based on the series resistor voltage divider network consisting of the third resistor R3, the fourth resistor R41, and the fifth resistor R42, and combined with the equal resistance design of the third resistor R3 and the fourth resistor R41, the positive temperature drift signal is compressed and amplified. By adapting the third connection point VE0 and the fourth connection point to the bipolar transistor component, the scaled positive temperature drift signal and the negative temperature drift signal form complementary temperature characteristics with equal amplitude and opposite direction, which can specifically cancel the temperature drift of the initial reference voltage VBG. At the same time, the series resistor voltage divider network has a simple structure and the resistance matching is easy to achieve, so the stability and consistency of temperature drift suppression can be guaranteed without complex calibration modules.

[0093] In one embodiment of this disclosure, the second set of chopper switches includes a fourth chopper switch and a fifth chopper switch. The second switch signal period includes a third sub-signal period of the fourth chopper switch and the fifth chopper switch. The input terminal of the fourth chopper switch is connected to the third connection point and the fourth connection point, respectively, and the output terminal of the fourth chopper switch is connected to the first terminal of the third resistor and the first terminal of the fourth resistor, respectively. The input terminal of the fifth chopper switch is connected to the fourth connection point and the fifth connection point, respectively, and the output terminal of the fifth chopper switch is connected to the second terminal of the third resistor and the second terminal of the fourth resistor, respectively. The third sub-signal period is four times the first switch signal period.

[0094] In some embodiments, the chopping signal of the fourth and fifth chopper switches is CHOP4. If CHOP4 is at the first level (e.g., high level), the connection method of the third resistor R3 and the fourth resistor R41 is as follows: Figure 6As shown, if the chopper signal CHOP4 switches to the second level, the connection method of the third resistor R3 and the fourth resistor R41 is as follows. Figure 8 As shown.

[0095] In some embodiments, by setting a fourth chopper switch and a fifth chopper switch, the input terminal of the fourth chopper switch is connected to the third connection point and the fourth connection point, and the output terminal is connected to the first terminal of the third resistor and the first terminal of the fourth resistor. Based on the chopping operation, the path mismatch between the third resistor R3, the fourth resistor R41 and the emitter of the transistor can be canceled. The input terminal of the fifth chopper switch is connected to the fourth connection point VE1 and the fifth connection point VE2, and the output terminal is connected to the second terminal of the third resistor R3 and the second terminal of the fourth resistor R41. This is used to cancel the internal resistance characteristic mismatch and node contact mismatch of the voltage divider network, so as to prevent the two types of mismatch from interfering with the voltage division accuracy of the positive temperature drift signal.

[0096] In some embodiments, setting the third sub-signal period to four times the first switching signal period can construct a 1:4 nested timing sequence. The first switching signal period corresponds to operational amplifier chopping, and the third sub-signal period adapts to the mismatch error characteristics of the resistor and transistor paths. This helps to suppress the mismatch error between the resistor divider network and the bipolar transistor component connection node. It can prevent conflicts with the chopping action of the previous stage and make the fluctuation frequencies of resistor mismatch error, transistor mismatch error and operational amplifier offset error hierarchically distinguished, so that different types of errors can be accurately filtered out by the subsequent filtering stage.

[0097] In this embodiment, the deployment of the fourth and fifth chopper switches can specifically suppress mismatch errors in the connection path between the resistor divider network and the transistor components, as well as within the divider network itself. Combined with a nested timing design where the third sub-signal period is four times the period of the first switch signal, layered filtering of multiple types of errors is achieved. This ensures the accuracy of the positive temperature drift signal compression and amplification, while also enhancing the complementary cancellation effect of the positive and negative temperature drift signals. Furthermore, without the need for complex calibration or compensation modules, this simplifies the circuit design and further reduces the temperature drift coefficient and output error of the reference voltage, improving the circuit's resistance to interference from process deviations and environmental fluctuations.

[0098] In one embodiment of this disclosure, the chopping signals of the fourth and fifth chopper switches are at a first level, the third resistor is connected to a third connection point, a fourth connection point is formed between the second end of the third resistor and the first end of the fourth resistor, and a fifth connection point is formed between the second end of the fourth resistor and the fifth resistor; the chopping signals of the fourth and fifth chopper switches are at a second level, the fourth resistor is connected to the third connection point, a fourth connection point is formed between the second end of the fourth resistor and the first end of the third resistor, and a fifth connection point is formed between the second end of the third resistor and the fifth resistor.

[0099] like Figure 9 As shown, in some embodiments, the chopping signal period of the first chopper switch, i.e., the first sub-signal period, is T, which is the chopping signal with the highest frequency; the chopping signal period of the first group of chopper switches is 2T, i.e., the first switching signal period, which serves as the reference timing; the chopping signal periods of the second and third chopper switches, i.e., the second sub-signal periods, are 4T; and the chopping signal periods of the fourth and fifth chopper switches, i.e., the third sub-signal periods, are 8T. The four groups of chopping signals are nested in a hierarchical relationship of T-2T-4T-8T, which prevents switching action conflicts.

[0100] like Figure 10 As shown, in some embodiments, the input terminal of the first chopper switch 1002 is connected to the first resistor R1 and the second resistor R2, and the output terminal is connected to the first connection point VA and the second connection point VB. The input terminals (IN1 and IN2) of the second chopper switch 1004 are connected to the collector VCQB of the first bipolar transistor Q12 and the collector VCQA of the third bipolar transistor Q2, and the output terminals (OUT1 and OUT2) are connected to the first connection point VA and the second connection point VB. The input terminals (IN1 and IN2) of the third chopper switch 1006 are connected to the first bipolar transistor. The emitter of transistor Q12 is connected to the emitter of the third bipolar transistor Q2. The output terminals (OUT1 and OUT2) are connected to the third connection point VE0 and the fourth connection point VE1. The input terminal of the fourth chopper switch 1008 is connected to the third connection point VE0 and the fourth connection point VE1. The output terminal is connected to one end A1 of the third resistor R3 and one end A3 of the fourth resistor R41. The input terminal of the fifth chopper switch 1010 is connected to the fourth connection point VE1 and the fifth connection point VE2. The output terminal is connected to the other end A2 of the third resistor R3 and the other end A4 of the fourth resistor R41.

[0101] When the chopping signal is at the first level, the first resistor R1 is connected to the first connection point VA, and the second resistor R2 is connected to the second connection point VB. The resistance mismatch between the first resistor R1 and the second resistor R2 introduces a positive error. The collector of the first bipolar transistor Q12 is connected to the first connection point VA, and the emitter is connected to the third connection point VE0. The collector of the third bipolar transistor Q2 is connected to the second connection point VB, and the emitter is connected to the fourth connection point VE1. The characteristic mismatch of the BJT introduces a positive error. The third resistor R3 is located between the third connection point VE0 and the fourth connection point VE1, and the fourth resistor R41 is located between the third resistor R3 and the fifth resistor R42. The resistance mismatch introduces a positive error.

[0102] When the signal switches to the second level, the first resistor R1 is connected to the second connection point VB, and the second resistor R2 is connected to the first connection point VA, with the mismatch error reversed; the collector of the first bipolar transistor Q12 is connected to the second connection point VB, and the emitter is connected to the fourth connection point VE1; the collector of the third bipolar transistor Q2 is connected to the first connection point VA and the third connection point VE0, with the mismatch error reversed; the fourth resistor R41 is located between the third connection point VE0 and the fourth connection point VE1, and the third resistor R3 is located between the fourth resistor R41 and the fifth resistor R42, with the mismatch error reversed.

[0103] The periodic switching converts the resistance mismatch of R1 and R2 into a high-frequency fluctuation signal, which cancels the interference on the VA=VB current matching. This converts the mismatch of the BJT in the current branch (VA and VB) and the temperature drift adjustment branch (VE0 and VE1) into fluctuation signals, and also cancels the interference of the resistance mismatch of R3 and R41 on the voltage division of the positive temperature drift signal, thus ensuring the amplitude matching between the positive and negative temperature drift signals.

[0104] In this embodiment, by configuring the first sub-signal period, the second sub-signal period, and the third sub-signal period to be nested with the op-amp chopping period, i.e. the first switching signal period, it is possible to prevent switching conflicts between multiple sets of chopping switches and to stratify the frequency fluctuations caused by resistor mismatch, BJT mismatch, and op-amp offset. Finally, the fluctuation error is synchronously filtered out by the low-pass filter module, thereby achieving a high-precision voltage output from the bandgap reference module.

[0105] Figure 11A The internal structure of the operational amplifier BG_OP is shown. M1 and M2 are differential input transistors used to receive the differential inputs of VIP1 and VIN1. M3 and M4 are common gate transistors used to improve the output impedance and gain of the op-amp. VBN and VBP are bias voltages that provide stable operating current for M1 to M4 to ensure the amplification performance of the op-amp.

[0106] Where chop2=1, Von is connected to VBP and Vop is connected to Vout; chop2=0, Von is connected to Vout and Vop is connected to VBP.

[0107] In some embodiments, the first transistor serves as a feedback transistor, with its gate connected to the output terminal of the operational amplifier and its source connected to the common base terminal of the bipolar transistor, i.e., the VBG node. The second transistor and the first transistor form a current mirror, with the source of the second transistor connected to the common terminal of the first resistor R1 and the second resistor R2. This enables the operational amplifier output to perform negative feedback control on the current passing through the first resistor R1 and the second resistor R2, ensuring current matching of VA=VB.

[0108] In one embodiment of this disclosure, the first set of chopper switches includes: a sixth chopper switch, the input terminals of which are respectively connected to the first connection point and the second connection point, and the output terminals of which are respectively connected to the first input terminal and the second input terminal of the operational amplifier; and a seventh chopper switch, the input terminals of which are respectively connected to the first differential output terminal Von and the second differential output terminal Vop of the operational amplifier, and the output terminals of which are respectively connected to the output terminal Vout and the positive bias voltage terminal VBP of the operational amplifier.

[0109] like Figure 11B The sixth chopper switch shown is located at the input of the operational amplifier BG_OP. The input terminals (IN1, IN2) of the sixth chopper switch are connected to external differential signals, corresponding to the first connection point VA and the second connection point VB. The output terminals (OUT1, OUT2) are connected to the gates of the two input stages of BG_OP, namely M1 and M2, and are controlled by the first switch signal chop2.

[0110] Where chop2=1, VIP is connected to VIP1 and VIN is connected to VIN1; where chop2=0, VIP is connected to VIN1 and VIN is connected to VIP1.

[0111] like Figure 11C The seventh chopper switch shown is located at the output of the operational amplifier BG_OP. The input terminals (IN1, IN2) of the seventh chopper switch are connected to the output signals of BG_OP, namely the differential outputs Von and Vop of the operational amplifier. The output terminals (OUT1, OUT2) are connected to the subsequent circuits, corresponding to VBP and Vout, and are synchronously controlled with the chop2 signal shared with the input chopper.

[0112] In some embodiments, such as Figure 12A As shown, chop2=0, VIP is connected to the gate of M1, and VIN is connected to the gate of M2. The operational amplifier BG_OP works in the forward path. If there is a characteristic mismatch between M1 and M2, a fixed forward offset error will be introduced, resulting in a deviation in the op-amp output Vout.

[0113] In some embodiments, such as Figure 12B As shown, chop2=1. After chopping, VIP is connected to the gate of M2 and VIN is connected to the gate of M1. The input path of the operational amplifier BG_OP is reversed, and the direction of the mismatch effect between M1 and M2 is also reversed, making the positive offset error into the negative offset error.

[0114] In some embodiments, the input terminal of the sixth chopper switch is connected to the first connection point and the second connection point, and the output terminal is connected to the two input terminals of the operational amplifier. The input terminal of the seventh chopper switch is connected to the two output terminals of the operational amplifier, the output node, and the positive bias voltage terminal. In conjunction with the first switching signal period of the first group of chopper switches, when the chopping signal of the first group of chopper switches is at the second level, the sixth chopper switch connects the first connection point to the first input terminal of the operational amplifier and the second connection point to the second input terminal of the operational amplifier. The seventh chopper switch connects the first output terminal of the operational amplifier to the output node. When the chopping signal of the first group of chopper switches is at the first level, the connection is switched to the first connection point to the second input terminal of the operational amplifier and the second connection point to the first input terminal of the operational amplifier. The seventh chopper switch synchronously switches the path of the output terminal of the operational amplifier. Through the synchronous reversal of the input and output terminals, the fixed offset error of the operational amplifier is converted into a 2T periodic fluctuation signal.

[0115] In this embodiment, the negative feedback accuracy of the operational amplifier to the first and second resistor branches is enhanced by combining a feedback transistor with a current mirror, ensuring that the current flowing through the first and second resistors is equal. At the same time, by configuring chopper switches at both the input and output terminals of the operational amplifier and switching them synchronously, the fluctuation processing of the operational amplifier offset error is achieved. Combined with the configured chopper period, it can not only prevent timing conflicts with other chopper switches in the bandgap reference module, but also allow the operational amplifier offset error to be filtered out by the subsequent low-pass filter. Ultimately, while improving the stability of the operational amplifier's negative feedback, the output error of the reference voltage is further reduced.

[0116] In this disclosure, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance; the term "multiple" refers to two or more unless otherwise expressly defined. The terms "install," "connect," "link," and "fix" should be interpreted broadly. For example, "connect" can be a fixed connection, a detachable connection, or an integral connection; "link" can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this disclosure according to the specific circumstances.

[0117] In the description of this disclosure, it should be understood that the terms "upper," "lower," "left," "right," "front," "rear," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or unit referred to must have a specific orientation or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this disclosure.

[0118] In the description of this specification, the terms "one embodiment," "some embodiments," "specific embodiment," etc., refer to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of this disclosure. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0119] The above description is merely a preferred embodiment of this disclosure and is not intended to limit the scope of this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure. Other embodiments of this disclosure will be readily apparent to those skilled in the art upon consideration of the specification and practice of the embodiments disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the appended claims.

Claims

1. A reference voltage circuit, characterized in that, include: A bandgap reference module and an operational amplifier module are electrically connected. The operational amplifier module is configured to output an initial reference voltage based on negative feedback operation. The operational amplifier module is equipped with a first set of chopper switches, and the bandgap reference module is equipped with a second set of chopper switches. The first set of chopper switches has a first switching signal period, and the second set of chopper switches has a second switching signal period. One of the first switching signal period and the second switching signal period is nested with the other, so that the error signals generated by the bandgap reference module and the operational amplifier module are superimposed in opposite directions. The bandgap reference module includes: a bipolar transistor assembly having a negative temperature drift signal and a positive temperature drift signal; and an adjustment component configured to cancel out the decrease in the negative temperature drift signal and the increase in the positive temperature drift signal when the temperature changes, so that the bipolar transistor assembly outputs the initial reference voltage based on the canceled negative temperature drift signal and the positive temperature drift signal. A low-pass filter module is configured to connect to the initial reference voltage and perform low-pass filtering on the initial reference voltage.

2. The reference voltage circuit according to claim 1, characterized in that, The bandgap reference module and the operational amplifier module have a first connection point and a second connection point. The bandgap reference module includes: The first and second resistors, which are connected in parallel, are configured to output equivalent first and second currents based on the negative feedback operation of the operational amplifier module, from the first connection point and the second connection point. The bipolar transistor assembly is connected to the first connection point and the second connection point to receive the first current and the second current; The regulating component and the bipolar transistor component have a third connection point and a fourth connection point.

3. The reference voltage circuit according to claim 2, characterized in that, The second set of chopper switches includes a first chopper switch, and the second switch signal period includes a first sub-signal period of the first chopper switch. The input terminals of the first chopper switch are connected to the first resistor and the second resistor respectively, and the output terminals of the first chopper switch are connected to the first connection point and the second connection point respectively. The period of the first sub-signal is half of the period of the first switch signal.

4. The reference voltage circuit according to claim 3, characterized in that, The chopping signal of the first chopper switch is at the first level, the first resistor is connected to the first connection point, and the second resistor is connected to the second connection point; The chopping signal of the first chopper switch is at the second level, the first resistor is connected to the second connection point, and the second resistor is connected to the first connection point.

5. The reference voltage circuit according to claim 2, characterized in that, The bipolar transistor assembly includes a first bipolar transistor, a second bipolar transistor, and a third bipolar transistor, wherein, One of the first bipolar transistor and the third bipolar transistor is connected in parallel with the second bipolar transistor, and the other is connected to the common base of the second bipolar transistor, with the initial reference voltage connected at the common base terminal; The emitter area ratio of the first bipolar transistor to the third bipolar transistor is 1:1, and the emitter area ratio of the first bipolar transistor to the second bipolar transistor is 1:(M-1), where M is an integer greater than 1.

6. The reference voltage circuit according to claim 5, characterized in that, The second set of chopper switches includes a second chopper switch and a third chopper switch. The second switch signal period includes a second sub-signal period of the second chopper switch and the third chopper switch, wherein... The input terminal of the second chopper switch is connected to the collector of the first bipolar transistor and the collector of the third bipolar transistor, respectively, and the output terminal of the second chopper switch is connected to the first connection point and the second connection point, respectively. The input terminal of the third chopper switch is connected to the emitter of the first bipolar transistor and the emitter of the third bipolar transistor, respectively, and the output terminal of the third chopper switch is connected to the third connection point and the fourth connection point, respectively. The period of the second sub-signal is twice the period of the first switching signal.

7. The reference voltage circuit according to claim 6, characterized in that, The chopping signals of the second chopper switch and the third chopper switch are at the first level. The first bipolar transistor is connected to the first connection point and the third connection point, and the third bipolar transistor is connected to the second connection point and the fourth connection point. The chopping signals of the second chopper switch and the third chopper switch are at the second level. The first bipolar transistor is connected to the second connection point and the fourth connection point, and the third bipolar transistor is connected to the first connection point and the third connection point.

8. The reference voltage circuit according to claim 5, characterized in that, The adjustment component has a third connection point between one end and the second bipolar transistor, and the other end of the adjustment component is grounded. The adjustment component includes: The third, fourth, and fifth resistors are connected in series, and each of the connected resistors has a fourth connection point and a fifth connection point, respectively. The third resistor and the fourth resistor have the same resistance value.

9. The reference voltage circuit according to claim 8, characterized in that, The second set of chopper switches includes a fourth chopper switch and a fifth chopper switch. The second switch signal period includes a third sub-signal period of the fourth chopper switch and the fifth chopper switch, wherein... The input terminal of the fourth chopper switch is connected to the third connection point and the fourth connection point respectively, and the output terminal of the fourth chopper switch is connected to the first terminal of the third resistor and the first terminal of the fourth resistor respectively. The input terminals of the fifth chopper switch are connected to the fourth connection point and the fifth connection point, respectively, and the output terminals of the fifth chopper switch are connected to the second terminals of the third resistor and the fourth resistor, respectively. The period of the third sub-signal is four times the period of the first switching signal.

10. The reference voltage circuit according to claim 9, characterized in that, The chopping signals of the fourth chopper switch and the fifth chopper switch are at the first level. The third connection point is between the first end of the third resistor and the second bipolar transistor. The fourth connection point is between the second end of the third resistor and the first end of the fourth resistor. The fifth connection point is between the second end of the fourth resistor and the fifth resistor. The chopping signals of the fourth chopper switch and the fifth chopper switch are at the second level. The third connection point is located between the first end of the fourth resistor and the second bipolar transistor. The fourth connection point is located between the second end of the fourth resistor and the first end of the third resistor. The fifth connection point is located between the second end of the third resistor and the fifth resistor.

11. The reference voltage circuit according to claim 5, characterized in that, The operational amplifier module includes: Operational amplifier; The first transistor has its gate connected to the output terminal of the operational amplifier and its source connected to the common base terminal. The second transistor has its drain and gate both connected to the drain of the first transistor, and its source is connected to the first resistor and the second resistor, respectively.

12. The reference voltage circuit according to claim 11, characterized in that, The first set of chopper switches includes: A sixth chopper switch, the input terminals of which are respectively connected to the first connection point and the second connection point, and the output terminals of which are respectively connected to the first input terminal and the second input terminal of the operational amplifier; The seventh chopper switch has its input terminals connected to the first differential output terminal and the second differential output terminal of the operational amplifier, and its output terminal connected to the output terminal and the positive bias voltage terminal of the operational amplifier.

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