Data write method and apparatus based on inverted encoding

By using a data writing method based on inverse encoding, a shorter encoding method is selected to write to RRAM, reducing the time-consuming RESET operation, thus solving the problem of slow RRAM array write speed and improving overall performance.

CN121617443BActive Publication Date: 2026-08-04INNOVATION MEMORY
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
INNOVATION MEMORY
Filing Date
2025-11-12
Publication Date
2026-08-04

AI Technical Summary

Technical Problem

The slow write speed of existing RRAM arrays is mainly due to the excessive number of time-consuming RESET operations, which limits the overall performance.

Method used

A data writing method based on inverse encoding is adopted. By calculating the time required for writing the original code and the inverse code, the encoding method with shorter time consumption is selected for writing, which in particular reduces the number of executions of the time-consuming RESET operation.

Benefits of technology

This significantly reduces the total latency of a single data write and improves the write speed of the RRAM array.

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Abstract

This disclosure proposes a data writing method and apparatus based on inverse coding, relating to the field of memory technology. The method includes: acquiring and preprocessing data to be written to obtain the original code to be written and the corresponding inverse code to be written; acquiring the original data currently stored at the location to be written in the resistive random access memory (RRAM), wherein the original data, the original code to be written, and the inverse code to be written have the same structure and length, and each includes a flag bit and data bits, the flag bit indicating whether the corresponding data is in the original code state or the inverse code state; calculating a first time required to write the original code to be written based on the corresponding bit states of the original data and the original code to be written, and calculating a second time required to write the inverse code to be written based on the corresponding bit states of the original data and the inverse code to be written; if the first time is less than or equal to the second time, writing the original code to be written at the location to be written; otherwise, writing the inverse code to be written. This application solves the problem of slow writing speed in traditional resistive random access memory (RRAM) methods.
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Description

Technical Field

[0001] This application relates to the field of memory technology, and in particular to a data writing method and apparatus based on inverse encoding. Background Technology

[0002] RRAM (Resistive Random Access Memory): Also known as variable resistive memory. The basic unit consists of two electrodes and a resistive switching layer sandwiched between them. Data storage is achieved by changing the resistance state of the material through the application of a voltage between the two electrodes. For example, oxide-based RRAM typically uses HfO2 or TiO2 as the resistive switching layer. These materials can stably switch between a high-resistance state (binary "0") and a low-resistance state (binary "1") after applying voltages of different polarities. A set operation changes the RRAM from a high-resistance state to a low-resistance state, and a reset operation changes it from a low-resistance state to a high-resistance state. The set operation time is usually shorter than the reset operation time. This change in resistance state is reversible, therefore RRAM can undergo multiple read and write operations.

[0003] When writing to a cell, multiple short pulses are typically used, followed by a read operation after each write pulse to determine if the array resistance has reached the appropriate value. Therefore, the average write time for each cell in the entire array is not significant. Improving the write speed of RRAM arrays is crucial for enhancing overall performance and driving large-scale deployment. Summary of the Invention

[0004] This application aims to at least partially address one of the technical problems in the related art.

[0005] Therefore, one objective of this application is to propose a data writing method based on inverse coding, comprising: acquiring and preprocessing the data to be written to obtain the original code to be written and the corresponding inverse code to be written; acquiring the original data currently stored at the position to be written in the resistive random access memory, wherein the original data, the original code to be written, and the inverse code to be written have the same structure and length, and each contains a flag bit and a data bit, wherein the flag bit is used to indicate whether the corresponding data is in the original code state or the inverse code state; calculating the first time required to write the original code to be written based on the corresponding bit state of the original data and the original code to be written, and calculating the second time required to write the inverse code to be written based on the corresponding bit state of the original data and the inverse code to be written; if the first time is less than or equal to the second time, writing the original code to be written at the position to be written; otherwise, writing the inverse code to be written.

[0006] The data writing method based on inverse encoding proposed in this application selects the shorter encoding method by comparing the total time required for "writing the original code" and "writing the inverse code". Especially for RRAM devices where the RESET time is usually much longer than the SET time, it can significantly reduce the number of high-time RESET operations, directly reduce the total latency of a single data write, and solve the problem of slow writing speed caused by operational redundancy under the traditional "fixed original code writing" method.

[0007] The second objective of this application is to propose a data reading method based on inverse coding.

[0008] The third objective of this application is to propose a data writing device based on inverse coding.

[0009] The fourth objective of this application is to propose an electronic device.

[0010] The fifth objective of this application is to provide a non-transitory computer-readable storage medium.

[0011] The sixth objective of this application is to provide a computer program product.

[0012] To achieve the above objectives, the first aspect of this application proposes a data writing method based on inverse coding, comprising: acquiring data to be written and preprocessing it to obtain the original code to be written and the corresponding inverse code to be written; acquiring the original data currently stored at the position to be written in the resistive random access memory, wherein the original data, the original code to be written, and the inverse code to be written have the same structure and length, and each includes a flag bit and a data bit, wherein the flag bit is used to indicate whether the corresponding data is in the original code state or the inverse code state; calculating a first time required to write the original code to be written based on the corresponding bit state of the original data and the original code to be written, and calculating a second time required to write the inverse code to be written based on the corresponding bit state of the original data and the inverse code to be written; if the first time is less than or equal to the second time, writing the original code to be written at the position to be written; otherwise, writing the inverse code to be written.

[0013] According to one embodiment of this application, acquiring and preprocessing data to be written to obtain the original code to be written and the corresponding inverse code to be written includes: acquiring data to be written with a preset bit length; adding a flag bit to the front end of the data to be written, the flag bit taking a first preset value to obtain the original code to be written; performing an inversion operation on all bits of the original code to be written to obtain the inverse code to be written corresponding to the original code to be written, wherein the value of the flag bit in the inverse code to be written is changed to a second preset value.

[0014] According to one embodiment of this application, the first preset value and the second preset value are set in one of the following ways: the first preset value is 0 and the second preset value is 1; or, the first preset value is 1 and the second preset value is 0.

[0015] According to one embodiment of this application, the first time required to write the original code is calculated based on the corresponding bit states of the original data and the original code to be written, including: comparing the corresponding bits of the original data and the original code to be written to determine the number of first bits that need to be set and the number of second bits that need to be reset; calculating the total time for setting the original code based on a preset single set time and the number of first bits; calculating the total time for resetting the original code based on a preset single reset time and the number of second bits; and using the sum of the total time for setting the original code and the total time for resetting the original code as the first time required to write the original code to be written.

[0016] According to one embodiment of this application, the second duration required to write the inverse code is calculated based on the corresponding bit states of the original data and the inverse code to be written, including: comparing the corresponding bits of the original data and the inverse code to be written to determine the number of third bits that need to be set and the number of fourth bits that need to be reset; calculating the total duration of setting the inverse code based on the duration of a single set operation and the number of third bits; calculating the total duration of resetting the inverse code based on the duration of a single reset operation and the number of fourth bits; and using the sum of the total duration of setting the inverse code and the total duration of resetting the inverse code as the second duration required to write the inverse code.

[0017] According to one embodiment of this application, the duration of a single reset is greater than the duration of a single set; the ratio of the duration of a single reset to the duration of a single set is a preset fixed value.

[0018] According to one embodiment of this application, the preset fixed value is dynamically adjusted based on the device characteristics of the resistive random access memory.

[0019] To achieve the above objectives, a second aspect of this application proposes a data reading method based on inverted encoding, applied to a resistive random access memory written by the data writing method described in the first aspect of the application, comprising: if a read operation is detected at a location to be read, reading the written data at the location to be read; determining the state of the written data based on the flag bit of the written data; if the written data is in its original code state, using the data bits of the written data as the target data; if the written data is in its inverse code state, inverting the data bits of the written data to obtain the target data.

[0020] To achieve the above objectives, a third aspect of this application proposes a data writing device based on inverse coding, comprising: a data preprocessing module for acquiring and preprocessing the data to be written to obtain the original code to be written and the corresponding inverse code to be written; an original data acquisition module for acquiring the original data currently stored at the write position in the resistive random access memory, wherein the original data, the original code to be written, and the inverse code to be written have the same structure and length, and each includes a flag bit and a data bit, wherein the flag bit is used to indicate whether the corresponding data is in the original code state or the inverse code state; a writing duration acquisition module for calculating a first duration required to write the original code to be written based on the corresponding bit states of the original data and the original code to be written, and calculating a second duration required to write the inverse code to be written based on the corresponding bit states of the original data and the inverse code to be written; and a writing execution module for writing the original code to be written at the write position if the first duration is less than or equal to the second duration, otherwise writing the inverse code to be written.

[0021] According to one embodiment of this application, the data to be written preprocessing module is further configured to: obtain data to be written with a preset bit length; add a flag bit to the front end of the data to be written, the flag bit taking a first preset value to obtain the original code to be written; perform an inversion operation on all bits of the original code to be written to obtain the inverse code to be written corresponding to the original code to be written, wherein the value of the flag bit in the inverse code to be written is changed to a second preset value.

[0022] According to one embodiment of this application, the first preset value and the second preset value are set in one of the following ways: the first preset value is 0 and the second preset value is 1; or, the first preset value is 1 and the second preset value is 0.

[0023] According to one embodiment of this application, the write duration acquisition module is further configured to: compare the corresponding bits of the original data and the original code to be written, determine the number of first bits that need to be set and the number of second bits that need to be reset; calculate the total set duration of the original code based on a preset single set duration and the number of first bits; calculate the total reset duration of the original code based on a preset single reset duration and the number of second bits; and use the sum of the total set duration of the original code and the total reset duration of the original code as the first duration required to write the original code to be written.

[0024] According to one embodiment of this application, the write duration acquisition module is further configured to: compare the corresponding bits of the original data and the inverse code to be written, determine the number of third bits that need to be set and the number of fourth bits that need to be reset; calculate the total inverse code setting duration based on the single setting duration and the number of third bits; calculate the total inverse code reset duration based on the single reset duration and the number of fourth bits; and use the sum of the total inverse code setting duration and the total inverse code reset duration as the second duration required to write the inverse code to be written.

[0025] According to one embodiment of this application, the duration of a single reset is greater than the duration of a single set; the ratio of the duration of a single reset to the duration of a single set is a preset fixed value.

[0026] According to one embodiment of this application, the preset fixed value is dynamically adjusted based on the device characteristics of the resistive random access memory.

[0027] To achieve the above objectives, a fourth aspect of this application provides an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to implement the data writing method based on inverse encoding as described in the first aspect of this application or the data reading method based on inverse encoding as described in the second aspect of this application.

[0028] To achieve the above objectives, a fifth aspect of this application provides a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to implement the data writing method based on inverse encoding as described in the first aspect of this application or the data reading method based on inverse encoding as described in the second aspect of this application.

[0029] To achieve the above objectives, a sixth aspect of this application provides a computer program product, including a computer program that, when executed by a processor, implements the data writing method based on inverse encoding as described in the first aspect of this application or the data reading method based on inverse encoding as described in the second aspect of this application. Attached Figure Description

[0030] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein: Figure 1 This is a schematic diagram illustrating an exemplary implementation of a data writing method based on inverse encoding, as shown in one embodiment of this application.

[0031] Figure 2 This is a schematic diagram of the circuit structure of an RRAM 1T1R memory cell according to one embodiment of this application.

[0032] Figure 3 This is a schematic diagram illustrating an embodiment of the present application of calculating the first time required to write the source code to be written.

[0033] Figure 4 This is a schematic diagram illustrating an embodiment of the present application of calculating the second duration required to write the inverse code to be written.

[0034] Figure 5This is an exemplary schematic diagram of a data writing device based on inverse encoding, as shown in one embodiment of this application.

[0035] Figure 6 This is a schematic diagram of an electronic device according to one embodiment of this application. Detailed Implementation

[0036] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0037] The following section will first introduce some of the terms used in this application.

[0038] The single set time refers to the operation execution time required to change the basic storage cell of RRAM from a high-resistance state (binary "0") to a low-resistance state (binary "1") through a set operation.

[0039] Single reset duration refers to the operation execution time required to change the basic storage cell of RRAM from a low-resistance state (binary "1") to a high-resistance state (binary "0") through a reset operation.

[0040] Figure 1 This is a schematic diagram illustrating an exemplary implementation of a data writing method based on inverse encoding, as shown in this application. Figure 1 As shown, this data writing method based on inverse encoding includes the following steps: S101: Obtain the data to be written and preprocess it to obtain the original code to be written and the corresponding inverse code to be written.

[0041] Obtain the data to be written with a preset bit length; add a flag bit to the front of the data to be written, and set the flag bit to the first preset value to obtain the original code to be written; invert all bits of the original code to be written to obtain the inverse code to be written, wherein the value of the flag bit in the inverse code to be written is changed to the second preset value.

[0042] In some embodiments, a first preset value of 0 (representing that the current data is in the original code state) and a second preset value of 1 (representing that the current data is in the inverted code state) can be set.

[0043] In some embodiments, a first preset value of 1 (representing that the current data is in the original code state) and a second preset value of 0 (representing that the current data is in the inverted code state) can be set.

[0044] Assuming a preset bit length of 8 bits, taking the data to be written as 11010101, with a first preset value of 0 (representing the current data is in its original code state) and a second preset value of 1 (representing the current data is in its inverse code state) as an example, adding a flag bit of 0 to the front of 11010101 yields the original code to be written as 011010101. Inverting all bits of the original code yields the corresponding inverse code as 100101010. A first 1 in the inverse code indicates that the current data is inverse code. That is, the first bit of both the original code and the inverse code is a flag bit, and the following 8 bits are the data bits.

[0045] In some embodiments, if the initial data to be written is relatively long, it is divided into multiple data to be written according to a preset bit length, and then a preprocessing operation is performed. For example, if the initial data to be written is 80 bits, it can be divided into groups of 8 bits each according to the data order, resulting in 10 data to be written. Then, the data writing method based on inversion encoding described in this application is sequentially executed on these 10 data to be written to write the initial data to be written into the resistive random access memory.

[0046] S102: Obtain the original data currently stored at the location to be written in the resistive random access memory. The original data, the original code to be written, and the inverse code to be written have the same structure and length, and all contain flag bits and data bits. The flag bits are used to indicate whether the corresponding data is in the original code state or the inverse code state.

[0047] The circuit structure of the basic RRAM storage cell will be briefly introduced below. Figure 2 This application illustrates a circuit structure diagram of a 1T1R (one-transistor-one-resistance) memory cell, as shown below. Figure 2 As shown, a basic memory cell consists of two electrodes and a resistive switching layer sandwiched in between. Data storage is achieved by changing the resistance state of the material by applying a voltage between the two electrodes. The memory cell corresponds to the word line (WL), bit line (BL), and source line (SL). Different operations require different operating voltages to be applied to these three terminals.

[0048] When a set operation is performed, WL rises, the transistor turns on, BL rises, and SL is grounded, forming a conductive filament; when a reset operation is performed, WL rises, the transistor turns on, SL rises, BL is grounded, and the conductive filament breaks.

[0049] Generally, one basic storage unit corresponds to storing 1 bit of data.

[0050] In this application, after obtaining the original code to be written and the corresponding inverse code to be written, the original data currently stored at the position to be written in the resistive random access memory is obtained. The original data, the original code to be written and the inverse code to be written have the same structure and length. Taking the first bit of the original code to be written and the inverse code to be written as the flag bit and the last 8 bits as the data bits as an example, the first bit of the original data is also the flag bit and the last 8 bits are also the data bits.

[0051] S103, calculate the first time required to write the original code based on the corresponding bit states of the original data and the original code to be written, and calculate the second time required to write the inverse code based on the corresponding bit states of the original data and the inverse code to be written.

[0052] Specifically, based on the corresponding bit states of the original data and the original code to be written, the first time required to write the original code is calculated, including: comparing the corresponding bits of the original data and the original code to be written to determine the number of first bits that need to be set and the number of second bits that need to be reset; calculating the total time for setting the original code based on the preset single set time and the number of first bits; calculating the total time for resetting the original code based on the preset single reset time and the number of second bits; and using the sum of the total time for setting the original code and the total time for resetting the original code as the first time required to write the original code to be written.

[0053] Figure 3 This application illustrates a schematic diagram of calculating the first time required to write the source code to be written, as shown below. Figure 3 As shown, taking the original data as 010101110 and the original code to be written as 011010101 as an example, the original data and the original code to be written are compared bit by bit. If the data at a certain position needs to be changed from "0" to "1", it is recorded as a set operation. If the data at a certain position needs to be changed from "1" to "0", it is recorded as a reset operation. After the comparison, the number of the first bit that needs to be set is 3, and the number of the second bit that needs to be reset is 3. Therefore, the first duration = the duration of a single set operation × 3 + the duration of a single reset operation × 3.

[0054] Specifically, based on the corresponding bit states of the original data and the inverse code to be written, the second duration required to write the inverse code is calculated, including: comparing the corresponding bits of the original data and the inverse code to be written to determine the number of third bits that need to be set and the number of fourth bits that need to be reset; calculating the total duration of setting the inverse code based on the duration of a single set operation and the number of third bits; calculating the total duration of resetting the inverse code based on the duration of a single reset operation and the number of fourth bits; and using the sum of the total duration of setting the inverse code and the total duration of resetting the inverse code as the second duration required to write the inverse code.

[0055] Figure 4This application illustrates a schematic diagram of calculating the second time required to write the inverse code to be written, as shown below. Figure 4 As shown, taking the original data as 010101110 and the inverse code to be written as 100101010 as an example, the original data and the inverse code to be written are compared bit by bit. If it is necessary to change the data at a certain position from "0" to "1", it is recorded as a set operation. If it is necessary to change the data at a certain position from "1" to "0", it is recorded as a reset operation. After the comparison is completed, the number of the third bit that needs to be set is 1, and the number of the fourth bit that needs to be reset is 2. Therefore, the second duration = the duration of a single set operation × 1 + the duration of a single reset operation × 2.

[0056] In this application, for ease of calculation, the ratio of the single reset duration to the single set duration is set to a preset fixed value, provided that the duration of a single reset is greater than the duration of a single set duration. For example, the ratio of the single reset duration to the single set duration can be set to 3.

[0057] Furthermore, the preset fixed value is dynamically adjusted according to the device characteristics of the resistive random access memory.

[0058] S104 If the first duration is less than or equal to the second duration, write the original code to be written at the position to be written; otherwise, write the inverse code to be written.

[0059] After obtaining the first duration and the second duration, the first duration and the second duration are compared. If the first duration is less than or equal to the second duration, the original code to be written is written to the writing position; if the first duration is greater than the second duration, the inverse code to be written is written to the writing position.

[0060] The data writing method based on inverse encoding proposed in this application selects the shorter encoding method by comparing the total time required for "writing the original code" and "writing the inverse code". Especially for RRAM devices where the RESET time is usually much longer than the SET time, it can significantly reduce the number of high-time RESET operations, directly reduce the total latency of a single data write, and solve the problem of slow writing speed caused by operational redundancy under the traditional "fixed original code writing" method.

[0061] Furthermore, this application also proposes a data reading method based on inverted encoding, applied to a resistive random access memory written by the data writing method described above. If a read operation is detected at the location to be read, the written data at the location to be read is read; the state of the written data is determined according to the flag bit of the written data; if the written data is in its original code state, the data bits of the written data are used as the target data; if the written data is in its inverse code state, the data bits of the written data are inverted to obtain the target data.

[0062] Figure 5This is an exemplary schematic diagram of a data writing device based on inversion encoding, as described in this application. Figure 5 As shown, the data writing device 500 based on inverse encoding includes a data preprocessing module 501, a raw data acquisition module 502, a writing duration acquisition module 503, and a writing execution module 504, wherein: The data to be written preprocessing module 501 is used to acquire the data to be written and preprocess it to obtain the original code to be written and the corresponding inverse code to be written. The raw data acquisition module 502 is used to acquire the raw data currently stored at the position to be written in the resistive random access memory. The raw data, the original code to be written and the inverse code to be written have the same structure and length, and all contain flag bits and data bits. The flag bits are used to indicate whether the corresponding data is in the original code state or the inverse code state. The write duration acquisition module 503 is used to calculate the first duration required to write the original code to be written based on the corresponding bit states of the original data and the original code to be written, and to calculate the second duration required to write the inverse code to be written based on the corresponding bit states of the original data and the inverse code to be written. The write execution module 504 is used to write the original code to be written at the write position if the first duration is less than or equal to the second duration; otherwise, it writes the inverse code to be written.

[0063] The data to be written can be input from the input module.

[0064] Furthermore, once the write operation is complete, write feedback can be generated and sent to the input module.

[0065] This device compares the total time required for "writing the original code" and "writing the inverse code" and selects the encoding method with shorter writing time. Especially for RRAM devices where the RESET time is usually much longer than the SET time, it can significantly reduce the number of high-time RESET operations, directly reduce the total latency of a single data write, and solve the problem of slow writing speed caused by operational redundancy under the traditional "fixed original code writing" method.

[0066] Furthermore, the preprocessing module 501 for the data to be written is also used to: obtain the data to be written with a preset bit length; add a flag bit to the front end of the data to be written, the flag bit taking a first preset value to obtain the original code to be written; invert all bits of the original code to be written to obtain the inverse code to be written corresponding to the original code to be written, wherein the value of the flag bit in the inverse code to be written is changed to a second preset value.

[0067] Furthermore, the first preset value and the second preset value can be set in one of the following ways: the first preset value is 0 and the second preset value is 1; or, the first preset value is 1 and the second preset value is 0.

[0068] Furthermore, the write duration acquisition module 503 is also used to: compare the corresponding bits of the original data and the original code to be written, determine the number of first bits that need to be set and the number of second bits that need to be reset; calculate the total set duration of the original code based on the preset single set duration and the number of first bits; calculate the total reset duration of the original code based on the preset single reset duration and the number of second bits; and use the sum of the total set duration of the original code and the total reset duration of the original code as the first duration required to write the original code to be written.

[0069] Furthermore, the write duration acquisition module 503 is also used to: compare the corresponding bits of the original data and the inverse code to be written, determine the number of third bits that need to be set and the number of fourth bits that need to be reset; calculate the total inverse code setting duration based on the single set duration and the number of third bits; calculate the total inverse code reset duration based on the single reset duration and the number of fourth bits; and use the sum of the total inverse code setting duration and the total inverse code reset duration as the second duration required to write the inverse code to be written.

[0070] Furthermore, the duration of a single reset is longer than the duration of a single set; the ratio of the duration of a single reset to the duration of a single set is a preset fixed value.

[0071] Furthermore, the preset fixed value is dynamically adjusted according to the device characteristics of the resistive random access memory.

[0072] To implement the above embodiments, this application also proposes an electronic device 600, such as... Figure 6 As shown, the electronic device 600 includes a processor 601 and a memory 602 communicatively connected to the processor. The memory 602 stores instructions that can be executed by at least one processor. The instructions are executed by at least one processor 601 to implement the data writing method or the data reading method based on inverse encoding as shown in the above embodiments.

[0073] To implement the above embodiments, this application also proposes a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to enable a computer to implement the data writing method or the data reading method based on inverse encoding as shown in the above embodiments.

[0074] To implement the above embodiments, this application also proposes a computer program product, including a computer program that, when executed by a processor, implements the data writing method or the data reading method based on inverse encoding as shown in the above embodiments.

[0075] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0076] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0077] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0078] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application.

Claims

1. A data writing method based on inverse encoding, characterized in that, include: Obtain the data to be written and preprocess it to obtain the original code to be written and the corresponding inverse code to be written. Obtain the original data currently stored at the location to be written in the resistive random access memory. The original data, the original code to be written, and the inverse code to be written have the same structure and length, and each contains a flag bit and a data bit. The flag bit is used to indicate whether the corresponding data is in the original code state or the inverse code state. Based on the original data and the corresponding bit states of the original code to be written, the first time required to write the original code to be written is calculated, and based on the original data and the corresponding bit states of the inverse code to be written, the second time required to write the inverse code to be written is calculated. If the first duration is less than or equal to the second duration, the original code to be written is written at the position to be written; otherwise, the inverse code to be written is written.

2. The method according to claim 1, characterized in that, The process of acquiring and preprocessing the data to be written to obtain the original code to be written and the corresponding inverse code to be written includes: Obtain the data to be written with a preset bit length; A flag bit is added to the front end of the data to be written, and the flag bit takes a first preset value to obtain the source code to be written; Invert all bits of the original code to be written to obtain the inverse code corresponding to the original code to be written, wherein the value of the flag bit in the inverse code to be written is changed to a second preset value.

3. The method according to claim 2, characterized in that, The first preset value and the second preset value are set in one of the following ways: The first preset value is 0, and the second preset value is 1; or, The first preset value is 1, and the second preset value is 0.

4. The method according to any one of claims 1-3, characterized in that, The step of calculating the first time required to write the original code based on the corresponding bit states of the original data and the original code to be written includes: By comparing the corresponding bits of the original data and the original code to be written, the number of first bits that need to be set and the number of second bits that need to be reset are determined. Based on the preset single bit setting time and the number of the first bit, the total bit setting time of the original code is calculated. Based on the preset single reset duration and the number of the second bit, the total original code reset duration is calculated; The sum of the total time for setting the original code and the total time for resetting the original code is used as the first time required to write the original code to be written.

5. The method according to claim 4, characterized in that, The step of calculating the second time required to write the inverse code based on the corresponding bit states of the original data and the inverse code to be written includes: By comparing the original data with the corresponding bits of the inverse code to be written, the number of third bits that need to be set and the number of fourth bits that need to be reset are determined. Based on the single bit setting time and the number of the third bit, the total bit setting time of the inverse code is calculated; Based on the single reset duration and the number of the fourth bit, the total inverse code reset duration is calculated. The sum of the total time for setting the inverse code and the total time for resetting the inverse code is used as the second time required to write the inverse code to be written.

6. The method according to claim 5, characterized in that, in: The duration of a single reset is greater than the duration of a single set. The ratio of the single reset duration to the single set duration is a preset fixed value.

7. The method according to claim 6, characterized in that, The preset fixed value is dynamically adjusted according to the device characteristics of the resistive random access memory.

8. A data reading method based on inverted encoding, applied to a resistive random access memory (RRAM) after data writing as described in any one of claims 1-7, characterized in that, include: If a read operation is detected at the location to be read, read the written data at the location to be read; The state of the written data is determined based on the flag bits of the written data; If the written data is in its original code state, the data bits of the written data will be used as the target data; If the written data is in a one's complement state, the data bits of the written data are inverted to obtain the target data.

9. A data writing device based on inverse encoding, characterized in that, include: The preprocessing module for the data to be written is used to acquire and preprocess the data to be written to obtain the original code to be written and the corresponding inverse code to be written. The raw data acquisition module is used to acquire the raw data currently stored at the position to be written in the resistive random access memory. The raw data, the original code to be written and the inverse code to be written have the same structure and length, and each contains a flag bit and a data bit. The flag bit is used to indicate whether the corresponding data is in the original code state or the inverse code state. The write duration acquisition module is used to calculate the first duration required to write the original code based on the corresponding bit states of the original data and the original code to be written, and to calculate the second duration required to write the inverse code based on the corresponding bit states of the original data and the inverse code to be written. The write execution module is configured to write the original code to be written at the write position if the first duration is less than or equal to the second duration; otherwise, write the inverse code to be written.

10. An electronic device, comprising: At least one processor; as well as, A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-7 or claim 8.