Method for epitaxial growth of bragg reflector, method for epitaxial growth of vertical cavity surface emitting laser

Abstract

This invention belongs to the field of semiconductor optoelectronic device manufacturing technology, specifically relating to an epitaxial growth method for Bragg reflector layers and an epitaxial growth method for vertical-cavity surface-emitting lasers (DBRs). The epitaxial growth method for Bragg reflector layers provided by this invention includes alternating high-temperature and low-temperature growth stages, with the growth process starting at the high-temperature stage. After each low-temperature growth stage, a micro-annealing process is performed. The high-temperature growth stage forms an 8-18 layer unit structure, while the low-temperature growth stage forms a 2-3 layer unit structure. This epitaxial growth method, without altering the original optical and electrical design of the DBR, effectively controls stress accumulation, significantly reduces epitaxial wafer warpage, and suppresses dislocation multiplication. While maintaining the high reflectivity of the DBR, it greatly improves the consistency of epitaxial wafer material quality and device performance.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor optoelectronic device manufacturing technology, specifically relating to the epitaxial growth method of Bragg reflector layers and the epitaxial growth method of vertical cavity surface-emitting lasers. Background Technology

[0002] Vertical-cavity surface-emitting lasers (VCSELs) typically require the growth of dozens to hundreds of Bragg reflector (DBR) cycles to achieve extremely high reflectivity. The commonly used high- and low-refractive-index materials in DBRs are aluminum gallium arsenide (AlGaAs) / gallium arsenide (GaAs) materials. In the AlGaAs / GaAs system, due to the difference in thermal expansion coefficients between AlGaAs and GaAs, as well as the intrinsic stress introduced by variations in aluminum composition, stress accumulates continuously with increasing growth cycle number during high-temperature epitaxial growth (stress integral effect). This leads to severe warping of the epitaxial wafer, affecting not only subsequent processes such as photolithography but also inducing lattice defects (such as dislocations), which become non-radiative recombination centers, reducing device efficiency and reliability.

[0003] Existing technologies often employ methods such as inserting graded layers or low-aluminum-content stress buffer layers to alleviate stress accumulation, but this introduces additional optical interfaces and uncertain electrical properties, which may cause unnecessary refractive index jumps or light absorption. Summary of the Invention

[0004] The purpose of this invention is to provide an epitaxial growth method for Bragg reflector layers and an epitaxial growth method for vertical cavity surface-emitting lasers. The epitaxial growth method provided by this invention effectively suppresses stress accumulation, significantly reduces epitaxial wafer warpage, and suppresses dislocation multiplication without changing the original optical and electrical design of the DBR. While maintaining the high reflectivity of the DBR, it greatly improves the consistency of epitaxial wafer material quality and device performance.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] This invention provides an epitaxial growth method for a Bragg reflector layer, wherein the Bragg reflector layer comprises an m-layer unit structure stacked together, wherein each unit structure consists of a GaAs layer and an AlGaAs layer; the GaAs layer and AlGaAs layer are alternately arranged in the Bragg reflector layer; the growth process of the Bragg reflector layer includes n growth stages, where n is an integer ≥ 3; the n growth stages are alternating high-temperature growth stages and low-temperature growth stages, and the first growth stage is a high-temperature growth stage; after each low-temperature growth stage, a micro-annealing process is also performed.

[0007] Each of the first to (n-1)th growth stages is a high-temperature growth stage that grows independently.x Layered unit structure, x It is an integer from 8 to 18, and each low-temperature growth stage grows independently. y Layered unit structure, y It can be 2 or 3; the first to the (n-1)th growth stages grow a total of m1 layers of unit structures, and the nth growth stage grows m2 layers of unit structures, where m = m1 + m2. When n is an odd number, m1 = When n is even, m1 = ;

[0008] The temperature for each high-temperature growth stage is 650~700℃, the temperature for each low-temperature growth stage is 560~600℃, and the temperature for micro-annealing is 600~640℃ for 10~30s.

[0009] Preferably, x is an integer between 10 and 15.

[0010] Preferably, the same number of unit structures are grown in each high-temperature growth stage from the 1st to the (n-1th)th growth stage.

[0011] Preferably, the temperature during the high-temperature growth stage is 680±2℃.

[0012] Preferably, the temperature of the low-temperature growth stage is 580±2℃.

[0013] Preferably, the temperature of the micro-annealing treatment is 600~630℃; the time of the micro-annealing treatment is 20s.

[0014] Preferably, after each micro-annealing treatment, the temperature is controlled to rise to the temperature of the high-temperature growth stage for the high-temperature growth stage, and the controlled temperature rise rate is 1~3℃ / s.

[0015] Preferably, in the single-layer unit structure: the thickness of the GaAs layer is 55~60nm; the thickness of the AlGaAs layer is 65~70nm.

[0016] This invention provides an epitaxial growth method for a vertical-cavity surface-emitting laser (VCSEL). The VCSEL includes a GaAs substrate, on which an N-type Bragg reflector layer, an active region, an oxide confinement layer, a tunnel junction, a P-type Bragg reflector layer, and a surface ohmic contact layer are sequentially stacked on the upper surface of the GaAs substrate. The epitaxial growth method includes the following steps:

[0017] An N-type Bragg reflector layer is prepared on the surface of the GaAs substrate using the epitaxial growth method for the Bragg reflector layer described in the above technical solution.

[0018] An active region, an oxide confinement layer, and a tunnel junction are sequentially grown on the upper surface of the N-type Bragg reflector layer.

[0019] A P-type Bragg reflector layer is prepared on the upper surface of the tunnel junction according to the epitaxial growth method of the Bragg reflector layer described in the above technical solution;

[0020] A surface ohmic contact layer is grown on the upper surface of the P-type Bragg reflector layer.

[0021] Preferably, it also includes: using an in-situ reflection monitoring system to detect the optical thickness of the N-type Bragg reflector layer, active region, oxide confinement layer, tunnel junction, P-type Bragg reflector layer and surface ohmic contact layer, with a detection wavelength of 980 nm.

[0022] This invention provides an epitaxial growth method for a Bragg reflector layer. The Bragg reflector layer comprises an m-layer unit structure stacked together, where each unit structure consists of one GaAs layer and one AlGaAs layer. The GaAs and AlGaAs layers are alternately arranged in the Bragg reflector layer. The growth process of the Bragg reflector layer includes n growth stages, where n is an integer ≥ 3. The n growth stages are alternating high-temperature and low-temperature growth stages, with the first growth stage being a high-temperature growth stage. Each low-temperature growth stage is followed by a micro-annealing process. Each high-temperature growth stage from the first to the (n-1)th growth stages is performed independently. x Layered unit structure, x It is an integer from 8 to 18, and each low-temperature growth stage grows independently. y Layered unit structure, y It can be 2 or 3; the first to the (n-1)th growth stages grow a total of m1 layers of unit structures, and the nth growth stage grows m2 layers of unit structures, where m = m1 + m2. When n is an odd number, m1 = When n is even, m1 = The temperature for each high-temperature growth stage is 650-700℃, the temperature for each low-temperature growth stage is 560-600℃, and the temperature for micro-annealing is 600-640℃ for 10-30 seconds. This invention addresses the intrinsic stress accumulation problem caused by differences in thermal expansion coefficients and variations in aluminum composition during the high-temperature, long-term epitaxial growth of AlGaAs / GaAs Bragg reflectors (DBRs), proposing a time-series temperature control method. By periodically inserting low-temperature growth cycles into the DBR growth sequence and supplementing them with micro-annealing, while simultaneously optimizing the number of layers in both the high-temperature and low-temperature growth stages, the accumulated stress is effectively released and "passivated" without altering the material system and optical structure, while ensuring the high-efficiency fabrication of the Bragg reflector layer.

[0023] This invention provides an epitaxial growth method for a vertical-cavity surface-emitting laser (VCSEL), wherein the N-type Bragg reflector layer and the P-type Bragg reflector layer are prepared according to the epitaxial growth method for the Bragg reflector layer described in the above technical solution. Compared with the prior art, this invention has the following advantages:

[0024] The Bragg reflector layer grown by this invention significantly reduces stress and warpage: This invention effectively breaks and releases the continuous accumulation of stress by periodically inserting a low-temperature compliant layer, reducing the room temperature warpage of 6-inch epitaxial wafers by 15-25%, greatly improving the flatness of epitaxial wafers and subsequent processability.

[0025] The quality of the Bragg reflector material grown by this invention is improved: the low-temperature growth and micro-annealing treatment provided by this invention promotes the reconstruction of interface atoms and inhibits dislocation multiplication. X-ray diffraction (XRD) shows a reduction of ≥20% in the full width at half maximum (FWHM), indicating a significant improvement in crystal quality.

[0026] The optical properties of the Bragg reflector layer grown in this invention are maintained without damage: Because no heterogeneous materials are introduced, the optical design of the DBR remains intact, and the reflectivity is maintained at a high level of ≥99.5%. Atomic force microscopy (AFM) shows a surface roughness RMS <0.5 nm (2 × 2 µm). 2 The interface quality is excellent.

[0027] The device uniformity of the vertical cavity surface-emitting laser prepared by this invention is improved: the stress accumulation reduced by this invention effectively improves the size control of the oxide aperture in the active region and the consistency of the emission wavelength, thereby improving the device yield and performance uniformity.

[0028] In summary, the epitaxial growth method provided by this invention can significantly reduce epitaxial wafer warpage and suppress dislocation multiplication, while maintaining the high reflectivity of DBR (≥99.5%) and greatly improving the consistency of epitaxial wafer material quality and device performance. Attached Figure Description

[0029] Figure 1 A schematic diagram of the VCSEL structure provided by this invention;

[0030] Figure 2 The warpage test results are for the device prepared in Comparative Example 1.

[0031] Figure 3 The warpage test results are for the device prepared in Example 1;

[0032] Figure 4 The warpage test results are for the device prepared in Comparative Example 2. Detailed Implementation

[0033] This invention provides an epitaxial growth method for a Bragg reflector layer, wherein the Bragg reflector layer comprises an m-layer unit structure stacked together, wherein each unit structure consists of a GaAs layer and an AlGaAs layer; the GaAs layer and AlGaAs layer are alternately arranged in the Bragg reflector layer; the growth process of the Bragg reflector layer includes n growth stages, where n is an integer ≥ 3; the n growth stages are alternating high-temperature growth stages and low-temperature growth stages, and the first growth stage is a high-temperature growth stage; after each low-temperature growth stage, a micro-annealing process is also performed.

[0034] Each of the first to (n-1)th growth stages is a high-temperature growth stage that grows independently. x Layered unit structure, x It is an integer from 8 to 18, and each low-temperature growth stage grows independently. y Layered unit structure, y It can be 2 or 3; the first to the (n-1)th growth stages grow a total of m1 layers of unit structures, and the nth growth stage grows m2 layers of unit structures, where m = m1 + m2. When n is an odd number, m1 = When n is even, m1 = ;

[0035] The temperature for each high-temperature growth stage is 650~700℃, the temperature for each low-temperature growth stage is 560~600℃, and the temperature for micro-annealing is 600~640℃ for 10~30s.

[0036] In this invention, unless otherwise specified, all raw materials / components used in the preparation are commercially available products well known to those skilled in the art. In this invention, the epitaxial growth of the Bragg reflector layer and the vertical-cavity surface-emitting laser is performed using metal-organic chemical vapor deposition (MOCVD). MOCVD equipment can be used; in this embodiment, an Aixtron MOCVD system is used. The pressure in the reaction chamber is preferably 100 mbar, and the carrier gas is hydrogen.

[0037] In this invention, the epitaxial growth method includes growth stages 1 to n-1 of the 1 to m1 layer unit structures in the m-layer unit structure, and growth stages m1+1 to the nth layer unit structure, where n is an integer ≥ 3.

[0038] In this invention, when n is 3, the three growth stages are: high temperature growth stage, low temperature growth stage, and high temperature growth stage.

[0039] In this invention, when n is 4, the four growth stages are: high temperature growth stage, low temperature growth stage, high temperature growth stage, and low temperature growth stage.

[0040] In this invention, when n is 5, the 5 growth stages are as follows: high temperature growth stage, low temperature growth stage, high temperature growth stage, low temperature growth stage, and high temperature growth stage.

[0041] In this invention, when n is 6, the 6 growth stages are as follows: high temperature growth stage, low temperature growth stage, high temperature growth stage, low temperature growth stage, high temperature growth stage, and low temperature growth stage.

[0042] In this invention, when n is 7, the 7 growth stages are as follows: high temperature growth stage, low temperature growth stage, high temperature growth stage, low temperature growth stage, high temperature growth stage, low temperature growth stage, and high temperature growth stage.

[0043] In this invention, when n is an integer greater than 7 and n is even, the n growth stages are as follows: high temperature growth stage, low temperature growth stage, high temperature growth stage, low temperature growth stage, ..., high temperature growth stage, low temperature growth stage.

[0044] In this invention, when n is an integer greater than 7 and when n is odd, the n growth stages are sequentially: high temperature growth stage, low temperature growth stage, high temperature growth stage, low temperature growth stage, ..., high temperature growth stage, low temperature growth stage, high temperature growth stage.

[0045] In this invention, when the Bragg reflector is an N-type Bragg reflector (N-DBR), each unit structure includes a silicon-doped AlGaAs layer and a silicon-doped GaAs layer from bottom to top.

[0046] In this invention, when the Bragg reflector is a P-type Bragg reflector (P-DBR), each unit structure includes a carbon-doped GaAs layer and a carbon-doped AlGaAs layer from bottom to top.

[0047] In this invention, the Bragg reflector layer is configured with a total number of layers m based on the optical performance of the vertical cavity surface-emitting laser. Then, it is grown according to the growth rules for high-temperature and low-temperature growth stages (each high-temperature growth stage from the 1st to the (n-1th)th growth stage is grown independently). x Layered unit structure, x It is an integer from 8 to 18, and each low-temperature growth stage grows independently. y Layered unit structure, yThe m1-layer unit structure is obtained by using a 2 or 3-layer growth stage. The remaining m2-layer unit structure is then grown using either a high-temperature or low-temperature growth stage. When the m2-layer unit structure uses a high-temperature growth stage (i.e., the nth growth stage is a high-temperature growth stage), m2 can be any integer from 1 to 7, or any integer from 8 to 18. When the m2-layer unit structure uses a low-temperature growth stage (i.e., the nth growth stage is a low-temperature growth stage), m2 can be 1, 2, or 3.

[0048] In one embodiment of the present invention, the n growth stages are as follows: a high-temperature growth stage growing a 12-layer unit structure, a low-temperature growth stage growing a 2-layer unit structure, a high-temperature growth stage growing a 12-layer unit structure, a low-temperature growth stage growing a 2-layer unit structure, and a high-temperature growth stage growing a 9-layer unit structure. m=37, m1=28, m2=9, resulting in an N-DBR.

[0049] In one embodiment of the present invention, the n growth stages are as follows: a high-temperature growth stage grows a 12-layer unit structure, a low-temperature growth stage grows a 2-layer unit structure, and a high-temperature growth stage grows a 1-layer unit structure. m=15, m1=14, m2=1, resulting in a P-DBR.

[0050] In this invention, the temperature of each high-temperature growth stage is 650~700℃, and in the embodiments it can be 680℃ or 650℃.

[0051] In this invention, each of the first to n-1 growth stages preferably grows a unit structure with 10 to 15 layers (i.e., x is preferably an integer from 10 to 15). Each of the first to n-1 growth stages preferably grows a unit structure with the same number of layers, which can be a 12-layer unit structure in the embodiment.

[0052] In this invention, the temperature of the low-temperature growth stage is 560~600℃, and in the embodiment it can be 580℃.

[0053] In this invention, a unit structure with 2 layers is grown in each low-temperature growth stage from the 1st to the (n-1th)th growth stage (i.e., y is preferably 2).

[0054] In this invention, the material composition, raw material gas flow rate, and optical thickness are the same in the high-temperature growth stage and the low-temperature growth stage, except for the growth temperature.

[0055] In this invention, the micro-annealing process can be an in-situ micro-annealing process.

[0056] In this embodiment of the invention, the temperature of the micro-annealing treatment can be 600~630℃.

[0057] In this invention, the micro-annealing treatment time is 10-30 seconds, and in the embodiment, it can be 20 seconds. By controlling the temperature and time of the micro-annealing treatment, this invention can effectively suppress stress accumulation.

[0058] In this invention, after the micro-annealing treatment, it is preferable to control the rate of heating to the temperature of the high-temperature growth stage for the high-temperature growth stage. The rate of the controlled heating is preferably 1~3℃ / s, and in the embodiments it can be 1℃ / s, 2℃ / s or 3℃ / s.

[0059] In this invention, the thickness of the GaAs layer is λ / 4n, where λ is the design wavelength and n is the refractive index of the GaAs layer material.

[0060] In this invention, the thickness of the AlGaAs layer is λ / 4n, where λ is the design wavelength and n is the refractive index of the AlGaAs layer material.

[0061] In this invention, the GaAs layer is a high refractive index layer, and the AlGaAs layer is a low refractive index layer. In embodiments of this invention, the AlGaAs layer can be Al... 0.9 Ga 0.1 As layer. In this embodiment of the invention, the thickness of one GaAs layer can be 60 nm. The thickness of one AlGaAs layer can be 70 nm.

[0062] In this invention, the Bragg reflector layer comprises an m-layer unit structure stacked together, with a total of m1-layer unit structures grown in the first to n-1 growth stages, and an m-m1-layer unit structure grown in the nth growth stage.

[0063] This invention provides an epitaxial growth method for a vertical-cavity surface-emitting laser (VCSEL). The VCSEL includes a GaAs substrate, on which an N-type Bragg reflector layer, an active region, an oxide confinement layer, a tunnel junction, a P-type Bragg reflector layer, and a surface ohmic contact layer are sequentially stacked on the upper surface of the GaAs substrate. The epitaxial growth method includes the following steps:

[0064] An N-type Bragg reflector layer is prepared on the surface of the GaAs substrate using the epitaxial growth method for the Bragg reflector layer described in the above technical solution.

[0065] An active region, an oxide confinement layer, and a tunnel junction are sequentially grown on the upper surface of the N-type Bragg reflector layer.

[0066] A P-type Bragg reflector layer is prepared on the upper surface of the tunnel junction according to the epitaxial growth method of the Bragg reflector layer described in the above technical solution;

[0067] A surface ohmic contact layer is grown on the upper surface of the P-type Bragg reflector layer.

[0068] In this invention, the GaAs substrate is preferably an (100) oriented N-type GaAs substrate.

[0069] This invention fabricates an N-type Bragg reflector layer on the surface of a GaAs substrate using the epitaxial growth method described in the above-described technical solution. In this invention, the doping element of the N-type Bragg reflector layer is Si, and the conductivity type is N-type. When fabricating the N-type Bragg reflector layer using the epitaxial growth method described in the above-described technical solution, the source gas used includes a silicon source (SiH4).

[0070] In this invention, the N-type Bragg reflector layer comprises a multi-layer unit structure stacked together, and each unit structure comprises a silicon-doped AlGaAs layer and a silicon-doped GaAs layer from bottom to top.

[0071] In this invention, the thickness of the silicon-doped AlGaAs layer is preferably 65-75 nm, and in some embodiments it can be 70 nm. The silicon-doped AlGaAs layer in these embodiments can be silicon-doped Al... 0.9 Ga 0.1 As layer. The thickness of the silicon-doped GaAs layer is preferably 55~65nm, and in the embodiment it can be 60nm.

[0072] In this invention, the number of layers in the unit structure of the N-type Bragg reflector is preferably 20 to 40 (i.e., m is 20 to 40). In the embodiments, m can be 20, 25, 30, 35, 37 or 40.

[0073] In this invention, the preferred conditions for growing the silicon-doped AlGaAs layer include: a flow rate of TMGa preferably of 30-70 sccm, which can be 50 sccm in the embodiment; a flow rate of TMAl preferably of 750-800 sccm, which can be 781 sccm in the embodiment; a flow rate of AsH3 preferably of 150-250 sccm, which can be 200 sccm in the embodiment; and a flow rate of SiH4 preferably of 50-200 sccm, which can be 100 sccm in the embodiment. The thickness of the silicon-doped AlGaAs layer is λ / 4n, where λ is the design wavelength and n is the refractive index of the silicon-doped AlGaAs layer material.

[0074] In this invention, the preferred conditions for growing the silicon-doped GaAs layer include: a flow rate of TMGa preferably of 30-70 sccm, which can be 50 sccm in the embodiment; a flow rate of AsH3 preferably of 150-250 sccm, which can be 200 sccm in the embodiment; and a flow rate of SiH4 preferably of 50-200 sccm, which can be 100 sccm in the embodiment. The thickness of the silicon-doped GaAs layer is λ / 4n, where λ is the design wavelength and n is the refractive index of the silicon-doped GaAs layer material.

[0075] After obtaining the N-type Bragg reflector layer, the present invention sequentially grows an active region, an oxide confinement layer, and a tunneling junction on the upper surface of the N-type Bragg reflector layer. The active region preferably includes multiple pairs of quantum wells. The present invention does not have special requirements for the growth methods of the active region, oxide confinement layer, and tunneling junction; metal-organic chemical vapor deposition methods well-known to those skilled in the art can be used.

[0076] After obtaining the tunneling junction, the present invention prepares a P-type Bragg reflector layer on the upper surface of the tunneling junction according to the epitaxial growth method of the Bragg reflector layer described in the above technical solution. In the present invention, the dopant element of the P-type Bragg reflector layer is carbon (C), and the conductivity type is P-type. When preparing the P-type Bragg reflector layer using the epitaxial growth method of the Bragg reflector layer described in the above technical solution, the source gas includes a carbon source (CCl4).

[0077] In this invention, the P-type Bragg reflector layer includes a multi-layer unit structure stacked together, and each unit structure includes a carbon-doped GaAs layer and a carbon-doped AlGaAs layer from bottom to top.

[0078] In this invention, the number of layers in the unit structure of the P-type Bragg reflector is preferably 10 to 20 (i.e., m is 10 to 20), and in the embodiment, m can be 15.

[0079] In this invention, the unit structure includes a carbon-doped GaAs layer. The doping concentration of the carbon-doped GaAs layer is preferably 1 × 10⁻⁶. 18 ~5×10 18 cm -3 In the embodiment, it can be 2×10 18 cm -3 The thickness of the carbon-doped GaAs layer is preferably 55-60 nm.

[0080] In this invention, the unit structure includes a carbon-doped AlGaAs layer disposed on the upper surface of the carbon-doped GaAs layer. The carbon-doped AlGaAs layer can be carbon-doped Al... 0.1 Ga 0.9 As layer. The preferred doping concentration of the carbon-doped AlGaAs layer is 1×10⁻⁶. 18 ~5×1018 cm -3 In the embodiment, it can be 1×10 18 cm -3 .

[0081] In this invention, the thickness of the carbon-doped AlGaAs layer is preferably 65~70 nm.

[0082] In this invention, the preferred conditions for growing the carbon-doped GaAs layer include: a flow rate of TMGa preferably of 30-70 sccm, which can be 50 sccm in the embodiment; a flow rate of AsH3 preferably of 150-250 sccm, which can be 200 sccm in the embodiment; and a flow rate of CCl4 preferably of 20-30 sccm, which can be 25 sccm in the embodiment. The thickness of the carbon-doped GaAs layer is λ / 4n, where λ is the design wavelength and n is the refractive index of the carbon-doped GaAs layer material.

[0083] In this invention, the preferred conditions for growing the carbon-doped AlGaAs layer include: a flow rate of TMGa preferably of 30-70 sccm, which can be 50 sccm in the embodiment; a flow rate of TMAl preferably of 750-800 sccm, which can be 781 sccm in the embodiment; a flow rate of AsH3 preferably of 150-250 sccm, which can be 200 sccm in the embodiment; and a flow rate of CCl4 preferably of 1-10 sccm, which can be 5 sccm in the embodiment. The thickness of the carbon-doped AlGaAs layer is λ / 4n, where λ is the design wavelength and n is the refractive index of the carbon-doped AlGaAs layer material.

[0084] After obtaining the P-type Bragg reflector layer, the present invention grows a surface ohmic contact layer on the upper surface of the P-type Bragg reflector layer. The present invention does not have special requirements for the growth conditions of the surface ohmic contact layer.

[0085] The present invention preferably employs an in-situ reflection monitoring system to detect the optical thickness of the N-type Bragg reflector layer, the active region, the oxide confinement layer, the tunnel junction, the P-type Bragg reflector layer, and the surface ohmic contact layer, with the preferred detection wavelength being 980 nm.

[0086] To further illustrate the present invention, the technical solutions provided by the present invention will be described in detail below with reference to the embodiments, but they should not be construed as limiting the scope of protection of the present invention.

[0087] Example 1

[0088] This embodiment provides an epitaxial growth method for a vertical-cavity surface-emitting laser, specifically including the following steps:

[0089] This embodiment uses an (100) oriented N-type GaAs substrate and is performed in an Aixtron MOCVD system. The reaction chamber pressure is 100 mbar, and H2 is used as the carrier gas.

[0090] An N-type Bragg reflector layer is grown on an (100) oriented N-type GaAs substrate. The N-type Bragg reflector layer consists of multiple pairs of AlGaAs / GaAs Bragg reflector layers, each pair consisting of a high refractive index layer (GaAs) and a low refractive index layer (AlGaAs). The dopant is Si element, and the conductivity type is N-type.

[0091] 1) First, a high-temperature growth stage is carried out, with the temperature set at 680℃, to grow 12 pairs of Al. 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle.

[0092] 2) Subsequently, the temperature was lowered to 580℃ for a low-temperature growth stage, during which two pairs of Al atoms with the same thickness were grown. 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle.

[0093] 3) After the low-temperature growth stage, raise the temperature to 630℃ and hold for 20 seconds for micro-annealing.

[0094] 4) Reheat the temperature back to 680℃ at a rate of 2℃ / s to continue the high-temperature growth stage, growing 12 pairs of Al 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle, cooled to 580℃ to grow two pairs of Al substrates of the same thickness. 0.9 Ga 0.1 For As (70nm) / GaAs (60nm) DBR cycles, the temperature was raised to 630℃ and held for 20s for micro-annealing. The temperature was then increased back to 680℃ at a rate of 2℃ / s to grow 9 pairs of Al... 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle. The entire growth process was monitored in situ to ensure precise optical thickness of each layer. This resulted in an N-DBR with a total of 37 Al pairs. 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle.

[0095] After obtaining the N-type Bragg reflector, an active region, an oxide confinement layer, and a tunnel junction are grown on the N-type Bragg reflector.

[0096] After obtaining the tunnel junction, a P-type Bragg reflector layer is grown on the tunnel junction. The P-type Bragg reflector layer consists of 15 pairs of AlGaAs / GaAs Bragg reflector layers, each pair consisting of a high-refractive-index layer (GaAs) and a low-refractive-index layer (AlGaAs). The dopant is carbon, and the conductivity type is P-type. First, a high-temperature growth stage is performed, with the temperature set at 650℃, to grow 12 pairs of AlGaAs / GaAs Bragg reflector layers. 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle. Then, the temperature was lowered to 580℃ for a low-temperature growth stage, growing two pairs of Al substrates with the same thickness. 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle; after the low-temperature growth stage, the temperature is raised to 600℃ and held for 20s for micro-annealing; the temperature is then raised back to 650℃ at a rate of 2℃ / s to continue the high-temperature growth stage, growing one pair of Al 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR periodization yields P-DBR, consisting of 15 Al pairs. 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle.

[0097] Finally, a surface ohmic contact layer is grown on the P-DBR to obtain the VCSEL device.

[0098] Comparative Example 1

[0099] The structure is the same as that of the device in Example 1, except that it is grown using a conventional process, that is, the DBR cycles are all grown under the same temperature conditions (680°C) to obtain the VCSEL device.

[0100] Comparative Example 2

[0101] The preparation method is the same as in Example 1, except that: 1) a high-temperature growth stage is first performed, with the temperature set at 680°C, for the growth of 20 Al pairs. 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle.

[0102] 2) Subsequently, the temperature was lowered to 580℃ for a low-temperature growth stage, during which two pairs of Al atoms with the same thickness were grown. 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle.

[0103] 3) After the low-temperature growth stage, raise the temperature to 630℃ and hold for 20 seconds for micro-annealing.

[0104] 4) Reheat the temperature back to 680℃ at a rate of 2℃ / s to continue the high-temperature growth stage, growing 15 pairs of Al 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycles were used to obtain N-DBR, with a total of 37 Al pairs. 0.9 Ga 0.1 As (70nm) / GaAs (60nm) DBR cycle.

[0105] Test case

[0106] Figure 2 The warpage of the VCSEL device prepared in Comparative Example 1 is 257 μm. Figure 3 The warpage of the VCSEL device prepared in Example 1 is 128 μm. Figure 4 The warpage test results are for the device fabricated in Comparative Example 2. See below. Figure 4 As shown, the device prepared in Comparative Example 2 has a warpage of 225 μm, which exceeds 200 μm. This indicates that the epitaxial wafers prepared in Comparative Example 1 and Comparative Example 2 have significantly larger warpages, and their performance is worse than that of Example 1.

[0107] As can be seen from the above embodiments, the epitaxial growth method provided by the present invention, through a time-series temperature control method, periodically inserts low-temperature growth cycles into the DBR growth sequence and supplements them with in-situ micro-annealing, effectively releasing and "passivating" accumulated stress without changing the material system and optical structure. This method can significantly reduce epitaxial wafer warpage, suppress dislocation multiplication, and while maintaining the high reflectivity of the DBR (≥99.5%), greatly improve the consistency of epitaxial wafer material quality and device performance.

[0108] Although the above embodiments have provided a detailed description of the present invention, they are only some embodiments of the present invention, and not all embodiments. Other embodiments can be obtained based on these embodiments without creative effort, and these embodiments all fall within the protection scope of the present invention.

Claims

1. An epitaxial growth method for a Bragg reflector layer, characterized in that, The Bragg reflector layer comprises an m-layer unit structure stacked together, wherein each unit structure consists of one GaAs layer and one AlGaAs layer. The GaAs and AlGaAs layers are arranged alternately in the Bragg reflector layer. The growth process of the Bragg reflector layer includes n growth stages, where n is an integer ≥ 3. The n growth stages are alternating high-temperature growth stages and low-temperature growth stages, and the first growth stage is a high-temperature growth stage. After each low-temperature growth stage, a micro-annealing process is also performed. Each of the first to (n-1)th growth stages is a high-temperature growth stage that grows independently. x Layered unit structure, x The integer is between 10 and 15. In each of the 1st to (n-1th)th growth stages, the same number of unit structures are grown in each high-temperature growth stage, and each low-temperature growth stage grows independently. y Layered unit structure, y It can be 2 or 3; the first to the (n-1)th growth stages grow a total of m1 layers of unit structures, and the nth growth stage grows m2 layers of unit structures, where m = m1 + m2. When n is an odd number, m1 = When n is even, m1 = When the nth growth stage is a high-temperature growth stage, m2 is any integer from 1 to 7 or any integer from 8 to 18; when the nth growth stage is a low-temperature growth stage, m2 is 1, 2 or 3. The temperature for each high-temperature growth stage is 650~700℃, the temperature for each low-temperature growth stage is 560~600℃, and the temperature for micro-annealing is 600~640℃ for 10~30s.

2. The epitaxial growth method of the Bragg reflector layer according to claim 1, characterized in that, The temperature during the high-temperature growth stage is 680℃±2℃.

3. The epitaxial growth method of the Bragg reflector layer according to claim 1 or 2, characterized in that, The temperature during the low-temperature growth stage is 580℃±2℃.

4. The epitaxial growth method of the Bragg reflector layer according to claim 1, characterized in that, The micro-annealing process is carried out at a temperature of 600~630℃ and for a duration of 20s.

5. The epitaxial growth method of the Bragg reflector layer according to claim 1, characterized in that, After each micro-annealing process, the temperature is gradually increased to the temperature of the high-temperature growth stage for the high-temperature growth stage. The rate of temperature increase is 1~3℃ / s.

6. The epitaxial growth method of the Bragg reflector layer according to claim 1, characterized in that, In the single-layer unit structure: the thickness of the GaAs layer is 55~60nm; the thickness of the AlGaAs layer is 65~70nm.

7. An epitaxial growth method for a vertical-cavity surface-emitting laser (VCSEL), the VCSEL comprising a GaAs substrate, wherein an N-type Bragg reflector layer, an active region, an oxide confinement layer, a tunnel junction, a P-type Bragg reflector layer, and a surface ohmic contact layer are sequentially stacked on the upper surface of the GaAs substrate, characterized in that, The epitaxial growth method includes the following steps: An N-type Bragg reflector layer is prepared on the upper surface of the GaAs substrate according to the epitaxial growth method of the Bragg reflector layer according to any one of claims 1 to 6. An active region, an oxide confinement layer, and a tunnel junction are sequentially grown on the upper surface of the N-type Bragg reflector layer. A P-type Bragg reflector layer is prepared on the upper surface of the tunnel junction according to the epitaxial growth method of the Bragg reflector layer according to any one of claims 1 to 6; A surface ohmic contact layer is grown on the upper surface of the P-type Bragg reflector layer.

8. The epitaxial growth method for a vertical-cavity surface-emitting laser according to claim 7, characterized in that, Also includes: The optical thickness of the N-type Bragg reflector, active region, oxide confinement layer, tunnel junction, P-type Bragg reflector and surface ohmic contact layer was detected using an in-situ reflection monitoring system at a wavelength of 980 nm.

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