Method, system and equipment for measuring power supply ripples in chip and medium

Abstract

The invention relates to a method, a system, equipment and a medium for measuring power ripples in a chip, and relates to the technical field of voltage measurement, the method comprises the following steps: establishing a frequency and voltage relationship through pre-measurement, in application, setting a phase-locked loop based on a ring oscillator in Soc as a target mode by using a measurement program, and setting the mode under the working frequency of a digital IP, and interrupting continuous acquisition of frequency deviation statistical data through the processor so as to analyze a temperature interval, further fitting a curve in combination with the established relationship so as to obtain voltage deviation data, and finally, analyzing the power supply quality and the working stability of the digital IP by using the voltage deviation data so as to obtain a power supply ripple measurement result. Therefore, compared with the prior art, more convenient, accurate and efficient power supply ripple data measurement is realized, and the accuracy of power supply ripple data measurement is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of voltage measurement, and in particular to a chip-in power supply ripple measurement method, system, device and medium. BACKGROUND

[0002] For a digital IP (hereinafter referred to as IP) with high power consumption, the power supply quality needs to be measured to evaluate whether the IP can work reliably at a specified frequency performance. Large-scale IPs on today's system-on-chip (Soc) such as ISP / NPU usually use DCDC power supply. During operation, not only the average power consumption is large, but also a large current is drawn during the start of data-intensive processing and during processing, resulting in a large voltage drop of the external power supply.

[0003] In the prior art, the conventional method for evaluating the power supply quality is to use an ADC type device such as an oscilloscope to sample and measure the power supply ripple of the IP at the power supply pin of the chip for a period of time. The bandwidth of the oscilloscope is generally 20 MHz. When the power consumption of the digital IP is low, the result of this measurement method is accurate. When the power consumption of the IP is large, the voltage drop on the IP power supply path needs to be considered. For example, in Figure 1 , the IP power supply path includes components: 103 -> 102 -> 101, corresponding to voltage point 1, voltage point 2, and voltage point 3, respectively. Among them, voltage point 1 refers to the voltage at the pin, voltage point 2 refers to the pad connected to the IP by the Packaging Wire, and voltage point 3 refers to the lowest voltage point inside the IP. As can be seen, due to the large area of the large-scale IP, the voltages at different points in the area are not uniform, and there is a lowest voltage point. The voltage drops of the components 102 and 101 on the path are significant. The prior art usually obtains the voltage ripple at the voltage point 1 to evaluate the power supply quality of the IP, and realizes the power supply ripple measurement in the Soc. However, there is a path loss from the voltage point 1 to the voltage point 3. The power supply quality evaluation method of the prior art is not accurate. Therefore, the prior art cannot accurately and efficiently evaluate the power supply quality of the large-scale digital IP. SUMMARY

[0004] The present application provides a chip-in power supply ripple measurement method, system, device and medium, which can be applied to the power supply quality evaluation of a large-scale digital IP in a Soc, and improves the accuracy of the power supply quality evaluation of the digital IP.

[0005] In a first aspect, the present application provides a chip-in power supply ripple measurement method, comprising:

[0006] When the system-on-chip is in a low-power mode, based on the measured frequency and voltage data at different temperature points, a frequency and voltage relationship mapping data is established;

[0007] By a preset measurement procedure, a phase-locked loop based on a ring oscillator is set to a target mode, and the phase-locked loop is set to work at a target working frequency of a digital IP based on the target mode;

[0008] At the target working frequency, for each measurement duration, frequency deviation statistics are performed by a measurement procedure, key information of a processor interrupt generated in the system-on-chip is acquired, and a frequency deviation statistical data set is established;

[0009] According to the frequency deviation statistical data set, a temperature interval is analyzed, data analysis is performed in combination with the relationship mapping data, voltage deviation data of each measurement duration is determined, and a voltage deviation data set is formed;

[0010] Based on the voltage deviation data set, power supply quality and working stability of the digital IP are analyzed, and a power supply ripple measurement result is obtained;

[0011] The digital IP and the phase-locked loop based on the ring oscillator are both arranged in the system-on-chip.

[0012] Optionally, based on the measured frequency and voltage data at different temperature points, relationship mapping data of frequency and voltage is established, including:

[0013] The process point of the system-on-chip is determined;

[0014] For the process point, a measurement relationship between temperature points and voltage points is established, and a measurement temperature list and a measurement voltage list are obtained;

[0015] When the phase-locked loop is in the target mode and works at the target working frequency, a to-be-measured temperature point is selected from the measurement temperature list;

[0016] Taking each to-be-measured temperature point as a reference, for each voltage point in the measurement voltage list, the output frequency of the ring oscillator is measured by a frequency counter of the system-on-chip, and a measurement data set is obtained, each frequency measurement data in the measurement data set including the frequency measured at each voltage point at the same to-be-measured temperature point;

[0017] Based on the measurement data set, the measurement temperature list and the measurement voltage list, a quadratic polynomial curve fitting is performed, and the relationship mapping data of frequency and voltage is established.

[0018] Optionally, based on the measurement data set, the measurement temperature list and the measurement voltage list, a quadratic polynomial curve fitting is performed, and the relationship mapping data of frequency and voltage is established, including:

[0019] Based on the measured temperature list and the measured voltage list, corresponding frequency measurement data is selected from the measurement data set, and a quadratic polynomial curve is fitted;

[0020] Based on the quadratic polynomial curve, the influence of temperature on frequency and the influence of voltage on frequency are analyzed to obtain a first influence relationship between voltage and frequency and a second influence relationship between temperature and frequency;

[0021] Based on the second influence relationship, a temperature interval is established;

[0022] Based on the temperature interval and the first influence relationship, a relationship mapping data between frequency and voltage is established using the quadratic polynomial curve.

[0023] Optionally, at the target operating frequency, for each measurement duration, frequency deviation statistics are performed through a measurement program to obtain key information of processor interrupt generation in the system-level chip, and a frequency deviation statistical data set is established, including:

[0024] A measurement duration configuration is determined, and the duration configuration is composed of at least two measurement durations;

[0025] When the phase-locked loop operates at the target operating frequency, in each measurement duration, a temperature sensor in the system-level chip is turned on through a measurement program to obtain temperature information;

[0026] Frequency deviation statistics are performed through the measurement program until processor interrupt generation, and an interrupt task is obtained;

[0027] Key information is read from the interrupt task, and the temperature information is combined to construct a frequency deviation statistical data set.

[0028] Optionally, a temperature interval is analyzed according to the frequency deviation statistical data set, and data analysis is performed in combination with the relationship mapping data to determine voltage deviation data of each measurement duration to form a voltage deviation data set, including:

[0029] For each measurement duration, a temperature interval is determined based on temperature information in the frequency deviation statistical data set;

[0030] A target fitting curve corresponding to the temperature interval is selected from the relationship mapping data;

[0031] Based on the target fitting curve, voltage deviation data under each measurement duration is calculated to obtain a voltage deviation data set.

[0032] Optionally, based on the target fitting curve, voltage deviation data under each measurement duration is calculated, including:

[0033] Analyze the target fitted curve and extract the voltage limit and voltage mean, wherein the voltage limit includes the maximum voltage value and the minimum voltage value;

[0034] A first voltage deviation is analyzed based on the voltage limit and the target operating frequency voltage, and a second voltage deviation is analyzed based on the average voltage and the target operating frequency;

[0035] Based on the first voltage deviation, the second voltage deviation, and the temperature information, the voltage deviation data is determined.

[0036] Optionally, analyzing the power supply quality and operational stability of the digital IP based on the voltage deviation dataset includes:

[0037] Based on the voltage deviation dataset and the target operating frequency, the power supply quality and operational stability of the digital IP are analyzed.

[0038] Secondly, this application provides an in-chip power supply ripple measurement system, characterized in that it includes:

[0039] The measurement data acquisition module is used to establish a frequency-voltage relationship mapping data based on the frequency and voltage data measured at different temperature points.

[0040] The operation setting module is used to set the phase-locked loop based on the ring oscillator to a target mode through a preset measurement program, and set the phase-locked loop to operate at a target operating frequency of the digital IP based on the target mode;

[0041] The frequency deviation statistics acquisition module is used to perform frequency deviation statistics for each measurement duration at the target operating frequency, acquire key information generated by processor interrupts in the system-on-a-chip, and establish a frequency deviation statistics data set.

[0042] The curve fitting module is used to analyze the temperature range based on the frequency deviation statistical data set, and to perform data analysis in combination with the relationship mapping data to determine the voltage deviation data for each measurement duration, thereby forming a voltage deviation dataset.

[0043] The power ripple measurement module is used to analyze the power supply quality and operating stability of the digital IP based on the voltage deviation dataset, and obtain the power ripple measurement results.

[0044] The digital IP and the phase-locked loop based on the ring oscillator are both located in the system-on-a-chip.

[0045] Thirdly, this application provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus;

[0046] Memory, used to store computer programs;

[0047] When a processor executes a program stored in a memory, it implements the steps of the chip power supply ripple measurement method according to any one of claims 1-7.

[0048] Fourthly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the chip-based power supply ripple measurement method as described in any one of claims 1-7.

[0049] In summary, this embodiment first sets the SoC to a low-power mode, configures the phase-locked loop (PLL) based on a ring oscillator to enter the target mode, and operates at the target operating frequency of the digital IP. Measurements are performed at different established temperature points and voltages to analyze the relationship between frequency and voltage. Then, in a specific application, a measurement program is used to set the PLL to the target mode and operate at the target frequency. For each pre-established operating duration, frequency deviation statistics generated by processor interrupts are continuously acquired. Subsequently, the frequency deviation statistics are used to analyze the temperature range, and the established relationship is combined to further fit the curve, obtaining voltage deviation data for each measurement duration. Finally, the voltage deviation data is used to analyze the power supply quality and operational stability of the digital IP, obtaining the power ripple measurement results. It is evident that compared to existing technologies, such as using ADC-type devices like oscilloscopes to sample and measure IP power ripple at the chip's power pins, this embodiment can accurately measure the power ripple within the digital IP chip, providing more accurate power ripple data for large-scale digital IPs to evaluate their power supply quality. This achieves a more convenient, accurate, and efficient power ripple data measurement, improving the accuracy of power ripple data measurement. Attached Figure Description

[0050] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0051] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 A schematic diagram of the power supply ripple data measurement method provided in this application;

[0053] Figure 2A schematic flowchart illustrating a method for measuring power supply ripple within a chip, provided in an embodiment of this application;

[0054] Figure 3 This is a flowchart illustrating the steps of an optional embodiment of the present application for measuring power supply ripple within a chip.

[0055] Figure 4 This is an example diagram of the voltage-frequency variation during operation of a digital IP provided in this application;

[0056] Figure 5 This is an example of the internal structure diagram of a SoC chip provided in this application;

[0057] Figure 6 This is an example of a frequency-voltage relationship curve provided in this application;

[0058] Figure 7 This is an example graph of frequency-voltage relationship curves at different temperatures provided in this application;

[0059] Figure 8 This is an example graph of frequency-temperature relationship curves at different voltages provided in this application;

[0060] Figure 9 A structural block diagram of an in-chip power supply ripple measurement system provided in an embodiment of this application;

[0061] Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0062] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0063] To facilitate understanding of the embodiments of this application, further explanations and descriptions will be provided below in conjunction with the accompanying drawings and specific embodiments. These embodiments do not constitute a limitation on the embodiments of this application.

[0064] Figure 2 This is a flowchart illustrating a method for measuring power supply ripple within a chip, provided in an embodiment of this application. This method can be applied to power supply ripple measurement of digital IP within a system-on-a-chip (SoC), and specifically includes the following steps:

[0065] Step 210: When the system-on-a-chip is in low-power mode, establish frequency and voltage relationship mapping data based on the frequency and voltage data measured at different temperature points.

[0066] In this embodiment, the frequency-voltage relationship mapping data refers to the frequency vs. voltage relationship. This relationship mapping data mainly exists as a frequency-voltage fitting curve and can involve different temperature points / temperature ranges. Different temperature points or temperature ranges can have corresponding frequency-voltage fitting curves.

[0067] In this specific implementation, a measurement program can be established, and a series of measurement temperature and voltage points can be established. Using the measurement program, measurements are performed under standard conditions (e.g., the SoC is in low-power mode, and the phase-locked loop based on the ring oscillator within the SoC operates at the target operating frequency of the digital IP) through a predictive measurement method. The influence between temperature and frequency, and between voltage and frequency, is analyzed to obtain data (i.e., measurement data). The measurement data is then fitted to obtain frequency-voltage relationship mapping data for subsequent measurement analysis and processing.

[0068] Step 220: Using a preset measurement program, the phase-locked loop based on the ring oscillator is set to the target mode, and the phase-locked loop is set to operate at the target operating frequency of the digital IP based on the target mode.

[0069] The digital IP and the phase-locked loop based on the ring oscillator are both located in the system-on-a-chip.

[0070] Step 230: At the target operating frequency, for each measurement duration, frequency deviation statistics are performed through the measurement program to obtain key information generated by processor interrupts in the system-on-a-chip and establish a frequency deviation statistics data set.

[0071] Step 240: Analyze the temperature range based on the frequency deviation statistical data set, and perform data analysis in conjunction with the relationship mapping data to determine the voltage deviation data for each measurement duration, forming a voltage deviation dataset.

[0072] Step 250: Analyze the power supply quality and operating stability of the digital IP based on the voltage deviation dataset to obtain the power ripple measurement results.

[0073] A unified explanation of steps 220-250 is provided below:

[0074] In practical applications, firstly, the phase-locked loop (PLL) can be configured to enter the target mode (a free oscillation mode supported by the PLL) through the measurement program (hereinafter referred to as the "program"), and the PLL can be configured to operate at the target operating frequency of the digital IP. Then, the measurement duration (multiple measurement durations can be configured) is configured through the program, frequency deviation statistics are initiated, and the program waits for an interrupt from the CPU in the SoC. Key information is read from the generated interrupt task to obtain the frequency deviation statistics data corresponding to each measurement duration, thus establishing a frequency deviation statistics data set. Each frequency deviation statistics data set includes at least voltage-related data and temperature points.

[0075] Subsequently, based on the statistical data of frequency deviations, the temperature range corresponding to the temperature points is extracted for analysis. Using this temperature range, a fitting curve corresponding to the temperature range is selected from the relational mapping data. The deviation between the measured voltage and the target voltage under this measurement duration is analyzed through the fitting curve analysis to obtain voltage deviation data. Finally, all voltage deviation data are used to evaluate the power supply quality and operating stability of the digital IP, thus obtaining the power ripple data of the large-scale digital IP in the SoC, which serves as the power ripple measurement result.

[0076] As can be seen, the embodiments of this application establish the relationship between frequency and voltage through predicted quantities. In application, a measurement program is used to set the ring oscillator of the SoC to the target mode and to the operating frequency of the digital IP. Frequency deviation statistics are continuously acquired through processor interrupts to analyze the temperature range, and the established relationship is combined to further fit the curve to obtain voltage deviation data. Finally, the voltage deviation data is used to analyze the power supply quality and operating stability of the digital IP to obtain the power ripple measurement results. Therefore, compared with the prior art, this application achieves more convenient, accurate, and efficient power ripple data measurement, improving the accuracy of power ripple data measurement.

[0077] Reference Figure 3 The diagram illustrates a step-by-step flowchart of an optional embodiment of a method for measuring power supply ripple within a chip. This method can be applied to power supply ripple measurement in digital IPs within a SoC (System-on-a-Chip) chip, and may specifically include the following steps:

[0078] Step 310: When the system-on-a-chip is in low-power mode, establish frequency and voltage relationship mapping data based on the frequency and voltage data measured at different temperature points.

[0079] Optionally, establishing the frequency-voltage relationship mapping data based on the frequency and voltage data measured at different temperature points may include the following sub-steps:

[0080] Sub-step 3101: Determine the process point of the system-on-a-chip.

[0081] Sub-step 3102: For the process points, establish the measurement relationship between temperature points and voltage points to obtain a list of measured temperatures and a list of measured voltages.

[0082] Sub-step 3103: When the phase-locked loop is in the target mode and operating at the target operating frequency, select the temperature point to be measured from the measured temperature list.

[0083] Sub-step 3104: Using each of the temperature points to be measured as a reference, the output frequency of the ring oscillator is measured for each voltage point in the measurement voltage list through the frequency counter of the system-on-a-chip to obtain a measurement dataset. The frequency measurement data in the measurement dataset includes the frequency measured at each voltage point for the same temperature point to be measured.

[0084] Sub-step 3105: Based on the measurement dataset, the measurement temperature list, and the measurement voltage list, perform quadratic polynomial curve fitting to establish frequency-voltage relationship mapping data.

[0085] A unified description is provided for sub-steps 3101-3105:

[0086] In related technologies, large-scale IPs on current SoCs generate significant power drain during the initial startup and processing of data-intensive data, leading to a substantial voltage drop in the external power supply. Figure 4 The voltage drop example shown is as follows: Normal supply voltage 0.9V -> During operation 1, with intensive IP processing, the voltage drops rapidly to 0.84V in microseconds over time t1 (e.g., 10µs) and then to t2 (e.g., 1ms). -> After intensive processing, the supply voltage gradually recovers to 0.90V within t3. A common method for evaluating power supply quality is to use an ADC-type device, such as an oscilloscope, to sample and measure the power supply ripple of the IP over a period of time at the chip's power pins. Oscilloscope bandwidth is typically 20MHz. When IP power consumption is high, the voltage drop along the IP power supply path must be considered. Therefore, the existing method of using an ADC-type device to sample and measure IP power supply ripple at the chip's power pins is clearly insufficient for accurately evaluating the power supply quality of large-scale digital IPs.

[0087] To address the technical problems existing in the prior art, this embodiment primarily obtains, as follows: Figure 1 The voltage ripple at voltage point 3 is shown to evaluate the power supply quality of the IP and avoid path loss issues. Obtaining voltage point 3 is the most accurate method.

[0088] The SoC-internal power ripple measurement method proposed in this embodiment utilizes an improved SoC internal structure to achieve highly accurate evaluation of power supply quality in large-scale digital IP systems. (Refer to...) Figure 5 As shown, the SoC includes the following components:

[0089] 1. Digital IP 201. Large-scale digital IP within a SoC chip, such as an ISP / NPU. This embodiment implements a ring oscillator-based circuit to capture the internal voltage of the digital IP, providing a clock signal and monitoring voltage changes. Its components are as follows:

[0090] ① Phase-locked loop 202 based on a ring oscillator. The phase-locked loop supports free oscillation mode, also known as: Free Run mode.

[0091] ② Frequency Deviation Statistics 203 is used to count the deviation of the ring oscillator from the target frequency Ft over a period of time (Ft refers to the Target Frequency), including but not limited to: maximum value, minimum value, and average value, which correspond to MAX value, MIN value and AVG value respectively.

[0092] ③ Frequency counter 204 can be used to count the current frequency of the ring oscillator in real time.

[0093] 2. Processor 205, the CPU processor within the SoC chip, used to run code programs.

[0094] 3. Memory 206, SoC off-chip memory, used to store code programs.

[0095] 4. Temperature sensor 207, an on-chip temperature sensor for SoC, used to monitor the internal temperature of the chip in real time.

[0096] The DCDC208 is an external DC-DC power supply for SoCs, used to power the SoC chip. It is programmable and can be controlled by the SoC program to change the supply voltage.

[0097] In practical implementation, in order to achieve subsequent large-scale digital IP power supply quality measurement within the SoC, this embodiment can first establish a "frequency vs. voltage" relationship through a measurement program as relationship mapping data.

[0098] Before measurement, the program configures the phase-locked loop 202 to Free Run mode. In this mode, the output frequency of the ring oscillator varies with PVT, which stands for Process, Voltage, and Temperature. Therefore, this embodiment can fully consider different processes and pre-analyze the measurement relationship between temperature points and voltage (such as the voltage situation that may correspond to a certain temperature point). A fixed Process point is selected as the selected test sample, and the "frequency vs. voltage" data at different temperatures is measured. Before measurement, a temperature list and a measurement voltage list can be established for the Process point. Then, the measurement begins, and the specific measurement process is as follows:

[0099] First, the program configures the SoC chip to be in low-power mode. Low-power mode generally refers to the SoC operating at a high-frequency crystal oscillator clock (such as 24MHz) with all irrelevant hardware turned off. Since running the program for measurement also consumes power from the SoC, which causes the SoC to generate heat, placing the chip in low-power mode before running the program reduces the impact of this heat generation on the test results.

[0100] Then, configure the phase-locked loop 202 to operate at the target operating frequency Ft of the digital IP.

[0101] Subsequently, a temperature point is selected from the established list of measurement voltages as the temperature to be measured, denoted as T. For the selected temperature point T, the frequency and data for different voltages at that temperature point T are measured. For example, the process node in this example is 22 nanometers (nm), and the standard operating voltage of the digital IP is 0.9V. Therefore, the list of measurement voltages may include, but is not limited to, {0.80V, 0.81V, 0.82V, 0.83V, 0.84V, 0.85V, 0.86V, 0.87V, 0.88V, 0.89V, 0.90V, 0.91V, 0.92V, 0.93V, 0.94V, 0.95V, 0.96V, 0.97V, 0.98V, 0.99V, 1.00V}. The program is configured to output 0.80V from the DC-DC208, and the frequency counter 204 is enabled to measure the output frequency of the ring oscillator. This measurement process is repeated until the voltage list is traversed. The measured data is then fitted with a quadratic polynomial curve to obtain the voltage-frequency relationship at temperature point T. This can be referenced. Figure 6 As shown.

[0102] Iterate through each temperature point in the temperature list. For example, if the temperature list is selected as {-30℃, -20℃, 0℃, 20℃, 40℃, 60℃, 80℃, 100℃, 120℃}, repeat the process of measuring the frequency and voltage data at different temperature points T to obtain the frequency vs. voltage data for each temperature point in the list. Then, fit a quadratic polynomial curve, as shown in the example below. Figure 7 As shown.

[0103] Thus, this embodiment obtains a measurement dataset that simultaneously involves temperature, voltage, and frequency.

[0104] Subsequently, quadratic polynomial curve fitting is performed on the measurement dataset to analyze the relationship between frequency and voltage at different temperatures, and to analyze the relationship between frequency and voltage at different voltages, thus establishing a relationship mapping data.

[0105] In one optional embodiment, this embodiment performs quadratic polynomial curve fitting based on the measurement dataset, the measurement temperature list, and the measurement voltage list to establish frequency-voltage relationship mapping data. Specifically, this may include: selecting corresponding frequency measurement data from the measurement dataset based on the measurement temperature list and the measurement voltage list, and fitting a quadratic polynomial curve; performing visualization processing based on the quadratic polynomial curve to analyze the influence of temperature and voltage on frequency, obtaining a first influence relationship between voltage and frequency and a second influence relationship between temperature and frequency; establishing a temperature range based on the second influence relationship; and establishing frequency-voltage relationship mapping data using the quadratic polynomial curve based on the temperature range and the first influence relationship.

[0106] In practical implementation, combined with Figure 7 and Figure 8 As shown, using each measured temperature point as a reference, the relationship between frequency and voltage at different temperatures can be analyzed, and a quadratic polynomial curve can be fitted to obtain the frequency vs. voltage curve; using each voltage point in the measured voltage list (i.e., the measured voltage point) as a reference, the relationship between frequency and temperature under different voltages can be analyzed, and a quadratic polynomial curve can be fitted to obtain the frequency vs. temperature curve.

[0107] Subsequently, the two quadratic polynomial curves with different benchmarks were visualized to create visual graphs. For example... Figure 7 As shown, the relationship between frequency and voltage at different temperatures is illustrated; Figure 8 As shown, the relationship between frequency and temperature is illustrated under different voltages.

[0108] Furthermore, in combination Figure 7 and Figure 8 By analyzing the quadratic polynomial curves in the visualization, the influence relationship between voltage and frequency, as well as the influence relationship between temperature and frequency, is clarified. By analyzing each influence relationship, the key influence relationships with a high degree of influence on frequency are identified as key influence relationships, and the influence relationships with a low degree of influence on frequency are identified as secondary influence relationships.

[0109] In this embodiment, combined with Figure 7 and Figure 8 Analysis reveals that the first influencing relationship is the critical one, while the second influencing relationship is a secondary one. Since the secondary influencing relationship has less impact on frequency and its changes typically level off within a certain range, this embodiment utilizes the second influencing relationship to establish a temperature range. This temperature range consists of multiple temperature segments (each segment includes a starting temperature point and an ending temperature point). Within the same temperature range, using the first influencing relationship as a benchmark, and employing the corresponding quadratic polynomial curve—that is, the quadratic polynomial curve of frequency vs. voltage—a mapping data between frequency and voltage is established.

[0110] As an example, combined Figure 7 and Figure 8 Detailed explanation:

[0111] Reference Figure 8 From another perspective, regarding the influence of temperature on frequency, under the same voltage, the frequency changes little with temperature; under different voltages, the coefficients of the quadratic term of the fitted curves are very similar but not identical, indicating that the trend of frequency change with temperature is slightly different under different voltages. However, it is clear that temperature has a very small effect on frequency. (Refer to...) Figure 7 It is evident that voltage significantly affects frequency compared to temperature. Based on this result, temperature can be ignored in engineering applications. However, to obtain a more accurate voltage value at point 3107 (see...), further research is needed. Figure 1 This approach avoids the need to measure the "frequency vs. voltage" curve at every temperature point, as the voltage value at the digital IP address is not required. Therefore, this embodiment employs a temperature range-based approach. For example, a temperature range can be set (-40℃, -30℃), and a fitting curve for this range at T=-30℃ can be used, termed "V=F(f), T=-30℃". Based on this rule, the list of temperature ranges is shown in Table 1 below.

[0112] Table 1 Temperature Ranges and Fitted Curves

[0113] The relational mapping data can be represented in the form of Table 1.

[0114] Therefore, this embodiment realizes the measurement of the "frequency vs. voltage" relationship of the reference. The established relationship mapping data can be used as standard measurement and analysis data to measure the voltage of digital IP in practical applications and evaluate the power supply quality and operating stability of digital IP.

[0115] Step 320: Using a preset measurement program, the phase-locked loop based on the ring oscillator is set to the target mode, and the phase-locked loop is set to operate at the target operating frequency of the digital IP based on the target mode.

[0116] The digital IP and the phase-locked loop based on the ring oscillator are both located in the system-on-a-chip.

[0117] In practical applications, the program can configure the phase-locked loop 202 to Free Run mode and further configure the phase-locked loop 202 to operate at the target operating frequency of the digital IP, thereby calculating the frequency deviation.

[0118] Step 330: Determine the measurement duration configuration.

[0119] The duration configuration consists of at least two measurement durations.

[0120] Step 340: When the phase-locked loop is operating at the target operating frequency, during each measurement duration, the temperature sensor in the system-on-a-chip is activated through the measurement program to acquire temperature information.

[0121] Step 350: Perform frequency deviation statistics through the measurement program until a processor interrupt occurs, and obtain the interrupt task.

[0122] Step 360: Read key information from the interrupted task and combine it with the temperature information to construct a frequency deviation statistics set.

[0123] A unified explanation of steps 330-360 is provided below:

[0124] In practical applications, considering that real-time frequency capture using the frequency counter 204 consumes significant CPU resources, requiring the CPU to frequently and actively query and retrieve the counter results, this embodiment improves the data capture process. Instead of using the frequency counter 204 to capture the frequency, it obtains voltage-related data from the frequency deviation statistics 203 generated by the CPU interrupt. Specifically, the frequency deviation statistics 203 can be configured with thresholds and interrupt functions, eliminating the need for the CPU to actively query; it simply waits for the interrupt to generate and retrieve the results. Therefore, when using the frequency deviation statistics 203 to count the frequency deviation over a period of time, key information that can be considered when evaluating the power supply quality of the IP includes, but is not limited to, the MAX value (maximum voltage), MIN value (maximum voltage), and AVG value (average voltage), without requiring real-time voltage data.

[0125] The frequency deviation statistical process is described in detail below:

[0126] First, the program is configured to calculate the duration. This duration configuration can consist of at least two measurement durations, as exemplified by [example reference]. Figure 4 As shown, during runtime 1, the measurement duration configuration is equal to t1+t2+t3.

[0127] During each measurement period, the program then activates the temperature sensor 207 to acquire temperature information.

[0128] The program then starts frequency deviation statistics (203) and waits for a CPU interrupt. At this point, the CPU can be freed up to execute other tasks.

[0129] When a CPU interrupt occurs, the MAX, MIN, AVG values ​​and temperature of frequency deviation statistics 203 can be read from the interrupt task. This represents the frequency deviation statistics data. Assume the record is: Frequency_Group1={max, min, avg, temp}, abbreviated as FG1.

[0130] After the CPU exits an interrupt task, it is freed to execute other tasks and waits for the next interrupt.

[0131] For each measurement duration, repeat the process from enabling frequency deviation statistics 203 to interruption until sufficient statistical data is obtained, establish a frequency deviation statistical data set, assuming the record is: {FG1, FG2, FG3, ...,FGn}, and then disable frequency deviation statistics 203.

[0132] Step 370: Analyze the temperature range based on the frequency deviation statistical data set, and perform data analysis in conjunction with the relationship mapping data to determine the voltage deviation data for each measurement duration, forming a voltage deviation dataset.

[0133] In one optional embodiment, this embodiment analyzes the temperature range based on the frequency deviation statistical data set and performs data analysis in conjunction with the relationship mapping data to determine the voltage deviation data for each measurement duration, forming a voltage deviation dataset. This may include: determining a temperature range for each measurement duration based on the temperature information in the frequency deviation statistical data set; selecting a target fitting curve corresponding to the temperature range from the relationship mapping data; and calculating the voltage deviation data for each measurement duration based on the target fitting curve to obtain the voltage deviation dataset.

[0134] In the specific implementation, the frequency deviation statistics already include the corresponding temperature. Therefore, for each data point in the frequency deviation statistics dataset, the temperature can be read first to determine the temperature range. Then, the fitting curve corresponding to the temperature range is found in the relational mapping data and used as the target fitting curve. The deviation of the actual voltage from the target voltage is calculated using the target fitting curve, i.e., the voltage deviation data. All voltage deviation data are recorded to obtain the voltage deviation dataset.

[0135] Optionally, the above-mentioned calculation of voltage deviation data for each measurement duration based on the target fitting curve may specifically include: analyzing the target fitting curve to extract voltage limits and average voltage values, wherein the voltage limits include a maximum voltage value and a minimum voltage value; analyzing a first voltage deviation based on the voltage limits and the target operating frequency voltage; and analyzing a second voltage deviation based on the average voltage and the target operating frequency; and determining voltage deviation data based on the first voltage deviation, the second voltage deviation, and the temperature information.

[0136] The following is a detailed explanation of the specific process for calculating voltage deviation data:

[0137] Based on the example above, assume the obtained frequency deviation statistics dataset is: {FG1, FG2, FG3,..., FGn}. First, iterate through the dataset, selecting the frequency deviation statistics in sequence, assuming FG1 is selected first. Then, read FG1, obtaining the data {max, min, avg, temp}, where temp is the statistical temperature point. Find the temperature range containing this temperature point in Table 1 above, and further determine the fitting curve corresponding to this temperature range. For example, when the temperature point is -30℃, the selected temperature range is: (-40℃, -30℃], and the fitting curve is: V=F(f), T=-30℃.

[0138] The deviation relative to the target voltage can then be calculated using the following formula:

[0139] Substitute f = Ft + max, f = Ft + min, and f = Ft + avg into V = F(f) one by one, and subtract V = F(Ft) to calculate the deviations Vmax, Vmin, and Vavg relative to the target voltage. Assume the record after FG1 calculation is Voltage_Group1 = {max, min, avg, temp}, abbreviated as VG1. Here, Vmax corresponds to max in VG1, Vmin corresponds to min in VG1, and Vavg corresponds to avg in VG1.

[0140] Repeat the above process to calculate all voltage deviation data, assuming the records are: {VG1, VG2, VG3, ...,VGn}. It can be understood that FG1 corresponds to VG1, FG2 corresponds to VG2, ..., FGn corresponds to VGn.

[0141] The first voltage deviation includes Vmax and Vmin, and the second voltage deviation includes Vavg.

[0142] Step 380: Analyze the power supply quality and operating stability of the digital IP based on the voltage deviation dataset to obtain the power ripple measurement results.

[0143] In one optional embodiment, this embodiment analyzes the power supply quality and operational stability of the digital IP based on the voltage deviation dataset, which may specifically include: analyzing the power supply quality and operational stability of the digital IP based on the voltage deviation dataset and the target operating frequency.

[0144] In practical implementation, the power supply quality and operational stability of the digital IP are evaluated based on the voltage deviation dataset {VG1, VG2, VG3, ..., VGn} and the frequency performance Ft.

[0145] In summary, this embodiment first sets the SoC to a low-power mode, configures the phase-locked loop (PLL) of the ring oscillator to enter the target mode, and operates at the target operating frequency of the digital IP. Measurements are then performed at different established temperature points and voltages to analyze the relationship between frequency and voltage. In specific applications, a measurement program is used to set the PLL to the target mode and operate at the target frequency. For each pre-established operating duration, frequency deviation statistics generated by processor interrupts are continuously acquired. Subsequently, the frequency deviation statistics are used to analyze the temperature range, and the established relationship is combined to further fit curves to obtain voltage deviation data for each measurement duration. Finally, the voltage deviation data is used to analyze the power supply quality and operating stability of the digital IP to obtain the power ripple measurement results. Therefore, compared to existing technologies, such as measurement methods that use ADC-type devices like oscilloscopes to sample and measure IP power ripple at the chip's power pins, this embodiment has the following advantages:

[0146] ① It can accurately measure the power ripple inside the digital IP chip, providing more accurate power ripple data for large-scale digital IP to evaluate its power supply quality.

[0147] ② An example of voltage drop caused by packaging is as follows:

[0148] Taking a 22nm process QFP (Quad Flat Package) as an example, a typical copper packaging wire has a resistance of 250 mohm and a current rating of 250 mA. The peak current of the digital IP during operation is 2A. The package is packaged with two pins and then connected to the pad of the digital IP using 14 packaging wires. The 14 packaging wires can provide 3.5A of current and have a resistance of about 17.86 mohm. The voltage drop generated by the 2A peak current of the digital IP on the packaging wire is about 35.7mV.

[0149] Example of voltage drop generated inside digital IP: Due to the large area of ​​large-scale IP, the voltage at different points in the area is not uniform, and there is a point of lowest voltage. This voltage drop is related to the specific design of the IP and cannot be generalized.

[0150] As can be seen, taking the 22nm process QFP package as an example, the present invention provides power ripple data with an accuracy of at least 35.7mV more than that at the power pin, effectively improving the accuracy of power ripple data measurement.

[0151] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of actions. However, those skilled in the art should know that the embodiments of this application are not limited to the described order of actions, because according to the embodiments of this application, some steps may be performed in other orders or simultaneously.

[0152] like Figure 9 As shown in the figure, this application embodiment also provides an in-chip power supply ripple measurement system 900, including:

[0153] The measurement data acquisition module 910 is used to establish frequency-voltage relationship mapping data based on the frequency and voltage data at different temperature points measured;

[0154] The operation setting module 920 is used to set the phase-locked loop based on the ring oscillator to a target mode through a preset measurement program, and set the phase-locked loop to operate at a target operating frequency of the digital IP based on the target mode.

[0155] The frequency deviation statistics acquisition module 930 is used to perform frequency deviation statistics for each measurement duration at the target operating frequency, acquire key information generated by processor interrupts in the system-on-a-chip, and establish a frequency deviation statistics data set.

[0156] The curve fitting module 940 is used to analyze the temperature range based on the frequency deviation statistical data set, and to perform data analysis in combination with the relationship mapping data to determine the voltage deviation data for each measurement duration, thereby forming a voltage deviation dataset.

[0157] The power ripple measurement module 950 is used to analyze the power supply quality and operating stability of the digital IP based on the voltage deviation dataset, and obtain the power ripple measurement results.

[0158] The digital IP and the phase-locked loop based on the ring oscillator are both located in the system-on-a-chip.

[0159] Optional, the measurement data acquisition module includes:

[0160] The measurement establishment submodule is used to determine the process point of the system-on-a-chip; for the process point, the measurement relationship between temperature points and voltage points is established to obtain a list of measured temperatures and a list of measured voltages;

[0161] The mode setting submodule is used to select the temperature point to be measured from the measured temperature list when the phase-locked loop is in the target mode and operating at the target operating frequency;

[0162] The output frequency measurement submodule is used to measure the output frequency of the ring oscillator for each voltage point in the measurement voltage list, based on each of the temperature points to be measured, through the frequency counter of the system-on-a-chip, to obtain a measurement dataset. The frequency measurement data in the measurement dataset includes the frequency measured at each voltage point of the same temperature point to be measured.

[0163] The relationship fitting submodule is used to perform quadratic polynomial curve fitting based on the measurement dataset, the measurement temperature list, and the measurement voltage list to establish frequency-voltage relationship mapping data.

[0164] Optionally, the relationship fitting submodule is specifically used to select corresponding frequency measurement data from the measurement dataset based on the measured temperature list and the measured voltage list, and fit a quadratic polynomial curve; perform visualization processing based on the quadratic polynomial curve to analyze the influence of temperature on frequency and the influence of voltage on frequency, and obtain a first influence relationship between voltage and frequency and a second influence relationship between temperature and frequency; establish a temperature range based on the second influence relationship; and establish frequency-voltage relationship mapping data using the quadratic polynomial curve, with the temperature range and the first influence relationship as a reference.

[0165] Optional, the frequency deviation statistics acquisition module includes:

[0166] A configuration submodule is used to determine the measurement duration configuration, which consists of at least two measurement durations;

[0167] The measurement submodule is used to, during each measurement duration, activate the temperature sensor in the system-on-a-chip through a measurement program to acquire temperature information when the phase-locked loop is operating at the target operating frequency; perform frequency deviation statistics through the measurement program until a processor interrupt occurs, acquire the interrupt task; read key information from the interrupt task, and combine it with the temperature information to construct a frequency deviation statistics set.

[0168] Optional curve fitting module, including:

[0169] The temperature range determination submodule is used to determine the temperature range for each measurement duration based on the temperature information in the frequency deviation statistical data set.

[0170] The fitting curve selection submodule is used to select the target fitting curve corresponding to the temperature range from the relation mapping data;

[0171] The voltage deviation measurement submodule is used to calculate the voltage deviation data for each measurement duration based on the target fitting curve, and obtain the voltage deviation dataset.

[0172] Optionally, the voltage deviation measurement submodule is specifically used to analyze the target fitting curve, extract voltage limits and voltage averages, wherein the voltage limits include a maximum voltage value and a minimum voltage value; analyze a first voltage deviation based on the voltage limits and the target operating frequency voltage, and analyze a second voltage deviation based on the voltage average and the target operating frequency; and determine voltage deviation data based on the first voltage deviation, the second voltage deviation, and the temperature information.

[0173] Optionally, a power ripple measurement module is specifically used to analyze the power supply quality and operational stability of the digital IP based on the voltage deviation dataset and the target operating frequency.

[0174] It should be noted that the chip power supply ripple measurement system provided in this application embodiment can execute the chip power supply ripple measurement method provided in any embodiment of this application, and has the corresponding functions and beneficial effects of the execution method.

[0175] In practical implementation, the aforementioned in-chip power ripple measurement system can be integrated into the device. This allows the device to establish frequency deviation statistics using key information generated by processor interrupts in the SoC through a measurement program. Furthermore, by utilizing the frequency deviation statistics and relational mapping data, the power supply quality and operational stability of the digital IP can be analyzed. As an electronic device, this enables more convenient, accurate, and efficient power ripple data measurement, improving the accuracy of power ripple data measurement. This electronic device can consist of two or more physical entities, or it can consist of a single physical entity. For example, the electronic device can be a personal computer (PC), a computer, a server, etc. This application embodiment does not impose specific limitations in this regard.

[0176] like Figure 10As shown, this application embodiment provides an electronic device, including a processor 111, a communication interface 112, a memory 113, and a communication bus 114. The processor 111, the communication interface 112, and the memory 113 communicate with each other through the communication bus 114. The memory 113 is used to store computer programs. When the processor 111 executes the program stored in the memory 113, it implements the steps of the chip power supply ripple measurement method provided in any of the aforementioned method embodiments. For example, the method may include the following steps: when the system-on-a-chip (SoC) is in a low-power mode, establish frequency-voltage relationship mapping data based on frequency and voltage data measured at different temperature points; set the phase-locked loop (PLL) based on a ring oscillator to a target mode through a preset measurement program, and set the PLL to operate at a target operating frequency of the digital IP based on the target mode; at the target operating frequency, for each measurement duration, perform frequency deviation statistics through the measurement program to obtain key information on processor interrupts in the SoC and establish a frequency deviation statistics dataset; analyze the temperature range based on the frequency deviation statistics dataset, and perform data analysis in conjunction with the relationship mapping data to determine the voltage deviation data for each measurement duration, forming a voltage deviation dataset; analyze the power supply quality and operating stability of the digital IP based on the voltage deviation dataset to obtain power ripple measurement results; wherein, both the digital IP and the ring oscillator-based PLL are located in the SoC.

[0177] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the chip power supply ripple measurement method provided in any of the foregoing method embodiments.

[0178] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0179] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A method of in-chip power supply ripple measurement, the method comprising: The application is applied to a system on chip, comprising: when the system on chip is in a low power consumption mode, based on measured frequency and voltage data at different temperature points, a frequency and voltage relationship mapping data is established; through a preset measurement program, a phase-locked loop based on a ring oscillator is set to a target mode, and the phase-locked loop is set to work at a target working frequency of a digital IP based on the target mode; at the target working frequency, for each measurement duration, frequency deviation statistics are carried out through a measurement program, key information of processor interrupt generation in the system on chip is obtained, and a frequency deviation statistical data set is established; according to the frequency deviation statistical data set, a temperature interval is analyzed, and data analysis is carried out in combination with the relationship mapping data, voltage deviation data of each measurement duration is determined, and a voltage deviation data set is formed; based on the voltage deviation data set, power supply quality and working stability of the digital IP are analyzed, and power supply ripple measurement results are obtained; wherein the digital IP and the phase-locked loop based on the ring oscillator are both arranged in the system on chip.

2. The method of claim 1, wherein, Based on measured frequency and voltage data at different temperature points, a frequency and voltage relationship mapping data is established, comprising: determining a process point of the system on chip; for the process point, a measurement relationship between temperature points and voltage points is established, a measurement temperature list and a measurement voltage list are obtained; when the phase-locked loop is in the target mode and works at the target working frequency, a to-be-measured temperature point is selected from the measurement temperature list; taking each to-be-measured temperature point as a reference, for each voltage point in the measurement voltage list, the output frequency of the ring oscillator is measured through a frequency counter of the system on chip, and a measurement data set is obtained, each frequency measurement data in the measurement data set comprises a frequency measured at each voltage point at the same to-be-measured temperature point; based on the measurement data set, the measurement temperature list and the measurement voltage list, a quadratic polynomial curve fitting is carried out, and a frequency and voltage relationship mapping data is established.

3. The method of claim 2, wherein, Based on the measurement data set, the measurement temperature list and the measurement voltage list, a quadratic polynomial curve fitting is carried out, and a frequency and voltage relationship mapping data is established, comprising: taking the measurement temperature list and the measurement voltage list as a reference, corresponding frequency measurement data is selected from the measurement data set, and a quadratic polynomial curve is fitted; based on the quadratic polynomial curve, a visual processing is carried out, the influence of temperature on frequency and the influence of voltage on frequency are analyzed, a first influence relationship of voltage and frequency and a second influence relationship of temperature and frequency are obtained; based on the second influence relationship, a temperature interval is established; taking the temperature interval and the first influence relationship as a reference, the quadratic polynomial curve is used to establish a frequency and voltage relationship mapping data.

4. The method of claim 1, wherein, At the target working frequency, for each measurement duration, frequency deviation statistics are carried out through a measurement program, key information of processor interrupt generation in the system on chip is obtained, and a frequency deviation statistical data set is established, comprising: determining a measurement duration configuration, the duration configuration is composed of at least two measurement durations; When the phase-locked loop works at the target working frequency, in each measurement duration, a temperature sensor in the system on chip is started by a measurement program to obtain temperature information; Frequency deviation statistics are performed by the measurement program until a processor interrupt is generated to obtain an interrupt task; Key information is read from the interrupt task, and the temperature information is combined to construct a frequency deviation statistical data set.

5. The method of claim 1, wherein, According to the frequency deviation statistical data set, a temperature interval is analyzed, and data analysis is performed in combination with the relationship mapping data to determine voltage deviation data of each measurement duration to form a voltage deviation data set, including: For each measurement duration, a temperature interval is determined based on the temperature information in the frequency deviation statistical data set; A target fitting curve corresponding to the temperature interval is selected from the relationship mapping data; Based on the target fitting curve, voltage deviation data under each measurement duration is calculated to obtain a voltage deviation data set.

6. The method of claim 5, wherein, Based on the target fitting curve, voltage deviation data under each measurement duration is calculated, including: The target fitting curve is analyzed to extract voltage limits and a voltage mean value, the voltage limits including a maximum voltage value and a minimum voltage value; A first voltage deviation is analyzed based on the voltage limits and the target working frequency voltage, and a second voltage deviation is analyzed based on the voltage mean value and the target working frequency; Based on the first voltage deviation, the second voltage deviation, and in combination with the temperature information, voltage deviation data is determined.

7. The method of claim 1, wherein, Based on the voltage deviation data set, the power supply quality and working stability of the digital IP are analyzed, including: Based on the voltage deviation data set in combination with the target working frequency, the power supply quality and working stability of the digital IP are analyzed.

8. An in-chip power supply ripple measurement system, characterized by, Including: A measurement data acquisition module is configured to, when the system on chip is in a low-power mode, establish relationship mapping data of frequency and voltage based on measured data of frequency and voltage at different temperature points; A working setting module is configured to, through a preset measurement program, set a phase-locked loop based on a ring oscillator to a target mode, and set the phase-locked loop to work at a target working frequency of a digital IP based on the target mode; A frequency deviation statistical acquisition module is configured to, at the target working frequency, for each measurement duration, perform frequency deviation statistics by a measurement program to obtain key information of a processor interrupt generation in the system on chip to establish a frequency deviation statistical data set; A curve fitting module is configured to analyze a temperature interval according to the frequency deviation statistical data set, and perform data analysis in combination with the relationship mapping data to determine voltage deviation data of each measurement duration to form a voltage deviation data set; A power supply ripple measurement module is configured to analyze the power supply quality and working stability of the digital IP based on the voltage deviation data set to obtain a power supply ripple measurement result; The digital IP and the phase-locked loop based on the ring oscillator are both arranged in the system on chip.

9. An electronic device, comprising: The system on chip includes a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; The memory is configured to store a computer program. A processor for implementing the steps of the in-die power supply ripple measurement method of any of claims 1-7 when executing a program stored on a memory.

10. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program, which when executed by a processor implements the steps of the in-die power supply ripple measurement method of any of claims 1-7.

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