Low-power single-photon avalanche diode photon counter using peak current suppression technology

Abstract

The invention relates to a low power single photon avalanche diode photon counter using peak current suppression techniques. The invention relates to a sensor for time-of-flight calculation, comprising: a laser configured to emit a plurality of light pulses at a target; one or more SPAD configured to detect a TDC trigger event, where a first TDC trigger event includes detecting one or more photons when an initial light pulse of the plurality of light pulses is reflected to the one or more SPAD; a counter configured to count the one or more photons of the first TDC trigger event and generate a first histogram of the one or more photons at a first resolution; a global window processor configured to read the first histogram and detect a peak of the first histogram; and a global histogram processor configured to detect a peak of a second histogram, where the peak of the second histogram determines a distance between the sensor and the target.

Description

Technical Field

[0001] This disclosure generally relates to the design of image sensors, and more particularly to image sensors configured for time-of-flight calculations. Background Technology

[0002] Image sensors have become ubiquitous. They are widely used in digital still cameras, cellular phones, security cameras, and in medical, automotive, and other applications. The technologies used to manufacture image sensors are constantly and rapidly advancing. For example, the demand for higher image sensor resolution and lower power consumption has driven further miniaturization of image sensors and their integration into digital devices.

[0003] An image sensor operates in response to image light from an external scene that is incident on the image sensor. The image sensor includes an array of pixels with photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate a corresponding charge in response. The charge of an individual pixel can be measured as the output voltage of each photosensitive element. Generally, the output voltage varies with the intensity and duration of the incident light. The output voltage of the individual photosensitive elements is used to generate a digital image (i.e., image data) representing the external scene.

[0004] In some applications, photodiodes can be used to determine time-of-flight (ToF) calculations. Conventionally, this is achieved by detecting the peak of a histogram representing the photodiode's triggering event. However, histogram peak detection requires additional hardware, which can be costly or very large compared to an image sensor. Furthermore, when detecting wide laser pulses, the resulting histogram can contain noise, and the temporal resolution can be degraded.

[0005] In addition, photon stacking, which can cause histogram distortion, is also a common phenomenon. Photon stacking occurs because single-photon avalanche diodes (SPADs) capture ambient light photons with a very high probability almost immediately after each laser pulse transmission. Therefore, the true signal peak is buried in the tail of this stacking distortion, resulting in a large depth error. Although the peak value can usually be estimated using a histogram, if the histogram does not perfectly conform to a normal / Gaussian distribution, then only the peak bins can be used, because the center of mass may not be the same as the actual Time of Light (ToF) due to histogram distortion caused by ambient noise and stacking distortion.

[0006] Therefore, there is a need for systems and methods to improve the determination of Time of Flight (ToF). Summary of the Invention

[0007] In one aspect, this disclosure provides a sensor for determining Time-of-Flight (ToF), the sensor comprising: one or more single-photon avalanche diodes (SPADs) configured to detect a first time-to-digital conversion (TDC) trigger event, wherein the first TDC trigger event comprises an initial optical pulse in a plurality of optical pulses interacting with the one or more SPADs to generate one or more photons, wherein the plurality of pulses are emitted by a light source; one or more latches configured to latch codes from the one or more SPADs, wherein the codes are associated with the first TDC trigger event; a memory configured to read static random access memory (SRAM) addressed by the codes; a counter configured to count the one or more photons of the first TDC trigger event and generate a first histogram of the one or more photons at a first resolution; and a global window processor. It is configured to read the first histogram and detect the peak value of the first histogram; a window memory configured to control a single-photon avalanche diode (SPAD) controller, wherein the SPAD controller enables the one or more SPADs to detect a second TDC trigger event, wherein the second TDC trigger event includes the detection of one or more photons when an additional light pulse in the plurality of light pulses interacts with the one or more SPADs during the time span of the peak value of the first histogram; a delay line configured to delay the propagation of the one or more photons by a predetermined time at a second resolution, wherein the counter is further configured to generate a second histogram of the one or more photons at the second resolution; and a global histogram processor configured to detect the peak value of the second histogram, wherein the peak value of the second histogram determines the distance between the sensor and the target.

[0008] In another aspect, this disclosure further provides a method for calculating ToF measurements, the method comprising: detecting a first TDC trigger event using one or more SPADs, wherein the first TDC trigger event comprises detecting one or more photons when an initial light pulse in a plurality of light pulses is reflected to the one or more SPADs; latching grayscale auto exposure codes (GAECs) from the one or more SPADs using a plurality of latches, wherein the GAECs are associated with the first TDC trigger event; reading SRAM addressed by the GAECs using a memory; counting the one or more photons of the first TDC trigger event using a counter; and generating a value at a first resolution. The method comprises: describing a first histogram of one or more photons; reading the first histogram to detect the peak range of the first histogram; detecting a second TDC trigger event using the one or more SPADs, wherein the second TDC trigger event includes detecting one or more photons when an additional light pulse in the plurality of light pulses is reflected to the one or more SPADs during the peak period of the first histogram; delaying the propagation of the one or more photons at a second resolution using a delay line; generating a second histogram of the one or more photons at the second resolution based on the delayed propagation of the one or more photons at the second resolution using the counter; and detecting the peak of the second histogram. Attached Figure Description

[0009] Non-limiting and non-exhaustive embodiments of the invention are described with reference to the following figures, wherein, unless otherwise specified, reference numerals refer to similar parts.

[0010] Figure 1A This is an example of a time-of-flight (ToF) measurement setup based on the technology of the present invention.

[0011] Figures 1B to 1C This invention demonstrates a simple histogram peak detection method based on the present invention.

[0012] Figures 2A to 2D This is an example of a digital conversion histogram based on the technology of the present invention.

[0013] Figure 3A This is an example image sensor based on the technology of the present invention.

[0014] Figure 3B This is an example of a rough-to-fine histogram time / digital conversion according to the technology of the present invention.

[0015] Figure 3C This is an example of the Gray Scale Automatic Exposure Code (GAEC) according to the technology of the present invention.

[0016] Figure 3D This is an example of a delay line circuit according to the present invention.

[0017] Figure 3E This is an example of a global histogram processing circuit based on the technology of the present invention.

[0018] Figure 3F This is an example clock (CLK) circuit according to the technology of the present invention.

[0019] Figure 3G This is an example of a clock delay line circuit according to the present invention.

[0020] Figure 4A This is an example image sensor based on the technology of the present invention.

[0021] Figure 4B This is an example digital conversion histogram of the present invention, which utilizes a single-photon avalanche diode (SPAD) gate.

[0022] Figure 5 This is an example method for calculating Time-of-Flight (ToF) measurements according to the present invention.

[0023] Figure 6 This is another example method for calculating Time-of-Flight (ToF) measurements according to the technology of the present invention.

[0024] Figure 7 This is yet another example of a method for calculating Time-of-Flight (ToF) measurements according to the present invention.

[0025] Several views throughout the figures correspond to reference characters indicating the respective components. Those skilled in the art will understand that the elements in the figures are illustrated for simplicity and clarity and are not necessarily drawn to scale. For example, to aid in understanding the various embodiments of the invention, the dimensions of some elements in the figures may be enlarged relative to other elements. Furthermore, common and well-known elements that are useful or necessary in commercially viable embodiments are generally not shown to facilitate a more unobstructed view of these various embodiments of the invention. Detailed Implementation

[0026] Image sensors, and specifically image sensors including color routers, are disclosed. Numerous specific details are set forth in the following description to provide a thorough understanding of the embodiments. However, those skilled in the art will recognize that the techniques described herein can be practiced without one or more of the stated specific details or using other methods, components, materials, etc. In other instances, well-known structures, materials, or operations have not been shown or described in detail to avoid obscuring certain aspects.

[0027] Throughout this specification, references to "an example" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with that example is included in at least one embodiment of the invention. Therefore, the appearance of the phrase "in an example" or "in an embodiment" in various places throughout this specification does not necessarily refer to the same example. Furthermore, particular features, structures, or characteristics may be combined in any suitable manner in one or more examples.

[0028] Spatially relative terms (e.g., “below,” “under,” “lower,” “below,” “above,” “upper,” etc.) may be used herein for ease of explanation to describe the relationship of an element or feature to another element(s) illustrated in the figures. It should be understood that, in addition to the orientations depicted in the figures, the spatially relative terms are also intended to cover different orientations of the device during use or operation. For example, if the device in the figures is flipped, then an element described as “below” or “under” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “below” may cover both the above and below orientations. The device may be oriented in other ways (rotated 90 degrees or otherwise) and the spatially relative descriptions used herein may be interpreted accordingly. Furthermore, it should be understood that when a layer is referred to as “between” two layers, the layer may be the only layer between the two layers, or there may be one or more intervening layers.

[0029] Based on the foregoing, it should be understood that although specific embodiments of the invention have been described herein for illustrative purposes, various modifications may be made without departing from this disclosure. Furthermore, while various advantages and features associated with specific embodiments have been described above in the context of those embodiments, other embodiments may also exhibit such advantages and / or features, and not all embodiments are required to exhibit such advantages and / or features to fall within the scope of this invention. In the case of a described method, the method may include more, fewer, or other steps. Additionally, the steps may be performed in any suitable order. Therefore, this disclosure may cover other embodiments not explicitly shown or described herein. In the context of this disclosure, the terms "about," "approximately," etc., mean + / - 5% of the value.

[0030] Several technical terms are used throughout this specification. These terms will be given their general meaning in the field of their respective domains, unless otherwise specifically defined herein or the context in which they are used will clearly imply otherwise. It should be noted that in this document, component names and symbols are used interchangeably (e.g., Si and silicon); however, they have the same meaning.

[0031] Briefly, embodiments of the present invention relate to an image sensor for calculating time-of-flight (ToF) measurements from an image sensor to a target. In some embodiments, a first time-to-digital conversion (TDC) event is detected when a laser emits multiple light pulses toward a target. In some embodiments, one or more single-photon avalanche diodes (SPADs) detect the first TDC trigger event. In some embodiments, one or more latches latch grayscale auto-exposure codes (GAECs) from the one or more SPADs, wherein the GAECs are associated with the first TDC trigger event. In some embodiments, a counter counts one or more photons of the first TDC trigger event and generates a first histogram of the one or more photons at a first resolution, and a global window processor reads the first histogram and detects a peak value of the first histogram. In some embodiments, a window memory controls a single-photon avalanche diode (SPAD) controller, wherein the SPAD controller enables the one or more SPADs to detect a second TDC trigger event, wherein the second TDC trigger event includes the detection of one or more photons when an additional light pulse in the plurality of light pulses is reflected to the one or more SPADs during the timing of the peak value of the first histogram. In some embodiments, the delay line is configured to output the one or more photons at a second resolution, wherein the counter is further configured to generate a second histogram of the one or more photons at the second resolution, and a global histogram processor detects a peak value of the second histogram, wherein the peak value of the second histogram determines the distance between the sensor and the target.

[0032] Figure 1A This is an example of a time-of-flight (ToF) measurement setup 1000 according to the present invention. In some embodiments, the measurement setup 1000 includes a first target T1, a second target T2, a time-to-digital converter (TDC) sensor 100, and a light source (e.g., a laser) 120. In some embodiments, the laser 120 may be coupled to a diffuser.

[0033] In operation, the TDC sensor 100 is operatively coupled to the laser 120. The laser 120 emits light L toward a first target T1 and a second target T2. Histograms can be used to accurately extract the distance. For example, separate histograms can be created for the first target T1 and the second target T2. By determining the peak value of each histogram, the accurate distance between the first target T1 and the second target T2 can be calculated.

[0034] Figures 1B to 1C This invention demonstrates a simple histogram peak detection method based on the present invention. Figure 1B This demonstrates a histogram hardware implementation based on a memory capable of capturing histogram values. For example... Figure 1BAs shown, the address is the index of the cell, and the data is the histogram value of each cell. In this example, this is a 32-address and 8-bit word memory. Therefore, the full range captured is only 32 histogram values, each with 8-bit resolution.

[0035] In simple peak detection, the histogram grid width corresponds to the temporal resolution. Therefore, higher resolution requires a wider histogram. Conventionally, this leads to higher cost because additional hardware is needed to increase the histogram grid size. Conventionally, histogram centroid processing can then be applied. In such cases, the achieved temporal resolution is much smaller than the histogram grid width because peaks can end up anywhere within the grid width. Next, floating-point data can be extracted, such as... Figure 1C As shown in the diagram. In the illustrated scenario, a simple peak was detected at grid 14.

[0036] Furthermore, while conventional histogram processing can be used to estimate peak values, it requires significant computation, which is not always possible for every time-to-digital conversion (TDC). Additionally, TDC array calculations require high-speed data transfer. For example, histogram centroid processing involves multiple calculations. Given N distributed samples (N = 100,000 for the following equations), the sample standard deviation can be calculated as:

[0037]

[0038] Equation 1 uses N-1 Bessel correction. This equation can then be used to estimate the true standard deviation. The standard error (SE) is the variability of the sample standard deviation across samples. SE indicates the error relative to the true standard deviation due to random sampling, as shown in Equation 2 below.

[0039]

[0040] To perform the above calculations, a large amount of memory and computational effort is required. However, histograms can be used to predict the peaks / patterns of the histogram, which requires less memory to store the signal. The accuracy of the calculated peaks depends on the cell width (for σ), the cell size (how many cells, 32 in the illustrated case), and the histogram bit width (e.g., an 8-bit histogram has a maximum counting resolution of 255). Therefore, in the illustrated example, each histogram requires only 32 × 8 = 256 bits of memory.

[0041] To better predict peaks / modes, the histogram grid width should be less than σ, and preferably less than 1 / 3 of σ. For laser pulsed TDC, a grid width of approximately 1 / 6 to 1 / 3 of the laser pulse width is satisfactory. Therefore, in many cases, a 2ns pulse width and a 300ps grid size are acceptable. Histogram centroid (center of mass) processing yields better accuracy than simply selecting the peak grid.

[0042]

[0043] Peak values ​​can be estimated using histograms, but if the histogram does not conform to a normal / Gaussian distribution, then only the peak value division can be used. This is because the center of mass may not be the same as the actual Time-of-Flight (ToF) due to histogram distortion caused by environmental noise and stacking. The true signal peak is buried in the tail of this stacking distortion, resulting in a large depth error. In this example, this process leads to a large distance error when high resolution is required.

[0044] Figures 2A to 2D This is an example of a time-to-digital conversion histogram according to the present invention. As another example, time-to-digital conversion (TDC) can be used in the histogram of a single-photon avalanche diode (SPAD). As explained above, the timing resolution is limited by the histogram grid width, provided the histogram conforms to a normal / Gaussian distribution.

[0045] Figure 2A It is a full histogram. The time resolution TR is graphically represented as a series of vertical lines. The full histogram grid resolution can be expressed as 2. Nf , where N f It is an exponent, and the subscript "f" refers to the full histogram. Figure 2A In the histogram, there is 6-bit depth data, which requires 64 cells.

[0046] Figure 2B It is a partial histogram, where the grid resolution is represented as 2. Np , where N p It is an exponent, and the subscript "p" refers to a portion of the histogram. In some embodiments, multiple scan frames 2 (Nf-Np) cover Figure 2A The full range of the histogram. Each scan can have a 3-bit data depth and represent 8 cells. In this example, 8 scans are performed to cover the entire 64-cell histogram. That is, in the illustrated example, Np = 3 and Nf - Np = 3.

[0047] Figure 2C Display the most significant bit (MSB) histogram, where the cell resolution is expressed as 2. Nm , where N m It is an exponent, and the subscript "m" refers to the MSB histogram. In one example, such as Figure 2C As shown in, N m =3. In some embodiments, a two-stage histogram is generated. For representation 2 Nm N in each segment m The first MSB scan at bit depth yields MSB segments, followed by N sub-segments within the obtained MSB segments. t The second scan of N cells, where N is a fraction of the total number of cells. t Determined by the timing resolution, N t *The timing resolution can fully cover the MSB grid width. The two-stage histogram can cover the entire range of the full histogram, with a total of 2 scans. Nf Contains 2 Nm -MSB histogram scan and N t Fine-resolution scanning. Equation 4 explains this process.

[0048] N f =N m +N t

[0049] Equation 4

[0050] MSB histogram grid resolution is increased from 2 Nm This is represented as follows. In one example, a 32-cell histogram is generated using 8-bit depth data. Two frames are scanned. In the first frame, the MSB histogram is generated. In the second frame, the least significant bit (LSB) histogram is generated, as shown below. Figure 2D As shown in the diagram. To generate an LSB histogram, the peak value of the MSB histogram is identified and the temporal resolution of each LSB histogram is determined (by the grid width). An LSB histogram can be generated from a set of 2... Nl N in each segment l Bit-based data depth representation. In some embodiments, N t =2 Nl .exist Figure 2C In the example shown, for a full histogram with 64 grids, the MSB-LSB two-stage histogram only requires 8+8=16 scans, which can save significant scan time.

[0051] exist Figure 2D In the LSB histogram, after error correction, the cell resolution is represented as 2*2Nt. In cases where actual data falls at the boundary between two MSB cells, a double-width scan of the LSB histogram avoids errors. While two-stage TDCs do not require as much memory as histogram centroid processing, they do require objects that do not move rapidly. Figure 2D The diagram shown illustrates two LSB histograms (LSB1, LSB2). Although it can be used... Figures 2A to 2DThe methods shown in the paper determine the Time-of-Flight (ToF) calculation, but each has its own drawbacks. These drawbacks include the temporal resolution being limited by the histogram grid width. Furthermore, the target cannot move quickly enough, or the histogram will be generated inappropriately. These methods can also lead to long processing times, require additional hardware, and consume significant power.

[0052] Figure 3A This is an example image sensor 100 according to the present invention. In some embodiments, the image sensor 100 includes a single-photon avalanche photodiode (SPAD) controller 101, a plurality of latches 102A, 102B, 102C...102D, a memory 103, a window memory 104, a global window processing 105, a global histogram processing 106, a delay line 107, a counter 112, and a plurality of single-photon avalanche photodiodes (SPADs) 108A, 108B, 108C...108N.

[0053] In some embodiments, each of one or more SPADs 108A, 108B, 108C…108N is communicatively coupled to an active quenching circuit AQ. In some embodiments, one or more SPADs 108A, 108B, 108C…108N are four SPADs. In some embodiments, the four SPADs 108A, 108B, 108C…108N are arranged in a 2×2 array.

[0054] In some embodiments, delay line 107 is a clock (CLK) counter. The CLK counter can be selected from a high-speed CLK counter and a low-speed CLK counter.

[0055] In operation, a laser (e.g., laser 120) emits multiple light pulses toward a target. In some embodiments, the target is a first target (e.g., target T1) and a second target (e.g., target T2), such as... Figure 1A As shown in the figure. In some embodiments, SPADs 108A, 108B, 108C…108N detect a first time-to-digital conversion (TDC) trigger event, wherein the first TDC trigger event includes the detection of one or more photons when an initial light pulse in a plurality of light pulses is reflected to one or more SPADs. In some embodiments, one or more latches 102A, 102B, 102C…102D latch grayscale auto-exposure codes (GAECs) from one or more SPADs 108A, 108B, 108C…108N, wherein the GAEC is associated with the first TDC trigger event. In some embodiments, memory 103 is configured to read static random access memory (SRAM) addressed by the GAEC, and counter 112 counts photons of the first TDC trigger event to generate a first histogram of one or more photons (e.g., at a first resolution). Figure 3B (As shown in the image).

[0056] In some embodiments, the global window processor 105 reads the first histogram and detects the peak value of the first histogram. The window memory 104 may then control the SPAD controller 101 as follows. The SPAD controller 101 enables one or more SPADs 108A, 108B, 108C...108N to detect a second TDC trigger event, wherein the second TDC trigger event comprises the detection of one or more photons when an additional optical pulse in a plurality of optical pulses is reflected to one or more SPADs 108A, 108B, 108C...108N during the timing of the peak value of the first histogram.

[0057] The delay line 107 can output one or more photons at a second resolution, wherein the counter 112 generates a second histogram of one or more photons at the second resolution. In some embodiments, the global histogram processor 106 is configured to detect the peak value of the second histogram, wherein the peak value of the second histogram determines the distance between the sensor 100 and the target.

[0058] In some embodiments, the second resolution is higher than the first resolution. In some embodiments, the second histogram includes a first target histogram at the second resolution and a second target histogram at the second resolution. In some embodiments, the peak value of the first target histogram at the first resolution is compared with the peak value of the second target histogram at the second resolution to calculate the distance between the first target and the second target.

[0059] Figure 3B This is an example of coarse-fine histogram time-to-digital conversion (TDC) according to the technology of the present invention. The time-to-digital conversion (TDC) frame follows... Figure 3B At the top. In some embodiments, the first histogram has a first resolution and the second histogram has a second resolution. In some embodiments, the second resolution is higher than the first resolution. In such embodiments, the first histogram may be referred to as a “coarse” histogram (i.e., with lower resolution) and the second histogram may be referred to as a “fine” histogram (i.e., with higher resolution). The TCD histograms (both the first and second histograms) are displayed on the first laser pulse. With the second laser pulse<i+1> Between. For example Figure 3B As shown, the 32-grid coarse histogram has 32 clock (CLK) cycles. In some embodiments, the total data acquisition time is approximately 33.3 ns.

[0060] During operation, the system may have a predetermined system time offset. In some embodiments, the coarse histogram is compared with that from the first laser pulse. The first single-photon avalanche diode (SPAD) trigger event is associated with this. In some embodiments, the peak of the coarse histogram is generated at TDC frame "i". In some embodiments, the next CLK edge of the CLK signal determines the time of data acquisition and the position of the cells within the histogram. In some embodiments, a 5-bit timestamp latch is used to determine the cell / edge position. In other embodiments, a ripple counter is used to determine the cell / edge position. In some embodiments, the CLK signal is generated at 960 MHz. After 32 CLK cycles, TDC is stopped. In some embodiments, the coarse histogram is read out and processed using global window processing. As used herein, global window processing accepts the read out coarse histogram and determines a 'window' near the peak of the read out histogram. This window is then processed using global histogram processing to generate a fine histogram. In some embodiments, the coarse histogram is written back to control the SPAD controller (e.g., SPAD controller 101) for the next fine histogram TDC frame.

[0061] In operation, a fine histogram can be generated after the coarse histogram. Although the coarse and fine histograms are displayed on separate axes, it should be understood that they occur on similar time scales, as illustrated above by the TDC frame. In some embodiments, the fine histogram is displayed on a time scale. <j>Generated from laser pulses between laser pulses i+1. In some embodiments, the fine histogram is generated at a frame that is temporally after frame "i". The resolution of the data acquisition is higher within the fine histogram (compared to the coarse histogram). This is beneficial because the fine histogram provides a more "Gaussian-like" histogram, which makes the later centroid processing calculations more accurate, as described herein. In some embodiments, the fine histogram is a "zoomed in" view of a particular window around the peak of the coarse histogram, which can save power because most ambient light artifacts are removed. The fine resolution photon detection efficiency (PDE) can also be more stable because a window is used to quench the SPADs. In some embodiments, each SPAD has its own gated signal controlled by the coarse histogram processing (as shown in Figure 4B illustrated in FIG. 15A) to obtain a window, as explained herein.

[0062] Figure 3C is an example Gray scale auto exposure code (GAEC) according to the technology of this disclosure. The GAEC can also be referred to herein as a "Gray code". The vertical lines represent SPAD events.

[0063] In some embodiments, for example Figure 3C illustrated in FIG. 15A, the GAEC obtained at multiple frequencies (15 MHz, 30 MHz, 60 MHz, 120 MHz, 240 MHz) is latched. In some embodiments, the sensor including the arithmetic logic is configured to detect one or more coincidence events, where the GAEC is further based on the one or more coincidence events. A coincidence event occurs when two photons belonging to different events arrive at the photon detector within the same (or "coincidence") time window. In such embodiments, the measurement of this accidental event can be difficult to separate from the measurement of the target event (e.g., SPAD trigger event). The higher the timing resolution of the coincidence detector, the easier it is to distinguish between the coincidence event and the true signal. In some embodiments, the coarse histogram uses a Gray code for memory addresses. In some embodiments, the GAEC results in less latch data errors. At latch data 01111, the arrow represents a SPAD event. Thus, at Figure 3C In the example in FIG. 15B, there is a signal at 30 MHz, 60 MHz, and 120 MHz, but not for 15 MHz or 240 MHz. In this way, the memory addresses are determined. In some embodiments, the fine histogram uses a binary code for memory addresses.

[0064] Figure 3D is an example delay line circuit according to techniques of this disclosure. In some embodiments, the delay line 107 is coupled with a 5-bit ripple counter. A typical implementation of the delay line 107 can include a number of series coupled drivers. In some embodiments, in response to a SPAD TDC trigger, the delay line controller DL_ctrl controls the fine resolution for a second histogram control time. The 5-bit ripple counter can then generate a second histogram.

[0065] Figure 3E is an example global histogram processing circuit (or global histogram processor) 106 according to techniques of this disclosure. In some embodiments, the global histogram processor 106 is further configured to determine a peak value of the second histogram with histogram centroid processing, as described herein. In some embodiments, the global histogram processor 106 is configured to generate a one-time programmable (OTP) K filter, i.e., a K filter derived by calibration, convolution, and histogram centroid processing of raw histograms from memory, such as memory 103. In some embodiments, each of these steps is considered "histogram processing." The global histogram processor then sends the processed data to a window memory, such as window memory 104. In this way, even with histogram centroid processing, it can be implemented with less cost and without utilizing additional large hardware.

[0066] Figure 3F is an example clock (CLK) circuit according to techniques of this disclosure. In some embodiments, the CLK counter is a low-speed CLK counter. In some embodiments, one branch of an H-tree shares one common DL ctrl, which can be controlled by calibration, so the time step is fixed and not affected by process, voltage, or temperature (PVT). Since the length of each of the branches of transmission lines from the CLK source to each of the terminal points in the H-tree line is constant, the transmission line delay of this multiple branches is also constant. In such embodiments, the circuit can use a slower reference CLK.

[0067] Figure 3G is an example clock delay line circuit according to techniques of this disclosure. When used to generate histograms, power from the SPADs and counters can be reduced. This is due to the use of a single CLK source compared to multiple CLKs. In some embodiments, the CLK counter is a high-speed CLK counter. Even with a high-speed CLK, it is still needed to reach all TDCs, which means the power consumption is still high.

[0068] In some embodiments, the CLK can utilize an H-tree, as Figure 3G The TDCs are coupled to a delay-locked loop (DLL) (not shown). In such embodiments, a DLL is not used for each TDC. Instead, each TDC group can share a DLL. In some embodiments, the DLL includes a signal processing element, such as a flattening amplifier or integrator. In some embodiments, CLK is a 0-stage type-0 DLL or a 1 -stage type-1 DLL. Generally, given enough time, the DLL will synchronize different events and / or frequencies. In this way, the DLL forms the basis of CLK with reduced frequency.

[0069] In one example, an image sensor includes a 640x480 array, with every 2x2 pixels of the array having one TDC and every pixel having one photon counter (PC). The H-tree minimum unit is set to 40x30, so there is one DLL for every 40x30 TDCs. In such embodiments, a low-speed CLK can be used that is distributed to the 40x30 TDC unit. Then, a DLL can be generated locally, and a delay line can latch the DLL signal. In such embodiments, CLK power can be lower compared to using a global DLL to generate a high-speed CLK and then distributing the high-speed CLK to every TDC unit.

[0070] In the example of a 648x480 array with 40x30 TDC units, one DLL power is PI, and the CLK tree power for a low frequency f is P0, then the total power of the CLK tree including 1200 local DLLs is P0+1200*PI. The high frequency CLK is N*f, and the power of the CLK tree to distribute the high frequency CLK is N*P0+PI. When P0>1199 / (N-l)*PI, a low speed clock and local DLL are used, which has lower CLK tree power, for example, when N=128, f=7.5MHz, and N*F=960MHz. The power consumption of distributing a low speed 7.5MHz CLK and local DLL is P0+1200*PI. The power consumption of distributing a high speed 960MHz CLK is 128*P0+PI. When P0>9.44*PI, a low speed CLK is used, which has lower CLK tree power. Generally, the overall CLK tree capacitive load is very large, and the power consumption of CLK tree P0 can be much larger than one local DLL, or P0»PI.

[0071] In other embodiments, a high speed CLK can be generated locally, and the counter can be used only for fine TDC histograms (compared to coarse histograms). An infrared (IR) voltage drop on the power supply of the system can cause global CLK distribution delay and / or jitter, which causes timing detection errors at different pixel locations. This can be avoided by using a local DLL. A local DLL can correct timing errors compared to a global DLL. Furthermore, calibration control can be stored locally for each DLL.

[0072] Figure 4A This is an example image sensor 100 according to the present invention. In some embodiments, the image sensor 100 includes a single-photon avalanche photodiode (SPAD) controller 101, a plurality of latches 102A, 102B, 102C...102D, a memory 103, a window memory 104, a global window processing 105, a delay line 107, a counter 112, a plurality of single-photon avalanche photodiodes (SPADs) 108A, 108B, 108C...108N, an overlap detection 109, a local window processor 110, and a calibrator 111.

[0073] In some embodiments, the image sensor 100 uses a local window processor 110 to find the cell with the largest address. In such embodiments, a histogram readout of the centroid calculation is not required. Therefore, under strong lighting conditions, not all SPADs need to operate, resulting in a reduction in peak current. Similarly, under low lighting conditions, all SPADs are operational to improve image quality.

[0074] In operation, the local window processor 110 can then identify the cell with the largest address. In this type of embodiment, histogram readout or centroid calculation is not used. The delay line can output one or more photons at a second resolution. In some embodiments, the delay line 107 includes a calibrator 111, such as... Figure 3G The information shown and described herein.

[0075] Figure 4B This invention relates to an example of time-to-digital conversion using a single-photon avalanche diode (SPAD) gate.

[0076] In some embodiments, a SPAD controller (e.g., SPAD controller 101) is used to gate the SPAD, such that post-pulsation is suppressed to a low level. In such embodiments, histogram peak detection can be performed as simple maximum value detection using local logic circuitry for coarse TDC, reducing process time at the end of each coarse TDC frame. In such embodiments, accessing the global bus does not require reading the first histogram to obtain a window of the second TDC histogram. Instead of using a global histogram processor (e.g., ... Figure 3A (As shown in the image), the local window processor finds the cell with the largest address. In this type of embodiment, histogram reading or centroid calculation is not required.

[0077] Figure 5 This is an example method 500 for calculating Time-of-Flight (ToF) measurements according to the present invention. In some embodiments, method 500 is performed using an image sensor (e.g., image sensor 100). In some embodiments, the image sensor includes a single-photon avalanche diode (SPAD) controller (e.g., SPAD controller 101), a plurality of latches (e.g., a plurality of latches 102A, 102B, 102C…102D), a memory (e.g., memory 103), a window memory (e.g., window memory 104), a global window processor (e.g., global window processor 105), a global histogram processor (e.g., global histogram processor 106), a delay line (e.g., delay line 107), a counter (e.g., counter + 1), and a plurality of single-photon avalanche photodiodes (SPADs) (e.g., a plurality of SPADs 108A, 108B, 108C…108N).

[0078] In block 505, a first TDC trigger event is detected. In some embodiments, the first TDC trigger event includes the detection of one or more photons when an initial optical pulse in a plurality of optical pulses is reflected to one or more SPADs. In some embodiments, the optical pulse is emitted by a laser (e.g., laser 120).

[0079] In block 510, optionally, a coincidence event is detected. In some embodiments, a coincidence event is detected by a coincidence detector (e.g., coincidence detector 109). As explained herein, a coincidence event occurs when two photons belonging to different events arrive at the photon detector within the same (or "coincident") time window. In such embodiments, measurements of this chance event may be difficult to separate from measurements of a target event (e.g., a SPAD trigger event). The higher the temporal resolution of the coincidence detector, the easier it is to distinguish between a coincidence event and a true signal.

[0080] In block 515, grayscale auto exposure code (GAEC) is latched for coarse data acquisition. In some embodiments, one or more latches are configured to latch grayscale auto exposure code (GAEC) from one or more SPADs, wherein the GAEC is associated with a first TDC trigger event.

[0081] In block 520, static random access memory (SRAM) addressed via GAEC is addressed. In some embodiments, the memory is configured to read the SRAM addressed via GAEC.

[0082] In block 525, data is incremented by 1 and written back to SRAM to form a first histogram. In some embodiments, the first histogram has a first resolution. In some embodiments, the first histogram is a coarse histogram. In some embodiments, a counter is configured to count one or more photons of a first TDC trigger event and generate a first histogram of one or more photons at a first resolution.

[0083] In box 530, each coarse histogram formed is read. In some embodiments, a coarse histogram is generated for each TDC event.

[0084] In box 535, the peak value of each coarse (or first) histogram is detected. In some embodiments, the global window processor is configured to read the first histogram and detect the peak value of the first histogram.

[0085] In block 540, a window used to control the SPAD controller (SPAD_EN) is written back. In some embodiments, the window memory is configured to control a single-photon avalanche diode (SPAD) controller, wherein the SPAD controller enables one or more SPADs to detect a second TDC trigger event, wherein the second TDC trigger event comprises the detection of one or more photons when an additional optical pulse in a plurality of optical pulses is reflected to one or more SPADs during the timing of the peak of the first histogram.

[0086] In box 545, clear the SRAM.

[0087] Figure 6 This is another example method for calculating Time-of-Flight (ToF) measurements according to the present invention. In some embodiments, method 600 is performed using an image sensor (e.g., image sensor 100). In some embodiments, the image sensor includes a single-photon avalanche diode (SPAD) controller (e.g., SPAD controller 101), a plurality of latches (e.g., a plurality of latches 102A, 102B, 102C…102D), a memory (e.g., memory 103), a window memory (e.g., window memory 104), a global window processor (e.g., global window processor 105), a global histogram processor (e.g., global histogram processor 106), a delay line (e.g., delay line 107), a counter (e.g., counter + 1), and a plurality of single-photon avalanche photodiodes (SPADs) (e.g., a plurality of SPADs 108A, 108B, 108C…108N). In some embodiments, method 600 occurs directly after method 500.

[0088] In box 605, the detection differs from that in Figure 5 The second trigger event is detected in block 505 as the first trigger event. In some embodiments, the SPAD controller enables one or more SPADs to detect a second TDC trigger event, wherein the second TDC trigger event comprises the detection of one or more photons when additional optical pulses in a plurality of optical pulses are reflected to one or more SPADs during the timing of the peak of the first histogram.

[0089] Optionally, in block 610, an overlap event is detected. In some embodiments, the overlap event is detected by an overlap detector.

[0090] In block 615, a delay line is used to output fine timing. In some embodiments, the delay line is configured to output one or more photons at a second resolution, wherein a counter is further configured to generate a second histogram of one or more photons at the second resolution.

[0091] In box 620, the SRAM addressed via the delay line is read.

[0092] In box 625, the data is incremented by 1 and written back to SRAM to form a second histogram (or a fine histogram). In some embodiments, the second histogram has a second resolution. In some embodiments, the second resolution is higher than the first resolution. In some embodiments, the second histogram is a fine histogram.

[0093] In box 630, each fine histogram that has been formed is read.

[0094] In block 635, each fine histogram is processed. In some embodiments, the global histogram processor is configured to detect the peak of a second histogram, wherein the location of the peak of the second histogram determines the distance between the sensor and the target.

[0095] Figure 7 This is yet another example method for calculating Time-of-Flight (ToF) measurements according to the present invention. In some embodiments, method 700 is performed using an image sensor (e.g., image sensor 100). In some embodiments, the image sensor includes a single-photon avalanche photodiode (SPAD) controller (e.g., SPAD controller 101), a plurality of latches (e.g., a plurality of latches 102A, 102B, 102C…102D), a memory (e.g., memory 103), a window memory (e.g., window memory 104), a local window processor (e.g., local window processor 110), a delay line (e.g., delay line 107), a counter (e.g., counter + 1), a calibrator (e.g., calibrator 111), and a plurality of single-photon avalanche photodiodes (SPADs) (e.g., a plurality of SPADs 108A, 108B, 108C…108N).

[0096] In block 705, a first TDC trigger event is detected. In some embodiments, the first TDC trigger event includes the detection of one or more photons when an initial optical pulse in a plurality of optical pulses is reflected to one or more SPADs. In some embodiments, the optical pulse is emitted by a laser (e.g., laser 120).

[0097] In block 710, optionally, an overlap event is detected. In some embodiments, the overlap event is detected by an overlap detector (e.g., overlap detector 109).

[0098] In block 715, a coarse time-latched grayscale auto exposure code (GAEC) is specified. In some embodiments, one or more latches are configured to latch a grayscale auto exposure code (GAEC) from one or more SPADs, wherein the GAEC is associated with a first TDC trigger event.

[0099] In block 720, static random access memory (SRAM) addressed via GAEC is addressed. In some embodiments, the memory is configured to read the SRAM addressed via GAEC.

[0100] In block 725, data is incremented by 1 and written back to SRAM to form a first histogram. In some embodiments, the first histogram has a first resolution. In some embodiments, the first histogram is a coarse histogram. In some embodiments, a counter is configured to count one or more photons of a first TDC trigger event and generate a first histogram of one or more photons at a first resolution.

[0101] In box 730, the cell with the largest address is determined using local window processing. In some embodiments, this means that no histogram is formed.

[0102] In box 735, clear the SRAM.

[0103] It should be understood that all methods 500, 600, and 700 should be interpreted as representative only. In some embodiments, without departing from the scope of this disclosure, the process blocks of all methods 500, 600, 700, and 800 may be performed simultaneously, sequentially, in different orders, or even omitted. < / j>

Claims

1. A sensor for determining time of flight, the sensor comprising: one or more single photon avalanche diodes configured to detect a first time-to-digital conversion trigger event, wherein the first time-to-digital conversion trigger event includes one or more photons produced when an initial light pulse of a plurality of light pulses interacts with the one or more single photon avalanche diodes, wherein the plurality of pulses are emitted by a light source; one or more latches configured to latch a code from the one or more single photon avalanche diodes, wherein the code is associated with the first time-to-digital conversion trigger event; a memory configured to read a static random access memory addressed by the code; a counter configured to count the one or more photons of the first time-to-digital conversion trigger event and to produce a first histogram of the one or more photons at a first resolution; a global window processor configured to read the first histogram and to detect a peak of the first histogram; a window memory configured to control a single photon avalanche diode controller, wherein the single photon avalanche diode controller enables the one or more single photon avalanche diodes to detect a second time-to-digital conversion trigger event, wherein the second time-to-digital conversion trigger event includes one or more photons detected when an additional light pulse of the plurality of light pulses interacts with the one or more single photon avalanche diodes during a time span of the peak of the first histogram; a delay line configured to delay propagation of the one or more photons for a predetermined time at a second resolution, wherein the counter is further configured to produce a second histogram of the one or more photons at the second resolution, and a global histogram processor configured to detect a peak of the second histogram, wherein the peak of the second histogram determines a distance between the sensor and a target.

2. The sensor of claim 1, further comprising the light source, wherein the light source is a laser.

3. The sensor of claim 1, wherein the second resolution is higher than the first resolution.

4. The sensor of claim 1, further comprising an arithmetic logic configured to detect one or more coincidence events, wherein the code is further based on the one or more coincidence events.

5. The sensor of claim 1, wherein each single photon avalanche diode of the one or more single photon avalanche diodes is communicatively coupled to an active quenching circuit.

6. The sensor of claim 1, wherein the one or more single photon avalanche diodes are four single photon avalanche diodes.

7. The sensor of claim 6, wherein the four single photon avalanche diodes are arranged in a 2x2 array.

8. The sensor of claim 1, wherein the delay line is selected from a high speed clock counter and a low speed clock counter.

9. The sensor of claim 1, wherein the delay line is coupled with a 5-bit ripple counter.

10. The sensor of claim 1, wherein the global histogram processor is further configured to determine the peak value of the second histogram with a histogram centroid process.

11. The sensor of claim 1, wherein the targets comprise a first target and a second target.

12. The sensor of claim 11, wherein the first histogram comprises a first target histogram and a second target histogram, wherein the first target histogram is associated with the first target and the second target histogram is associated with the second target.

13. The sensor of claim 12, wherein the second histogram comprises the first target histogram at the second resolution and the second target histogram at the second resolution.

14. The sensor of claim 13, wherein a peak value of the first target histogram at the second resolution is compared to a peak value of the second target histogram at the second resolution to calculate a distance between the first target and the second target.

15. A method of calculating a time-of-flight measurement, the method comprising: detecting, with one or more single photon avalanche diodes, a first time-to-digital conversion trigger event, wherein the first time-to-digital conversion trigger event includes detecting one or more photons when an initial light pulse of a plurality of light pulses is reflected to the one or more single photon avalanche diodes; latching, with a plurality of latches, a gray auto exposure code from the one or more single photon avalanche diodes, wherein the gray auto exposure code is associated with the first time-to-digital conversion trigger event; reading, with a memory, a static random access memory addressed by the gray auto exposure code; counting, with a counter, the one or more photons of the first time-to-digital conversion trigger event; generating, at a first resolution, a first histogram of the one or more photons; reading the first histogram to detect a peak range of the first histogram; detecting, with the one or more single photon avalanche diodes, a second time-to-digital conversion trigger event, wherein the second time-to-digital conversion trigger event includes detecting one or more photons when an additional light pulse of the plurality of light pulses is reflected to the one or more single photon avalanche diodes during the peak of the first histogram; delaying, with a delay line, a propagation of the one or more photons at a second resolution; generating, with the counter, a second histogram of the one or more photons at the second resolution based on the delayed propagation of the one or more photons at a second resolution; detecting a peak of the second histogram.

16. The method of claim 15, wherein the second resolution is higher than the first resolution.

17. The method of claim 15, wherein the method further comprises: detecting, with an arithmetic logic, a coincidence event, wherein the gray auto exposure code is further based on the coincidence event.

18. The method of claim 15, wherein detecting the peak of the second histogram comprises: applying a K filter to the second histogram; ​ convolving the second histogram; and determining the peak value of the second histogram using a histogram centroid algorithm.

19. The method of claim 15, wherein the method further comprises determining a distance between the sensor and a target using the peak value of the second histogram.

20. The method of claim 19, wherein the target comprises a first target and a second target, wherein the first histogram comprises a first target histogram and a second target histogram, wherein the first target histogram is associated with a first target and the second target histogram is associated with a second target, and wherein the second histogram comprises the first target histogram at the second resolution and the second target histogram at the second resolution, and wherein the method further comprises: comparing a peak value of the first target histogram at the second resolution to a peak value of the second target histogram at the second resolution; and determining a distance between the first target and the second target.

Images