Serial multichannel data acquisition method and system and storage medium

Abstract

The invention provides a serial multi-channel data acquisition method, a serial multi-channel data acquisition system and a computer readable storage medium. The serial multichannel data acquisition method comprises the following steps: a reading command is continuously sent to a plurality of ADC chips corresponding to each channel in sequence, and the plurality of ADC chips respectively carry out a data preparation process based on the reading command, the step of uninterruptedly sending the reading command comprises sending the reading command to one ADC chip and then directly sending the reading command to the next ADC chip by skipping the data preparation process of the ADC chip; and sequentially reading the data converted by the plurality of ADC chips after completing the data preparation process. Through the serial multichannel data acquisition method provided by the invention, the data acquisition speed can be accelerated, and the data acquisition efficiency can be improved, so that the real-time requirement of the industrial control field can be better met.

Description

Technical Field

[0001] This invention relates to the field of computer systems, and more particularly to a serial multi-channel data acquisition method, a serial multi-channel data acquisition system, and a computer-readable storage medium. Background Technology

[0002] In the field of industrial control, ADC (Analog-to-Digital Converter) acquisition and conversion technology refers to using an ADC chip to acquire an analog signal (such as an analog voltage value) from a certain channel and converting the analog signal into a digital signal according to a set threshold in order to achieve the corresponding control function.

[0003] Please refer to Figure 1 , Figure 1 A schematic diagram of an existing serial multi-channel data acquisition method is shown.

[0004] like Figure 1 As shown, for a single-channel, single-chip ADC, the data acquisition system first needs to initialize and configure the ADC chip. Then, the ADC chip converts the analog signal to a digital signal based on the received read command; this conversion process is typically time-consuming. Once the ADC chip has completed the conversion of all analog signals to digital signals, the data acquisition system reads the data to achieve subsequent control. For serial, multi-channel, multi-chip ADCs, the data acquisition system needs to sequentially complete the acquisition process for each channel's single ADC chip to access each ADC chip serially. For example, when an existing data acquisition system connects to... Figure 1 When using the four ADC chips shown, 16 steps are required to complete the data acquisition for the four channels corresponding to the four ADC chips. Furthermore, the time required to complete all data acquisition includes the time spent waiting for the four ADC chips to convert the data.

[0005] It is evident that the time consumed by the ADC chip during data conversion is a key indicator determining the real-time performance of subsequent control functions. However, existing serial multi-channel data acquisition methods take too long and cannot meet the high real-time requirements of multi-channel data acquisition in embedded systems.

[0006] In order to overcome the above-mentioned defects in the existing technology, there is an urgent need in the field for a serial multi-channel data acquisition technology that can accelerate the data acquisition speed and improve the data acquisition efficiency, so as to better meet the real-time requirements of the industrial control field. Summary of the Invention

[0007] The following provides a brief overview of one or more aspects to offer a basic understanding of them. This overview is not an exhaustive summary of all conceived aspects, nor is it intended to identify key or decisive elements of all aspects, nor to define the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form to prepare for the more detailed descriptions that follow.

[0008] To overcome the aforementioned deficiencies in the existing technology, the present invention provides a serial multi-channel data acquisition method, a serial multi-channel data acquisition system, and a computer-readable storage medium, which can accelerate data acquisition speed and improve data acquisition efficiency, thereby better meeting the real-time requirements of the industrial control field.

[0009] Specifically, the serial multi-channel data acquisition method provided by the first aspect of the present invention includes the steps of: continuously sending read commands to multiple ADC chips corresponding to each channel, wherein the multiple ADC chips perform a data preparation process based on the read commands, wherein continuously sending read commands includes sending a read command to one ADC chip and then skipping the data preparation process of that ADC chip and directly sending a read command to the next ADC chip; and sequentially reading the data converted by the multiple ADC chips after completing the data preparation process.

[0010] Preferably, in one embodiment of the present invention, the step of sequentially reading the data converted by the plurality of ADC chips after completing the data preparation process includes: in response to the completion of sending a read command to the plurality of ADC chips, sequentially reading the data converted by the plurality of ADC chips after completing the data preparation process.

[0011] Preferably, in one embodiment of the present invention, the step of sequentially reading the data converted by the plurality of ADC chips after completing the data preparation process includes: in response to the current ADC chip not completing the data preparation process, waiting for the ADC chip to complete the data preparation process and then reading the converted data.

[0012] Preferably, in one embodiment of the present invention, before the step of continuously sending read commands to the multiple ADC chips corresponding to each channel in sequence, the method further includes the step of continuously sending initialization commands to the multiple ADC chips in sequence in response to device startup.

[0013] Preferably, in one embodiment of the present invention, the plurality of ADC chips includes at least three of the ADC chips.

[0014] Furthermore, the serial multi-channel data acquisition system provided according to the second aspect of the present invention includes a memory and a processor. The memory stores computer instructions. The processor is connected to the memory and configured to execute the computer instructions stored in the memory to implement the serial multi-channel data acquisition method provided in any of the above embodiments.

[0015] Preferably, in one embodiment of the present invention, the serial multi-channel data acquisition system is a single-core MCU.

[0016] Preferably, in one embodiment of the present invention, the serial multi-channel data acquisition system communicates with multiple ADC chips through a serial peripheral interface.

[0017] Furthermore, the computer-readable storage medium provided according to the third aspect of the present invention stores computer instructions. When the computer instructions are executed by a processor, the serial multi-channel data acquisition method provided in any of the above embodiments is implemented. Attached Figure Description

[0018] The above-described features and advantages of the present invention will be better understood after reading the following detailed description of embodiments of the present disclosure in conjunction with the accompanying drawings. In the drawings, components are not necessarily drawn to scale, and components having similar related characteristics or features may have the same or similar reference numerals.

[0019] Figure 1 A schematic diagram of an existing serial multi-channel data acquisition method is shown;

[0020] Figure 2 A schematic diagram of a serial multi-channel data acquisition system provided according to some embodiments of the present invention is shown;

[0021] Figure 3 A flowchart of a serial multi-channel data acquisition method according to some embodiments of the present invention is shown; and

[0022] Figure 4 A schematic diagram of a serial multi-channel data acquisition method provided according to some embodiments of the present invention is shown.

[0023] Figure label:

[0024] 200: Data acquisition system;

[0025] 210: Memory;

[0026] 211: Computer-readable storage medium;

[0027] 220: Processor;

[0028] 300: Serial multi-channel data acquisition method;

[0029] S310~S320: Steps; and

[0030] 401, 402, 403, 404: ADC chips. Detailed Implementation

[0031] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. It should be noted that the aspects described below with reference to the accompanying drawings and specific embodiments are merely exemplary and should not be construed as limiting the scope of protection of the present invention in any way.

[0032] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0033] Furthermore, the terms "upper," "lower," "left," "right," "top," "bottom," "horizontal," and "vertical" used in the following description should be understood as the orientations shown in the relevant paragraphs and accompanying drawings. These relative terms are for illustrative purposes only and do not imply that the described apparatus must be manufactured or operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0034] It is understood that although terms such as "first," "second," and "third" may be used herein to describe various components, regions, layers, and / or parts, these components, regions, layers, and / or parts should not be limited by these terms, and these terms are only used to distinguish different components, regions, layers, and / or parts. Therefore, the first components, regions, layers, and / or parts discussed below may be referred to as second components, regions, layers, and / or parts without departing from some embodiments of the present invention.

[0035] As mentioned above, the time spent by the ADC chip in the data conversion process is a key indicator that determines the real-time performance of subsequent control functions. However, the existing serial multi-channel data acquisition methods take too long and cannot meet the high real-time requirements of multi-channel data acquisition in embedded systems.

[0036] To overcome the aforementioned deficiencies in the existing technology, the present invention provides a serial multi-channel data acquisition method, a serial multi-channel data acquisition system, and a computer-readable storage medium, which can accelerate data acquisition speed and improve data acquisition efficiency, thereby better meeting the real-time requirements of the industrial control field.

[0037] In some non-limiting embodiments, the serial multi-channel data acquisition method provided in the first aspect of the present invention can be implemented via the serial multi-channel data acquisition system provided in the second aspect of the present invention.

[0038] Please refer to Figure 2 , Figure 2 A schematic diagram of a serial multi-channel data acquisition system provided according to some embodiments of the present invention is shown.

[0039] like Figure 2 As shown, the serial multi-channel data acquisition system 200 may be configured with a memory 210 and a processor 220. The memory 210 includes, but is not limited to, the computer-readable storage medium 211 described in the third aspect of the present invention, on which computer instructions are stored. The processor 220 is connected to the memory 210 and configured to execute the computer instructions stored in the memory 210 to implement the serial multi-channel data acquisition method provided in the first aspect of the present invention.

[0040] In a preferred embodiment, the data acquisition system 200 can be applied to an embedded system, and the data acquisition system 200 can be a single-core MCU (Micro Controller Unit) chip. Furthermore, the data acquisition system 200 can communicate with the ADC chip via a Serial Peripheral Interface (SPI).

[0041] The working principle of the above-described serial multi-channel data acquisition system 200 will first be described with reference to some embodiments of serial multi-channel data acquisition methods. Those skilled in the art will understand that these embodiments of serial multi-channel data acquisition methods are merely non-limiting implementations provided by the present invention, intended to clearly demonstrate the main concepts of the invention and provide specific solutions convenient for public implementation, rather than limiting all functions or operating modes of the serial multi-channel data acquisition system 200. Similarly, the serial multi-channel data acquisition system 200 is also only one non-limiting implementation provided by the present invention, and does not limit the executing entity and execution order of the steps in these serial multi-channel data acquisition methods.

[0042] In a preferred embodiment, when the device equipped with the data acquisition system 200 is powered on, the device or the data acquisition system 200 can continuously send initialization commands to multiple ADC chips corresponding to each channel in sequence, so that each ADC chip can complete the initialization configuration operation before receiving the read command and when the device is started. This extracts the initialization operation of multiple ADC chips from the data acquisition steps, reducing the time spent by the data acquisition system 200 during subsequent data acquisition.

[0043] Please refer to Figure 3 and Figure 4 , Figure 3 A flowchart of a serial multi-channel data acquisition method according to some embodiments of the present invention is shown. Figure 4 A schematic diagram of a serial multi-channel data acquisition method provided according to some embodiments of the present invention is shown.

[0044] like Figure 3 As shown, the serial multi-channel data acquisition method 300 may include steps S310 and S320:

[0045] Read commands are continuously sent sequentially to multiple ADC chips corresponding to each channel. Each ADC chip performs a data preparation process based on the read commands. Continuous sending of read commands includes sending a read command to one ADC chip, then skipping the data preparation process of that chip and directly sending a read command to the next ADC chip; and...

[0046] The data converted from the data prepared by multiple ADC chips is read sequentially.

[0047] The data acquisition system 200 can, upon receiving a data acquisition command, sequentially and continuously send read commands to multiple ADC chips, with each ADC chip performing a data preparation process based on the read commands. Here, continuously sending read commands includes sending a read command to one ADC chip, then skipping that chip's data preparation process and directly sending a read command to the next ADC chip.

[0048] For example, in Figure 4 In the illustrated embodiment, the data acquisition system 200 first sends a read command to the ADC chip 401. After receiving the read command, the ADC chip 401 begins the data preparation process of converting the analog signal into a digital signal. After sending the read command to the ADC chip 401, the data acquisition system 200 does not wait, but directly continues to send read commands to the ADC chips 402, 403, and 404. After receiving the read command, the ADC chips 402, 403, and 404 directly begin their respective data preparation processes.

[0049] Therefore, the data acquisition system 200 can complete the process of sending read commands to other ADC chips corresponding to the serial multi-channel while the data preparation process of multiple ADC chips is being completed. This optimizes the time of the data preparation process of multiple ADC chips, thereby avoiding the data acquisition system 200 from continuously polling and waiting during the data preparation process of the ADC chips, which would waste the processing resources of the data acquisition system 200 and speed up the acquisition speed of the data acquisition system 200.

[0050] Preferably, after the process of the data acquisition system 200 sending read commands to multiple ADC chips is completed, the data acquisition system 200 returns to the first ADC chip and continues to read the data converted by the multiple ADC chips after completing the data preparation process.

[0051] like Figure 4 As shown, after the data acquisition system 200 sends a read command to ADC chips 401, 402, 403, and 404, ADC chip 401 has completed the data preparation process. Thus, the data acquisition system 200 can directly read the data converted by ADC chip 401 through the data preparation process, and continue to sequentially read the data converted by ADC chips 402, 403, and 404 after they have completed their data preparation processes.

[0052] Furthermore, when the ADC chip being read by the data acquisition system 200 has not yet completed the data preparation process, the data acquisition system 200 can wait for the ADC chip to complete the data preparation process before reading the data. For example, in Figure 4 In the illustrated embodiment, after the data acquisition system 200 finishes reading the data from the ADC chip 401, the data preparation process of the ADC chip 402 is not yet complete. The data acquisition system 200 can wait for the ADC chip 402 to complete the data preparation process, and then read the converted data after completion.

[0053] Thus, the serial multi-channel data acquisition system provided by the present invention can optimize the acquisition timing of multiple ADC chips, transform the serial acquisition of multiple ADC chips into a parallel acquisition mode, save the time spent in the data preparation process, and thus accelerate the acquisition speed of multiple ADC chips when running on a single machine with a single core.

[0054] Preferably, the multiple ADC chips may include at least three ADC chips. When the number of ADC chips increases, the optimization benefits brought by the serial multi-channel data acquisition method provided by the present invention will be more obvious.

[0055] Although the methods described above are illustrated and depicted as a series of actions for the sake of simplicity, it should be understood and appreciated that these methods are not limited by the order of the actions, as some actions may occur in a different order and / or concurrently with other actions from the illustrations and descriptions herein or not illustrated and described herein but which may be understood by those skilled in the art, according to one or more embodiments.

[0056] Those skilled in the art will understand that information, signals, and data can be represented using any of a variety of different techniques and arts. For example, the data, instructions, commands, information, signals, bits, symbols, and chips described throughout the above description can be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, light fields or optical particles, or any combination thereof.

[0057] Those skilled in the art will further appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, the various illustrative components, blocks, modules, circuits, and steps are described above in a generalized manner in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the invention.

[0058] Although the controller described in the above embodiments can be implemented through a combination of software and hardware, it is understood that the controller can also be implemented in software or hardware. For hardware implementation, the controller can be implemented using one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, other electronic devices for performing the above functions, or a selection of combinations of the above devices. For software implementation, the controller can be implemented using independent software modules such as procedures and functions running on a general-purpose chip, each module performing one or more functions and operations described herein.

[0059] The various illustrative logic modules and circuits described in conjunction with the embodiments disclosed herein may be implemented or performed using a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but in alternatives, it may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors cooperating with a DSP core, or any other such configuration.

[0060] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of both. The software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor such that the processor can read and write information to / from the storage medium. In an alternative, the storage medium may be integrated into the processor. The processor and storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In an alternative, the processor and storage medium may reside as discrete components in the user terminal.

[0061] In one or more exemplary embodiments, the described functionality may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software as a computer program product, the functionality may be stored or transmitted as one or more instructions or code on or through a computer-readable medium. A computer-readable medium includes both computer storage media and communication media, encompassing any medium that facilitates the transfer of a computer program from one location to another. A storage medium may be any available medium accessible to a computer. By way of example and not limitation, such a computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disc storage, disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and is accessible to a computer. Any connection is also legitimately referred to as a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of a medium. As used in this article, disk and disc include compact discs (CDs), laser discs, optical discs, digital multi-purpose discs (DVDs), floppy disks, and Blu-ray discs. Disks typically reproduce data magnetically, while discs reproduce data optically using lasers. Combinations of these should also be included within the scope of computer-readable media.

[0062] The prior description of this disclosure is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not intended to be limited to the examples and designs described herein, but should be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method of serial multichannel data acquisition, characterized by, The method comprises the steps of: sending reading commands to the multiple ADC chips corresponding to the channels in sequence without interruption, wherein the multiple ADC chips perform data preparation processes based on the reading commands, and the sending of the reading commands without interruption comprises sending a reading command to an ADC chip and then skipping the data preparation process of the ADC chip to directly send a reading command to the next ADC chip; and reading the converted data of the multiple ADC chips in sequence after the data preparation processes are completed.

2. The method for serial multichannel data acquisition according to claim 1, wherein, The step of reading the converted data of the multiple ADC chips in sequence after the data preparation processes are completed comprises: reading the converted data of the multiple ADC chips in sequence after the data preparation processes are completed in response to the sending of the reading commands to the multiple ADC chips being completed.

3. The method for serial multichannel data acquisition according to claim 1, wherein, The step of reading the converted data of the multiple ADC chips in sequence after the data preparation processes are completed comprises: waiting for the converted data of the ADC chip after the data preparation process of the ADC chip is completed in response to the ADC chip not completing the data preparation process.

4. The method for serial multichannel data acquisition according to claim 1, wherein, Before the step of sending the reading commands to the multiple ADC chips corresponding to the channels in sequence without interruption, the method further comprises the step of: sending initialization instructions to the multiple ADC chips in sequence without interruption in response to the start of the device.

5. The method for serial multichannel data acquisition according to claim 1, wherein, The multiple ADC chips comprise at least three ADC chips.

6. The method for serial multichannel data acquisition of claim 1, wherein, The multiple ADC chips are communicated through a serial peripheral interface.

7. A serial multi-channel data acquisition system, characterized by The system comprises: a memory having computer instructions stored thereon; and a processor connected to the memory and configured to execute the computer instructions stored on the memory to implement the serial multi-channel data acquisition method according to any one of claims 1-6.

8. The serial multichannel data acquisition system of claim 7, wherein, The serial multi-channel data acquisition system is a single-core MCU.

9. The serial multichannel data acquisition system of any one of claims 7 or 8, wherein, The serial multi-channel data acquisition system communicates with the multiple ADC chips through a serial peripheral interface.

10. A computer readable storage medium having stored thereon computer instructions, wherein, The computer instructions are executed by the processor to implement the serial multi-channel data acquisition method according to any one of claims 1-6.

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