Display device and electronic device

Abstract

A display device and an electronic device are disclosed. The display device includes: a display panel including pixels; a data driver; a gate driver; and a voltage generator configured to apply an initialization voltage to the display panel. The display panel includes a first display area and a reference display area. At least one of the pixels includes: a driving transistor configured to generate a driving current based on a data voltage; a light emitting element including a first electrode receiving the driving current and a second electrode receiving the low power voltage; and an initialization transistor configured to apply an initialization voltage to the first electrode of the light emitting element. The initialization voltage includes a first region initialization voltage and a reference region initialization voltage. A first area initialization voltage applied to the first display area does not coincide with a reference area initialization voltage applied to the reference display area.

Description

Technical Field

[0001] Some aspects of embodiments of this disclosure relate to display devices and electronic devices. Background Technology

[0002] Typically, a display device includes a display panel and a display panel driver. The display panel includes multiple gate lines, multiple data lines, multiple transmit lines, and multiple pixels. The display panel driver includes a gate driver that provides gate signals to the gate lines, a data driver that provides data voltages to the data lines, a transmit driver that provides transmit signals to the transmit lines, and a drive controller that controls the gate driver, data driver, and transmit driver.

[0003] Typically, a pixel may include a light-emitting element. The anode of the light-emitting element can be initialized with an initial voltage. The initial voltage applied to each pixel is the same. Consequently, the display quality of the display panel may deteriorate.

[0004] The information disclosed in this background section is only intended to enhance the understanding of the background art, and therefore the information discussed in this background section does not necessarily constitute prior art. Summary of the Invention

[0005] Some aspects of embodiments of this disclosure relate to display devices and electronic devices.

[0006] Some aspects of embodiments of this disclosure include display devices with relatively improved display quality.

[0007] Some aspects of embodiments of this disclosure may include electronic devices with relatively improved display quality.

[0008] According to some embodiments, the display device may include: a display panel including a plurality of pixels; a data driver configured to apply a data voltage to the display panel; a gate driver configured to output a gate signal to the pixels; and a voltage generator configured to apply a low-power voltage and an initialization voltage to the display panel. According to some embodiments, the display panel may include a first display area and a reference display area. According to some embodiments, at least one pixel may include: a driving transistor configured to generate a driving current based on the data voltage; a light-emitting element including a first electrode receiving the driving current and a second electrode receiving the low-power voltage; and an initialization transistor configured to apply an initialization voltage to the first electrode of the light-emitting element. According to some embodiments, the initialization voltage may include a first area initialization voltage and a reference area initialization voltage. According to some embodiments, the first area initialization voltage applied to the first display area may be inconsistent with the reference area initialization voltage applied to the reference display area.

[0009] According to some embodiments, the initialization voltage of the first area can be generated based on a reference initialization voltage and an initialization offset voltage. According to some embodiments, the initialization offset voltage can be calculated based on the difference in brightness uniformity between the reference display area and the first display area.

[0010] According to some embodiments, the difference in brightness uniformity can be determined by changing the initialization voltage of the first zone. According to some embodiments, the initialization offset voltage can be calculated based on the changed initialization voltage of the first zone corresponding to the minimum brightness uniformity where the difference in brightness uniformity is the smallest.

[0011] According to some embodiments, brightness uniformity can be the ratio between the brightness when a reference data voltage is applied to a reference display area and the brightness when a reference data voltage is applied to a first display area.

[0012] According to some embodiments, when a reference voltage is applied to a reference display area, the reference display area can emit a target brightness.

[0013] According to some embodiments, the display panel can be generated based on a mother panel. According to some embodiments, the reference initialization voltage can be generated based on position data of the display panel within the mother panel.

[0014] According to some embodiments, the mother panel may include a first mother area and a second mother area. According to some embodiments, the reference initialization voltage of the display panel generated from the first mother area may be higher than the reference initialization voltage of the display panel generated from the second mother area.

[0015] According to some embodiments, the master panel may include a center area and an edge area. According to some embodiments, the first master area may be an edge area and the second master area may be a center area.

[0016] According to some embodiments, the display panel may further include a second display area. According to some embodiments, the initialization voltage may further include a second area initialization voltage. According to some embodiments, the second area initialization voltage applied to the second display area may be inconsistent with the first area initialization voltage and the reference area initialization voltage.

[0017] According to some embodiments, the initialization voltage of the first region can be higher than the initialization voltage of the reference region.

[0018] According to some embodiments, the display device may further include: an emission driver configured to output an emission signal to a pixel. According to some embodiments, at least one pixel may include: a first transistor including a control electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node; a second transistor configured to apply a data voltage to the second node in response to a write gate signal; a third transistor configured to connect the first node and the third node in response to a compensation gate signal; a fourth transistor configured to apply a data initialization voltage to the first node in response to an initialization gate signal; a fifth transistor configured to apply a high-power voltage to the second node in response to an emission signal; a sixth transistor configured to connect the third node and the fourth node in response to an emission signal; and a seventh transistor configured to apply an initialization voltage to the fourth node in response to a write gate signal. According to some embodiments, the first transistor may be a driving transistor, and the seventh transistor may be an initialization transistor. According to some embodiments, the first electrode of the light-emitting element may be connected to the fourth node.

[0019] According to some embodiments, a display device may include: a display panel including a plurality of pixels; a data driver configured to apply a data voltage to the display panel; a gate driver configured to output a gate signal to the pixels; and a voltage generator configured to apply a low-power voltage and an initialization voltage to the display panel. According to some embodiments, the display panel may include a first pixel column and a second pixel column. According to some embodiments, at least one pixel may include: a driving transistor configured to generate a driving current based on the data voltage; a light-emitting element including a first electrode receiving the driving current and a second electrode receiving the low-power voltage; and an initialization transistor configured to apply an initialization voltage to the first electrode of the light-emitting element. According to some embodiments, the initialization voltage may include a first column initialization voltage and a second column initialization voltage. According to some embodiments, the first column initialization voltage applied to the first pixel column may be inconsistent with the second column initialization voltage applied to the second pixel column.

[0020] According to some embodiments, the first column initialization voltage can be generated based on a reference initialization voltage and an initialization offset voltage. According to some embodiments, the initialization offset voltage can be calculated based on the difference in brightness uniformity between at least one pixel included in the first pixel column and at least one pixel included in the second pixel column.

[0021] According to some embodiments, the difference in brightness uniformity can be determined by changing the initialization voltage of the first column. According to some embodiments, the initialization offset voltage can be calculated based on the changed initialization voltage of the first column corresponding to the minimum brightness uniformity where the difference in brightness uniformity is the smallest.

[0022] According to some embodiments, brightness uniformity can be the ratio between the brightness when a reference data voltage is applied to at least one pixel included in the second pixel column and the brightness when a reference data voltage is applied to at least one pixel included in the first pixel column.

[0023] According to some embodiments, the display panel can be generated based on a mother panel. According to some embodiments, the reference initialization voltage can be generated based on position data of the display panel within the mother panel.

[0024] According to some embodiments, the mother panel may include a first mother area and a second mother area. According to some embodiments, the reference initialization voltage of the display panel generated from the first mother area may be higher than the reference initialization voltage of the display panel generated from the second mother area.

[0025] According to some embodiments, the initialization voltage of the first column can be higher than that of the second column.

[0026] According to some embodiments, the electronic device may include: a display panel including a plurality of pixels; a display panel driver configured to drive the display panel based on input image data and input control signals; a processor configured to output input image data and input control signals; and a power manager configured to output a driving voltage to the display panel. According to some embodiments, the driving voltage may include an initialization voltage and a low-power voltage. According to some embodiments, the display panel may include a first display area and a reference display area. According to some embodiments, at least one pixel may include: a driving transistor configured to generate a driving current based on a data voltage; a light-emitting element including a first electrode receiving the driving current and a second electrode receiving the low-power voltage; and an initialization transistor configured to apply an initialization voltage to the first electrode of the light-emitting element. According to some embodiments, the initialization voltage may include a first area initialization voltage and a reference area initialization voltage. According to some embodiments, the first area initialization voltage applied to the first display area may be inconsistent with the reference area initialization voltage applied to the reference display area.

[0027] According to some embodiments, the initialization voltage of the first area can be generated based on a reference initialization voltage and an initialization offset voltage. According to some embodiments, the initialization offset voltage can be calculated based on the difference in brightness uniformity between the reference display area and the first display area.

[0028] As described above, the initialization voltage can be stored in the display device based on the position data of the mother panel. Accordingly, the uniformity of the mother panel's brightness based on its position can be compensated. This compensation improves the brightness reliability of the display device. Furthermore, it relatively reduces the visibility of speckles on the display device.

[0029] According to some embodiments, different initialization voltages can be applied to each of the first to Nth display areas. The initialization voltages for the first to Nth areas can be voltages that take into account brightness characteristics. Accordingly, the black characteristics of the display panel can be relatively improved.

[0030] Furthermore, according to some embodiments, the target area initialization voltage can be the sum of a reference initialization voltage and an initialization offset voltage. Accordingly, the first electrode (e.g., anode) of the light-emitting element can be initialized to a voltage higher than the reference initialization voltage. Initializing the first electrode (e.g., anode) of the light-emitting element to a voltage higher than the reference initialization voltage allows for rapid initialization of the first electrode (e.g., anode). Rapid initialization of the first electrode (e.g., anode) of the light-emitting element allows for a relative reduction in the visibility of speckles on the display panel. Consequently, the black characteristics of the display panel can be relatively improved. Furthermore, the display quality of the display panel can be relatively improved. Attached Figure Description

[0031] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0032] Figure 1 This is a block diagram illustrating a display device according to an embodiment of the present disclosure.

[0033] Figure 2 The illustration includes Figure 1 A circuit diagram of an example pixel in a display device.

[0034] Figure 3 The illustration includes Figure 1 A plan view of an example of the mother panel of the display panel of a display device.

[0035] Figure 4 The illustration includes Figure 1 An example diagram of a display panel in a display device.

[0036] Figure 5 The illustration includes Figure 4 A graph of the pixel column in the Nth display area of ​​the display panel.

[0037] Figure 6 The illustration includes Figure 1 An example diagram of a display panel in a display device.

[0038] Figure 7 This is a diagram illustrating an example of the initial voltage applied to the display panel.

[0039] Figure 8 The diagram is used to generate Figure 7 The table of initialization voltage and initialization offset voltage.

[0040] Figure 9 It is a diagram. Figure 1 A flowchart of the method for setting the initial voltage of the display device.

[0041] Figure 10 The illustration includes Figure 1 A circuit diagram of an example pixel in a display device.

[0042] Figure 11 This is a block diagram illustrating an electronic device according to some embodiments of the present disclosure.

[0043] Figure 12 It is a diagram. Figure 11 The diagram shows an example of an electronic device implemented as a smartphone. Detailed Implementation

[0044] This disclosure will be explained in detail below with reference to the accompanying drawings.

[0045] Figure 1 This is a block diagram illustrating a display device 10 according to an embodiment of the present disclosure.

[0046] refer to Figure 1 The display device 10 may include a display panel 100 and a display panel driver. The display panel driver may include a drive controller 200, a gate driver 300, a gamma reference voltage generator 400, a data driver 500, a transmit driver 600, and a voltage generator 700.

[0047] The display panel 100 may have a display area on which an image is displayed and a peripheral area adjacent to the display area.

[0048] The display panel 100 may include multiple gate lines GL, multiple emission lines EL, multiple data lines DL, and multiple pixels PX electrically connected to the gate lines GL, emission lines EL, and data lines DL. The gate lines GL may extend in a first direction D1, and the data lines DL may extend in a second direction D2 intersecting the first direction D1. The emission lines EL may extend in the first direction D1.

[0049] although Figure 1 The illustration shows a single pixel PX, a single gate line GL, a single emission line EL, and a single data line DL. However, as those skilled in the art will understand, depending on the design and size of the display panel 100, the display panel 100 may include any suitable number of pixels, gate lines, emission lines, and data lines.

[0050] The drive controller 200 can receive input image data IMG and input control signals CONT from an external device. For example, the input image data IMG may include red image data, green image data, and blue image data. The input image data IMG may further include white image data. The input image data IMG may also include magenta image data, cyan image data, and yellow image data. The input control signal CONT may include a master clock signal and a data enable signal. The input control signal CONT may further include a vertical synchronization signal and a horizontal synchronization signal.

[0051] The drive controller 200 can generate a first control signal CONT1, a second control signal CONT2, a third control signal CONT3, a fourth control signal CONT4, a fifth control signal CONT5, and a data signal DATA based on the input image data IMG and the input control signal CONT.

[0052] The drive controller 200 can generate a first control signal CONT1 for controlling the operation of the gate driver 300 based on the input control signal CONT, and output the first control signal CONT1 to the gate driver 300. The first control signal CONT1 may include a vertical start signal and a gate clock signal.

[0053] The drive controller 200 can generate a second control signal CONT2 for controlling the operation of the data driver 500 based on the input control signal CONT, and output the second control signal CONT2 to the data driver 500. The second control signal CONT2 may include a horizontal start signal and a load signal.

[0054] The drive controller 200 can generate a data signal DATA based on the input image data IMG. The drive controller 200 can output the data signal DATA to the data driver 500.

[0055] The drive controller 200 can generate a third control signal CONT3 based on the input control signal CONT for controlling the operation of the gamma reference voltage generator 400, and output the third control signal CONT3 to the gamma reference voltage generator 400.

[0056] The drive controller 200 can generate a fourth control signal CONT4 for controlling the operation of the transmitter driver 600 based on the input control signal CONT, and output the fourth control signal CONT4 to the transmitter driver 600.

[0057] The drive controller 200 can generate a fifth control signal CONT5 for controlling the operation of the voltage generator 700 based on the input control signal CONT, and output the fifth control signal CONT5 to the voltage generator 700.

[0058] The gate driver 300 can generate a gate signal to drive the gate line GL in response to a first control signal CONT1 received from the drive controller 200. The gate driver 300 can output the gate signal to the gate line GL.

[0059] According to some embodiments, the gate driver 300 may be located in the peripheral region. According to some embodiments, the gate driver 300 may be integrated into the peripheral region.

[0060] The gamma reference voltage generator 400 generates a gamma reference voltage VGREF in response to a third control signal CONT3 received from the drive controller 200. The gamma reference voltage generator 400 provides the gamma reference voltage VGREF to the data driver 500. The gamma reference voltage VGREF has a value corresponding to the level of the data signal DATA.

[0061] According to some embodiments, the gamma reference voltage generator 400 may be located in the drive controller 200 or in the data driver 500.

[0062] The data driver 500 receives a second control signal CONT2 and a data signal DATA from the drive controller 200, and receives a gamma reference voltage VGREF from the gamma reference voltage generator 400. The data driver 500 uses the gamma reference voltage VGREF to convert the data signal DATA into a data voltage VDATA of analog type. The data driver 500 outputs the data voltage VDATA to the data line DL.

[0063] According to some embodiments, the data driver 500 may be located in a peripheral area. According to some embodiments, the data driver 500 may be integrated into the peripheral area.

[0064] The transmitter driver 600 can generate a transmission signal in response to a fourth control signal CONT4 received from the drive controller 200. The transmitter driver 600 can output the transmission signal to the display panel 100.

[0065] According to some embodiments, the transmit driver 600 may be located in the peripheral region. According to some embodiments, the transmit driver 600 may be integrated into the peripheral region.

[0066] For ease of explanation, although in Figure 1The gate driver 300 is located on the first side of the display panel 100 and the emitter driver 600 is located on the second side of the display panel 100, but this disclosure is not limited thereto. The gate driver 300 and the emitter driver 600 may be located on the first side of the display panel 100. For example, the gate driver 300 and the emitter driver 600 may be located on the same side of the display area of ​​the display panel 100 in the peripheral area of ​​the display panel 100. For example, the gate driver 300 and the emitter driver 600 may be integrally formed with each other.

[0067] Voltage generator 700 can generate a drive voltage DV in response to a fifth control signal CONT5 received from drive controller 200. Voltage generator 700 can output the drive voltage DV to display panel 100. According to some embodiments, the drive voltage DV may include a high power voltage ELVDD (e.g., see...). Figure 2 ), low power voltage ELVSS (for example, see Figure 2 ), initial voltage VAINT (for example, see Figure 2 However, this disclosure is not limited to the types of voltages described above included in the drive voltage DV. For example, the drive voltage DV may further include a gate voltage for generating a gate signal. For example, the drive voltage DV may further include a gamma reference voltage for generating a gamma reference voltage VGREF.

[0068] Figure 2 The illustration includes Figure 1 A circuit diagram of an example pixel PX in the display device 10. Although Figure 2 The illustrations depict various components in a pixel PX according to some embodiments, but the embodiments of this disclosure are not limited thereto, and according to some embodiments, the pixel PX may include additional or fewer components without departing from the spirit and scope of the embodiments of this disclosure.

[0069] refer to Figure 1 and Figure 2 A pixel PXA may include a driving transistor DT, a writing transistor WT, an initialization transistor AIT, a light-emitting element EE, and a light-emitting element capacitor CEE.

[0070] The driving transistor DT may include a control electrode connected to a first node N1A, a first electrode receiving a high power voltage ELVDD, and a second electrode connected to a second node N2A. The driving transistor DT can generate a driving current ID based on the voltage at the first node N1A. The driving transistor DT can output the driving current ID to the second node N2A.

[0071] The write transistor WT may include a control electrode for receiving a write gate signal GW, a first electrode for receiving a data voltage VDATA, and a second electrode connected to a first node N1A. The write transistor WT may apply the data voltage VDATA to the first node N1A in response to the write gate signal GW.

[0072] An initialization transistor AIT may include a control electrode that receives an initialization gate signal GI, a first electrode that receives an initialization voltage VAINT, and a second electrode connected to a second node N2A. The initialization transistor AIT may apply the initialization voltage VAINT to the second node N2A in response to the initialization gate signal GI. According to some embodiments, the initialization voltage VAINT may be lower than the low power voltage ELVSS. The initialization transistor AIT may be referred to as a light-emitting element initialization transistor.

[0073] The light-emitting element EE may include a first electrode connected to the second node N2A and a second electrode receiving a low power voltage ELVSS. The light-emitting element EE may emit light based on a drive current ID. According to some embodiments, the light-emitting element EE may be, but is not limited to, an organic light-emitting diode (OLED). In other embodiments, the light-emitting element EE may be a nano-LED, a quantum dot (QD) LED, a microLED, an inorganic LED, or any other suitable light-emitting element.

[0074] Figure 3 The illustration includes Figure 1 A plan view of an example of the mother panel 1 of the display panel 100 of the display device 10.

[0075] refer to Figures 1 to 3 The display device 10 can be formed as multiple devices in the mother panel 1. The display device 10 can be produced based on the mother panel 1. The display device 10 can be produced by cutting the cutting line CL on the mother panel 1. For example, the mother panel 1 can be cut using a laser cutter and / or a blade.

[0076] The mother panel 1 may include an edge area SA and a center area CA. For example, the edge area SA may be referred to as the first mother area. For example, the center area CA may be referred to as the second mother area.

[0077] The brightness of the display device 10 can vary based on the position of the mother panel 1. The set brightness of the display device 10 generated based on the first mother panel area A01 can be inconsistent with the set brightness of the display device 10 generated based on the second mother panel area B01. The set brightness of the display device 10 generated based on the second mother panel area B01 can be inconsistent with the set brightness of the display device 10 generated based on the third mother panel area A02. The set brightness of the display device 10 generated based on the edge area SA can be inconsistent with the set brightness of the display device 10 generated based on the center area CA. The set brightness can be the brightness of each of the display panels 100 of the display device 10 emitting light when a target voltage is applied to the mother panel 1 to make the mother panel 1 emit light at a specific brightness. The mother brightness uniformity of the mother panel 1 can be determined by applying a target voltage to the mother panel 1. For example, the brightness of the mother panel 1 can be measured using an external device (e.g., a sensor, camera, etc.). The mother brightness uniformity can be determined based on the measured brightness.

[0078] According to some embodiments, the initialization voltage VAINT can be stored in the display device 10 based on the position data of the mother panel 1. According to some embodiments, an initialization voltage VAINT corresponding to a mother brightness uniformity that corresponds to the position data of the mother panel 1 can be determined. For example, the initialization voltage VAINT stored in the display device 10 based on the position data of the mother panel 1 can be referred to as the reference initialization voltage.

[0079] Based on the position data of the mother panel 1, different reference initialization voltages can be stored in the display device 10. The reference initialization voltage of the display device 10 generated based on the edge region SA and the reference initialization voltage of the display device 10 generated based on the center region CA can be different. For example, the reference initialization voltage of the display device 10 generated based on the edge region SA can be different from the reference initialization voltage of the display device 10 generated based on the center region CA. For example, the reference initialization voltage of the display device 10 generated based on the edge region SA can be higher than the reference initialization voltage of the display device 10 generated based on the center region CA.

[0080] Typically, the set brightness of the edge area of ​​the mother panel can differ from that of the center area. For example, the set brightness of the edge area of ​​the mother panel can differ from that of the center area. When storing an initial voltage that does not take into account the position data of the mother panel, the brightness reliability of the display device may deteriorate.

[0081] The initialization voltage VAINT can be stored in the display device 10 based on the position data of the mother panel 1, thus compensating for the mother brightness uniformity based on the position data of the mother panel 1. For example, the reference initialization voltage of the display device 10 generated based on the edge region SA and the reference initialization voltage of the display device 10 generated based on the center region CA can be stored differently. Accordingly, the mother brightness uniformity based on the position data of the mother panel 1 can be compensated. Compensating for the mother brightness uniformity based on the position data of the mother panel 1 can relatively improve the brightness reliability of the display device 10. In addition, the spot visibility of the display device 10 can be relatively reduced.

[0082] Figure 4 The illustration includes Figure 1 A diagram showing an example of a display panel 100 in a display device 10. Figure 5 The illustration includes Figure 4 The diagram of pixel columns PX-C[K-1] and PX-C[K] in the Nth display area AA[n] of the display panel 100. Figure 6 The illustration includes Figure 1 A diagram showing an example of a display panel 100 in a display device 10. Figure 7 This is a diagram illustrating an example of the initialization voltages VAINTA, VAINTB, and VAINTC applied to the display panel 100. Figure 8 The diagram is used to generate Figure 7 The table contains the initial offset voltages VOFFSET for the initial voltages VAINTA, VAINTB, and VAINTC.

[0083] refer to Figures 1 to 8 The display panel 100 may include first to Nth display areas AA[1], AA[2], AA[3] to AA[n]. The display panel 100 may include first to Kth pixel columns. The Nth display area AA[n] may include multiple pixel columns. For example, the Nth display area AA[n] may include the (K-1)th pixel column PX-C[K-1] and the Kth pixel column PX-C[K]. However, this disclosure is not limited to the above-described number of pixel columns included in the display areas of the display panel 100.

[0084] The (K-1)th pixel column PX-C[K-1] can include multiple pixels PX. The (K-1)th pixel column PX-C[K-1] can be connected to the (K-1)th data line DL[K-1]. The (K-1)th pixel column PX-C[K-1] can be connected to the (K-1)th initialization voltage line VAIL[K-1]. The initialization voltage VAINT can be applied to the (K-1)th initialization voltage line VAIL[K-1]. The (K)th pixel column PX-C[K] can include multiple pixels PX. The (K)th pixel column PX-C[K] can be connected to the (K)th data line DL[K]. The (K)th pixel column PX-C[K] can be connected to the (K)th initialization voltage line VAIL[K]. The initialization voltage VAINT can be applied to the (K)th initialization voltage line VAIL[K]. The (K-1)th initialization voltage line VAIL[K-1] and the (K)th initialization voltage line VAIL[K] can extend in the second direction D2.

[0085] Due to process characteristics, the brightness characteristics of each of the first to Nth display areas AA[1], AA[2], AA[3], ..., AA[n] may be different. For example, when a reference data voltage is applied to the first to Nth display areas AA[1], AA[2], AA[3], ..., AA[n], each of the first to Nth display areas AA[1], AA[2], AA[3], ..., AA[n] may emit light with different brightness according to process characteristics. The different brightness characteristics may degrade the black characteristics of the display panel 100.

[0086] For example, the brightness of the display panel 100 can be determined using external devices (e.g., sensors and cameras). Brightness characteristics can be determined based on measured brightness. For example, the area with the highest brightness characteristics can be a reference display area RAA. For example, the area with the highest brightness characteristics can be the area that emits light at a target brightness when a reference data voltage is applied. According to some embodiments, for example, the area with the highest brightness characteristics can be the area that emits light at a brightness substantially the same as the target brightness when a reference data voltage is applied. The initialization voltage VAINT applied to the reference display area RAA can be referred to as the reference area initialization voltage.

[0087] The brightness uniformity DUF can be determined based on the initialization voltage VAINT and the reference data voltage. The brightness uniformity DUF can be the ratio between the brightness when the reference data voltage is applied to the reference display area RAA and the brightness when the reference data voltage is applied to the target display area TAA. The target display area TAA can be any of the display areas AA[1], AA[2], AA[3], ..., AA[n] from the first to the Nth display areas AA[1], AA[2], AA[3], ..., AA[n], excluding the reference display area RAA.

[0088] The initialization voltage VAINT applied to the first to Nth display areas AA[1], AA[2], AA[3], ..., AA[n] can be changed. For example, the initialization voltage VAINT can be changed during the manufacturing process of the display device 10. The initialization voltage VAINT of the first to Nth display areas AA[1], AA[2], AA[3], ..., AA[n] can be changed, so that the brightness uniformity DUF of the target display area TAA can be changed.

[0089] The initialization voltage VAINT applied to the first display area AA[1] can be changed. The initialization voltage VAINT applied to the first display area AA[1] can be referred to as the first area initialization voltage. The first area initialization voltage corresponding to the minimum brightness uniformity MDU can be determined. The minimum brightness uniformity MDU can be the minimum brightness uniformity DUF between the brightness uniformity DUF of the first display area AA[1] corresponding to the changed first area initialization voltage and the brightness uniformity DUF of the reference display area RAA. The first area initialization voltage corresponding to the minimum brightness uniformity MDU can be the first initialization voltage VAINTA. When the display panel 100 is driven, the first initialization voltage VAINTA can be applied to the first display area AA[1].

[0090] The initialization voltage VAINT applied to the second display area AA[2] can be changed. The initialization voltage VAINT applied to the second display area AA[2] can be referred to as the second area initialization voltage. The second area initialization voltage corresponding to the minimum brightness uniformity MDU can be determined. The minimum brightness uniformity MDU can be the minimum brightness uniformity DUF between the brightness uniformity DUF of the second display area AA[2] corresponding to the changed second area initialization voltage and the brightness uniformity DUF of the reference display area RAA. The second area initialization voltage corresponding to the minimum brightness uniformity MDU can be the second initialization voltage VAINTB. The first initialization voltage VAINTA can be inconsistent with the second initialization voltage VAINTB. When the display panel 100 is driven, the second initialization voltage VAINTB can be applied to the second display area AA[2].

[0091] The initialization voltage VAINT applied to the third display area AA[3] can be changed. The initialization voltage VAINT applied to the third display area AA[3] can be referred to as the third area initialization voltage. The third area initialization voltage corresponding to the minimum brightness uniformity MDU can be determined. The minimum brightness uniformity MDU can be the minimum brightness uniformity DUF between the brightness uniformity DUF of the third display area AA[3] corresponding to the changed third area initialization voltage and the brightness uniformity DUF of the reference display area RAA. The third area initialization voltage corresponding to the minimum brightness uniformity MDU can be the first initialization voltage VAINTA. When the display panel 100 is driven, the first initialization voltage VAINTA can be applied to the third display area AA[3].

[0092] The initialization voltage VAINT applied to the Nth display area AA[n] can be changed. The initialization voltage VAINT applied to the Nth display area AA[n] can be referred to as the Nth area initialization voltage. The Nth area initialization voltage corresponding to the minimum brightness uniformity MDU can be determined. The minimum brightness uniformity MDU can be the minimum brightness uniformity DUF between the brightness uniformity DUF of the Nth display area AA[n] corresponding to the changed Nth area initialization voltage and the brightness uniformity DUF of the reference display area RAA. The Nth area initialization voltage corresponding to the minimum brightness uniformity MDU can be a third initialization voltage VAINTC. The third initialization voltage VAINTC can be inconsistent with the first initialization voltage VAINTA and the second initialization voltage VAINTB. When the display panel 100 is driven, the third initialization voltage VAINTC can be applied to the Nth display area AA[n].

[0093] According to some embodiments, the initialization voltage of the first region may be higher than the initialization voltage of the reference region. For example, the initialization voltage VAINT of the display region applied to the edge of the display panel 100 may be higher than the initialization voltage of the reference region.

[0094] According to some embodiments, the initialization voltage of the first to Nth display areas AA[1], AA[2], AA[3] to AA[n] can be generated based on the reference initialization voltage and the initialization offset voltage VOFFSET.

[0095] The initial offset voltage VOFFSET can be calculated based on the difference in luminance uniformity DUF between the reference display area RAA and the target display area TAA. For example, the initial offset voltage VOFFSET can be determined based on the difference in minimum luminance uniformity MDU between the reference display area RAA and the target display area TAA.

[0096] When the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a first brightness uniformity DU1, the first initialization offset voltage VOFF[1] and the reference initialization voltage can be regarded as the target area initialization voltage. For example, when the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a first brightness uniformity DU1, the target area initialization voltage can be the sum of the first initialization offset voltage VOFF[1] and the reference initialization voltage. For example, the first initialization offset voltage VOFF[1] can be about 0.025V.

[0097] When the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a second brightness uniformity DU2, the second initialization offset voltage VOFF[2] and the reference initialization voltage can be regarded as the target area initialization voltage. For example, when the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a second brightness uniformity DU2, the target area initialization voltage can be the sum of the second initialization offset voltage VOFF[2] and the reference initialization voltage. For example, the second initialization offset voltage VOFF[2] can be about 0.05V.

[0098] When the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a third brightness uniformity DU3, the third initialization offset voltage VOFF[3] and the reference initialization voltage can be regarded as the target area initialization voltage. For example, when the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a third brightness uniformity DU3, the target area initialization voltage can be the sum of the third initialization offset voltage VOFF[3] and the reference initialization voltage. For example, the third initialization offset voltage VOFF[3] can be about 0.075V.

[0099] When the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a fourth brightness uniformity DU4, the fourth initialization offset voltage VOFF[4] and the reference initialization voltage can be regarded as the target area initialization voltage. For example, when the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a fourth brightness uniformity DU4, the target area initialization voltage can be the sum of the fourth initialization offset voltage VOFF[4] and the reference initialization voltage. For example, the fourth initialization offset voltage VOFF[4] can be about 0.1V.

[0100] When the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a fifth brightness uniformity DU5, the fifth initialization offset voltage VOFF[5] and the reference initialization voltage can be regarded as the target area initialization voltage. For example, when the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a fifth brightness uniformity DU5, the target area initialization voltage can be the sum of the fifth initialization offset voltage VOFF[5] and the reference initialization voltage. For example, the fifth initialization offset voltage VOFF[5] can be about 0.125V.

[0101] When the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a sixth brightness uniformity DU6, the sixth initialization offset voltage VOFF[6] and the reference initialization voltage can be regarded as the target area initialization voltage. For example, when the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a sixth brightness uniformity DU6, the target area initialization voltage can be the sum of the sixth initialization offset voltage VOFF[6] and the reference initialization voltage. For example, the sixth initialization offset voltage VOFF[6] can be about 0.15V.

[0102] When the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a seventh brightness uniformity DU7, the seventh initialization offset voltage VOFF[7] and the reference initialization voltage can be regarded as the target area initialization voltage. For example, when the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has a seventh brightness uniformity DU7, the target area initialization voltage can be the sum of the seventh initialization offset voltage VOFF[7] and the reference initialization voltage. For example, the seventh initialization offset voltage VOFF[7] can be about 0.175V.

[0103] When the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has an eighth brightness uniformity DU8, the eighth initialization offset voltage VOFF[8] and the reference initialization voltage can be regarded as the target area initialization voltage. For example, when the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA has an eighth brightness uniformity DU8, the target area initialization voltage can be the sum of the eighth initialization offset voltage VOFF[8] and the reference initialization voltage. For example, the eighth initialization offset voltage VOFF[8] can be about 0.2V. However, this disclosure is not limited to the above values ​​of the first to eighth initialization offset voltages VOFF[1], VOFF[2], VOFF[3], VOFF[4], VOFF[5], VOFF[6], VOFF[7] and VOFF[8]. Furthermore, this disclosure is not limited to the above number of initialization offset voltages VOFFSET.

[0104] According to some embodiments, a maximum initialization offset voltage VOFFSET can be set. The maximum initialization offset voltage can be set considering the black data voltage. The black data voltage can be the data voltage VDATA that enables the display panel 100 to display black. The maximum offset voltage can be set so that the display panel 100 can stably display black based on the black data voltage.

[0105] According to some embodiments, the initialization voltage VAINT may include a first column initialization voltage and a second column initialization voltage. The first column initialization voltage may be applied to a first pixel column. The second column initialization voltage may be applied to a second pixel column. The first column initialization voltage may be different from the second column initialization voltage. According to some embodiments, the first column initialization voltage may be higher than the second column initialization voltage.

[0106] According to some embodiments, the first column initialization voltage can be generated based on a reference initialization voltage and an initialization offset voltage VOFFSET. The initialization offset voltage VOFFSET can be calculated based on the difference in luminance uniformity DUF between at least one pixel PX included in the first pixel column and at least one pixel PX included in the second pixel column. The difference in luminance uniformity DUF can be determined by changing the first column initialization voltage. The initialization offset voltage VOFFSET can be calculated based on the changed first column initialization voltage corresponding to the minimum luminance uniformity MDU where the difference in luminance uniformity DUF is the smallest. Luminance uniformity can be the ratio between the luminance when a reference data voltage is applied to at least one pixel included in the second pixel column and the luminance when a reference data voltage is applied to at least one pixel included in the first pixel column.

[0107] According to some embodiments, different initialization voltages VAINT can be applied to each of the first to Nth display areas AA[1], AA[2], AA[3] to AA[n]. The initialization voltages for the first to Nth areas can be voltages that take into account brightness characteristics. Accordingly, the black characteristics of the display panel 100 can be relatively improved.

[0108] Furthermore, according to some embodiments, the target area initialization voltage can be the sum of a reference initialization voltage and an initialization offset voltage VOFFSET. Accordingly, the first electrode (e.g., anode) of the light-emitting element EE can be initialized to a voltage higher than the reference initialization voltage. This relatively rapid initialization allows for a relatively quick initialization of the first electrode (e.g., anode) of the light-emitting element EE, thereby relatively reducing the visibility of speckles on the display panel 100. Consequently, the black characteristics of the display panel 100 can be relatively improved. Furthermore, the display quality of the display panel 100 can be relatively improved.

[0109] Figure 9 It is a diagram. Figure 1 A flowchart illustrating the method for setting the initialization voltage VAINT of the display device 10. Although... Figure 9 The illustrations depict various operations in the setup method, but the embodiments of this disclosure are not limited thereto. Furthermore, according to some embodiments, unless otherwise stated or implied, the setup method may include additional or fewer operations, or the order of operations may be varied, without departing from the spirit and scope of the embodiments of this disclosure.

[0110] refer to Figures 1 to 9The method for setting the initialization voltage VAINT of the display device 10 may include determining a reference display area RAA by applying a reference data voltage and a reference initialization voltage (step S110), determining the brightness uniformity between the reference display area RAA and the target display area TAA by changing the initialization voltage VAINT (step S120), determining the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA (step S130), determining the initialization offset voltage VOFFSET corresponding to the minimum brightness uniformity MDU (step S140), and setting the initialization voltage VAINT applied to each of the display areas based on the initialization offset voltage VOFFSET (step S150). The method for setting the initialization voltage VAINT of the display device 10 can be performed during the manufacturing process. For example, during the manufacturing process of the display device 10, a first device (e.g., a camera and a sensor, etc.) may perform the following method: determining a reference display area RAA by applying a reference data voltage and a reference initialization voltage (step S110), determining the brightness uniformity between the reference display area RAA and the target display area TAA by changing the initialization voltage VAINT (step S120), and determining the minimum brightness uniformity MDU between the reference display area RAA and the target display area TAA (step S130). A second device (e.g., a sensor and a camera, etc.) may perform the following method: determining an initialization offset voltage VOFFSET corresponding to the minimum brightness uniformity MDU (step S140), and setting the initialization voltage VAINT applied to each of the display areas based on the initialization offset voltage VOFFSET (step S150). For example, the second device may be a multiple programming execution device. According to some embodiments, the first device and the second device may be an integrated device.

[0111] According to some embodiments, different initialization voltages VAINT can be applied to each of the first to Nth display areas AA[1], AA[2], AA[3] to AA[n]. The initialization voltages for the first to Nth areas can be voltages that take into account brightness characteristics. Accordingly, the black characteristics of the display panel 100 can be relatively improved.

[0112] Furthermore, according to some embodiments, the target area initialization voltage can be the sum of a reference initialization voltage and an initialization offset voltage VOFFSET. Accordingly, the first electrode (e.g., anode) of the light-emitting element EE can be initialized to a voltage higher than the reference initialization voltage. This faster initialization allows for a relative reduction in the visibility of spots on the display panel 100. Consequently, the black characteristics of the display panel 100 can be relatively improved. Furthermore, the display quality of the display panel 100 can be relatively improved.

[0113] Figure 10 The illustration includes Figure 1 A circuit diagram of an example pixel PX in the display device 10. Although Figure 10 The illustrations depict various components in a pixel PX according to some embodiments, but the embodiments of this disclosure are not limited thereto, and according to various embodiments, a pixel may include additional or fewer components without departing from the spirit and scope of the embodiments of this disclosure.

[0114] refer to Figure 1 and Figure 10 The pixel circuit PXB may include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and a storage capacitor CST.

[0115] The first transistor T1 may include a control electrode connected to a first node N1B, a first electrode connected to a second node N2B, and a second electrode connected to a third node N3B. The first transistor T1 can generate a drive current based on the voltage at the first node N1B. For example, the first transistor T1 may be referred to as a drive transistor.

[0116] The second transistor T2 may include a control electrode for receiving a write gate signal GW, a first electrode for receiving a data voltage VDATA, and a second electrode connected to the second node N2B. The second transistor T2 may apply the data voltage VDATA to the second node N2B in response to the write gate signal GW. For example, the second transistor T2 may be referred to as a write transistor.

[0117] The third transistor T3 may include a control electrode that receives the compensation gate signal GC, a first electrode connected to the third node N3B, and a second electrode connected to the first node N1B. The third transistor T3 may connect the first node N1B and the third node N3B in response to the compensation gate signal GC. For example, the third transistor T3 may connect the first transistor T1 diode in response to the compensation gate signal GC. For example, the third transistor T3 may be referred to as a compensation transistor.

[0118] The fourth transistor T4 may include a control electrode that receives an initialization gate signal GI, a first electrode that receives a data initialization voltage VINT, and a second electrode connected to the first node N1B. The fourth transistor T4 may apply the data initialization voltage VINT to the first node N1B in response to the initialization gate signal GI. For example, the fourth transistor T4 may be referred to as an initialization transistor.

[0119] The fifth transistor T5 may include a control electrode for receiving the transmit signal EM, a first electrode for receiving the high power voltage ELVDD, and a second electrode connected to the second node N2B. The fifth transistor T5 may apply the high power voltage ELVDD to the second node N2B in response to the transmit signal EM. For example, the fifth transistor T5 may be referred to as the first emitter transistor.

[0120] The sixth transistor T6 may include a control electrode for receiving the transmit signal EM, a first electrode connected to the third node N3B, and a second electrode connected to the fourth node N4B. The sixth transistor T6 can connect the third node N3B and the fourth node N4B in response to the transmit signal EM. For example, the sixth transistor T6 may be referred to as the second emitter transistor.

[0121] The seventh transistor T7 may include a control electrode that receives the write gate signal GW, a first electrode that receives the initialization voltage VAINT, and a second electrode connected to the fourth node N4B. The seventh transistor T7 may apply the initialization voltage VAINT to the fourth node N4B in response to the write gate signal GW. For example, the seventh transistor T7 may be referred to as a light-emitting element initialization transistor.

[0122] Figure 11 This is a block diagram illustrating an electronic device 1000 according to some embodiments of the present disclosure. Figure 12 It is a diagram. Figure 11 The diagram shows an example of an electronic device implemented as a smartphone.

[0123] refer to Figure 1 and Figure 11The electronic device 1000 may include a processor 1010, a memory device 1020, a storage device 1030, an input / output (I / O) device 1040, a power supply 1050, and a display device 1060. Here, the display device 1060 may be... Figure 1 The display device 10. Furthermore, the electronic device 1000 may further include multiple ports for communicating with video cards, sound cards, memory cards, universal serial bus (USB) devices, other electronic devices, etc.

[0124] According to some embodiments, such as Figure 12 As illustrated in the diagram, electronic device 1000 can be implemented as a smartphone. However, electronic device 1000 is not limited to this. For example, electronic device 1000 can be implemented as a cellular phone, video phone, smart tablet, smartwatch, tablet PC, car navigation system, computer monitor, laptop computer, and head-mounted display (HMD) device, etc.

[0125] Processor 1010 can perform various computing functions or tasks. Processor 1010 can be a microprocessor, central processing unit (CPU), application processor (AP), etc. Processor 1010 can be coupled to other components via address bus, control bus, data bus, etc. In addition, processor 1010 can be coupled to an expansion bus such as the peripheral component interconnect (PCI) bus.

[0126] Processor 1010 can output input image data IMG, application enable signal, and input control signal CONT to Figure 1 The drive controller 200.

[0127] The memory device 1020 can store data for the operation of the electronic device 1000. For example, the memory device 1020 may include at least one non-volatile memory device such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase-change random access memory (PRAM) device, a resistive random access memory (RRAM) device, a nano-floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, and a ferroelectric random access memory (FRAM) device, and / or at least one volatile memory device such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, and a mobile DRAM device.

[0128] Storage device 1030 may include solid-state drive (SSD) devices, hard disk drive (HDD) devices, and CD-ROM devices, etc. I / O device 1040 may include input devices such as a keyboard, keypad, mouse, touchpad, and touchscreen, and output devices such as a printer and speakers. In some embodiments, display device 1060 may be included in I / O device 1040. Power supply 1050 provides power for the operation of electronic device 1000. Display device 1060 may be coupled to other components via a bus or other communication link.

[0129] refer to Figure 12 The illustration shows an electronic device implemented as a smartphone, but the disclosure is not limited thereto. The electronic device can be a television set, monitor, laptop computer, or tablet computer. Furthermore, the electronic device can be a car.

[0130] The display device according to the embodiments can be applied to display devices included in computers (e.g., laptops and tablets), mobile phones, smartphones, PMPs, PDAs, or MP3 players.

[0131] The foregoing is illustrative of this disclosure and should not be construed as limiting it. Although some embodiments of this disclosure have been described, those skilled in the art will readily understand that many modifications can be made to the embodiments without substantially departing from the novel teachings and features of the embodiments according to this disclosure. Accordingly, all such modifications are intended to be included within the scope of this disclosure as defined in the claims and their equivalents. In the claims, the apparatus plus function phrase is intended to cover the structures described herein that perform the recited functions, and not only structural equivalents but also equivalent structures. Therefore, it will be understood that the foregoing is illustrative of this disclosure and should not be construed as limiting it to the specific embodiments disclosed, and modifications to the disclosed embodiments and other embodiments are intended to be included within the scope of the claims and their equivalents. This disclosure is defined by the claims (including their equivalents).

Claims

1. A display apparatus comprising: a display panel comprising a plurality of pixels; a data driver configured to apply a data voltage to the display panel; a gate driver configured to output a gate signal to the pixels; and a voltage generator configured to apply a low power voltage and an initialization voltage to the display panel, wherein the display panel comprises a first display area and a reference display area, wherein at least one of the pixels comprises: a driving transistor configured to generate a driving current based on the data voltage; a light emitting element comprising a first electrode configured to receive the driving current and a second electrode configured to receive the low power voltage; and an initialization transistor configured to apply the initialization voltage to the first electrode of the light emitting element, wherein the initialization voltage comprises a first area initialization voltage and a reference area initialization voltage, and wherein the first area initialization voltage applied to the first display area is not consistent with the reference area initialization voltage applied to the reference display area. the first area initialization voltage is generated based on a reference initialization voltage and an initialization offset voltage, and 2. The display device according to claim 1, wherein wherein the initialization offset voltage is calculated based on a difference in luminance uniformity between the reference display area and the first display area. the difference in luminance uniformity is determined by changing the first area initialization voltage, and 3. The display device of claim 2, wherein, wherein the initialization offset voltage is calculated based on a changed first area initialization voltage corresponding to a minimum luminance uniformity in which the difference in luminance uniformity is minimum. the luminance uniformity is a ratio between a luminance when a reference data voltage is applied to the reference display area and a luminance when the reference data voltage is applied to the first display area.

4. The display device according to claim 2, wherein based on applying the reference data voltage to the reference display area, the reference display area is configured to emit a target luminance.

5. The display device of claim 4, wherein, the display panel is generated based on a mother panel, and 6. The display device according to claim 2, wherein wherein the reference initialization voltage is generated based on position data of the display panel in the mother panel. the mother panel comprises a first mother area and a second mother area, and 7. The display device of claim 6, wherein, wherein a reference initialization voltage of a display panel generated from the first mother area is higher than a reference initialization voltage of a display panel generated from the second mother area. the mother panel comprises a center area and an edge area, and 8. The display device of claim 7, wherein, wherein the first mother area is the edge area and the second mother area is the center area. the display panel further comprises a second display area, 9. The display device according to claim 1, wherein wherein the initialization voltage further comprises a second area initialization voltage, and wherein the second area initialization voltage applied to the second display area is not consistent with the first area initialization voltage and the reference area initialization voltage. the first area initialization voltage is higher than the reference area initialization voltage.

10. The display device according to any one of claims 1 to 9, wherein, 11.The display apparatus of claim 1, further comprising: an emission driver configured to output an emission signal to the at least one pixel, wherein the at least one of the pixels comprises: ​ a first transistor including a control electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node; a second transistor configured to apply the data voltage to the second node in response to a write gate signal; a third transistor configured to connect the first node and the third node in response to a compensation gate signal; a fourth transistor configured to apply a data initialization voltage to the first node in response to an initialization gate signal; a fifth transistor configured to apply a high power voltage to the second node in response to the emission signal; a sixth transistor configured to connect the third node and a fourth node in response to the emission signal; and a seventh transistor configured to apply the initialization voltage to the fourth node in response to the write gate signal, wherein the first transistor is the drive transistor and the seventh transistor is the initialization transistor, and wherein the first electrode of the light emitting element is connected to the fourth node.

12. A display device comprising: a display panel including a plurality of pixels; a data driver configured to apply a data voltage to the display panel; a gate driver configured to output a gate signal to the pixels; and a voltage generator configured to apply a low power voltage and an initialization voltage to the display panel, wherein the display panel includes a first pixel column and a second pixel column, wherein at least one of the pixels includes: a drive transistor configured to generate a drive current based on the data voltage; a light emitting element including a first electrode configured to receive the drive current and a second electrode configured to receive the low power voltage; and an initialization transistor configured to apply the initialization voltage to the first electrode of the light emitting element, wherein the initialization voltage includes a first column initialization voltage and a second column initialization voltage, and wherein the first column initialization voltage applied to the first pixel column is different from the second column initialization voltage applied to the second pixel column. the first column initialization voltage is generated based on a reference initialization voltage and an initialization offset voltage, and 13. The display device of claim 12, wherein, wherein the initialization offset voltage is calculated based on a difference in luminance uniformity between at least one pixel included in the first pixel column and at least one pixel included in the second pixel column. the difference in luminance uniformity is determined by changing the first column initialization voltage, and 14. The display device of claim 13, wherein, wherein the initialization offset voltage is calculated based on a changed first column initialization voltage corresponding to a minimum luminance uniformity in which the difference in luminance uniformity is minimum. the luminance uniformity is a ratio between a luminance when a reference data voltage is applied to the at least one pixel included in the second pixel column and a luminance when the reference data voltage is applied to the at least one pixel included in the first pixel column.

15. The display device of claim 13, wherein, the display panel is generated based on a mother panel, and 16. The display device of claim 13, wherein, wherein the reference initialization voltage is generated based on position data of the display panel in the mother panel. ​ 17. The display device of claim 16, wherein, The mother panel includes a first mother area and a second mother area, and wherein a reference initialization voltage of a display panel generated from the first mother area is higher than a reference initialization voltage of a display panel generated from the second mother area.

18. A display device according to any one of claims 12 to 17, wherein, The first column initialization voltage is higher than the second column initialization voltage. 19.An electronic device comprising: a display panel including a plurality of pixels; a display panel driver configured to drive the display panel based on input image data and input control signals; a processor configured to output the input image data and the input control signals; and a power manager configured to output a driving voltage to the display panel, wherein the driving voltage includes an initialization voltage and a low power voltage, wherein the display panel includes a first display area and a reference display area, wherein at least one of the pixels includes: a driving transistor configured to generate a driving current based on a data voltage; a light emitting element including a first electrode configured to receive the driving current and a second electrode configured to receive the low power voltage; and an initialization transistor configured to apply the initialization voltage to the first electrode of the light emitting element, wherein the initialization voltage includes a first area initialization voltage and a reference area initialization voltage, and wherein the first area initialization voltage applied to the first display area is not consistent with the reference area initialization voltage applied to the reference display area. The first area initialization voltage is generated based on a reference initialization voltage and an initialization offset voltage, and 20.The electronic device of claim 19, wherein, wherein the initialization offset voltage is calculated based on a difference in luminance uniformity between the reference display area and the first display area. ​

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