Electronic device

Abstract

There is provided an electronic device including: a display layer including emission areas and a non-emission area, each of the emission areas including a light emitting element, the non-emission area being adjacent to the emission areas; an encapsulation layer on the display layer, the encapsulation layer defining a concave pattern or a convex pattern overlapping a corresponding emission region among the emission regions and having a width of about 40 [mu] m to about 60 [mu] m in a direction along the display layer, and having a first refractive index; and an optical layer on the encapsulation layer and having a second refractive index different from the first refractive index.

Description

[0001] This application claims priority to and all benefits derived therefrom of Korean Patent Application No. 10-2024-0121619, filed on September 6, 2024, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] The embodiments of this disclosure described herein relate to an electronic device. More specifically, embodiments of this disclosure relate to an electronic device having improved light extraction efficiency. Background Technology

[0003] Multimedia electronic devices such as televisions, mobile phones, tablet computers, computers, car navigation systems, and game consoles include display panels for displaying images. The display panel includes light-emitting elements and circuitry for driving these elements. Based on the voltage applied from the circuitry, the light-emitting elements in the display panel emit light and generate an image. Research is underway on optical layers comprising multiple layers with different refractive indices to improve the optical reliability of the display panel. Summary of the Invention

[0004] Embodiments of this disclosure provide an electronic device for improving light extraction efficiency and preventing the mixing of colored light supplied to the outside to enhance display quality.

[0005] According to an embodiment, the electronic device includes: a display layer comprising emitting and non-emitting regions, wherein a light-emitting element is disposed in each of the emitting regions, and the non-emitting regions are adjacent to the emitting regions; an encapsulation layer disposed on the display layer and comprising a concave or convex pattern superimposed on a corresponding emitting region among the emitting regions; and an optical layer disposed on the encapsulation layer. The first refractive index of the encapsulation layer and the second refractive index of the optical layer are different from each other, and the concave or convex pattern has a width of approximately 40 micrometers in one direction along the display layer. m) to 60 The width of m.

[0006] According to an embodiment, the electronic device includes: a display layer including an emitting region and a non-emitting region, wherein a light-emitting element is disposed in each of the emitting regions, and the non-emitting regions are adjacent to the emitting regions; an encapsulation layer disposed on the display layer and including a recessed pattern that is superimposed on the corresponding emitting regions in the emitting regions and recessed toward the light-emitting element; and an optical layer disposed on the encapsulation layer and having a refractive index greater than that of the encapsulation layer. Attached Figure Description

[0007] The above and other objects and features of this disclosure will become apparent from the detailed description of embodiments thereof with reference to the accompanying drawings.

[0008] Figure 1This is a perspective view of an electronic device according to an embodiment of the present disclosure.

[0009] Figure 2 According to embodiments of this disclosure Figure 1 An exploded perspective view of the electronic device shown.

[0010] Figure 3 According to embodiments of this disclosure Figure 2 The diagram shows a cross-sectional view of the display module.

[0011] Figure 4 This is an enlarged cross-sectional view of a display module according to an embodiment of the present disclosure.

[0012] Figure 5 This is an enlarged plan view of a portion of a display module according to an embodiment of the present disclosure.

[0013] Figure 6A The display module according to the embodiments of this disclosure and Figure 5 The sectional view corresponding to line I-I' shown.

[0014] Figure 6B yes Figure 6A An enlarged view of region AA' shown in the image.

[0015] Figure 7A The display module according to the embodiments of this disclosure and Figure 5 The sectional view corresponding to line I-I' shown.

[0016] Figure 7B yes Figure 7A An enlarged view of region BB' shown in the image.

[0017] Figure 8 The display module according to the embodiments of this disclosure and Figure 5 The sectional view corresponding to line I-I' shown.

[0018] Figure 9 The display module according to the embodiments of this disclosure and Figure 5 The sectional view corresponding to line I-I' shown.

[0019] Figure 10 This is a block diagram illustrating an electronic device according to an embodiment of the present disclosure.

[0020] Figure 11 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure. Detailed Implementation

[0021] Various changes can be made to this disclosure, and various embodiments of this disclosure can be implemented. Therefore, embodiments are shown in the accompanying drawings and are described herein as examples. However, it should be understood that this disclosure is not to be construed as limited thereto and covers all modifications, equivalents, and substitutions falling within the spirit and scope of this disclosure.

[0022] In this specification, when a component (or region, layer, portion, etc.) is referred to as being associated with another element, such as "on" another component, "connected to" or "bonded to" another component, it means that the component may be directly on, directly connected to or directly bonded to the other component, or that a third component may exist between the component and the other component. Conversely, when a component (or region, layer, portion, etc.) is referred to as being associated with another element, such as "directly on" another component, "directly connected to" or "directly bonded to" another component, it means that no other component or third component exists between the component and the other component.

[0023] The same reference numerals denote the same components. Furthermore, in the drawings, the thickness, scale, and dimensions of components are exaggerated for effective description. Within the published drawings and text, reference numerals indicating elements in the singular form may also be used to refer to multiple elements.

[0024] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, “a,” “an,” “the,” and “at least one” do not indicate a limitation of quantity and are intended to include both singular and plural forms. Thus, the element referred to as “the” in the claims refers to one element and multiple elements. For example, unless the context clearly indicates otherwise, “(a) element” has the same meaning as “at least one element.” “At least one” will not be construed as limiting “a” or “an.” “Or” means “and / or.” As used herein, the term “and / or” includes all of one or more combinations defined by the relevant components.

[0025] Terms such as "first," "second," etc., may be used to describe various components, but components should not be limited by the terms. Terms may be used only to distinguish one component from others. For example, without departing from the scope of this disclosure, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component. Unless otherwise stated, singular terms may include plural forms.

[0026] Furthermore, terms such as "below," "under," "above," and "over (covering)" are used to describe the relationships between the components shown in the accompanying drawings. These terms are relative concepts and are described based on the directions shown in the drawings.

[0027] As used herein, “about” or “approximately” includes the stated value and means within an acceptable deviation of the specific value as determined by a person of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., limitations of the measurement system). For example, “about” may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0028] Unless otherwise defined, all terms used herein (including technical or scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Such terms (as defined in a common dictionary) shall be interpreted as having the same meaning as in the context of the relevant technical field and shall not be interpreted as having an idealized or overly formal meaning unless clearly defined in this application as having such a meaning.

[0029] It should be understood that when terms such as “comprising,” “including,” and “having” are used herein, it indicates the presence of the stated features, quantities, steps, operations, components, parts, or combinations thereof, but does not preclude the presence or addition of one or more other features, quantities, steps, operations, components, parts, or combinations thereof.

[0030] In the following description, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0031] Figure 1 This is a perspective view of an electronic device DD according to an embodiment of the present disclosure. Figure 2 According to embodiments of this disclosure Figure 1 An exploded perspective view of the electronic device DD shown.

[0032] Reference Figure 1 In this specification, a mobile phone terminal is shown as an example of an electronic device DD. The electronic device DD according to this disclosure can be applied to small and medium-sized electronic devices (such as tablet computers, car navigation devices, game consoles, smartwatches, etc.) as well as large electronic devices (such as televisions, monitors, etc.).

[0033] When viewed from above the plane (in a plan view), the electronic device DD may have a rectangular shape having a long side extending in a first direction DR1 and a short side extending in a second direction DR2 intersecting the first direction DR1. However, it is not limited to this; when viewed from above the plane, the electronic device DD may have various planar shapes such as a circular shape, a polygonal shape other than a rectangular shape, etc.

[0034] In the following text, the direction substantially perpendicular to the plane defined by the first direction DR1 and the second direction DR2 is defined as the third direction DR3. The expression "when viewed from above the plane" as used herein may mean viewing along the third direction DR3. The thickness of the electronic device DD and its various components or layers may be defined along the third direction DR3 (i.e., the thickness direction).

[0035] Electronic devices DD can be rigid or flexible. The term "flexible" as used herein can refer to the property of bending and can include all structures, from those capable of being fully folded to those capable of bending to the level of a few nanometers. For example, flexible electronic devices DD can include bent, rollable, or foldable electronic devices.

[0036] The electronic device DD can display an image IM via a display surface DD-IS. An icon image is shown as an example of an image IM. The display surface DD-IS can be parallel to the plane defined by a first direction DR1 and a second direction DR2.

[0037] The display surface DD-IS may include a display area DD-DA, which is a planar area in which an image IM is displayed, and a non-display area DD-NDA adjacent to the display area DD-DA. The non-display area DD-NDA may be a planar area in which the image IM is not displayed. However, it is not limited thereto; the non-display area DD-NDA may be adjacent to one side of the display area DD-DA or may be omitted.

[0038] Reference Figure 2 The electronic device DD may include a window WM, an upper adhesive layer OCA, a display module DM, a lower component CPL, and a housing component BC.

[0039] A window WM can be positioned on top of a display module DM and can transmit the image IM provided by the display module DM to the outside (e.g., the outside of an electronic device DD). The window WM can include a transmissive region TA and a non-transmissive region NTA. The transmissive region TA can be... Figure 1The display areas DD-DA shown are stacked and may have a shape corresponding to the display areas DD-DA (e.g., a planar shape). Although not shown, the window WM may include a base window layer and a functional layer disposed on the base window layer. The functional layer may include a protective layer, an anti-fingerprint layer, etc.

[0040] The substrate of the window WM can be formed of glass, sapphire, or plastic (or include glass, sapphire, or plastic). The substrate of the window WM can include an optically transparent insulating material. For example, the substrate of the window WM can include a glass substrate or a plastic film, or it can include a glass substrate and a plastic film bonded together by an adhesive.

[0041] Non-transmittent region NTA can be with Figure 1 The non-display area DD-NDA shown is overlaid and may have a shape corresponding to the non-display area DD-NDA. The non-transmissive area NTA may be a region with a lower transmittance than the transmissive area TA. The non-transmissive area NTA may be a portion of the base window layer of the window WM defined by a border pattern, and the region of the base window layer without a border pattern may be defined as the transmissive area TA. However, it is not limited to this and the non-transmissive area NTA may be omitted.

[0042] The display module (DM) can be positioned below the window (WM). The display module (DM) may include a display panel (DP) and an input sensor (ISU).

[0043] Display panel DP can be one of the following: liquid crystal display panel, electrophoretic display panel, microelectromechanical system (MEMS) display panel, electrowetting display panel, organic light-emitting display panel, inorganic light-emitting display panel, and quantum dot light-emitting display panel. However, display panel DP is not particularly limited to these. In the following, display panel DP will be described as an organic light-emitting display panel.

[0044] The input sensor ISU may include one of the following: a capacitive sensor, an optical sensor, an ultrasonic sensor, and an electromagnetic induction sensor. The input sensor ISU may be formed (or disposed) on the display panel DP by a continuous process, or it may be manufactured separately from the display panel DP and then attached to the upper side of the display panel DP by an adhesive layer, and is not limited to any one embodiment.

[0045] The display module DM may include a circuit board CB. The circuit board CB may include a driver chip DC and a flexible circuit board FPCB. Although Figure 2 An embodiment in which the driver chip DC is mounted on the display panel DP is shown, but this disclosure is not limited thereto. The driver chip DC can generate electrical signals (such as drive signals) for the operation of the display panel DP based on electrical signals (such as control signals transmitted from the flexible circuit board FPCB).

[0046] The display panel DP may include a curved portion BA and one or more non-curved portions, where the display panel DP is flexible at the curved portion BA. The plurality of non-curved portions, such as a first non-curved portion NBA1 and a second non-curved portion NBA2, are spaced apart from each other in a first direction DR1 and the curved portion BA is located between the first non-curved portion NBA1 and the second non-curved portion NBA2.

[0047] The bending portion BA can be defined as a portion of the display panel DP that is bendable relative to a virtual bending axis extending in the second direction DR2. The first non-bending portion NBA1 can be the area of ​​the display panel DP overlapping with the transmissive region TA, and the second non-bending portion NBA2 can be defined as the area of ​​the display panel DP where the flexible circuit board FPCB is connected to the display panel DP. When the bending portion BA bends relative to the bending axis, a portion of the flexible circuit board FPCB and the driver chip DC can be in a direction toward the rear surface of the display panel DP (e.g., in relation to...). Figure 2 The third part of the BA bends in the opposite direction to DR3 and can be positioned below the display panel DP. Although not shown, an additional component can be provided to compensate for the step formed between the circuit board CB and the rear surface of the display panel DP due to the bend BA.

[0048] According to an embodiment, the width of the first non-curved portion NBA1 in the second direction DR2 may be greater than the width of the curved portion BA and the second non-curved portion NBA2 in the second direction DR2. However, it is not limited to this; the width of the curved portion BA in the second direction DR2 may decrease in the direction from the first non-curved portion NBA1 to the second non-curved portion NBA2, and it is not limited to any one embodiment.

[0049] The flexible circuit board (FPCB) can be disposed at one end of the display panel (DP). The flexible circuit board (FPCB) can be disposed on the upper surface of the second non-bent portion NBA2, which is the surface furthest from the third direction DR3, or extend from the upper surface of the second non-bent portion NBA2, which is the surface furthest from the third direction DR3. A portion of the flexible circuit board (FPCB) can be disposed on the upper surface of the second non-bent portion NBA2, and another portion of the flexible circuit board (FPCB) extending from that portion can be bent and disposed on the lower surface of the second non-bent portion NBA2.

[0050] The flexible printed circuit board (FPCB) can be connected to the display panel (DP) at the second non-bent section NBA2. The FPCB can be electrically connected to the display panel (DP) as described in the reference. Figure 3 The circuit layer DP-CL is described.

[0051] Although not shown, the display module DM may also include an anti-reflective layer. The anti-reflective layer reduces the reflectivity of external light incident from outside the electronic device DD.

[0052] The upper adhesive layer OCA can be disposed between the window WM and the display module DM. The upper adhesive layer OCA can be disposed on or superimposed on the first non-bent portion NBA1. The upper adhesive layer OCA can have a rectangular shape, having a long side extending in the first direction DR1 and a short side extending in the second direction DR2. The window WM and the display module DM can be bonded to each other through the upper adhesive layer OCA.

[0053] The receiving member BC can be disposed below the display module DM. The receiving member BC can accommodate the display module DM, the upper adhesive layer OCA, and the lower member CPL, which will be described below, and can be combined with the window WM. The receiving member BC, together with the window WM, can provide, but is not limited to, the outer surface of the electronic device DD.

[0054] The lower component CPL can be disposed between the display module DM and the receiving component BC. The lower component CPL can be disposed below and superimposed on the first non-bent portion NBA1. The lower component CPL can have, for example, a rectangular shape having a long side extending in the first direction DR1 and a short side extending in the second direction DR2.

[0055] Figure 3 According to embodiments of this disclosure Figure 2 The image shows a cross-sectional view of the display module DM.

[0056] Reference Figure 3 The display module DM may include an input sensor ISU, a display panel DP, and a panel protective layer PPL. The display panel DP may include a substrate layer BL, a circuit layer DP-CL, a display layer DP-OLED, and an encapsulation layer TFL disposed on the substrate layer BL. The input sensor ISU may be disposed on the encapsulation layer TFL.

[0057] The display panel DP can include a display area DP-DA and a non-display area DP-NDA. The display area DP-DA of the display panel DP can correspond to... Figure 1 The display areas shown are DD-DA and / or Figure 2 The transmission area TA shown, and the non-display area DP-NDA can correspond to Figure 1 The non-display area DD-NDA and / or shown Figure 2 The non-transmissive region NTA is shown in the figure.

[0058] The substrate layer BL may include at least one plastic film. The substrate layer BL may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate as a flexible substrate. The glass substrate may include both a rigid glass substrate and a flexible ultrathin glass substrate.

[0059] The circuit layer DP-CL may include at least one intermediate insulating layer and circuit elements. The intermediate insulating layer may include at least one intermediate inorganic layer and at least one intermediate organic layer. The circuit elements may include signal lines and pixel driving circuitry.

[0060] The DP-OLED display layer may include multiple organic light-emitting diodes as light-emitting elements. The DP-OLED display layer may also include organic layers such as pixel-defining layers.

[0061] A TFL (Transparent Flask Layer) can seal the DP-OLED display layer. The TFL can be disposed on the DP-OLED display layer. The TFL can be stacked with the display area DP-DA and the non-display area DP-NDA. The TFL can be stacked with at least a portion of the non-display area DP-NDA. In another embodiment, the TFL may not be stacked with the non-display area DP-NDA. For example, the TFL may include a thin-film encapsulation layer. The thin-film encapsulation layer may include a stacked structure of inorganic layers, organic layers, and inorganic layers. The TFL can protect the DP-OLED display layer from foreign matter such as moisture, oxygen, and dust particles. However, it is not limited to this; in addition to the thin-film encapsulation layer, the TFL may also include an additional insulating layer.

[0062] In embodiments of this disclosure, an encapsulation substrate can be used instead of the encapsulation layer TFL. In this case, the encapsulation substrate can be opposite to the substrate layer BL, and the circuit layer DP-CL and the display layer DP-OLED can be disposed between the encapsulation substrate and the substrate layer BL.

[0063] The input sensor ISU can be directly mounted on the display panel DP. The expression "component A is directly mounted on component B" as used herein means that no separate layer is provided between component A and component B. In this embodiment, the input sensor ISU can be manufactured together with the display panel DP through a continuous process. However, the spirit and scope of this disclosure are not limited thereto, and the input sensor ISU can be a separate panel and can be bonded to the display panel DP via an adhesive layer. For example, the input sensor ISU can be omitted.

[0064] A panel protective layer (PPL) can be disposed beneath the display panel (DP). The PPL protects the bottom of the display panel (DP). The PPL can comprise a flexible plastic material; for example, it can comprise polyethylene terephthalate (PET).

[0065] Figure 4 This is an enlarged cross-sectional view of the display module DM according to an embodiment of the present disclosure. Figure 4 The structure can be set in the display area DP-DA of the display module DM.

[0066] For example, in Figure 4 The diagram shows a cross-section corresponding to a single emission region PXA and a non-emission region NPXA surrounding the emission region PXA. However, it is not limited to this and multiple emission regions PXA can be provided.

[0067] For example, in Figure 4 The image shows a light-emitting element (ED) and a single transistor TFT connected to the ED. However, essentially, the ED can be connected to multiple transistor TFTs and at least one capacitor. Furthermore, Figure 4 The transistor TFT is described as a silicon transistor. However, a transistor TFT can also be a metal-oxide transistor.

[0068] Reference Figure 4 The display module DM may include an input sensor ISU, a display panel DP, and a panel protective layer PPL. The display panel DP may include a substrate layer BL, a circuit layer DP-CL, a display layer DP-OLED, and an encapsulation layer TFL.

[0069] The substrate layer BL provides a substrate surface on which the circuit layer DP-CL is disposed. The substrate layer BL can be a rigid substrate or a flexible substrate that can be bent, folded, or rolled. The substrate layer BL can include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate as a flexible substrate. The glass substrate can include both rigid glass substrates and flexible ultrathin glass substrates.

[0070] The matrix layer BL can have a multilayer structure. For example, the matrix layer BL may include a first synthetic resin layer, an inorganic layer having a multilayer or single-layer structure, and a second synthetic resin layer disposed on the inorganic layer having a multilayer or single-layer structure. Each of the first and second synthetic resin layers may include a polyimide resin, but is not particularly limited thereto.

[0071] The circuit layer DP-CL can be disposed on the substrate layer BL. The circuit layer DP-CL may include an insulating layer, semiconductor patterns, conductive patterns, signal lines, and pixel driving circuitry. For example, the circuit layer DP-CL may include a buffer layer BFL, a first insulating layer 10, a second insulating layer 20, a third insulating layer 30, a fourth insulating layer 40, a fifth insulating layer 50, and a sixth insulating layer 60, a signal transmission area SCL representing a signal line (or signal transmission line), and multiple connecting electrodes CNE1 and CNE2.

[0072] A buffer layer BFL can be disposed on the substrate layer BL. The buffer layer BFL prevents metal atoms or impurities from diffusing from the substrate layer BL to the semiconductor pattern on the buffer layer BFL. A back metal layer (not shown) can be disposed between the substrate layer BL and the buffer layer BFL. The back metal layer can be disposed under the transistor TFT, which will be described below, and can block external light from reaching the transistor TFT.

[0073] Semiconductor patterns can be disposed on the buffer layer BFL. The semiconductor patterns can include silicon semiconductors. For example, the silicon semiconductor can include amorphous silicon or polycrystalline silicon. For example, the semiconductor patterns can include low-temperature polycrystalline silicon.

[0074] The semiconductor pattern may include a first region with high conductivity and a second region with low conductivity. The first region may be doped with either an N-type dopant or a P-type dopant. A P-type transistor may include a doped region doped with a P-type dopant, and an N-type transistor may include a doped region doped with an N-type dopant. The second region may be an undoped region, or it may be a region with a smaller doping density than the first region.

[0075] The first region can have a higher conductivity (e.g., electrical conductivity) than the second region and can be essentially used as an electrode or signal line. The second region can essentially correspond to the active region (or channel) of a transistor TFT. In other words, a portion of the semiconductor pattern can be the active region of a transistor TFT, another portion can be the source or drain of a transistor TFT, and yet another portion can be a connection electrode or a connection signal line.

[0076] A transistor TFT may include a source region (or source electrode) SE1, an active region (or channel) AC1, a drain region (or drain electrode) DE1, and a gate GT1. The source region SE1, active region AC1, and drain region DE1 of the transistor TFT may be formed by a semiconductor pattern as corresponding portions or regions of the transistor TFT. The source region SE1 and drain region DE1 may extend from the active region AC1 in opposite directions, such as along a planar direction (e.g., along any two opposite directions of a plane defined by a first direction DR1 and a second direction DR2). Figure 4 The image shows a portion of a signal transmission region SCL formed by a semiconductor pattern. Although not shown separately, when viewed from above the plane, the signal transmission region SCL appears to be connected to the drain DE1 of the transistor TFT. That is, the semiconductor pattern and the signal transmission region SCL can be on the same layer. Because they are on the same layer, components can be formed in the same process and / or comprise the same material as each other; components can be corresponding portions of the same material layer; components can be located on the same layer by forming an interface with the same lower or upper layer; components can be coplanar or disposed with the same thickness, etc., and are not limited thereto.

[0077] The first insulating layer 10 can be disposed on the buffer layer BFL. The first insulating layer 10 can cover the signal transmission region SCL disposed on the buffer layer BFL and the source SE1, active region AC1, and drain DE1 of the transistor TFT.

[0078] The first insulating layer 10 may include an inorganic layer and / or an organic layer and may have a single-layer or multi-layer structure. The inorganic layer may include at least one of alumina, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. In this embodiment, the first insulating layer 10 may be a single silicon oxide layer. Not only the first insulating layer 10, but also other insulating layers of the circuit layer DP-CL described below may be inorganic layers and / or organic layers, and may have a single-layer or multi-layer structure. The inorganic layer may include at least one of the materials described above, but is not limited thereto.

[0079] The gate GT1 of the transistor TFT can be disposed on the first insulating layer 10. The gate GT1 can be part of a metal pattern or a conductive material layer. The gate GT1 can be stacked with the active region AC1. In the method of providing the electronic device DD, the gate GT1 can be used as a mask in the process of doping the semiconductor pattern. The gate GT1 can include, but is not particularly limited to, titanium (Ti), silver (Ag), silver-containing alloys, molybdenum (Mo), molybdenum-containing alloys, aluminum (Al), aluminum-containing alloys, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), indium tin oxide (ITO), or indium zinc oxide (IZO).

[0080] The second insulating layer 20 can be disposed on the first insulating layer 10 and can cover the gate GT1. The third insulating layer 30 can be disposed on the second insulating layer 20.

[0081] The first connecting electrode CNE1 can be disposed on the third insulating layer 30. The first connecting electrode CNE1 can be connected to the signal transmission area SCL through a first contact hole CNT-1 that penetrates the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30. The fourth insulating layer 40 can be disposed on the third insulating layer 30 and can cover the first connecting electrode CNE1. The fourth insulating layer 40 can be an organic layer.

[0082] The fifth insulating layer 50 can be disposed on the fourth insulating layer 40. The second connecting electrode CNE2 can be disposed on the fifth insulating layer 50. The second connecting electrode CNE2 can be connected to the first connecting electrode CNE1 through the second contact hole CNT-2 penetrating the fourth insulating layer 40 and the fifth insulating layer 50. The fifth insulating layer 50 can be an organic layer.

[0083] A sixth insulating layer 60 may be disposed on the fifth insulating layer 50 and may cover the second connecting electrode CNE2. The sixth insulating layer 60 may be an organic layer. The stacked structure of the first insulating layer 10, second insulating layer 20, third insulating layer 30, fourth insulating layer 40, fifth insulating layer 50, and sixth insulating layer 60 is merely illustrative, and additional conductive layers and additional insulating layers may be provided in addition to the first insulating layer 10, second insulating layer 20, third insulating layer 30, fourth insulating layer 40, fifth insulating layer 50, and sixth insulating layer 60. One or more of the first insulating layer 10, second insulating layer 20, third insulating layer 30, fourth insulating layer 40, fifth insulating layer 50, and sixth insulating layer 60 may be referred to as "insulating layers".

[0084] The display layer DP-OLED can be disposed on the circuit layer DP-CL. The display layer DP-OLED may include light-emitting elements ED and pixel-defining layers PDL.

[0085] The light-emitting element (ED) can include organic light-emitting elements, inorganic light-emitting elements, organic-inorganic light-emitting elements, quantum dot light-emitting elements, micro-LED light-emitting elements, or nano-LED light-emitting elements. However, the embodiments are not limited to these, and the light-emitting element (ED) can include various embodiments, as long as it generates light or controls the amount of light according to an electrical signal.

[0086] The light-emitting element (ED) may include a first electrode (or anode) EL1, an emitting layer EML, and a second electrode (or cathode) EL2. The first electrode EL1 may be disposed on a sixth insulating layer 60. The first electrode EL1 may be a transmissive electrode, a semi-transmissive reflective electrode, or a reflective electrode. The first electrode EL1 may include a reflective layer formed of a metal or its compound or mixture, and a transparent or semi-transparent electrode layer formed on the reflective layer. The transparent or semi-transparent electrode layer may include indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), and zinc oxide (ZnO). x It can be at least one of indium oxide (In2O3) and aluminum-doped zinc oxide (AZO). For example, the first electrode EL1 may include a stacked structure of ITO / Ag / ITO.

[0087] A pixel defining layer (PDL) may be disposed on a sixth insulating layer 60. According to an embodiment, the pixel defining layer (PDL) may have light-absorbing properties. For example, the pixel defining layer (PDL) may be black in color. The pixel defining layer (PDL) may include a black colorant. The black colorant may include a black dye or a black pigment. The black colorant may include carbon black, a metal (such as chromium), or an oxide thereof. The pixel defining layer (PDL) may correspond to a light-blocking pattern having light-blocking properties.

[0088] The solid portion of the pixel-defining layer (PDL) can cover a portion of the first electrode EL1. For example, a pixel aperture (PDL-OP) exposing a portion of the first electrode EL1 can be defined within the solid (or material) portion of the pixel-defining layer (PDL). The pixel aperture (PDL-OP) of the pixel-defining layer (PDL) can define an emission region (PXA). That is, the planar dimensions of the emission region (PXA) can correspond to the planar dimensions of the pixel aperture (PDL-OP).

[0089] A hole control layer (not shown) may be further disposed between the first electrode EL1 and the emitter layer EML. The hole control layer may include a hole transport layer and / or a hole injection layer. An electron control layer may be further disposed between the emitter layer EML and the second electrode EL2. The electron control layer may include an electron transport layer and / or an electron injection layer.

[0090] The display layer of a DP-OLED may also include a capping layer. The capping layer (not shown) may be disposed on the light-emitting element (ED) and may cover the second electrode EL2 of the ED. The capping layer may include an organic material. The capping layer may be formed of a single layer or multiple layers. The capping layer can adequately protect the ED beneath it from external moisture penetration or contamination, thus providing an ED with improved lifespan.

[0091] A TFL (Transformer Layer Flask) can be disposed on the DP-OLED display layer. The TFL protects the DP-OLED display layer from foreign matter such as moisture, oxygen, and dust particles. The TFL may comprise a first inorganic layer IL1, an organic layer OL, and a second inorganic layer IL2, stacked sequentially on top of each other. However, the layers constituting the TFL are not limited to these.

[0092] The first inorganic layer IL1 and the second inorganic layer IL2, serving as the first and second inorganic encapsulation layers respectively, protect the DP-OLED display layer from moisture and oxygen. The organic layer OL, serving as the organic encapsulation layer, protects the DP-OLED display layer from foreign matter such as dust particles. The first inorganic layer IL1 and the second inorganic layer IL2 may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer OL may include, but is not limited to, an acrylic organic layer.

[0093] According to embodiments of this disclosure, the pattern PT can be defined within the encapsulation layer TFL. For example, the pattern PT can be a recessed pattern of the encapsulation layer TFL facing the light-emitting element ED. The upper surface of the organic layer OL can be recessed towards the light-emitting element ED to form the outline of the pattern PT, and the second inorganic layer IL2 can have an outline corresponding to the recessed outline of the organic layer OL. A detailed description of the pattern PT will be given below.

[0094] The optical layer OCL can be disposed on the display panel DP. The optical layer OCL can provide a flat top surface while conforming to the bottom layer shape of the encapsulation layer TFL pattern PT. The optical layer OCL can include organic materials.

[0095] The input sensor ISU can be mounted on the display panel DP. The input sensor ISU can extend along the flat upper surface of the optical layer OCL. The input sensor ISU can be referred to as a sensor layer, input sensing layer, or input sensing panel. The input sensor ISU may include a substrate insulating layer SIL1, a first conductive layer CL1, a sensing insulating layer SIL2, a second conductive layer CL2, and a cover layer SIL3.

[0096] The substrate insulating layer SIL1 can be directly disposed on the display panel DP. The substrate insulating layer SIL1 can be an inorganic material layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. Optionally, the substrate insulating layer SIL1 can be an organic material layer including epoxy resin, acrylic resin, or imide resin. The substrate insulating layer SIL1 can have a single-layer structure or a multilayer structure stacked on a third-direction DR3.

[0097] Each of the first conductive layer CL1 and the second conductive layer CL2 may have a single-layer structure or may have a multi-layer structure stacked on a third-direction DR3. Although not shown, when viewed from above the plane, each of the first conductive layer CL1 and the second conductive layer CL2 may include a sensing pattern and / or a bridge pattern with a grid structure. That is, solid portions may be spaced apart from each other to define gaps or openings therebetween, wherein the solid portions together with the openings provide a grid structure.

[0098] The conductive layer within the input sensor ISU, having a single-layer structure (e.g., a single layer), may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The transparent conductive layer may include a transparent conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium zinc tin oxide (IZTO). Furthermore, the transparent conductive layer may include conductive polymers (such as PEDOT), metal nanowires, or graphene.

[0099] The conductive layer with a multilayer structure within the input sensor ISU may include a metal layer. The metal layer may have a three-layer structure, such as titanium / aluminum / titanium. The conductive layer with a multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0100] A sensing insulating layer SIL2 may be disposed between a first conductive layer CL1 and a second conductive layer CL2. A cover layer SIL3 may be disposed on the sensing insulating layer SIL2 and may cover the second conductive layer CL2. The cover layer SIL3 may reduce or eliminate the possibility that the second conductive layer CL2 will be damaged in subsequent processes (such as during a method of providing an electronic device DD). In embodiments of this disclosure, the input sensor ISU may not include (e.g., may exclude or omit) the cover layer SIL3.

[0101] The sensing insulating layer SIL2 and the capping layer SIL3 may include inorganic films. The inorganic film may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0102] Optionally, the sensing insulating layer SIL2 and the capping layer SIL3 may comprise an organic film. For example, the organic film may comprise at least one of epoxy resins, urethane resins, cellulose resins, siloxane resins, polyimide resins, polyamide resins, and perylene resins.

[0103] The panel protective layer PPL can be disposed beneath the display panel DP. The panel protective layer PPL can be disposed on the lower surface of the substrate layer BL. The panel protective layer PPL can include a flexible plastic material. For example, the panel protective layer PPL can include polyethylene terephthalate (PET). The panel protective layer PPL protects the bottom of the display panel DP.

[0104] Figure 5 This is an enlarged plan view of a portion of a display module DM according to an embodiment of the present disclosure.

[0105] Reference Figure 5 The display module DM may include a plurality of pixels, each comprising a plurality of pixels PXr, PXg, and PXb. Pixels PXr, PXg, and PXb may include a first pixel PXr, a second pixel PXg, and a third pixel PXb.

[0106] Multiple emission areas can be set, such as arranged along the display area DP-DA. As planar areas of each emission area, the first emission area (or red emitting area) PXA-R can be defined in the first pixel PXr, the second emission area (or green emitting area) PXA-G can be defined in the second pixel PXg, and the third emission area (or blue emitting area) PXA-B can be defined in the third pixel PXb. Figure 5The circular planar shapes shown can correspond to the planar shapes of the first emission region PXA-R, the second emission region PXA-G, and the third emission region PXA-B, respectively. However, the planar shapes of the first emission region PXA-R, the second emission region PXA-G, and the third emission region PXA-B are not limited thereto. For example, when viewed from above the plane (e.g., in a planar view), the first emission region PXA-R, the second emission region PXA-G, and the third emission region PXA-B can have elliptical shapes. Alternatively, when viewed from above the plane, the first emission region PXA-R, the second emission region PXA-G, and the third emission region PXA-B can have various planar shapes, such as polygonal shapes (e.g., quadrilateral shapes, triangular shapes) and irregular shapes.

[0107] In embodiments of this disclosure, first pixels PXr and third pixels PXb can be arranged alternately along both a first direction DR1 and a second direction DR2, such as alternating along pixel rows extending along the first direction DR1 and pixel columns extending along the second direction DR2. First pixels PXr can be arranged along a first diagonal direction intersecting the first direction DR1 and / or the second direction DR2. Third pixels PXb can be arranged along a second diagonal direction intersecting the first direction DR1 and / or the second direction DR2. The first diagonal direction of the first pixel PXr and the second diagonal direction of the third pixel PXb can be parallel to each other, but are not limited thereto. Multiple second pixels PXg can be arranged in corresponding diagonal directions between two adjacent first pixels PXr and between two adjacent third pixels PXb. Here, second pixels PXg can alternate with first pixels PXr and third pixels PXb respectively along corresponding diagonal directions. However, Figure 5 The arrangement of the first pixel PXr, the second pixel PXg, and the third pixel PXb shown is an example, and the arrangement of the first pixel PXr, the second pixel PXg, and the third pixel PXb is not particularly limited to this. The direction of the diagonal line can be between the first direction DR1 and the second direction DR2, or between the second direction DR2 and the direction opposite to the first direction DR1.

[0108] Of the three emission regions—the first emission region PXA-R, the second emission region PXA-G, and the third emission region PXA-B—one can emit a first light, another can emit a second light different from the first light, and yet another can emit a third light different from both the first and second light. For example, the first emission region PXA-R can emit red light, the second emission region PXA-G can emit green light, and the third emission region PXA-B can emit blue light.

[0109] In embodiments of this disclosure, the third emitting region PXA-B may have the largest area (e.g., planar area), and the second emitting region PXA-G may have the smallest area. However, this disclosure is not particularly limited thereto. The planar areas of the first emitting region PXA-R, the second emitting region PXA-G, and the third emitting region PXA-B may be set according to the color of the emitted light. For example, the planar areas of the first emitting region PXA-R, the second emitting region PXA-G, and the third emitting region PXA-B may be equal to each other or may be different from the planar areas in the illustrated example.

[0110] A non-emissive region NPXA can be positioned within the display area DP-DA, surrounding the first emitting region PXA-R, the second emitting region PXA-G, and the third emitting region PXA-B. The non-emissive region NPXA can define the boundaries between the first emitting region PXA-R, the second emitting region PXA-G, and the third emitting region PXA-B. The non-emissive region NPXA can surround the first emitting region PXA-R, the second emitting region PXA-G, and the third emitting region PXA-B in a planar view. A structure (e.g., a pixel-limiting layer PDL) is used to prevent color mixing between the first emitting region PXA-R, the second emitting region PXA-G, and the third emitting region PXA-B. Figure 4 It can be set in the non-emission area NPXA.

[0111] Multiple patterned PTs can be configured to correspond respectively to the first emission region PXA-R, the second emission region PXA-G, and the third emission region PXA-B. According to embodiments of this disclosure, when viewed from above a plane, multiple patterned PTs can surround the first emission region PXA-R, the second emission region PXA-G, and the third emission region PXA-B. That is, the patterned PTs can be arranged as follows: Figure 4 The one shown has a hemispherical shape in cross-section and can be as follows Figure 5 The pattern shown has a circular shape on a plane. However, this disclosure is not limited to this, and when viewed from above the plane, the pattern PT can have various shapes, such as polygonal shapes (e.g., quadrilateral shapes, triangular shapes) and irregular shapes. Here, the planar area of ​​the pattern PT can be larger than the planar area of ​​the corresponding emission region.

[0112] Figure 6A The display module DM according to an embodiment of the present disclosure and Figure 5 The sectional view corresponding to line I-I' shown. Figure 6B yes Figure 6A An enlarged view of region AA' shown. In the following text, components identical or similar to those described above will be assigned the same or similar reference numerals, and repeated descriptions will be omitted.

[0113] Reference Figure 6A According to embodiments of the present disclosure, the display module DM may include a display panel DP, an optical layer OCL disposed on the display panel DP, an input sensor ISU disposed on the optical layer OCL, and a color filter layer CFL disposed on the input sensor ISU.

[0114] The display panel DP may include a substrate layer BL, a circuit layer DP-CL, a display layer DP-OLED, and an encapsulation layer TFL stacked sequentially on top of each other. For ease of description, the circuit layer DP-CL is simply shown as a single layer. The display layer DP-OLED may include a pixel defining layer PDL and a light emitting element ED including an emitting layer EML disposed in a plurality of pixel openings PDL-OP defined in (or defined by) the pixel defining layer PDL.

[0115] In a display panel DP, the substrate layer BL can be a component that provides a substrate surface on which the circuit layer DP-CL is disposed. The substrate layer BL can be rigid or flexible. The substrate layer BL can be a glass substrate, a metal substrate, or a polymer substrate (e.g., a plastic substrate). However, the embodiments are not limited to these, and the substrate layer BL can be an inorganic layer, an organic layer, or a composite layer.

[0116] The circuit layer DP-CL can be disposed on the substrate layer BL. The circuit layer DP-CL may include an insulating layer, semiconductor patterns, conductive patterns, and signal lines. The circuit layer DP-CL may include multiple transistors (not shown) formed by the semiconductor patterns, conductive patterns, and signal lines. Each of the transistors (not shown) may include a control electrode (or gate), an input electrode (or source), and an output electrode (or drain). For example, the circuit layer DP-CL may include a switching transistor and a driving transistor for driving a light-emitting element ED.

[0117] The display layer DP-OLED can be disposed on the circuit layer DP-CL. The display layer DP-OLED may include a pixel defining layer PDL and light-emitting elements ED. In an embodiment, the display layer DP-OLED may include a plurality of light-emitting elements ED-1, ED-2 and ED-3.

[0118] Each of the light-emitting elements ED-1, ED-2, and ED-3 may include a first electrode EL1, a second electrode EL2 facing the first electrode EL1, and an emitting layer EML disposed between the first electrode EL1 and the second electrode EL2. Furthermore, although not shown, each of the light-emitting elements ED-1, ED-2, and ED-3 may also include a hole transport region and an electron transport region. Each of the light-emitting elements ED-1, ED-2, and ED-3 may also include a capping layer (not shown) disposed on the second electrode EL2.

[0119] In the DP-OLED display layer, the first light-emitting element ED-1 may include a first emission layer EML-R stacked with the first emission region PXA-R, and the second light-emitting element ED-2 may include a second emission layer EML-G stacked with the second emission region PXA-G. The third light-emitting element ED-3 may include a third emission layer EML-B stacked with the third emission region PXA-B.

[0120] Furthermore, the expression "two components stacked on top of each other" as used herein is not limited to the fact that the two components have the same (planar) area and the same shape when viewed from above the plane, but includes cases where the two components have different areas and / or different shapes. Here, for example, the two components are stacked facing each other along a third direction DR3. "Plane" refers to a plane perpendicular to the thickness direction.

[0121] A pixel-defining layer (PDL) can be disposed on the circuit layer (DP-CL). Multiple pixel openings (PDL-OPs) can be defined within the pixel-defining layer (PDL). At least a portion of the first electrode EL1 can be exposed to the outside of the pixel-defining layer (PDL) through the pixel openings (PDL-OPs) of the pixel-defining layer (PDL).

[0122] The pixel aperture PDL-OP, confined within the pixel limiting layer PDL, can correspond to the emission regions PXA-R, PXA-G, and PXA-B, respectively. In other words, the planar shape and boundaries of the pixel aperture PDL-OP can correspond to each of the emission regions PXA-R, PXA-G, and PXA-B, respectively. The non-emission region NPXA can be the area between adjacent emission regions PXA-R, PXA-G, and PXA-B, and can also be the area corresponding to the pixel limiting layer PDL.

[0123] The pixel defining layer (PDL) can include organic resins or inorganic materials. For example, the pixel defining layer (PDL) can include polyacrylate resins, polyimide resins, and silicon nitride (SiN). x ), silicon dioxide (SiO) x ) or silicon oxynitride (SiO) x N y ).

[0124] In an embodiment, the pixel-defining layer (PDL) may have light-absorbing properties. For example, the PDL may be black in color. The PDL may include a black colorant. The black colorant may include a black dye or a black pigment. The PDL may correspond to a light-blocking pattern with light-blocking properties.

[0125] In the embodiments, the emitting layers EML-R, EML-G, and EML-B of the light-emitting elements ED-1, ED-2, and ED-3, as well as the second electrode EL2, can be patterned using an inkjet printing method. That is, each emitting layer can be a discrete pattern of the emitting material.

[0126] In the display module DM according to the embodiment, multiple light-emitting elements ED-1, ED-2, and ED-3 can emit light within different wavelength ranges. For example, in the embodiment, the display module DM may include a first light-emitting element ED-1 emitting red light, a second light-emitting element ED-2 emitting green light, and a third light-emitting element ED-3 emitting blue light. That is, the red emitting regions PXA-R, green emitting regions PXA-G, and blue emitting regions PXA-B in the electronic device DD of the embodiment can correspond to the first light-emitting element ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3, respectively. However, the embodiment is not limited to this, and the first light-emitting elements ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3 can emit light within the same wavelength range, or at least one of the first light-emitting elements ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3 can emit light within different wavelength ranges. For example, the first light-emitting elements ED-1, the second light-emitting element ED-2, and the third light-emitting element ED-3 can all emit blue light.

[0127] In a light-emitting element (ED), a first electrode EL1 can be disposed on the circuit layer DP-CL. The first electrode EL1 can be an anode or a cathode. Furthermore, the first electrode EL1 can be a pixel electrode. The first electrode EL1 can be a transmissive electrode, a semi-transmissive reflective electrode, or a reflective electrode. Each first electrode EL1 can be a discrete pattern of a conductive material layer.

[0128] The emitting layers EML can be disposed on the first electrode EL1. The emitting layers EML can include multiple emitting layers EML-R, EML-G, and EML-B. The first emitting layer EML-R can be stacked with the first emitting region PXA-R and can emit first light. The second emitting layer EML-G can be stacked with the second emitting region PXA-G and can emit second light. The third emitting layer EML-B can be stacked with the third emitting region PXA-B and can emit third light. According to an embodiment, the first, second, and third light emitted from the light-emitting elements ED-1, ED-2, and ED-3 can be light in substantially different wavelength ranges. For example, the first light can be red light in the wavelength range of about 625 nanometers (nm) to about 675 nm, the second light can be green light in the wavelength range of about 500 nm to about 570 nm, and the third light can be blue light in the wavelength range of about 410 nm to about 480 nm.

[0129] The second electrode EL2 is disposed on the emitting layers EML-R, EML-G, and EML-B. The second electrode EL2 can be a common electrode. The second electrode EL2 can be a cathode or an anode, but the embodiments are not limited thereto. For example, when the first electrode EL1 is an anode, the second electrode EL2 can be a cathode, and when the first electrode EL1 is a cathode, the second electrode EL2 can be an anode. The second electrode EL2 can be a transmission electrode, a semi-transmissive reflection electrode, or a reflection electrode. The second electrode EL2 can continuously span the emitting regions PXA-R, PXA-G, and PXA-B, and the non-emitting region NPXA, but is not limited thereto.

[0130] A capping layer (not shown) may be further disposed on the second electrode EL2. In an embodiment, the capping layer may be an organic layer or an inorganic layer.

[0131] The encapsulation layer TFL can be disposed on the light-emitting element ED. The encapsulation layer TFL can be configured to cover the light-emitting element ED. The encapsulation layer TFL can be disposed on the light-emitting element ED and can fill the thickness portion of the pixel aperture PDL-OP. The encapsulation layer TFL may include a first inorganic layer IL1, an organic layer OL, and a second inorganic layer IL2 stacked sequentially on top of each other.

[0132] According to embodiments of this disclosure, the pattern PT can be defined on the upper surface of the encapsulation layer TFL, furthest from the display layer DP-OLED. The pattern PT can be a recessed pattern facing the light-emitting element ED. The upper surface of the organic layer OL can be recessed facing the light-emitting element ED to form the cross-sectional shape of the pattern PT. Therefore, since the second inorganic layer IL2 follows the cross-sectional shape of the underlying layer (e.g., the organic layer OL), a recessed pattern can also be formed in the second inorganic layer IL2. The pattern PT can have a hemispherical shape in cross-section and a closed shape in plan view. A single pattern PT can be disposed in one emission region, i.e., one-to-one correspondence in one emission region.

[0133] Refer to together Figure 6A and Figure 6B The first thickness Th1 of the organic layer OL can differ from the second thickness Th2 of the optical layer OCL. For example, the first thickness Th1 of the organic layer OL can range from about 7000 nm to about 8000 nm, and the second thickness Th2 of the optical layer OCL can range from about 1500 nm to about 2500 nm. In this disclosure, both the first thickness Th1 of the organic layer OL and the second thickness Th2 of the optical layer OCL can be the thickness at the center of the first emission layer EML-R relative to the outer edge of the first emission layer EML-R.

[0134] In this embodiment, the first thickness Th1 of the organic layer OL can be the maximum thickness of the organic layer OL, and the second thickness Th2 of the optical layer OCL can be the maximum thickness of the optical layer OCL. That is, both the organic layer OL and the optical layer OCL can have their maximum thickness at the center of the first emission layer EML-R. The first thickness Th1 of the organic layer OL can be greater than the sum of the thicknesses of the first inorganic layer IL1 and the second inorganic layer IL2 within the corresponding emission region. For example, the thickness of the first inorganic layer IL1 can be in the range of about 1000 nm to about 2000 nm, and the thickness of the second inorganic layer IL2 can be in the range of about 300 nm to about 600 nm.

[0135] The refractive index of the first inorganic layer IL1 can be in the range of about 1.5 to about 1.7, and the refractive index of the second inorganic layer IL2 can be in the range of about 1.8 to about 2.0. Since the first thickness Th1 of the organic layer OL is greater than the sum of the thicknesses of the first inorganic layer IL1 and the second inorganic layer IL2, the refractive index of the encapsulation layer TFL can be substantially the same as the refractive index of the organic layer OL.

[0136] The width W1 of the pattern PT disclosed herein can range from about 40 micrometers (μm) to about 60 μm. The width W1 of the pattern PT disclosed herein can be greater than the width of the first emission region PXA-R along the same (planar) direction. However, the disclosure is not limited thereto, and the width W1 of the pattern PT can be less than or equal to the width of the first emission region PXA-R.

[0137] In one embodiment, the pattern PT can be formed by photolithography and etching in the method of providing the electronic device DD. However, this disclosure is not limited thereto, and the pattern PT can also be formed by exposure or printing processes.

[0138] An optical layer OCL can be disposed on the encapsulation layer TFL. Specifically, the optical layer OCL can be disposed on the second inorganic layer IL2 that defines the upper surface of the encapsulation layer TFL. The optical layer OCL can provide a flat upper surface. An input sensor ISU can be disposed on the flat upper surface of the optical layer OCL. The construction of the input sensor ISU has already been described above, so a description of the input sensor ISU will be omitted. The optical layer OCL may include organic materials.

[0139] A color filter layer (CFL) can be disposed on the input sensor (ISU). The color filter layer (CFL) can selectively transmit light. In embodiments, the color filter layer (CFL) can be a low-reflection layer or an anti-reflection layer that reduces the reflectivity of external light incident from outside the electronic device (DD). Furthermore, the color filter layer (CFL) can selectively transmit a portion of the provided light to improve the color gamut of the electronic device (DD). The term "color gamut" as used herein refers to the range of colors that the electronic device (DD) can display. For example, the color filter layer (CFL) can selectively absorb or transmit light within a specific wavelength range to improve the color gamut. The light incident on the display panel (DP) through the color filter layer (CFL) can be unpolarized light. The display panel (DP) can receive the unpolarized light from above the color filter layer (CFL).

[0140] The color filter layer CFL may include a filter CF and a segmentation pattern BM, in which segmentation openings OH-BM are defined to provide a light-blocking layer. The segmentation openings OH-BM may be defined to correspond to (or be superimposed on) pixel openings PDL-OP.

[0141] A color filter CF may include a first color filter CF-R that transmits light of a first color, a second color filter CF-G that transmits light of a second color, and a third color filter CF-B that transmits light of a third color. For example, the first color filter CF-R may be a red filter, the second color filter CF-G may be a green filter, and the third color filter CF-B may be a blue filter.

[0142] Each of the first color filter CF-R, the second color filter CF-G, and the third color filter CF-B may include a photosensitive polymer resin and a colorant. Each of the first color filter CF-R, the second color filter CF-G, and the third color filter CF-B may include a pigment or dye. The first color filter CF-R may include a first colorant, the second color filter CF-G may include a second colorant, and the third color filter CF-B may include a third colorant. The first color filter CF-R may include a red pigment or a red dye, the second color filter CF-G may include a green pigment or a green dye, and the third color filter CF-B may include a blue pigment or a blue dye. However, the embodiments are not limited thereto, and the third color filter CF-B may not include a pigment or dye. For example, the third color filter CF-B may be formed of a transparent photosensitive resin. The third color filter CF-B may be transparent. When the third color filter CF-B is formed of a transparent photosensitive resin, the light transmitted by the third color filter CF-B is not limited to light of a third color.

[0143] The segmented pattern BM, which serves as the solid portion of the light-blocking layer, can be configured to overlap with the boundaries between adjacent color filters among the first color filter CF-R, the second color filter CF-G, and the third color filter CF-B. The segmented pattern BM can be configured to correspond to the non-emissive region NPXA, and the first color filter CF-R, the second color filter CF-G, and the third color filter CF-B can be configured to correspond to the first emitting region PXA-R, the second emitting region PXA-G, and the third emitting region PXA-B, respectively. The segmented patterns BM can be spaced apart from each other.

[0144] In an embodiment, the segmented pattern BM can be a black matrix to prevent light leakage. The segmented pattern BM, serving as a light-blocking layer, can be formed from an organic or inorganic light-blocking material including black pigment or dye. The segmented pattern BM can distinguish the boundaries between adjacent first color filters CF-R, second color filters CF-G, and third color filters CF-B. Optionally, in an embodiment, the segmented pattern BM can be formed from a blue filter.

[0145] The color filter layer CFL may also include an outer coating OC. The outer coating OC may cover the color filter CF and the segmentation pattern BM. The outer coating OC may be fully stacked with the display layer DP-OLED. The upper surface of the outer coating OC may define the upper surface of the color filter layer CFL and may cover the front surface of the display panel DP to protect the display panel DP.

[0146] Refer to together Figure 6A and Figure 6B Light L can be emitted from the first emitting layer EML-R. Light L can correspond to the first light (e.g., red light).

[0147] According to embodiments of this disclosure, the refractive index of the encapsulation layer TFL and the refractive index of the optical layer OCL can be different from each other. The refractive index of the encapsulation layer TFL can be defined as a first refractive index, and the refractive index of the optical layer OCL can be defined as a second refractive index. The first refractive index can be equal to the refractive index of the organic layer OL. That is, the first refractive index can be the refractive index of the organic layer OL. The difference between the first refractive index and the second refractive index can be in the range of about 0.1 to about 1.0.

[0148] Figure 6BThe pattern PT shown may have a concave shape recessed towards the first light-emitting element ED-1. According to this embodiment, the second refractive index may be greater than the first refractive index. For example, the first refractive index may be in the range of about 1.5 to about 1.7, and the second refractive index may be in the range of about 1.8 to about 2.0. Since the refractive index of the optical layer OCL and the refractive index of the organic layer OL are different from each other, light L may be refracted at the boundary or interface between the optical layer OCL and the organic layer OL. Specifically, since the refractive index of the refractive index layer of the encapsulation layer TFL (e.g., the organic layer OL considered together with the thinner dimension of the second inorganic layer IL2) is less than the refractive index of the optical layer OCL, light L may be concentrated at the center of the first color filter CF-R according to Snell's Law. The center of the first color filter CF-R may correspond to the center of the first emitting layer EML-R.

[0149] Refer to together Figure 6A and Figure 6B Light L can be emitted from light-emitting elements ED-1, ED-2, and ED-3. The light L emitted from light-emitting elements ED-1, ED-2, and ED-3 can be concentrated at the center of color filters CF-R, CF-G, and CF-B, respectively. Therefore, mixing of light L emitted from light-emitting elements ED-1, ED-2, and ED-3 at the outer edges of emission regions PXA-R, PXA-G, and PXA-B can be prevented, and an electronic device DD with improved light extraction efficiency can be provided (see [link to electronic device]). Figure 1 ).

[0150] Figure 7A The display module DMa according to an embodiment of this disclosure and Figure 5 The sectional view corresponding to line I-I' shown. Figure 7B yes Figure 7A An enlarged view of region BB' shown. In the following text, components identical or similar to those described above will be assigned the same or similar reference numerals, and repeated descriptions will be omitted.

[0151] Refer to together Figure 7A and Figure 7B According to embodiments of the present disclosure, the display module DMa may include an encapsulation layer TFLa disposed on the light-emitting element ED. The encapsulation layer TFLa may include a first inorganic layer IL1, an organic layer OLa, and a second inorganic layer IL2a stacked sequentially on top of each other.

[0152] According to embodiments of this disclosure, the pattern PTa can be defined within the encapsulation layer TFLa. The pattern PTa can have a shape that protrudes in a direction away from the light-emitting element ED, for example, a convex shape relative to the display layer DP-OLED. Hereinafter, the pattern PTa can be referred to as the protruding pattern PTa. The upper surface of the organic layer OLa can protrude in a direction away from the light-emitting element ED at the location where the organic layer OLa is superimposed with the respective emitting regions PXA-R, PXA-G, and PXA-B to form the protruding pattern PTa. Therefore, due to the cross-sectional shape of the organic layer OLa, the protruding pattern PTa can also be formed in the second inorganic layer IL2a.

[0153] The refractive index of the organic layer OLa can be defined as a first refractive index, and the refractive index of the optical layer OCL can be defined as a second refractive index. According to this embodiment, the first refractive index can be greater than the second refractive index. For example, the first refractive index can be in the range of about 1.8 to about 2.0, and the second refractive index can be in the range of about 1.5 to about 1.7. Since the refractive indices of the optical layer OCL and the organic layer OLa are different from each other, light L can be refracted at the boundary between the optical layer OCL and the organic layer OLa. Specifically, since the refractive index of the organic layer OLa, on which the protruding pattern PTa is formed, is greater than the refractive index of the optical layer OCL, light L can be concentrated at the center of the first color filter CF-R according to Snell's law. Therefore, mixing of light L emitted from the light-emitting elements ED-1, ED-2, and ED-3 at the outer edges of the respective emission regions PXA-R, PXA-G, and PXA-B can be prevented, and an electronic device DD (refer to) with improved light extraction efficiency can be provided. Figure 1 ).

[0154] Figure 8 The display module DMb according to an embodiment of this disclosure and Figure 5 The sectional view corresponding to line I-I' shown.

[0155] Reference Figure 8 According to embodiments of the present disclosure, the display module DMb may include an encapsulation layer TFLb disposed on the light-emitting element ED. The encapsulation layer TFLb may include a first inorganic layer IL1, an organic layer OLb, and a second inorganic layer IL2b stacked sequentially on top of each other.

[0156] According to embodiments of this disclosure, a pattern PTb can be defined within an encapsulation layer TFLb. Multiple patterns PTb can be provided. That is, more than one pattern PTb can be provided in the same emission region. For example, multiple patterns PTb can be provided in each of the first emission regions PXA-R, the second emission regions PXA-G, and the third emission regions PXA-B. Although Figure 8An example is shown of forming two patterns PTb in each of the first transmission regions PXA-R, the second transmission regions PXA-G, and the third transmission region PXA-B. However, this disclosure is not limited thereto, and three or more patterns PTb may be formed in each of the first transmission regions PXA-R, the second transmission regions PXA-G, and the third transmission regions PXA-B.

[0157] Reference Figure 6A , Figure 6B , Figure 7A , Figure 7B and Figure 8 Patterns PT, PTa, and PTb may have recessed or protruding shapes defined by the curved surfaces of organic layers OL, OLa, and OLb and / or second inorganic layers IL2, IL2a, and IL2b. The recessed or protruding shapes may be defined by continuous curved shapes, but are not limited thereto. In embodiments, instead of curved shapes, the recessed or protruding shapes may be defined by linear portions connected to each other.

[0158] Figure 9 The display module DMC according to an embodiment of this disclosure and Figure 5 The sectional view corresponding to line I-I' shown.

[0159] Reference Figure 9 According to embodiments of the present disclosure, the display module DMc may include an encapsulation layer TFLc disposed on the light-emitting element ED. The encapsulation layer TFLc may include a first inorganic layer IL1, an organic layer OLc, and a second inorganic layer IL2c stacked sequentially on top of each other.

[0160] According to embodiments of this disclosure, a pattern PTc may be defined within an encapsulation layer TFLc. The pattern PTc may have a concave shape recessed toward the light-emitting element ED. Each of the patterns PTc may have a trapezoidal shape in cross-section. For example, a pattern PTc may include a flat lower surface and two sloping surfaces extending from the lower surface.

[0161] An electronic device DD according to an embodiment of the present disclosure includes a display module DM, DMa, DMb or DMC and a power module that supplies power to the display module DM, DMa, DMb or DMC.

[0162] The display modules DM, DMa, DMb, and DMC according to embodiments of this disclosure can be applied to various electronic devices. An electronic device DD according to embodiments of this disclosure may include the aforementioned display modules DM, DMa, DMb, or DMc, and may also include modules or devices with additional functions in addition to the display modules DM, DMa, DMb, or DMc.

[0163] Figure 10This is a block diagram illustrating an electronic device 1000 according to an embodiment of the present disclosure. One or more embodiments of the above-described electronic device DD may be derived from... Figure 10 express.

[0164] Reference Figure 10 The electronic device 1000 may include a display module 1010, a processor 1020, a memory 1030, and a power module 1040.

[0165] The processor 1020 may include at least one of a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a communication processor (CP), an image signal processor (ISP), and a controller.

[0166] The memory 1030 can store data information required for the operation of the processor 1020 or the display module 1010. When the processor 1020 executes the application stored in the memory 1030, image data signals and / or input control signals can be transmitted to the display module 1010, and the display module 1010 can process the received signals and output image information through the display screen.

[0167] The power module 1040 may include a power module such as a power adapter, a battery device, etc., and a power conversion module that converts the power supplied by the power module to generate the power required for the operation of the electronic device 1000.

[0168] At least one of the components of the electronic device 1000 described above may be included in the electronic device according to the above embodiments. Furthermore, some of the modules functionally included in a single module may be included in the electronic device, while other modules may be disposed separately from the electronic device. For example, the electronic device may include a display module 1010, and the processor 1020, memory 1030, and power module 1040 may be disposed in the form of other devices.

[0169] Figure 11 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure.

[0170] Reference Figure 11Various electronic devices employing the electronic devices according to embodiments of this disclosure may include not only image display electronic devices, but also wearable electronic devices including display modules, vehicle electronic devices 1000_3 including display modules, etc. Image display electronic devices may be smartphones 1000_1a, tablet PCs 1000_1b, laptop computers 1000_1c, TVs 1000_1d, desktop monitors 1000_1e, etc. Wearable electronic devices may be smart glasses 1000_2a, head-mounted displays 1000_2b, smartwatches 1000_2c, etc. Vehicle electronic devices 1000_3 may be central information displays (CIDs) or interior mirror displays installed on the dashboard and central instrument panel of a vehicle.

[0171] The electronic device DD disclosed herein may include a packaging layer TFL and an optical layer OCL. The packaging layer TFL has a first refractive index and has concave or convex patterns formed therein. The optical layer OCL is disposed on the packaging layer TFL and has a second refractive index different from the first refractive index. Therefore, the electronic device DD can prevent the mixing of light emitted from the light-emitting element ED and can improve the light extraction efficiency at each emission region.

[0172] In an embodiment, the electronic device DD includes: a display layer DP-OLED, comprising an emitting region including a light-emitting element and a non-emitting region NPXA adjacent to the emitting region; an encapsulation layer TFL on the display layer DP-OLED, the encapsulation layer TFL defining a concave or convex pattern superimposed on a corresponding emitting region among the emitting regions and having a width of about 40 micrometers to about 60 micrometers along the display layer DP-OLED in one direction and having a first refractive index; and an optical layer OCL on the encapsulation layer TFL and having a second refractive index different from the first refractive index.

[0173] The encapsulation layer TFL may include a recessed pattern facing the light-emitting element and have a second refractive index greater than the first refractive index. The first refractive index may be in the range of about 1.5 to about 1.7 and the second refractive index may be in the range of about 1.8 to about 2.0.

[0174] The encapsulation layer TFL may include a raised pattern protruding away from the light-emitting element and a first refractive index greater than a second refractive index. The first refractive index may be in the range of about 1.8 to about 2.0, and the second refractive index may be in the range of about 1.5 to about 1.7.

[0175] The encapsulation layer may include an organic layer OL defined on a first inorganic layer IL1 and having a first refractive index. The encapsulation layer TFL may further include an organic layer OL having a first refractive index and a thickness greater than that of each of the first inorganic layer IL1 and the second inorganic layer IL2. The thickness of the organic layer OL may be in the range of about 7000 nm to about 8000 nm. The encapsulation layer TFL may also include a second inorganic layer IL2 having a refractive index greater than that of the first inorganic layer IL1.

[0176] The electronic device DD may also include a color filter layer CFL containing filters CF respectively corresponding to the emission regions, and the concave or convex pattern may be superimposed on a corresponding color filter among the first, second and third color filters.

[0177] The encapsulation layer may include multiple concave or convex patterns, and one of the concave patterns or one of the convex patterns may be superimposed on one of the emission regions.

[0178] In an embodiment, the electronic device DD includes: an encapsulation layer TFLb on the display layer DP-OLED, the encapsulation layer TFLb defining a recessed pattern recessed toward the light-emitting element and superimposed with a corresponding emission region in the emission region, and having a first refractive index; and an optical layer OCL on the encapsulation layer TFLb and having a second refractive index greater than the first refractive index of the encapsulation layer.

[0179] The encapsulation layer TFLb may include multiple recessed patterns, and two or more of the recessed patterns are superimposed on one of the emission regions.

[0180] Although this disclosure has been described with reference to embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications may be made therein without departing from the spirit and scope of this disclosure as set forth in the appended claims.

Claims

1. An electronic device comprising: a display layer including emission regions each of which includes a light emitting element and non-emission regions adjacent to the emission regions; an encapsulation layer on the display layer, the encapsulation layer defining a concave pattern or a convex pattern superposed with a respective one of the emission regions and having a width of 40 to 60 micrometers in a direction along the display layer, and having a first refractive index; and an optical layer on the encapsulation layer and having a second refractive index different from the first refractive index of the encapsulation layer. 2.The electronic device of claim 1, wherein, The encapsulation layer includes the concave pattern recessed toward the light emitting element, and the second refractive index is greater than the first refractive index. 3.The electronic device of claim 2, wherein, The first refractive index is in a range from 1.5 to 1.7, and the second refractive index is in a range from 1.8 to 2.

0. 4.The electronic device of claim 1, wherein The encapsulation layer includes the convex pattern protruding away from the light emitting element, and the first refractive index is greater than the second refractive index. 5.The electronic device of claim 4, wherein, The first refractive index is in a range from 1.8 to 2.0, and the second refractive index is in a range from 1.5 to 1.

7. 6.The electronic device of claim 1, wherein The encapsulation layer includes: a first inorganic layer on the light emitting element; an organic layer on the first inorganic layer and defined with the first refractive index; and a second inorganic layer on the organic layer. 7.The electronic device of claim 6, wherein, The organic layer has the first refractive index and has a thickness greater than a thickness of each of the first and second inorganic layers. 8.The electronic device of claim 7, wherein, The thickness of the organic layer is in a range from 7000 nanometers to 8000 nanometers. 9.The electronic device of claim 6, wherein The second inorganic layer has a refractive index greater than a refractive index of the first inorganic layer. 10.The electronic device of claim 1, wherein, The optical layer includes a flat upper surface. 11.The electronic device of claim 10, further comprising a color filter layer on the upper surface of the optical layer. 12.The electronic device of claim 11, wherein the color filter layer includes color filters respectively corresponding to the emission regions, and the concave pattern or the convex pattern is superposed with a respective one of the color filters. 13.The electronic device of claim 1, wherein, A difference between the first refractive index and the second refractive index is in a range from 0.1 to 1.

0. 14.The electronic device of claim 1, wherein, The encapsulation layer includes: the concave pattern or the convex pattern is provided as a plurality, and one of the concave patterns or one of the convex patterns among the plurality is superposed with one of the emission regions among the emission regions. 15.The electronic device of claim 1, wherein, The optical layer includes an organic material. 16.The electronic device of claim 1, wherein, The optical layer has a thickness of 1500 nanometers to 2500 nanometers. 17.An electronic device comprising: a display layer including emission regions each of which includes a light emitting element and non-emission regions adjacent to the emission regions; an encapsulation layer on the display layer, the encapsulation layer defining a concave pattern recessed toward the light emitting element and superposed with a respective one of the emission regions, and having a first refractive index; and an optical layer on the encapsulation layer and having a second refractive index greater than the first refractive index of the encapsulation layer. 18.The electronic device of claim 17, wherein, The first refractive index of the encapsulation layer is in a range from 1.5 to 1.7, and the second refractive index of the optical layer is in a range from 1.8 to 2.

0. 19.The electronic device of claim 17, wherein, The encapsulation layer includes: a first inorganic layer on the light emitting element; an organic layer on the first inorganic layer and defined with the first refractive index; and a second inorganic layer on the organic layer. 20.The electronic device of claim 17, wherein, The encapsulation layer includes: The concave pattern is provided as a plurality, and two or more concave patterns among the plurality of concave patterns are superposed with one of the emission regions.

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