Hard disk power-on and power-off time sequence control method and electronic equipment
By controlling the time-sharing power-on and power-off sequence of the hard disk array through the target motherboard, the problems of power overload and system access failure caused by simultaneous power-on of the hard disk array are solved, thereby improving the reliability and stability of system startup.
Patent Information
- Application Number
- CN202511563162.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-29
- Publication Date
- 2026-03-17
AI Technical Summary
When hard disk arrays are powered on simultaneously, the inrush current generated may exceed the maximum output capacity of the power module, leading to abnormal situations such as power output overcurrent or power outage, reducing the reliability of the hard disk array. Furthermore, excessively long overall power-on time may cause the system to fail to access the hard disks before they are ready, affecting the user experience.
By defining hard drive boot rules on the target motherboard, the system responds to the server's boot request by sending a hard drive power-on command and responds to the shutdown request by controlling the power-off, thus enabling time-sharing power-on and power-off of the hard drive and ensuring that the hard drive is fully ready before system access.
It significantly improves the reliability and stability of system startup, avoids system startup failure or hard drive damage caused by timing disorder, and improves user experience.
Smart Images

Figure CN121680592A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer storage control technology, and in particular to a method and electronic device for controlling the power-on and power-off timing of hard disks. Background Technology
[0002] Hard drive arrays are typically connected directly to the host computer as a standalone system or via a network. They consist of multiple hard drives, all typically powered by one or more power modules. Mechanical hard drives usually contain an electric motor to drive the rotation of the disks. When power is applied, the motor generates an inrush current. If all disks in the array are powered on simultaneously, this massive inrush current can exceed the maximum output capacity of the power modules, causing overcurrent, power outages, and other abnormal situations, thus reducing the reliability of the hard drive array.
[0003] To avoid problems caused by simultaneously powering on all hard drives in a hard drive array, existing technologies typically employ staggered power-on. In this method, once the first hard drive is detected and connected, it is immediately powered on. Then, a control circuit triggers the next-level delay module. When a preset delay time is reached, the second hard drive is powered on, and the next-level delay module starts. However, this method results in a very long overall power-on time for the hard drives, potentially causing system access failures before the hard drives are ready, impacting user experience. Summary of the Invention
[0004] This application provides a hard disk power-on / off timing control method and electronic device, which includes, after detecting that the server is powered on, formulating corresponding hard disk boot rules for at least one target backplane through the target motherboard, and in response to the server's power-on request, sending a hard disk power-on command to at least one target backplane through the target motherboard based on the hard disk boot rules, and then in response to the server's power-off request, performing power-off control through the target motherboard. Thus, the target motherboard controls the time-sharing power-on and power-off of the hard disks on the target backplane as a whole, thereby significantly improving the reliability and stability of system startup, and at least solving the problems in related technologies where the overall hard disk power-on time is very long, which may cause the system to fail to access the hard disk before it is ready, affecting the user experience.
[0005] This application provides a method for controlling the power-on and power-off timing of a hard disk, including: After the server is detected to be powered on, the target motherboard will formulate corresponding hard drive boot rules for at least one target backplane. In response to the server's power-on request, a hard drive power-on command is sent to at least one target backplane via the target motherboard based on the hard drive boot rules; In response to the server's shutdown request, power-down control is performed via the target motherboard.
[0006] This application also provides a hard disk power-on / off timing control device, including: The rule-making module is used to formulate corresponding hard drive boot rules for at least one target backplane through the target motherboard after detecting that the server has been powered on. The command sending module is used to respond to the server's power-on request by sending a hard drive power-on command to at least one target backplane based on the hard drive boot rules of the target motherboard. The power-down control module is used to respond to the server's shutdown request and control the power-down process via the target motherboard.
[0007] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing the steps of any of the above-described hard disk power-on / off timing control methods when executing the computer program.
[0008] This application also provides a computer-readable storage medium storing a computer program, wherein when the computer program is executed by a processor, it implements the steps of any of the above-described hard disk power-on / off timing control methods.
[0009] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described hard disk power-on / off timing control methods.
[0010] This application enables the target motherboard to formulate corresponding hard drive boot rules for at least one target backplane after detecting that the server is powered on. In response to the server's power-on request, the target motherboard sends a hard drive power-on command to at least one target backplane based on the hard drive boot rules. Then, in response to the server's power-off request, the target motherboard performs power-off control. This allows the target motherboard to control the time-sharing power-on and power-off of the hard drives on the target backplane, thereby significantly improving the reliability and stability of system startup. This addresses issues in related technologies where the overall hard drive power-on time is long, which may lead to system access failures when the hard drive is not ready, affecting user experience. Attached Figure Description
[0011] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0012] Figure 1 A flowchart illustrating a hard disk power-on / off timing control method provided in an embodiment of this application; Figure 2 A schematic diagram of an architecture for implementing a hard disk power-on / off timing control method provided in an embodiment of this application; Figure 3 A flowchart illustrating another hard disk power-on / off timing control method provided in an embodiment of this application; Figure 4 This is a schematic diagram of a hard disk power-on / off timing control device provided in an embodiment of this application. Detailed Implementation
[0013] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.
[0014] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.
[0015] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0016] The specific application environment architecture or specific hardware architecture on which the execution of the hard disk power-on / off timing control method depends is described here.
[0017] The embodiments of this application provide a hard disk power-on / off timing control method, and the method is described in detail in conjunction with the execution flow of the hard disk power-on / off timing control method.
[0018] Figure 1 This is a flowchart illustrating a hard disk power-on / off timing control method according to an embodiment of this disclosure. This method can be executed by an electronic device. The electronic device may include, but is not limited to, devices such as computer equipment and server equipment.
[0019] like Figure 1 As shown, the method provided in this embodiment includes the following steps: S110. After detecting that the server is powered on, formulate corresponding hard drive boot rules for at least one target backplane through the target motherboard.
[0020] In this embodiment of the disclosure, after detecting that the server is powered on, the electronic device can formulate corresponding hard drive boot rules for at least one target backplane through the target motherboard.
[0021] Optionally, the target motherboard is equipped with a Complex Programmable Logic Device (CPLD) to control the operation of the entire system.
[0022] Optionally, the target backplane is equipped with a backplane CPLD for controlling the connected hard-disk drive (HDD).
[0023] Optionally, the hard drive boot rules can be rules used to control the power-on boot process of each mechanical hard drive.
[0024] Specifically, after detecting that the server is powered on (such as the process of providing power to the server via an AC power line), the electronic device can formulate a corresponding hard drive boot rule for at least one target backplane through the motherboard CPLD of the target motherboard, so that the backplane CPLD of the target backplane can control the connected HDD hard drive according to the hard drive boot rule.
[0025] S120, in response to the server's power-on request, sends a hard drive power-on command to at least one target backplane based on the hard drive boot rules of the target motherboard.
[0026] In this embodiment of the disclosure, the electronic device can respond to a server's power-on request by sending a hard drive power-on command to at least one target backplane based on the hard drive boot rules through the target motherboard.
[0027] Optionally, the power-on request can be a request to enable modules such as multiple hard drives and a central processing unit (CPU) to put the electronic device into a working state.
[0028] Optionally, the hard drive power-on command can be a command that powers on each connected hard drive via the target backplane.
[0029] Specifically, when the server sends a power-on request, the electronic device can respond to the power-on request by sending a hard disk power-on command to the backplane CPLD of at least one target backplane based on the hard disk boot rules through the motherboard CPLD of the target motherboard, so that the backplane CPLD of at least one target backplane can perform power-on operation on each connected hard disk according to the hard disk power-on command.
[0030] S130, in response to the server's shutdown request, performs power-down control via the target motherboard.
[0031] In this embodiment of the disclosure, the electronic device can respond to a power-off request from the server by controlling the power-down process via the target motherboard.
[0032] Optionally, a shutdown request can be a request to shut down modules such as multiple hard drives and a central processing unit (CPU) to deactivate the electronic device.
[0033] Optionally, the power-down control can be used to power off multiple hard drives, central processing unit (CPU), and other modules.
[0034] Specifically, when the server sends a shutdown request, the electronic device can respond to the shutdown request and control the power-down of multiple hard drives, central processing unit (CPU), and other modules through the motherboard CPLD of the target motherboard.
[0035] Therefore, in this embodiment, after detecting that the server is powered on, the target motherboard formulates corresponding hard drive boot rules for at least one target backplane. In response to the server's power-on request, the target motherboard sends a hard drive power-on command to at least one target backplane based on the hard drive boot rules. Then, in response to the server's power-off request, the target motherboard controls the power-off process. This allows the target motherboard to control the time-sharing power-on and power-off of the hard drives on the target backplanes, significantly improving the reliability and stability of system startup. This addresses issues in related technologies where the overall hard drive power-on time is long, potentially leading to system access failures before the hard drive is ready, thus affecting user experience. Centralized control and timing management of the hard drive power-on and power-off process are achieved, avoiding system startup failures or hard drive damage caused by timing irregularities in traditional solutions.
[0036] Optionally, S110 may specifically include: after detecting that the server is powered on, performing a first polling process on at least one target backplane through the target motherboard to obtain the number of hard drives connected to at least one target backplane; and formulating corresponding hard drive boot rules for at least one target backplane through the target motherboard based on the number of hard drives and the target boot interval.
[0037] In this embodiment of the disclosure, after detecting that the server is powered on, the electronic device can perform a first polling process on at least one target backplane through the target motherboard to obtain the number of hard drives connected to at least one target backplane.
[0038] Optionally, the first polling process can poll the number of hard drives connected in multiple backplanes.
[0039] Specifically, after the server is detected to be powered on, the electronic device can perform a first polling process on at least one target backplane through the motherboard CPLD of the target motherboard. That is, the motherboard CPLD queries the number of hard drives connected to each backplane CPLD through the I2C bus, thereby obtaining the number of hard drives connected to at least one target backplane. For example, there are 3 backplanes in total, and 4 hard drives are connected to each backplane.
[0040] Furthermore, electronic devices can formulate corresponding hard drive boot rules for at least one target backplane based on the number of hard drives and the target boot interval through the target motherboard.
[0041] Optionally, the target boot interval can be a pre-defined time interval between boots of the various hard drives.
[0042] Specifically, once the number of hard drives is determined, the electronic device can use the motherboard CPLD of the target motherboard to formulate corresponding hard drive boot rules for at least one target backplane based on the number of hard drives and the target boot interval (e.g., 1 second).
[0043] This enables dynamic identification and adaptive rule formulation of system hard drive configuration, ensuring that the boot rules match the actual hardware configuration, improving the flexibility and applicability of the solution, and providing accurate timing basis for subsequent off-peak power-on.
[0044] Optionally, the hard drive boot rules include: specifying a boot time point and a boot time interval for each target backplane, so that each target backplane controls at least one target hard drive connected to it to power on in a time-sharing manner based on the boot time point and boot time interval.
[0045] In this embodiment of the disclosure, the electronic device can formulate hard drive boot rules through the target motherboard, including setting boot time points and boot time intervals for each target backplane, so that each target backplane controls at least one target hard drive connected to it to perform time-sharing power-on based on the boot time points and boot time intervals.
[0046] Optionally, the boot time point can be the moment when the target hard drive is booted.
[0047] Optionally, the boot interval can be the time interval required to control the boot process of each target hard drive.
[0048] Specifically, electronic devices can use the motherboard CPLD of the target motherboard to define hard drive boot rules, including setting boot times and boot intervals for each target backplane. For example, only one HDD can be booted at a time, the target boot interval is 1 second, there are 3 backplanes, and each backplane is connected to 4 hard drives. The motherboard CPLD sends power-on commands to backplane 1, backplane 2, and backplane 3 at 0 seconds, 1 second, and 2 seconds (boot times), respectively, and sends the corresponding boot interval of 3 seconds. Thus, the boot time of hard drive 1 on backplane 1 is 0 seconds, the boot time of hard drive 1 on backplane 2 is 1 second, the boot time of hard drive 1 on backplane 3 is 2 seconds, and the boot time of hard drive 2 on backplane 1 is... The time interval is set to 3 seconds, meaning one HDD hard drive is started every second. Alternatively, the motherboard CPLD sends a power-on command to backplane 1 at 0 seconds (the startup time point), setting the corresponding startup interval to 1 second. Then, the motherboard CPLD sends a power-on command to backplane 2 at 4 seconds (the startup time point), also setting the corresponding startup interval to 1 second. Thus, the startup times for hard drives 1, 2, 3, and 4 on backplane 1 are 0 seconds, 1 second, 2 seconds, and 3 seconds, respectively, and the startup times for hard drives 1, 2, 3, and 4 on backplane 2 are 4 seconds, 5 seconds, 6 seconds, and 7 seconds, respectively, achieving one HDD hard drive startup every second. Both of these startup schemes can meet the server's hard drive startup time requirements. The choice can be made based on the actual situation and is not limited here.
[0049] This enables time-sharing startup of hard drives, effectively reducing the peak current during system startup, avoiding power overload or system instability caused by excessive surge current, and improving the startup reliability of the system in multi-hard drive configurations.
[0050] Optionally, after S120, the hard disk power-on / off timing control method may further include: performing a second polling process on at least one target backplane through the target motherboard to obtain the power-on status of each target hard disk; and, based on the power-on status, controlling the power-on of the central processing unit through the target motherboard.
[0051] In this embodiment of the disclosure, the electronic device can perform a second polling process on at least one target backplane through the target motherboard to obtain the power-on status of each target hard disk.
[0052] Optionally, the second round of polling can be used to check whether each hard drive has been successfully powered on.
[0053] Specifically, after the motherboard CPLD sends a hard drive power-on command to at least one target backplane, the electronic device can perform a second polling process on the at least one target backplane through the motherboard CPLD of the target motherboard, that is, to query whether each target hard drive connected to the at least one target backplane has been successfully powered on, thereby obtaining the power-on status of each target hard drive, which includes power-on success and power-on failure.
[0054] Furthermore, electronic devices can control the power-on of the central processing unit via the target motherboard based on the power-on status.
[0055] Specifically, after determining the power-on status of each hard drive, the electronic device can control the power-on of the central processing unit (CPU) through the motherboard CPLD of the target motherboard, thereby completing the power-on process.
[0056] This ensures that all hard drives are fully ready before system access, avoiding system startup failures or data access errors due to unready hard drives, and improving the success rate and stability of system startup.
[0057] Optionally, based on the power-on state, the target motherboard controls the power-on of the central processing unit, including: when the power-on state is fully powered on, the target motherboard sends a power-on command to the central processing unit.
[0058] In some embodiments of this disclosure, when the power-on state is fully powered on, the electronic device can send a power-on command to the central processing unit through the target motherboard.
[0059] Specifically, after determining the power-on status of each hard drive, when the power-on status is "all hard drives are powered on," meaning all hard drives have been successfully powered on, the electronic device can control the power-on of the central processing unit (CPU) through the motherboard CPLD of the target motherboard, thereby completing the power-on process.
[0060] In some other embodiments of this disclosure, when the power-on state is incomplete, i.e., there are hard drives that have failed to power on, although the CPU can still be powered on through the motherboard CPLD of the target motherboard, the user cannot access the data stored on the hard drives that failed to power on, and the electronic device can remind the hard drives that failed to power on.
[0061] This enables strict startup timing control, ensuring the correct initialization of all system components, avoiding system startup anomalies caused by unprepared storage devices, and improving system startup reliability and user experience.
[0062] Optionally, S130 may specifically include: responding to a shutdown request from the server, determining the target type of the shutdown request; and, based on the target type, performing power-down control through the target motherboard.
[0063] In this embodiment of the disclosure, the electronic device can respond to a shutdown request from the server and determine the target type of the shutdown request.
[0064] Optionally, the target type can be used to characterize the source and type of the shutdown request. For example, the target type can be whether it is a cold reset request, i.e., requiring the device or system power to be turned off and the system restarted to reset the electronic device.
[0065] Specifically, after receiving a shutdown request from the server, the electronic device can determine the target type of the shutdown request, that is, whether the shutdown request is a cold reset request.
[0066] Furthermore, electronic devices can be powered down via the target motherboard based on the target type.
[0067] Specifically, electronic devices can control the power-down of various hard drives, central processing units (CPUs), etc., through the CPLD of the target motherboard based on the target type, i.e. whether it is a cold reset request.
[0068] This enables differentiated handling of different shutdown scenarios, improves the system's adaptability in special scenarios (such as cold reset), avoids unnecessary hard drive power-on and power-off operations, and extends hard drive lifespan.
[0069] Optionally, the target type of the shutdown request is determined, including: if the shutdown request is initiated by the basic input / output system, the target type is determined to be a cold reset request; otherwise, the target type is determined to be a non-cold reset request.
[0070] In some embodiments of this disclosure, if the power-off request is initiated by the Basic Input / Output System, the electronic device can determine that the target type is a cold reset request.
[0071] Specifically, if an electronic device can determine that the power-off request was initiated by the Basic Input / Output System (BIOS) through the ESPI (Enhanced Serial Peripheral Interface) protocol or other communication methods, then the electronic device can determine that the target type is a cold reset request.
[0072] In some other embodiments of this disclosure, if the electronic device can determine that the shutdown request is not initiated by the BIOS, the electronic device can determine that the target type is a non-cold reset request, i.e., a normal shutdown request.
[0073] Therefore, it is possible to accurately identify system reset scenarios, avoid misoperation, provide accurate judgment basis for subsequent power-down control, and improve the stability and data security of the system in reset scenarios.
[0074] Optionally, S130 may specifically include: based on the target type being a cold reset request, performing power-down control on the central processing unit via the target motherboard, and suppressing the sending of hard disk power-down commands to at least one target backplane.
[0075] In this embodiment of the disclosure, based on the target type being a cold reset request, the electronic device can control the power-down of the central processing unit through the target motherboard and suppress the sending of hard disk power-down commands to at least one target backplane.
[0076] Specifically, when the target type is a cold reset request, the electronic device can control the power-down of the CPU through the target motherboard and suppress the sending of hard drive power-down commands to at least one target backplane, that is, it does not control the hard drive of the target backplane to power down.
[0077] This avoids frequent hard drive restarts and shutdowns caused by system resets, reduces mechanical wear on the hard drive during the reset process, extends the hard drive's lifespan, and improves system reliability.
[0078] Optionally, S130 may specifically include: based on the target type being a non-cold reset request, sending a hard drive power-down command to at least one target backplane via the target motherboard after a target time has elapsed.
[0079] In this embodiment of the disclosure, based on the target type being a non-cold reset request, the electronic device can send a hard drive power-down command to at least one target backplane via the target motherboard after a target time has elapsed.
[0080] Specifically, based on the target type being a non-cold reset request, i.e. a normal shutdown request, after the target time (e.g., 10 seconds), the electronic device can send a hard drive power-down command to at least one target backplane through the CPLD of the target motherboard. That is, it first waits for a period of time to ensure that all hard drives stop spinning (Spin Down) before sending the hard drive power-down command to the target backplane, so that the target backplane can perform a power-down operation on each hard drive.
[0081] This ensures that the hard drive completes a normal shutdown process before power is cut off, preventing head damage or data loss due to sudden power failure and protecting the physical safety and data integrity of the hard drive.
[0082] Optionally, the hard disk power-on / off timing control method may further include: performing a third polling process on at least one target backplane through the target motherboard to obtain the power-off state of each target hard disk; and, based on the power-off state, controlling the power-off of the central processing unit through the target motherboard.
[0083] In this embodiment of the disclosure, the electronic device can perform a third polling process on at least one target backplane through the target motherboard to obtain the power-down state of each target hard disk.
[0084] Optionally, the third round of polling can be used to check whether each hard drive has finished powering down.
[0085] Specifically, after the electronic device sends a hard drive power-down command to at least one target backplane through the target motherboard, it performs a third polling process on the at least one target backplane through the target motherboard CPLD, that is, it queries whether each hard drive connected to the at least one target backplane has completed power-down, and obtains the power-down status of each target hard drive.
[0086] Furthermore, electronic devices can control the power-down of the central processing unit via the target motherboard based on the power-down state.
[0087] Specifically, after obtaining the power-down status, the electronic device can control the central processing unit (CPU) to power down through the target motherboard based on the power-down status.
[0088] This ensures that all hard drives are safely shut down before the system is closed, avoiding physical damage caused by hard drives not being completely shut down, achieving complete shutdown sequence protection, and improving system security.
[0089] Optionally, based on the power-down state, the target motherboard performs power-down control on the central processing unit, including: when the power-down state is that all power-down operations are completed, the target motherboard sends a power-down command to the central processing unit.
[0090] In some embodiments of this disclosure, when the power-down state is fully completed, the electronic device can send a power-down command to the central processing unit through the target motherboard.
[0091] Specifically, after obtaining the power-down status of each module, if the power-down status is "all have completed power-down", that is, all hard drives have completed power-down, the electronic device can send a power-down command to the central processing unit (CPU) through the CPLD of the target motherboard, so that the CPU can power down and complete the shutdown action.
[0092] This ensures complete shutdown timing protection, guaranteeing that the system is completely powered off only after the hard drive has completely stopped, thus maximizing the protection of the hard drive and data integrity.
[0093] Figure 2 This is a schematic diagram of an architecture for implementing a hard disk power-on / off timing control method according to an embodiment of this disclosure.
[0094] like Figure 2As shown, the CPLD on the motherboard controls the entire power-on and power-off process, while the CPLD on the backplane is mainly used to implement staggered power-on for hard drives, transmit hard drive power-on status, and hard drive presence status. The motherboard CPLD communicates with multiple backplane CPLDs via the I2C bus, such as issuing staggered power-on time intervals and hard drive power-on / power-off commands via the I2C bus. When the BIOS sends a shutdown request to the motherboard CPLD via the ESP protocol, it determines whether it is a cold reset request. If it is a cold reset request, it sends power-off control to the central processing unit, but does not control the power-off of at least one target backplane hard drive; otherwise, it performs a power-off operation on all backplanes. After receiving the hard drive power-on command from the motherboard CPLD, multiple backplane CPLDs will power on the hard drives according to the staggered power-on start interval, and power off the hard drives after receiving the power-off command from the motherboard.
[0095] Figure 3 This is a flowchart illustrating another hard disk power-on / off timing control method provided in this embodiment.
[0096] like Figure 3 As shown, after detecting the server AC power-on, the motherboard CPLD first polls all its connected backplane CPLDs sequentially via the I2C line to obtain the number of hard drives connected to each backplane. Based on the number of hard drives and the target boot interval, the motherboard CPLD formulates hard drive boot rules. Upon detecting a power-on request from the server, the motherboard CPLD sends a hard drive power-on command to the backplane CPLDs according to the hard drive boot rules. This includes specifying the boot time point and boot time interval for each backplane CPLD, so that each backplane CPLD controls at least one target hard drive connected to it to power on in a time-sharing manner based on the boot time point and boot time interval. Next, the electronic devices poll the registers on the backplane CPLDs via the motherboard CPLD to obtain the power-on status of all hard drives. Once the motherboard CPLD confirms that all hard drives have completed power-on, it will continue to power on the CPU, finally completing the power-on process.
[0097] In response to the server's shutdown request, the motherboard CPLD first uses the ESPI interface to confirm whether the shutdown action was initiated by the BIOS, i.e., whether the shutdown request type is a cold reset request. If it is initiated by the BIOS, it is a cold reset request, and the electronic devices will not power down the hard drives through the motherboard CPLD, only controlling the CPU to power down. If it is not initiated by the BIOS, i.e., a normal shutdown, the motherboard CPLD will wait for a period of time to ensure that the Spin Down action of all hard drives is completed before notifying the backplane CPLD to power down the hard drives. The motherboard CPLD polls the power down information of at least one target backplane. After all hard drives have completed power down, the motherboard CPLD will then power down the CPU and complete the shutdown action.
[0098] Figure 4 This is a schematic diagram of a hard disk power-on / off timing control device provided in an embodiment of this disclosure. Figure 4 As shown, the hard disk power-on / off timing control device 400 includes: The rule-making module 410 is used to formulate corresponding hard disk boot rules for at least one target backplane through the target motherboard after detecting that the server is powered on. Command sending module 420 is used to respond to the server's power-on request by sending a hard drive power-on command to at least one target backplane based on the hard drive boot rules of the target motherboard. The power-down control module 430 is used to control the power-down of the target motherboard in response to the server's shutdown request.
[0099] In one example, the rule-making module 410 may specifically include: The first processing unit is used to perform a first polling process on at least one target backplane through the target motherboard after detecting that the server is powered on, so as to obtain the number of hard drives connected to at least one target backplane.
[0100] The second processing unit is used to formulate corresponding hard drive boot rules for at least one target backplane based on the number of hard drives and the target boot interval through the target motherboard.
[0101] In one example, the hard drive boot rules include: specifying boot time points and boot time intervals for each target backplane, so that each target backplane controls at least one target hard drive connected to it to power on in a time-sharing manner based on the boot time points and boot time intervals.
[0102] In one example, the hard disk power-on / off timing control device 400 includes: The first processing module is used to perform a second polling process on at least one target backplane through the target motherboard to obtain the power-on status of each target hard drive.
[0103] The first control module is used to control the power-on of the central processing unit through the target motherboard based on the power-on status.
[0104] In one example, the power-on control module may specifically include: The first sending unit is used to send a power-on command to the central processing unit through the target motherboard when the power-on state is fully completed.
[0105] In one example, the power-down control module 430 may specifically include: The type determination unit is used to determine the target type of the shutdown request in response to the server's shutdown request.
[0106] The first control unit is used to control the power-down of the target motherboard based on the target type.
[0107] In one example, the type determination unit can be specifically used to determine the target type as a cold reset request if the shutdown request is initiated by the Basic Input / Output System; otherwise, it can determine the target type as a non-cold reset request.
[0108] In one example, the first control unit may be specifically used to control the power-down of the central processing unit via the target motherboard based on the target type being a cold reset request, and to suppress the sending of hard drive power-down commands to at least one target backplane.
[0109] In one example, the first control unit may be specifically used to send a hard drive power-down command to at least one target backplane via the target motherboard after a target time has elapsed, based on a target type non-cold reset request.
[0110] In one example, the hard disk power-on / off timing control device 400 includes: The second processing module is used to perform a third polling process on at least one target backplane through the target motherboard to obtain the power-down status of each target hard drive.
[0111] The second control module is used to control the power-down of the central processing unit via the target motherboard based on the power-down state.
[0112] In one example, the second control module may specifically include: The second sending unit is used to send a power-down command to the central processing unit through the target motherboard when the power-down state is fully completed.
[0113] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.
[0114] For a description of the features in the embodiment corresponding to the hard disk power-on / off timing control device, please refer to the relevant description of the embodiment corresponding to the hard disk power-on / off timing control method, which will not be repeated here.
[0115] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above embodiments of the hard disk power-on / off timing control method.
[0116] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above embodiments of the hard disk power-on / off timing control method when running.
[0117] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.
[0118] The embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above embodiments of the hard disk power-on / off timing control method.
[0119] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above embodiments of the hard disk power-on / off timing control method.
[0120] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0121] The above provides a detailed description of a hard disk power-on / off timing control method and electronic device provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and its core ideas. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.
Claims
1. A method for controlling power-off timing of a hard disk, characterized by, The method comprises: after detecting power-on of the server, formulating corresponding hard disk start-up rules for at least one target backboard by a target mainboard; in response to a start-up request of the server, sending a hard disk power-on command to the at least one target backboard by the target mainboard based on the hard disk start-up rules; in response to a shutdown request of the server, performing power-off control by the target mainboard.
2. The hard disk power-up and power-down timing control method of claim 1, wherein, The step of formulating corresponding hard disk start-up rules for at least one target backboard by a target mainboard after detecting power-on of the server comprises: after detecting power-on of the server, performing first polling processing on the at least one target backboard by the target mainboard to obtain the number of hard disks connected to the at least one target backboard; formulating corresponding hard disk start-up rules for the at least one target backboard by the target mainboard based on the number of hard disks and target start-up interval.
3. The hard disk power-up and power-down timing control method of claim 2, wherein, The hard disk start-up rules comprise: formulating start-up time points and start-up time intervals for each target backboard respectively, so that each target backboard controls at least one target hard disk connected thereto to perform time-sharing power-on based on the start-up time points and the start-up time intervals.
4. The hard disk power-up and power-down timing control method of claim 1, wherein, After the step of sending a hard disk power-on command to the at least one target backboard by the target mainboard based on the hard disk start-up rules, the method further comprises: performing second polling processing on the at least one target backboard by the target mainboard to obtain power-on states of each target hard disk; based on the power-on states, performing power-on control on a central processing unit by the target mainboard.
5. The hard disk power-up and power-down timing control method of claim 1, wherein, The step of performing power-off control by the target mainboard in response to a shutdown request of the server comprises: in response to a shutdown request of the server, judging a target type of the shutdown request; based on the target type, performing power-off control by the target mainboard.
6. The hard disk power-up and power-down timing control method of claim 5, wherein, The step of judging a target type of the shutdown request comprises: if the shutdown request is initiated by a basic input / output system, determining that the target type is a cold reset request; otherwise, determining that the target type is a non-cold reset request.
7. The hard disk power-up and power-down timing control method of claim 6, wherein, The step of performing power-off control by the target mainboard based on the target type comprises: based on the target type being the cold reset request, performing power-off control on a central processing unit by the target mainboard and inhibiting sending a hard disk power-off command to the at least one target backboard.
8. The method of claim 6, wherein, The step of performing power-off control by the target mainboard based on the target type comprises: based on the target type being the non-cold reset request, sending a hard disk power-off command to the at least one target backboard by the target mainboard after a target time elapses.
9. The method of claim 8, wherein, The method further comprises: performing third polling processing on the at least one target backboard by the target mainboard to obtain power-off states of each target hard disk; based on the power-off states, performing power-off control on a central processing unit by the target mainboard.
10. An electronic device, comprising: The method comprises: a memory for storing a computer program; a processor for executing the computer program to implement the steps of the hard disk power-on and power-off timing control method according to any one of claims 1 to 9.
Citation Information
Patent Citations
Hard disk operation control method and device and related component
CN111142644A
Start control system, method and device for server hard disk
CN116088952A