Power management circuit

Abstract

This invention provides a power management circuit that enables simple on / off control of the printer and power management IC. [Solution] The power management circuit according to the embodiment includes a first switch operated by a user, a second switch that generates and stops generating a first voltage depending on whether it is opened or closed, a logic circuit that controls the opening and closing of the second switch, a power management IC that performs sequence control of power on and power off, and a control circuit that controls the output of the logic circuit. When the first switch is operated, the logic circuit closes the second switch, and in response, the power management IC starts sequence control of power on. When the first switch is pressed and held, the power management IC starts sequence control of power off, and the control circuit outputs a control signal to the logic circuit to open the second switch.

Description

Technical Field

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[0001] Embodiments of the present invention relate to a power management circuit mounted in a printer that prints on label paper or receipt paper, for example.

Background Art

[0002] In a printer that prints on label paper or receipt paper, it is necessary to generate a plurality of power supply voltages using a plurality of step-down circuits in an internal circuit.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In order to cope with such a situation, in the future, it is assumed that a printer will be equipped with a power management IC that manages the generation and stop of a plurality of power supply voltages. In that case, in addition to the on / off control of the conventional printer, on / off control of the power management IC is required.

[0005] The problem to be solved by the present invention is to provide a power management circuit that enables easy on / off control of a printer and a power management IC.

Means for Solving the Problems

[0006] The power management circuit according to the embodiment includes a first switch operated by a user, a second switch that generates and stops generating a first voltage depending on whether it is open or closed, a logic circuit that controls the opening and closing of the second switch, a power management IC that performs sequence control of power on and power off, and a control circuit that controls the output of the logic circuit. When the first switch is operated, the logic circuit closes the second switch, and in response, the power management IC starts sequence control of power on. When the first switch is pressed and held, the power management IC starts sequence control of power off, and the control circuit outputs a control signal to the logic circuit to open the second switch. [Brief explanation of the drawing]

[0007] [Figure 1] Figure 1 is a block diagram showing an example of the configuration of a power management circuit according to an embodiment. [Figure 2] Figure 2 is a flowchart showing the sequence control flow for power on and power off performed by the power management circuit according to the embodiment. [Figure 3] Figure 3 is a time chart of the sequence control of power start and power stop performed by the power management circuit according to the embodiment. [Modes for carrying out the invention]

[0008] The power management circuit according to this embodiment is installed in a printer that prints on label paper or receipt paper. In a printer equipped with the power management circuit according to this embodiment, a roll of label paper or receipt paper wound in a roll shape is stored inside the casing, and the printer prints characters, codes, etc., on the label paper or receipt paper that is pulled out from the roll and transported, and then cuts it into labels or receipts.

[0009] Furthermore, the printer includes a power supply circuit that converts AC power supplied from the commercial power source into DC power and supplies the converted DC power to the power management circuit according to this embodiment. Various devices such as scanners and card readers are connected to the printer.

[0010] (Example of power management circuit configuration) Referring to Figure 1, the power management circuit 21 according to the embodiment will be described. Figure 1 is a block diagram showing an example of the configuration of the power management circuit 21 according to the embodiment.

[0011] The power management circuit 21 manages the power supply to each part of the printer 10. For example, the power management circuit 21 receives DC power from the power supply circuit 20 and generates and stops power supply voltages at voltage levels suitable for the internal operation of the printer 10, as well as power supply voltages at voltage levels suitable for various devices connected to the printer 10. For convenience, below, the generation of power supply voltages will be referred to as power start, and the stopping of power supply voltage generation will be referred to as power stop. The power management circuit 21 also performs sequence control of the generation and stopping of power supply voltages (power start and power stop) for each block of the internal circuitry of the printer 10.

[0012] The power management circuit 21 includes a feed switch 61, a load switch 62, a regulator 63, a D-type flip-flop 64, a DC-DC converter 65, a power management IC 66 (PMIC), and a CPU 67.

[0013] The feed switch 61 is operated by the user. The feed switch 61 is a switch that drives a feed motor for transporting label paper or receipt paper. The feed switch 61 generates a binary switch signal of "H" and "L" depending on the switch operation. The switch signal generated by the feed switch 61 is input to the D-type flip-flop 64, the power management IC 66, and the CPU 67.

[0014] The feed switch 61 is a push-button switch and has a pressable button. For example, the feed switch 61 closes when the button is pressed and opens when the button is released. The feed switch 61 generates "L" while the button is pressed and generates "H" while the button is released.

[0015] Hereinafter, pressing and releasing the button on the feed switch 61 will be simply referred to as pressing and releasing, respectively. A switch operation includes pressing and subsequent releasing. A switch operation also includes a short press, which includes pressing for less than a predetermined time and subsequent releasing, and a long press, which includes pressing for a predetermined time or longer and subsequent releasing. The terms "less than" and "greater than" are not strictly defined and may be "less than or equal to" and "greater than."

[0016] The load switch 62 receives a high voltage of 24V (24_IN) from the power supply circuit 20. That is, the input terminal of the load switch 62 is connected to the source of the high voltage (24_IN) (power supply circuit 20). Depending on whether the load switch 62 is open or closed, it generates and stops generating the high voltage (V24V), which is the power supply voltage used inside the printer 10, on the output terminal side. When the load switch 62 is in the closed state, it generates the high voltage (V24V) on the output terminal side, and when it is in the open state, it stops generating the high voltage (V24V) on the output terminal side.

[0017] The opening and closing of the load switch 62 is controlled by a binary signal control generated by the D-type flip-flop 64. For example, the load switch 62 closes when it receives an "H" control signal from the D-type flip-flop 64 and opens when it receives an "L" control signal from the D-type flip-flop 64. In other words, the load switch 62 is in a closed state while receiving an "H" control signal and in an open state while receiving an "L" control signal.

[0018] The regulator 63 receives a supply of a high voltage of 24V (24_IN) and always generates a voltage of 5V. The generated voltage of the regulator 63 is used, among other things, as a standby voltage (5V_STBY), which is the voltage necessary to maintain internal circuits and functions when the printer 10 is in the standby mode or the sleep mode. The generated voltage (output signal) of the regulator 63 is also input to the D-type flip-flop 64 as the "H" of a binary signal.

[0019] The D-type flip-flop 64 is a logic circuit that holds 1-bit of information. The 1-bit of information is a control signal of a binary signal that controls the opening and closing of the load switch 62.

[0020] The D-type flip-flop 64 has three input terminals, namely a D terminal, a CLK terminal, and a clear (CLR / ) terminal, and one output terminal, namely a Q terminal.

[0021] The D terminal of the D-type flip-flop 64 receives the input of the generated voltage (output signal) of the regulator 63. The input of the D terminal is always the "H" of a binary signal.

[0022] The CLK terminal of the D-type flip-flop 64 receives the input of the switch signal of the feed switch 61. As described above, the feed switch 61 generates "L" while it is being pressed and generates "H" while it is not being pressed. Specifically, the CLK terminal is connected to the feed switch 61 and is also connected to the output terminal of the regulator 63 via a resistor. As a result, the input of the CLK terminal switches from "H" to "L" when the feed switch 61 is pressed and switches from "L" to "H" when the feed switch 61 is released from being pressed.

[0023] The clear terminal of the D-type flip-flop 64 receives the input of a clear signal from the CPU 67. In the embodiment, as an example, the clear signal temporarily becomes the "L" of a binary signal when the supply of the power voltage from the power management circuit 21 to each part of the printer 10 is stopped, and is the "H" of a binary signal otherwise.

[0024] The Q terminal of the D-type flip-flop 64 outputs a control signal for opening and closing the load switch 62. The control signal for opening and closing the load switch 62 is either a binary signal, "H" or "L".

[0025] The D-type flip-flop 64 controls the opening and closing of the load switch 62. Therefore, the D-type flip-flop 64 outputs a control signal for opening and closing the load switch 62 from its Q terminal to the load switch 62. Initially, the D-type flip-flop 64 outputs "L" from its Q terminal. When the feed switch 61 is switched from this state, the D-type flip-flop 64 switches the output of its Q terminal from "L" to "H". Switch operation includes pressing and subsequent release. That is, when the feed switch 61 is pressed and then released, the D-type flip-flop 64 switches the output of its Q terminal from "L" to "H". More specifically, the D-type flip-flop 64 maintains the "H" input at the D terminal and continues to output "H" from its Q terminal at the timing when the input to the CLK terminal switches from "L" to "H".

[0026] Initially, the D-type flip-flop 64 receives a "H" input to the clear terminal. When the D-type flip-flop 64 is outputting "H" from the Q terminal and receives a "L" input to the clear terminal, it switches the output of the Q terminal from "H" to "L". The D-type flip-flop 64 maintains the output of the Q terminal as "L" as long as a "L" input continues to be received to the clear terminal. Subsequently, when the D-type flip-flop 64 receives a "H" input to the clear terminal, it operates according to the input to the CLK terminal.

[0027] The DC-DC converter 65 receives a high voltage (V24V) supplied by the load switch 62 and generates a voltage of 5V. The voltage generated by the DC-DC converter 65 is input to the power management IC 66. The voltage generated by the DC-DC converter 65 may also be used as the power supply voltage (V5V) for internal circuit blocks that do not require sequence control.

[0028] The power management IC66 is an integrated circuit that performs sequence control for generating and stopping the power supply voltage. The power management IC66 has two input terminals: a Vin terminal and a power-on key (PonKey) terminal.

[0029] The Vin terminal of the power management IC 66 receives the voltage generated by the DC-DC converter 65. The input voltage (Vin) of the power management IC 66 is the operating voltage that powers the power management IC 66 to work.

[0030] The power-on key terminal of the power management IC 66 receives the switch signal input from the feed switch 61. As mentioned above, the feed switch 61 generates "L" when pressed and "H" when released.

[0031] The power management IC 66 is controlled to start by the switch signal of the feed switch 61, which is input to the power-on key terminal. When the power-on key terminal receives a "H" input, the power management IC 66 enters the power-on state.

[0032] The power management IC 66 can operate in two modes: auto turn-on mode and power key turn-on mode. In this embodiment, the power management IC 66 operates in auto turn-on mode.

[0033] In auto turn-on mode, the power management IC 66 generates and stops the generation of multiple low voltages (Vout1, Vout2, ..., VoutN) in response to inputs from the Vin terminal and the power-on key terminal. The power management IC 66 also performs sequence control of the generation and stopping of multiple low voltages (Vout1, Vout2, ..., VoutN). Each of the multiple low voltages (Vout1, Vout2, ..., VoutN) is a power supply voltage used by various devices connected to the printer 10.

[0034] In other words, the power management IC66 controls the sequence of power on and power off at multiple low-voltage levels (Vout1, Vout2, ..., VoutN) in response to inputs from the Vin terminal and the power-on key terminal.

[0035] For example, when the power management IC66 is in the power-on state with a "H" input to the power-on key terminal, and the Vin terminal receives an operating voltage (Vin), it starts the power-on sequence control and outputs multiple low voltages (Vout1, Vout2, ..., VoutN) at their respective timings. In other words, the power management IC66 switches the output of multiple low voltages (Vout1, Vout2, ..., VoutN) from "L" to "H" at their respective timings.

[0036] Subsequently, when the power management IC66 receives a "L" input from the power-on key terminal while outputting low voltages (Vout1, Vout2, ..., VoutN), it starts the power-off sequence control, stopping the output of multiple low voltages (Vout1, Vout2, ..., VoutN) at their respective timings. In other words, the power management IC66 switches the output of multiple low voltages (Vout1, Vout2, ..., VoutN) from "H" to "L" at their respective timings.

[0037] In the power-up sequence control, the power management IC66 starts outputting multiple low voltages (Vout1, Vout2, ..., VoutN) in a predetermined order. Conversely, in the power-up sequence control, the power management IC66 stops outputting multiple low voltages (Vout1, Vout2, ..., VoutN) in the reverse order of startup.

[0038] When the power management IC 66 is outputting multiple low voltages (Vout1, Vout2, ..., VoutN), and the feed switch 61 is pressed and held, it starts a power shutdown sequence control. Pressing and holding includes holding the switch for a predetermined time or longer, followed by releasing the switch. Here, pressing and holding the feed switch 61 is assumed to have occurred by holding the switch for a predetermined time or longer, without waiting for the switch to be released.

[0039] Therefore, when the Vin terminal of the power management IC 66 receives an operating voltage input and outputs a low voltage (Vout1, Vout2, ..., VoutN), and the power-on key terminal receives a "L" input, the IC 66 starts measuring the duration of the "L" input to the power-on key terminal, that is, the duration of the press on the feed switch 61.

[0040] When the duration of pressing the feed switch 61 reaches a predetermined time, the power management IC 66 determines that a long press of the feed switch 61 has been performed, and starts the power shutdown sequence control, stopping the output of low voltages (Vout1, Vout2, ..., VoutN) at their respective timings. Once the power shutdown sequence control is complete, the power management IC 66 stops operating.

[0041] If the duration of pressing the feed switch 61 does not reach the predetermined time, the power management IC 66 determines that the feed switch 61 was not pressed down before the predetermined time was reached, and continues to output low voltages (Vout1, Vout2, ..., VoutN).

[0042] CPU67 is a control circuit that controls the output of the D-type flip-flop 64. CPU67 has an input port A (PORT_A) and an output port B (PORT_B).

[0043] The A port of CPU 67 receives the switch signal input from the feed switch 61. As mentioned above, the feed switch 61 generates "L" while pressed and "H" while released.

[0044] The B port of CPU67 outputs a clear signal to the clear terminal of the D-type flip-flop 64. As mentioned above, the clear signal is temporarily a binary signal "L" when the power supply voltage from the power management circuit 21 to each part of the printer 10 is stopped, and is a binary signal "H" at all other times.

[0045] The CPU 67 outputs a clear signal from port B to the clear terminal of the D-type flip-flop 64 in response to the switch signal input from the feed switch 61 to port A. Initially, the CPU 67 outputs "H".

[0046] When the feed switch 61 is pressed and held, the CPU 67 temporarily switches the clear signal from "H" to "L", and then switches the clear signal back from "L" to "H".

[0047] In one example, the CPU 67 outputs a clear signal in response to the switch signal input from the feed switch 61. In the initial state, the input to port A of the CPU 67 is a "H" switch signal, and the CPU 67 outputs a "H" clear signal.

[0048] When the feed switch 61 is pressed and the switch signal at the input of CPU 67's A port switches from "L" to "H", CPU 67 begins measuring the duration of the press on the feed switch 61.

[0049] When the feed switch 61 is released and the switch signal at the A port input of the CPU 67 switches from "H" to "L", the CPU 67 terminates the measurement of the duration of the feed switch 61's press.

[0050] Next, the CPU 67 compares the duration of pressing the feed switch 61 with a predetermined time. If the duration of pressing the feed switch 61 is equal to or greater than the predetermined time, the CPU 67 temporarily outputs a "L" clear signal, and then outputs a "H" clear signal again. Conversely, if the duration of pressing the feed switch 61 is less than the predetermined time, the CPU 67 continues to output a "H" clear signal.

[0051] In another example, the CPU 67 temporarily switches the clear signal from "H" to "L" after the power-off sequence control by the power management IC 66, which was initiated by pressing and holding the feed switch 61, is complete, and then switches the clear signal back from "L" to "H".

[0052] In this case, if the duration of pressing the feed switch 61 is greater than or equal to the time required for power-off sequence control added to a predetermined time, the CPU 67 temporarily outputs a "L" clear signal. If the duration of pressing the feed switch 61 is less than the time required for power-off sequence control added to a predetermined time, the CPU 67 temporarily outputs a "L" clear signal after the remaining time has elapsed.

[0053] Alternatively, the power management IC 66 notifies the CPU 67 that the power shutdown sequence control is complete before stopping operation. When the CPU 67 receives notification from the power management IC 66 that the power shutdown sequence control is complete, it temporarily outputs a "L" clear signal.

[0054] (Example of power management circuit operation) Next, an example of the operation of the power management circuit 21 according to the embodiment will be described with reference to Figures 2 and 3. Figure 2 is a flowchart showing the sequence control flow for power on and power off performed by the power management circuit 21 according to the embodiment. Figure 3 is a time chart of the sequence control for power on and power off performed by the power management circuit 21 according to the embodiment.

[0055] The operation of the power management circuit 21, described below, covers the period from the state of waiting for the main power of the printer 10 to be turned on until the main power is turned off.

[0056] When the printer 10 is waiting to be powered on, the load switch 62 and regulator 63 of the power management circuit 21 are supplied with a high voltage of 24V (24_IN). The regulator 63 generates a voltage of 5V. The voltage generated by the regulator 63 is used, in part, as the standby voltage (5V_STBY) for the printer 10. The voltage generated by the regulator 63 (output signal) is also input to the D terminal of the D-type flip-flop 64, and also to the CLK terminal of the D-type flip-flop 64 via a resistor.

[0057] For example, the standby voltage (5V_STBY) generated by the regulator 63 is supplied to the main control unit 19. The standby voltage (5V_STBY) is also supplied to the D-type flip-flop 64, DC-DC converter 65, power management IC 66, CPU 67, etc.

[0058] Furthermore, when the printer 10 is waiting to be powered on for the first time, that is, when the printer 10's power cable is plugged into the outlet for the first time, the Q output of the D-type flip-flop 64 is set to "L" during the initialization process. For example, the CPU 67 temporarily outputs a "L" clear signal from port B to the clear terminal of the D-type flip-flop 64. The D-type flip-flop 64 receives the clear signal input to its clear terminal and continuously outputs "L" from its Q terminal.

[0059] Furthermore, as will be explained later, even when the main power is cut off, the CPU 67 temporarily outputs a "L" clear signal to the D-type flip-flop 64, and the D-type flip-flop 64, upon receiving the clear signal, continuously outputs "L" from its Q terminal.

[0060] In ACT11, the power management circuit 21 is in a state of waiting for the main power of the printer 10 to be turned on, and is waiting for the feed switch 61 to be switched on to turn on the main power. The switch operation includes pressing the feed switch 61 and then releasing the feed switch 61. The switch operation may be a short press or a long press.

[0061] Until the feed switch 61 is switched (while ACT11 is set to No), the power management circuit 21 continues to wait for the feed switch 61 to be switched.

[0062] When the feed switch 61 is switched (when it becomes Yes in ACT11), the power management IC 66 receives a "H" switch signal input to the power-on key terminal when the feed switch 61 is released, and enters the power-on state.

[0063] Furthermore, when the feed switch 61 is released from its switch operation, the D-type flip-flop 64 receives an "L" switch signal input to its CLK terminal and switches the control signal of the load switch 62, which is the output of its Q terminal, from "L" to "H".

[0064] The load switch 62 closes upon receiving a "H" control signal from the D-type flip-flop 64, generating a high voltage (V24V) on the output terminal side.

[0065] The DC-DC converter 65 receives a high voltage (V24V) supplied by the load switch 62 and generates a voltage of 5V. The voltage generated by the DC-DC converter 65 is input to the Vin terminal of the power management IC 66 as the operating voltage.

[0066] In ACT12, the power management IC66 receives an operating voltage (Vin) input to the Vin terminal and starts the power-up sequence control, outputting multiple low voltages (Vout1, Vout2, ..., VoutN) at their respective timings. Specifically, as shown in Figure 3, the power management IC66 switches the output of the multiple low voltages (Vout1, Vout2, ..., VoutN) from "L" to "H" at their respective timings.

[0067] Subsequently, the power management circuit 21 enters a state of waiting for the main power of the printer 10 to be turned off, and then waits for the feed switch 61 to be pressed and held down in order to turn off the main power. Pressing and holding down includes holding down the switch for a predetermined time or longer. In ACT 13, the power management circuit 21 waits for the feed switch 61 to be pressed in order to turn on the main power. Specifically, the power management IC 66 waits for the input of a "L" switch signal to the power-on key terminal.

[0068] Until the feed switch 61 is pressed (while the state is No in ACT13), the power management circuit 21 continues to wait for the feed switch 61 to be pressed.

[0069] When the feed switch 61 is pressed (when it becomes Yes in ACT13), in ACT14, when the power management IC 66 receives an "L" switch signal input to the power-on key terminal, it starts measuring the duration of the "L" input to the power-on key terminal, i.e., the duration of the feed switch 61 being pressed. Also, when the CPU 67 receives an "L" switch signal input to port A, it starts measuring the duration of the "L" input to port A, i.e., the duration of the feed switch 61 being pressed.

[0070] Next, in ACT15, the power management IC66 determines whether the duration of pressing the feed switch 61 has reached a predetermined time, or in other words, whether it has exceeded a predetermined time.

[0071] If the duration of pressing the feed switch 61 does not reach the predetermined time (if the result is No in ACT15), it means that the feed switch 61 was released before the predetermined time was reached. The power management IC 66 determines that a long press of the feed switch 61 was not performed, terminates the measurement of the duration of pressing the feed switch 61, returns to the processing of ACT13, and waits again for the feed switch 61 to be pressed to turn on the main power, i.e., for the input of a "L" switch signal to the power-on key terminal. The CPU 67 also terminates the measurement of the duration of pressing the feed switch 61.

[0072] If the duration of pressing the feed switch 61 reaches a predetermined time (if the response in ACT15 is Yes), the power management IC 66 determines that a long press of the feed switch 61 has been performed, and in ACT16, it starts sequence control for power shutdown, shutting off multiple low voltages (Vout1, Vout2, ..., VoutN) at their respective timings. Specifically, as shown in Figure 3, the power management IC 66 switches the outputs of the multiple low voltages (Vout1, Vout2, ..., VoutN) from "H" to "L" in the reverse order of startup.

[0073] When the feed switch 61 is released and the switch signal at the input of CPU 67's A port switches from "H" to "L", CPU 67 terminates the measurement of the duration of the feed switch 61's press. If the duration of the feed switch 61's press is longer than a predetermined time (as shown in the flowchart in Figure 2), in ACT 17, CPU 67 temporarily outputs a "L" clear signal to the D-type flip-flop 64 to clear the D-type flip-flop 64. Specifically, as shown in Figure 3, CPU 67 temporarily switches the clear signal output from port B to the clear terminal of the D-type flip-flop 64 from "H" to "L", and then switches it back to "H".

[0074] For example, CPU 67 temporarily outputs a clear signal after the power shutdown sequence control by power management IC 66 is completed. That is, CPU 67 temporarily outputs a clear signal "L" after a predetermined time has elapsed from the start of input of the "L" switch signal plus the time required for the power shutdown sequence control.

[0075] In other words, if the duration of pressing the feed switch 61 is greater than or equal to the time required for power-off sequence control added to a predetermined time, the CPU 67 temporarily outputs a "L" clear signal. If the duration of pressing the feed switch 61 is less than the time required for power-off sequence control added to a predetermined time, the CPU 67 temporarily outputs a "L" clear signal after the remaining time has elapsed.

[0076] Instead of the CPU 67 clearing the D-type flip-flop 64 based on the measurement of the duration of the press on the feed switch 61, the power management IC 66 may notify the CPU 67 of the completion of the power-off sequence control when the power-off sequence control is finished, and the CPU 67, upon receiving notification of the completion of the power-off sequence control, may temporarily output a "L" clear signal to clear the D-type flip-flop 64.

[0077] The D-type flip-flop 64 receives a "L" clear signal at its clear terminal and switches the control signal of the load switch 62, which is the output of the Q terminal, from "H" to "L," as shown in Figure 3.

[0078] The load switch 62 opens upon receiving an "L" control signal from the D-type flip-flop 64, stopping the generation of the high voltage (V24V) at the output terminal. Specifically, as shown in Figure 3, the voltage (V24V) at the output terminal of the load switch 62 switches from "H" to "L".

[0079] Upon receiving the cessation of the high voltage (V24V) supply from the load switch 62, the DC-DC converter 65 stops generating a 5V voltage (V5V). Specifically, as shown in Figure 3, the output voltage (V5V) of the DC-DC converter 65 switches from "H" to "L".

[0080] (effect) As can be seen from the above description, in the power management circuit 21 according to the embodiment, when the feed switch 61 is switched, the D-type flip-flop 64 closes the load switch 62, and in response, the power management IC 66 starts sequence control for power on. When the feed switch 61 is pressed and held, the power management IC 66 starts sequence control for power off, and the CPU 67 causes the D-type flip-flop 64 to output a control signal to open the load switch 62. With the power management circuit 21, the power management IC 66 can be controlled on and off using the feed switch 61, which has been used to control the on and off of the printer 10 until now. In other words, a power management circuit 21 is provided that makes it possible to easily control the on and off of the printer 10 and the power management IC 66.

[0081] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be carried out in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims of the invention and its equivalents. [Explanation of symbols]

[0082] 21...Power management circuit, 61...Feed switch, 62...Load switch, 63...Regulator, 64...Type D flip-flop, 65...DC-DC converter, 66...Power management IC, 67...CPU.

Claims

1. This is a power management circuit for a printer, A first switch operated by the user, A second switch that generates and stops the generation of a first voltage depending on whether it is open or closed, A logic circuit that controls the opening and closing of the second switch, A power management IC that performs sequence control for power on and power off, It has a control circuit that controls the output of the logic circuit, When the first switch is operated, the logic circuit closes the second switch, and in response, the power management IC starts the power-up sequence control. When the first switch is pressed and held, the power management IC starts a power shutdown sequence control, and the control circuit causes the logic circuit to output a control signal to open the second switch. Power management circuit.

2. The system further includes a DC-DC converter that steps down the first voltage generated by the second switch to generate a second voltage. The power management IC is activated when the first switch is operated and starts power-on sequence control upon receiving a second voltage input. The power management circuit according to claim 1.

3. When the first switch is pressed and held, the control circuit, after the sequence control of power shutdown by the power management IC is completed, causes the logic circuit to output a control signal that opens the second switch. The power management circuit according to claim 1.

4. The first switch generates a switch signal of "L" while it is pressed and "H" while it is released. The logic circuit is a D-type flip-flop and has a D terminal that always receives an "H" input, a CLK terminal that receives a switch signal input, a clear terminal that receives a clear signal input from the control circuit, and a Q terminal that outputs a control signal for the second switch. The logic circuit holds the "H" input of the D terminal and outputs "H" from the Q terminal when the input of the CLK terminal switches from "L" to "H", and outputs "L" from the Q terminal while the clear terminal is receiving an "L" input. The second switch is closed when it receives an "H" control signal, and open when it receives an "L" control signal. The power management IC has a Vin terminal that receives an operating voltage input and a power-on key terminal that receives a switch signal input. The power management IC enters a startup state when the power-on key terminal receives a "H" input, and starts power-on sequence control when the Vin terminal receives an operating voltage input. The power management circuit according to claim 1.

5. When the power-on key terminal receives a "L" switch signal, the power management IC starts measuring the duration of the "L" switch signal input, and when the duration reaches a predetermined time, it starts sequence control for power-off. When the control circuit receives an "L" switch signal, it starts measuring the duration of the "L" switch signal input, and when it receives an "H" switch signal input, it stops measuring the duration, and if the duration is longer than a predetermined time, it temporarily outputs an "L" clear signal to the clear terminal of the logic circuit. The logic circuit, upon receiving a "L" clear signal input, outputs a "L" control signal from the Q terminal. The second switch opens upon receiving an "L" control signal, thereby stopping the generation of the first voltage. The power management circuit according to claim 4.

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