Self-adjusting, high-speed and high-reliability data transmission method

Abstract

The invention relates to the field of data transmission, in particular to the field of missile-borne aircraft data transmission. A self-adjusting, high-speed and high-reliability data transmission method comprises the steps that a missile-borne collection device is connected with a missile-borne recorder in a wired mode, when the missile-borne collection device sends data, the data is packaged and framed and then sent to the missile-borne recorder for storage through an Ausolar protocol, after an aircraft finishes flying, a data recovery device obtains the data stored in the missile-borne recorder, and the data recovery device recovers the data to the missile-borne recorder. The ground computer is used for analyzing and processing the stored data to obtain correct and effective data for a user to check flight parameter data of various aircrafts, and the missile-borne acquisition device sends the data to the missile-borne recorder in real time for storage so as to ensure that when an abnormal condition occurs, the missile-borne recorder can record the flight parameters of the aircrafts. And enough effective data close to the fault moment can provide a basis for post fault analysis.

Description

Technical Field

[0001] This invention relates to the field of data transmission, and particularly to the field of data transmission for missile-borne aircraft. Background Technology

[0002] Aircraft-borne vehicles (AVVs) typically refer to aircraft launched by missiles or rockets, released at specific stages, and tasked with missions. Their design balances high speed, maneuverability, and multi-mission capability. With continuous technological advancements, the demands for the data types and accuracy of flight parameters from AVVs are constantly expanding. Low-speed data transmission lines are becoming insufficient, thus placing higher demands on the data transmission rate between AVV acquisition devices and AVV recorders. Data transmission between AVV acquisition devices and AVV recorders often uses differential serial links. However, with increased transmission rates, problems such as limited transmission distance, signal jitter, transmission line reflections or impedance discontinuities, noise, and electromagnetic interference become increasingly apparent. This leads to increased data error rates and decreased link reliability while achieving high-speed transmission. The increased transmission error rate prevents the effective application of high-speed transmission links, limiting the acquisition to low-speed signal transmission and hindering the acquisition of more effective and valuable data. Summary of the Invention

[0003] The technical problem to be solved by this invention is: how to provide a self-adjusting method for data transmission between an airborne acquisition device and an airborne recorder, which is suitable for high-speed and high-reliability data transmission.

[0004] The technical solution adopted in this invention is: a self-adjusting, high-speed, and highly reliable data transmission method. During aircraft flight, the onboard acquisition device and the onboard recorder are connected via a wired connection. When transmitting data, the onboard acquisition device packages and frames the data and sends it to the onboard recorder for storage via the Auroar protocol. After the aircraft finishes flight, the data retrieval device retrieves the data stored in the onboard recorder and uses a ground computer to analyze and process the stored data to obtain correct and valid data for users to view flight parameter data for various aircraft. The onboard acquisition device sends data to the onboard recorder for storage in real time to ensure that sufficient valid data close to the moment of failure is available in case of abnormal conditions. This provides a basis for post-fault analysis. When the missile-borne data acquisition device sends data, it packages and frames the data to be sent to the missile-borne recorder for storage, and then sends the packaged data packets to the missile-borne recorder for storage. After each data packet is sent, the missile-borne data acquisition device waits for a period of time. If the missile-borne data acquisition device receives the verification result within time T1, and the missile-borne data acquisition device still has the ability to buffer input data, it judges the verification result. If it is an acknowledgment frame, it continues to send the next data packet. If it is a retransmission frame or an abnormal feedback frame and the number of retransmissions does not exceed 3, it retransmits the previous data packet. If it is a retransmission frame or an abnormal feedback frame and the number of retransmissions exceeds 3, it immediately sends the next data packet. If a verification result is received within time T1, but the onboard data acquisition device lacks the ability to buffer input data, the next data packet is immediately sent. If no verification result is received within time T1, and the onboard data acquisition device still has the ability to buffer input data, the previous data packet is sent again. When the onboard data acquisition device no longer has the ability to buffer input data, the next data packet is sent again. When the onboard recorder receives a data packet from the onboard data acquisition device, it first searches for the frame header. After finding the frame header, it begins receiving the data of the data packet within time T2 and writes the data of the data packet into the FIFO of the onboard recorder. At the same time, the verification calculation is started. When the data packet is received... After completion, the system checks if the verification result is correct. If the verification is correct, an acknowledgment frame is sent back to the onboard acquisition device; otherwise, a retransmission frame is sent back to the onboard acquisition device. If the data packet cannot be fully received within time T2, the search for the frame header is restarted, and data reception resumes. The onboard recorder writes all received data into the Flash chip for storage. T1 is the timeout period set by the onboard acquisition device, and T2 is the timeout period set by the onboard recorder. The data buffer status is monitored in real time by the half-full flag in the FIFO buffer of the onboard acquisition device. If the half-full flag is 0, the device still has data buffering capability; if the half-full flag is 1, the device no longer has data buffering capability.

[0005] When the onboard data acquisition device sends data packets to the onboard recorder, it reads the packetized and framed data packets from its FIFO buffer and sends them to the recorder. Simultaneously, it stores the data packets in RAM. After transmission, a timeout timer is started. If the acquisition device receives an acknowledgment frame within time T1 and the half-full flag in its FIFO buffer is 0, it reads the next packetized and framed data packet from its FIFO buffer and sends it to the recorder. Simultaneously, it stores the next data packet in RAM (replacing the previous one). If the acquisition device receives a retransmission frame or an error feedback frame within time T1 and the half-full flag in its FIFO buffer is 0, if the retransmission count is less than 3, the count is incremented by 1, and the data packets stored in RAM are sent to the recorder again. If the retransmission count is greater than or equal to 3, retransmission is abandoned, and the acquisition device reads the next packetized and framed data packet from its FIFO buffer. The next data packet is sent to the airborne recorder. The airborne acquisition device simultaneously sends the next data packet and stores it in RAM (replacing the previous data packet). The frame count of the next data packet stored in RAM is one more than the frame count of the previous data packet. If, at any time within time T1, the half-full flag in the acquisition device's FIFO buffer is 1, the airborne acquisition device reads the next packet from the FIFO buffer and sends it to the airborne recorder. Simultaneously, the airborne acquisition device stores the next data packet in RAM (replacing the previous data packet). If the airborne acquisition device does not receive a verification result within time T1, and the half-full flag in its FIFO buffer is 0, it continues sending the previous data packet stored in RAM. When the half-full flag in the airborne acquisition device's FIFO buffer is 1, the airborne acquisition device reads the next packet from the FIFO buffer and sends it to the airborne recorder. Simultaneously, the airborne acquisition device stores the next data packet in RAM (replacing the previous data packet).

[0006] Each data packet consists of a frame header, frame count, data, frame trailer, and CRC checksum. Different data packets are distinguished by the frame count.

[0007] The ground computer receives data from the missile recorder, which includes error frame data packets and correct frame data packets. Each correct frame data packet also includes a frame header, frame count, frame tail, and CRC checksum. The ground computer first filters out the correct data frame packets through data preprocessing, and then removes the frame header, frame count, frame tail, and CRC checksum, leaving only the data in the data packet.

[0008] The beneficial effects of this invention are: when the transmission link is subjected to occasional interference, it can retransmit the occasional erroneous data with almost no reduction in link bandwidth, ensuring the reliability of data transmission. When there are certain bit errors in the transmission link, the data retransmission mechanism is dynamically adjusted to ensure no data loss, transmitting as much error-free and correct data as possible to the receiving end, minimizing the transmission error rate of the line. When retransmissions due to transmission link errors are within the bandwidth limit, reliable data transmission can be guaranteed. Furthermore, the transmission distance is extended through software protocols beyond the physical transmission distance limits of the line. Attached Figure Description

[0009] Figure 1 This is a schematic diagram showing the relationship between the missile-borne acquisition device and the missile-borne recorder of the present invention; Figure 2 This is a schematic diagram of the data transmission process of the missile-borne acquisition device according to an embodiment of the present invention; Figure 3 This is a schematic diagram of the data receiving process of the missile-borne recorder according to an embodiment of the present invention; Figure 4 This is the frame format of the data packets sent by the missile-borne acquisition device in this embodiment of the invention; Figure 5 This is the feedback frame format of the missile-borne recorder in this embodiment of the invention; Figure 6 This is a schematic diagram of ground computing software data processing in an embodiment of the present invention. Detailed Implementation

[0010] A self-adjusting, high-speed, and highly reliable data transmission method is disclosed. During aircraft flight, the onboard data acquisition device and the onboard recorder are connected via a wired connection (not an Ethernet-like connection, but a direct point-to-point connection). When transmitting data, the onboard data acquisition device packages and frames the data and sends it to the onboard recorder for storage via the Auroar protocol. After the aircraft finishes flight, a data retrieval device retrieves the data stored in the onboard recorder and uses a ground computer to analyze and process the stored data to obtain correct and valid data for users to view flight parameter data for various aircraft. The onboard data acquisition device transmits data to the onboard recorder in real time for storage to ensure that sufficient valid data close to the moment of failure is available to provide a basis for post-failure analysis in the event of an anomaly. The connection between the onboard data acquisition device and the onboard recorder in this invention is a direct wired connection, not a protocol-based connection. The Auroar protocol in this invention refers to the subsequent transmission protocol, namely the Dynamic Self-Adjusting Error Retransmission Auroar protocol, and does not include the connection protocol content.

[0011] The overall connection relationship is as follows Figure 1As shown, the airborne data acquisition device collects a large amount of various flight parameter data through various sensors such as gyroscopes, accelerometers, magnetometers, barometers, and GPS. This collected data is then packaged, framed, and transmitted to the airborne recorder for storage via the Auroar protocol with dynamic self-adjusting error retransmission. A ground computer analyzes and processes the data stored in the airborne recorder to obtain accurate and valid data for users to view. The airborne data acquisition device must forward data to the airborne recorder in real time to ensure sufficient valid data close to the moment of failure in case of anomalies, providing a basis for post-fault analysis. Therefore, the transmission line between the airborne data acquisition device and the airborne recorder must have sufficient bandwidth and high reliability to ensure the effectiveness of data transmission and storage, and strive to acquire data (including abnormal data, which can sometimes provide some basis for fault analysis) under various complex environments. The hardware involved in this invention belongs to existing technology and will not be described further.

[0012] When the missile-borne data acquisition device transmits data, such as Figure 1 As shown, the onboard acquisition device packages and frames the data to be sent to the onboard recorder for storage. The frame format of the data packets is as follows: Figure 4 As shown, each data packet includes a frame header, frame count, data, frame trailer, and CRC checksum. Data packets are distinguished by their frame counts, with each different data packet having a different frame count. The CRC checksum uses existing technology, which will not be elaborated upon in this invention. The data packet size of this invention is 8KByte.

[0013] The packaged data packet is sent to the onboard recorder for storage. The onboard acquisition device waits for a period of time after each data packet is sent. like Figure 2As shown, when the missile-borne acquisition device sends a data packet to the missile-borne recorder, it reads the packet, framed, and packed from its FIFO buffer and sends it to the recorder. First, it needs to determine if the FIFO data in the acquisition device's buffer is greater than 8KB. If it's less than 8KB, it means the FIFO data is insufficient for a complete data packet, and it needs to wait. Even if it's 8KB, it doesn't guarantee a complete data packet; it's best to wait until it exceeds 8KB. When the FIFO data in the acquisition device's buffer is greater than 8KB, it means there is a complete, packed data packet available for transmission, and subsequent transmission can proceed. This embodiment uses a data packet with frame count n for illustration; the transmission of other data packets is similar. The acquisition device reads 8KB of data from its FIFO buffer (which constitutes exactly one data packet) and sends the current nth frame (the data packet with frame count n) to the Auroarip core (i.e., the recorder). Simultaneously, the acquisition device stores the data packet in RAM. Note that in this invention, while data is being read from the FIFO buffer of the onboard acquisition device, the read data is also directly deleted from the FIFO buffer to make room for subsequent data packets. The storage of subsequent data packets in the FIFO buffer is a continuous process. After the data packet is sent, the timeout timer of the onboard acquisition device is started. T1 is the timeout period set by the onboard acquisition device. In this embodiment, the time to send one data packet is set to 1028 data cycles, or 8224 ns, and T1 is 100 data cycles, or 800 ns.

[0014] The onboard data acquisition device monitors the input data buffer status in real time (by using the half-full flag in the FIFO buffer; if the half-full flag is 0, the data buffering capability is still available; if the half-full flag is 1, the data buffering capability is no longer available).

[0015] First, check if the half-full flag in the FIFO buffer of the missile-borne acquisition device is 0, indicating whether the FIFO buffer has data buffering capability. If the half-full flag is 1, the requirement is not met. If, at any time within time T1, the half-full flag in the FIFO buffer is 1, the missile-borne acquisition device reads the next packetized and framed data packet from the FIFO buffer and sends it to the missile recorder. Simultaneously, the missile-borne acquisition device stores the next data packet in RAM (replacing the previous data packet). When the missile-borne acquisition device reads the next packetized and framed data packet from the FIFO buffer, the frame count corresponding to that data packet is incremented by 1; in this embodiment, it is n+1. If the half-full flag in the FIFO buffer of the acquisition device is 0, and the onboard acquisition device receives an acknowledgment frame within time T1, the onboard acquisition device reads the next packetized and framed data packet from the FIFO buffer and sends it to the onboard recorder. While sending the data packet, the onboard acquisition device stores the next data packet in RAM (replacing the previous data packet).

[0016] If the half-full flag in the FIFO buffer of the acquisition device is 0, and the onboard acquisition device receives a retransmission frame or an abnormal feedback frame within time T1, then when the number of retransmissions is less than 3, the retransmission count is incremented by 1, and the data packet stored in RAM is sent to the onboard recorder again. When the number of retransmissions is greater than or equal to 3, retransmission is abandoned, and the onboard acquisition device reads the next packet after being encapsulated from the FIFO buffer of the acquisition device and sends it to the onboard recorder. When the onboard acquisition device sends the data packet, it also stores the next data packet in RAM (replacing the previous data packet). The frame count of the next data packet stored in RAM is 1 more than the frame count of the previous data packet.

[0017] If the onboard acquisition device does not receive the verification result within time T1, and the half-full flag in the FIFO buffer of the onboard acquisition device is 0, then it continues to send the previous data packet stored in RAM. When the half-full flag in the FIFO buffer of the onboard acquisition device is 1, the onboard acquisition device reads the next packetized and framed data packet from the FIFO buffer of the acquisition device and sends it to the onboard recorder. While sending the data packet, the onboard acquisition device stores the next data packet in RAM (replacing the previous data packet).

[0018] like Figure 3 As shown, when the missile-borne recorder receives data, it first detects... Figure 4 The data frame header shown is received. After receiving the header, the timeout timer T2 set by the onboard recorder is started (the timer is 1100 data cycles, i.e., 8800ns), and data reception begins. The data packet is written into the FIFO of the onboard recorder, and CRC check calculation is performed simultaneously. After the data packet is completely received, the CRC check is checked for correctness. If the check is correct, then proceed as planned. Figure 5 A confirmation frame is sent to the onboard data acquisition device; if the verification fails, then... Figure 5 The system retransmits the frame to the onboard data acquisition device. If the data packet cannot be fully received within time T2, the search for the frame header restarts. Once the frame header is found, the system retransmits, verifies, judges, and provides feedback according to the aforementioned method. The onboard recorder writes all received data into the Flash chip and transmits the data to the ground computer for subsequent data analysis. Finally, the ground computer removes erroneous data and selects correct data for further analysis. T2 is the timeout period set for the onboard recorder.

[0019] like Figure 6 As shown, the data received by the ground computer from the missile recorder includes error frame data packets and correct frame data packets. Each correct frame data packet also includes a frame header, frame count, frame tail, and CRC checksum. The ground computer first filters out the correct data frame packets through data preprocessing, and then removes the frame header, frame count, frame tail, and CRC checksum, leaving only the data in the data packet.

[0020] The original data was supplemented with frame header, frame count, frame tail, and CRC checksum fields. Additionally, the onboard recorder writes erroneous frame data into Flash memory. Therefore, the host computer (ground computer) software needs to filter out correct data frames during data preprocessing, and then remove the "frame header, frame count, frame tail, and CRC checksum" fields. Since the frame header, frame tail, and frame count are all CRC checked, to save data processing time, the host computer software only needs to verify the frame header, frame tail, frame length, and frame count are correct before directly retrieving the data area. Figure 6 As shown.

[0021] Each frame of data sent by the missile-borne acquisition device takes 8224ns. After receiving the data, the missile-borne recorder can complete the CRC check. Under normal circumstances, the check result frame can be fed back to the missile-borne acquisition device within 500ns. Therefore, the timeout timer of the missile-borne acquisition device must be set to be greater than 500ns. At the same time, in order to avoid the timeout time being too long and causing the feedback link to break, which would greatly reduce the effective bandwidth of the line and affect the storage of normal data, the timeout time of the missile-borne acquisition device is set to 800ns. When the feedback frame link breaks, the data transmission bandwidth drops by a maximum of about 90.78% of the original bandwidth, ensuring that the link from the acquisition device to the recorder to store data will not fail due to the failure of the feedback frame link.

[0022] To prevent the onboard recorder from failing to receive complete data packets, which would prevent subsequent data from being properly verified, a timeout timer is set. The timer must be longer than the data frame transmission time of 8224ns and shorter than the timeout period of 9024ns after the onboard acquisition device sends the data frame. Therefore, the timeout period is set to 8800ns. If the onboard recorder does not receive a complete data frame within 8800ns of receiving the frame header, it will restart the detection of the data frame header. At this time, the onboard acquisition device will send the next data frame due to the timeout, and the data transmission link will return to normal.

[0023] The airborne data acquisition device needs to send data to the recorder for storage in real time, therefore batch data caching is not possible. Furthermore, during occasional data retransmissions between the acquisition device and the recorder, it is essential to ensure that the input data to the airborne acquisition device is not lost. If a data frame is abnormal, it can be retransmitted a maximum of 3 times. The maximum time to send 3 frames is 9024 * 3 = 27072 ns. Therefore, the FIFO half-full flag should be calculated based on the rate of the input flight parameter data. This ensures that when the FIFO half-full flag is 0, at least 27072 ns of flight parameter data can be buffered, and when the FIFO half-full flag is 1, at least 9024 ns of flight parameter data can be buffered.

Claims

1. A self-adjusting, high-speed, high-reliability data transmission method, characterized by: During the flight of the aircraft, the missile-borne acquisition device is connected with the missile-borne recorder through a wire, and when the missile-borne acquisition device sends data, the data is packaged and framed and then sent to the missile-borne recorder for storage through the Auroar protocol. After the flight of the aircraft ends, the data recovery device acquires the stored data in the missile-borne recorder, and a ground computer is used to analyze and process the stored data to obtain correct and effective data for users to view flight parameter data of various aircrafts. The missile-borne acquisition device sends data to the missile-borne recorder for storage in real time to ensure that there is enough effective data close to the fault time to provide a basis for post-fault analysis. When the missile-borne acquisition device sends data, the missile-borne acquisition device packages and frames the data to be sent to the missile-borne recorder for storage, and then sends the packaged data packet to the missile-borne recorder for storage. The missile-borne acquisition device is in a waiting state after sending a data packet each time. If the missile-borne acquisition device receives the check result within T1 time, and the missile-borne acquisition device still has the ability to buffer input data, the check result is judged. If it is an acknowledgement frame, the next data packet is continued to be sent. If it is a retransmission frame or an abnormal feedback frame and the number of retransmissions does not exceed 3 times, the last data packet is re-sent. If it is a retransmission frame or an abnormal feedback frame and the number of retransmissions exceeds 3 times, the next data packet is immediately sent. If the check result is received within T1 time, but the missile-borne acquisition device does not have the ability to buffer input data, the next data packet is immediately sent. If the check result is not received within T1 time, and the missile-borne acquisition device still has the ability to buffer input data, the last data packet is continued to be sent. When the missile-borne acquisition device does not have the ability to buffer input data, the next data packet is continued to be sent. When the missile-borne recorder receives the data packet sent by the missile-borne acquisition device, it first starts to find the frame header. After the frame header of the data packet is found, the data of the data packet is received within T2 time, and the data of the data packet is written into the FIFO of the missile-borne recorder. At the same time, the check calculation is started. When the data of the data packet is completely received, it is judged whether the check result is correct. If the check is correct, an acknowledgement frame is fed back to the missile-borne acquisition device. Otherwise, a retransmission frame is fed back to the missile-borne acquisition device. If the data of the data packet cannot be completely received within T2 time, the frame header is searched again, and the data is received again. The missile-borne recorder writes all the received data into the NAND Flash chip for storage. T1 is the timeout time of the timeout timer set by the missile-borne acquisition device, and T2 is the timeout time of the timeout timer set by the missile-borne recorder. The half-full flag in the FIFO buffer of the missile-borne acquisition device is used to monitor the data buffering situation in real time. When the half-full flag is 0, the data buffering ability is still available. When the half-full flag is 1, the data buffering ability is no longer available.

2. The self-adjusting, high-speed, high-reliability data transmission method according to claim 1, characterized in that: When the missile-borne acquisition device sends a data packet to the missile-borne recorder, the missile-borne acquisition device reads the packaged and framed data packet from the FIFO cache of the missile-borne acquisition device and sends the data packet to the missile-borne recorder, the missile-borne acquisition device stores the data packet in the RAM at the same time, and starts the timeout timer of the missile-borne acquisition device after the data packet is sent; if the missile-borne acquisition device receives an acknowledgement frame within T1 time, and the half-full flag in the FIFO cache of the acquisition device is 0, the missile-borne acquisition device reads the next packaged and framed data packet from the FIFO cache and sends the data packet to the missile-borne recorder, the missile-borne acquisition device stores the next data packet in the RAM (replaces the previous data packet) at the same time, if the missile-borne acquisition device receives a retransmission frame or an abnormal feedback frame within T1 time, and the half-full flag in the FIFO cache of the acquisition device is 0, when the number of retransmissions is less than 3, the number of retransmissions is incremented by 1, and the data packet stored in the RAM is sent to the missile-borne recorder again, when the number of retransmissions is greater than or equal to 3, the retransmission is abandoned, the missile-borne acquisition device reads the next packaged and framed data packet from the FIFO cache of the acquisition device and sends the data packet to the missile-borne recorder, the missile-borne acquisition device stores the next data packet in the RAM (replaces the previous data packet) at the same time, and the frame count of the next data packet stored in the RAM is greater than the frame count of the previous data packet by 1; If the half-full flag in the FIFO cache of the acquisition device is 1 at any time within T1 time, the missile-borne acquisition device reads the next packaged and framed data packet from the FIFO cache and sends the data packet to the missile-borne recorder, the missile-borne acquisition device stores the next data packet in the RAM (replaces the previous data packet) at the same time; If the missile-borne acquisition device does not receive a check result within T1 time, and the half-full flag in the FIFO cache of the missile-borne acquisition device is 0, the previous data packet stored in the RAM is continuously sent, when the half-full flag in the FIFO cache of the missile-borne acquisition device is 1, the missile-borne acquisition device reads the next packaged and framed data packet from the FIFO cache of the acquisition device and sends the data packet to the missile-borne recorder, the missile-borne acquisition device stores the next data packet in the RAM (replaces the previous data packet) at the same time.

3. The self-adjusting, high-speed, high-reliability data transmission method of claim 1, wherein: Each data packet is composed of a frame header, a frame count, data, a frame tail and a CRC checksum, and different data packets are distinguished by the frame count.

4. The self-adjusting, high-speed, high-reliability data transmission method of claim 4, wherein: The ground computer receives data sent by the missile-borne recorder, which includes error frame data packets and correct frame data packets, each correct frame data packet further includes a frame header, a frame count, a frame tail and a CRC checksum, the ground computer first screens out correct data frame packets through data preprocessing, and then removes the frame header, the frame count, the frame tail and the CRC checksum, and only leaves the data in the data packet.

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