Active and passive intelligent equalization system for high-precision vehicle power battery pack

Abstract

The invention relates to the technical field of electric vehicle power battery management, and particularly discloses a high-precision active and passive intelligent equalization system for a vehicle power battery pack, which is characterized in that a unified clock signal is generated by establishing a global synchronous time sequence reference and adopting a temperature compensation crystal oscillator and a multi-stage phase-locked loop; based on a battery state parameter, identifying an equalization demand, and applying a golden section proportion to distribute an initial phase offset; accurate phase alignment of the pulse width modulation signals is realized through a digital delay phase locking technology; phase configuration is dynamically adjusted through spectral analysis and an iterative optimization algorithm to minimize bus current ripples; establishing a priority sequence according to the state change of the battery pack, and completing system reconfiguration by adopting a progressive switching strategy; according to the invention, the problem of beat frequency oscillation during multi-branch parallel equalization is solved, and the equalization precision of the battery pack, the system stability and the electromagnetic compatibility are improved.

Description

Technical Field

[0001] This invention relates to the field of electric vehicle power battery management technology, specifically to a high-precision intelligent balancing system for active and passive power battery packs in vehicles. Background Technology

[0002] With the rapid development of the electric vehicle industry, the performance consistency of the power battery pack, as the core energy storage unit, directly affects the vehicle's driving range and lifespan. During actual operation, due to differences in manufacturing processes, uneven operating temperature distribution, and varying charge / discharge characteristics, inconsistencies in parameters such as voltage and capacity can occur between individual battery cells. This inconsistency can lead to a decrease in the effective capacity of the battery pack and safety issues such as localized overcharging and over-discharging. Therefore, battery management systems generally employ a combination of active and passive balancing techniques to achieve energy balance between batteries through energy transfer or dissipation.

[0003] The existing technology has the following shortcomings: Existing battery management systems (BMS) generate low-frequency beat currents during parallel balancing of multiple branches due to inherent frequency differences in the pulse width modulation (PWM) signal clock sources of each balancing branch. This system-level current oscillation not only interferes with the accurate operation of the battery state estimation algorithm but also threatens hardware safety. The root cause lies in the lack of an effective global coordinated control mechanism, leading to unpredictable stability issues at the system level and compromising the data reliability and control accuracy of the BMS. Summary of the Invention

[0004] The purpose of this invention is to provide a high-precision intelligent balancing system for active and passive components in automotive power battery packs to solve the problems mentioned above.

[0005] The objective of this invention can be achieved through the following technical solutions: A high-precision intelligent balancing system for active and passive components of a vehicle power battery pack includes: The synchronization timing reference module is used to establish a global synchronization timing reference, generate a unified clock signal, and provide a synchronization timing reference for all equalization branches; The phase initialization configuration module, based on the synchronous timing reference, collects the state parameters of each battery cell, identifies the battery cells that need to be balanced, determines the number of balancing branches, and assigns an initial phase offset that is evenly distributed in the range of 0° to 360° to each balancing branch. The phase coordination execution module generates a pulse width modulation signal with phase coordination relationship based on the synchronous timing reference and the allocated initial phase offset, and drives each equalization branch to perform equalization operation. The dynamic phase optimization module is used to monitor the bus current ripple generated by the coordinated operation of each equalization branch, and adjust the phase offset of each equalization branch based on the ripple characteristics to form an optimized phase configuration. The system reconfiguration module updates the equalization branch configuration based on phase optimization configuration and combined with real-time monitoring of battery pack status changes, and re-executes phase allocation and optimization adjustment according to the updated equalization branch configuration.

[0006] As a further aspect of the present invention: the establishment of a global synchronization timing reference and the generation of a unified clock signal to provide a synchronization timing reference for all equalization branches specifically includes: An initial reference clock signal is generated using a temperature-compensated crystal oscillator. The initial reference clock signal is input into a multi-stage phase-locked loop. Through phase comparison and voltage-controlled oscillation, the initial reference clock signal is subjected to phase noise filtering and frequency stabilization to generate an enhanced clock signal. The enhanced clock signal is divided by an integer to generate a synchronous trigger signal suitable for each equalization branch; The synchronization trigger signal is distributed to all equalization branches through differential signal transmission lines, and the signal is reorganized at each receiving end to generate a unified clock signal.

[0007] As a further aspect of the present invention: the allocation process of the initial phase offset is as follows: Based on the synchronous timing reference, a dynamic scan of all battery cells is started, and the parameter sets of each cell at the same time are collected, including voltage parameters, temperature parameters and internal resistance parameters. The collected parameter sets are compared with the preset equalization threshold to identify battery cells whose parameters deviate from the allowable range and to determine the number of equalization branches that need to be activated. Based on the number of balanced branches identified, the theoretical phase interval between each branch is calculated, and the theoretical phase interval is optimized and allocated using the golden ratio. Based on the optimized phase interval, an initial phase offset is generated for each equalization branch to form an initial phase configuration scheme.

[0008] As a further aspect of the present invention: the step of calculating the theoretical phase interval between each branch based on the identified number of balanced branches, and optimizing the allocation of the theoretical phase interval using the golden ratio, specifically includes: Divide 360° by the number of equalizing branches to obtain the basic phase interval; Multiply the base phase interval by the golden ratio constant to obtain the optimized phase interval; Starting from 0° phase, the optimized phase offset is generated for each balanced branch by accumulating the optimized phase intervals sequentially. When the accumulated phase exceeds 360°, perform a modulo operation on the accumulated result to ensure that all phase offsets fall within the range of 0° to 360°.

[0009] As a further aspect of the present invention: the generation of a pulse width modulation signal with a phase coordination relationship specifically includes: Generate a basic pulse width modulation signal based on a synchronous timing reference; A configurable dead time is inserted between adjacent periods of the basic pulse width modulation signal to form an intermediate modulation signal with electrical isolation characteristics; The intermediate modulation signal is superimposed with the allocated initial phase offset, and precise phase alignment is achieved through digital delay-locked loop technology. The phase-aligned signal is amplified and shaped to generate the final pulse width modulation signal used to drive each equalization branch.

[0010] As a further aspect of the present invention: the precise phase alignment achieved through digital delay-locked loop technology specifically includes: The intermediate modulation signal is used as a reference signal and input to the digital logic circuit, while the initial phase offset is converted into the corresponding delay control word. The phase error signal is output by continuously detecting the deviation between the reference signal and the target phase through phase comparison in digital logic circuits. A binary approximation strategy is adopted, and the value of the delay control word is dynamically adjusted according to the phase error signal to reduce the phase deviation cycle by cycle; When the phase error is less than the preset threshold, the current delay control word is locked, and the phase alignment process is completed.

[0011] As a further aspect of the present invention: the formation of the phase-optimized configuration specifically includes: Spectral analysis of bus current ripple is performed to extract ripple energy in a specific frequency band as the optimization target value; Based on the initial phase offset, new phase test points are constructed, and the ripple energy corresponding to each test point is evaluated. By comparing the ripple energy variation trends of adjacent iteration cycles, the search range is dynamically narrowed to determine the phase offset that minimizes the ripple energy. The optimized phase offset is written into the phase configuration parameter table to construct a new phase mapping relationship and form a new phase optimization configuration.

[0012] As a further aspect of the present invention: the construction of new phase probe points based on the initial phase offset, and the evaluation of the ripple energy corresponding to each probe point, specifically includes: Based on the initial phase offset, the first set of phase test points is constructed in adjacent intervals according to the preset phase step size; Each phase test point is applied sequentially to the corresponding equalization branch, while the ripple energy value of the bus current is collected. By comparing the ripple energy values ​​corresponding to each phase test point, the phase test points that reduce ripple energy are selected as effective optimization directions. Based on the selected effective optimization directions, a second set of phase test points is constructed according to a decreasing phase step size for fine-grained search.

[0013] As a further aspect of the present invention: the step of re-performing phase allocation and optimization adjustment based on the updated equalization branch configuration specifically includes: The phase optimization configuration is compared with the real-time acquired battery pack state parameters to identify the equalization branches that need adjustment. Based on the voltage variation trend and temperature distribution characteristics of individual battery cells, a new priority sequence for equalization branches is established. Based on the new equal branch priority sequence, the initial phase offset of each branch is recalculated; A gradual switching strategy is adopted to transition the system from the current phase configuration to the new phase configuration.

[0014] As a further aspect of the present invention: the gradual switching strategy for transitioning the system from the current phase configuration to a new phase configuration specifically includes: Compare the current phase configuration with the new phase configuration and calculate the total phase adjustment required for each equalization branch; The total phase adjustment is divided into several arithmetic phase adjustment steps to construct a phase transition sequence; Each phase adjustment step is executed sequentially according to a preset time interval, gradually bringing the phase offset of each equalization branch closer to the target value; After each phase adjustment, monitor the bus current ripple change, and once the system is confirmed to be stable, proceed to the next long adjustment.

[0015] The beneficial effects of this invention are: (1) By establishing a global synchronization timing reference and allocating the initial phase offset in combination with the golden ratio, the precise phase coordination of the pulse width modulation signals of each equal branch is realized, eliminating the beat frequency phenomenon caused by the clock frequency difference of each branch. Digital delay phase-locked loop technology and progressive switching strategy are adopted to improve the electromagnetic compatibility characteristics of the system and avoid the interference of current oscillation on the battery state estimation algorithm.

[0016] (2) By real-time monitoring of battery status parameters and bus current ripple characteristics, a priority sequence based on voltage change trends, temperature distribution, and internal resistance changes is established, and the phase configuration is dynamically adjusted using spectrum analysis and iterative optimization algorithms. This closed-loop control strategy enables the system to automatically optimize the equalization parameters according to the actual operating conditions of the battery pack, mitigate the development of battery pack inconsistency, extend the overall service life of the battery pack, and ensure that the system can maintain optimal equalization performance under various operating conditions. Attached Figure Description

[0017] The invention will now be further described with reference to the accompanying drawings.

[0018] Figure 1 This is a flowchart of the system of the present invention. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Please see Figure 1 As shown, this invention is a high-precision intelligent balancing system for active and passive components of a vehicle power battery pack, comprising: The synchronization timing reference module is used to establish a global synchronization timing reference, generate a unified clock signal, and provide a synchronization timing reference for all equalization branches; The phase initialization configuration module, based on the synchronous timing reference, collects the state parameters of each battery cell, identifies the battery cells that need to be balanced, determines the number of balancing branches, and assigns an initial phase offset that is evenly distributed in the range of 0° to 360° to each balancing branch. The phase coordination execution module generates a pulse width modulation signal with phase coordination relationship based on the synchronous timing reference and the allocated initial phase offset, and drives each equalization branch to perform equalization operation. The dynamic phase optimization module is used to monitor the bus current ripple generated by the coordinated operation of each equalization branch, and adjust the phase offset of each equalization branch based on the ripple characteristics to form an optimized phase configuration. The system reconfiguration module updates the equalization branch configuration based on phase optimization configuration and combined with real-time monitoring of battery pack status changes, and re-executes phase allocation and optimization adjustment according to the updated equalization branch configuration.

[0021] In the synchronization timing reference module, a temperature-compensated crystal oscillator is used to generate the initial reference clock signal. The temperature-compensated crystal oscillator operates in a temperature range of -40°C to 85°C, with a frequency stability of ±0.5ppm. In practice, the temperature-compensated crystal oscillator outputs a reference signal with a frequency of 20MHz, which serves as the initial clock source for the entire synchronization system. A temperature sensor monitors ambient temperature changes in real time, and the output frequency is calibrated in real time according to a preset temperature-frequency compensation curve to ensure the frequency stability of the reference clock signal.

[0022] The initial reference clock signal is input to a three-stage cascaded phase-locked loop (PLL) for processing. The first-stage PLL uses an integer division mode to multiply the 20MHz reference signal to 100MHz. The second-stage PLL uses a fractional division mode, detecting the phase difference between the input and feedback signals through a phase comparator, and using a charge pump and loop filter to generate a control voltage to adjust the output frequency of the voltage-controlled oscillator (VCO) to 200MHz. The third-stage PLL optimizes the phase noise of the 200MHz signal by increasing the order of the loop filter to suppress high-frequency phase noise. After three stages of processing, the phase noise of the output signal reaches -120dBc / Hz at a 1kHz offset.

[0023] The enhanced clock signal is then subjected to integer frequency division. The division ratio is determined based on the operational requirements of the equalization branch, specifically calculated as the division ratio equal to the enhanced clock signal frequency divided by the target synchronization frequency. For example, when the enhanced clock signal frequency is 200MHz and the target synchronization frequency is 1MHz, the division ratio is 200. The frequency divider is implemented using a synchronous counter, which counts on the rising edge of the clock. When the count value reaches the set division ratio, a pulse signal is output, and the counter is automatically reset. The synchronization trigger signal generated in this way maintains the same frequency accuracy as the enhanced clock signal.

[0024] The synchronization trigger signal is distributed to each equalization branch via a differential signal transmission line. The differential signal adopts a low-voltage differential signal transmission standard with a signal amplitude of 350mV and a transmission impedance of 100 ohms. At the receiving end, a differential receiver is used to reshape the signal, restoring the original signal by comparing the voltage difference between the positive and negative differential signals. To compensate for transmission delay differences, an adjustable delay line is set at each receiving end, with a delay adjustment step of 10 picoseconds. The delay value is dynamically adjusted by measuring the phase difference between the reference signal and the received signal to ensure that the clock signals received by each branch remain synchronized.

[0025] In the phase initialization configuration module, firstly, a dynamic scan of all battery cells is initiated based on the synchronous timing reference. At each rising edge of the synchronous timing reference, the state parameters of each battery cell are sequentially acquired, including voltage, temperature, and internal resistance parameters. The acquisition accuracy of the voltage parameters reaches ±1 millivolt, the temperature parameters reach ±0.5 degrees Celsius, and the internal resistance parameters are calculated by injecting a 1000 Hz AC signal and measuring the voltage response. Each scan cycle lasts 5 milliseconds to ensure that all parameters are acquired under the same time reference.

[0026] The collected parameter sets are compared with preset equalization thresholds. The equalization threshold for voltage parameters is set to ±20 mV of the nominal voltage, the equalization threshold for temperature parameters is set to ±3 degrees Celsius of the ambient temperature, and the equalization threshold for internal resistance parameters is set to ±10% of the initial internal resistance value. When any parameter exceeds the corresponding equalization threshold range, the battery cell is identified as an object requiring equalization. Based on the identification results, the number of equalization branches that need to be activated is counted, and this number is denoted as N.

[0027] Based on the number N of the identified balanced branches, the theoretical phase interval between each branch is calculated. The basic phase interval is obtained by dividing the circumferential angle 360° by the number of balanced branches N. The optimized phase interval is obtained by multiplying the basic phase interval by the golden ratio constant 0.618. The golden ratio constant 0.618 is obtained by approximating the irrational golden ratio to three decimal places.

[0028] Based on the optimized phase interval, an initial phase offset is generated for each equalization branch. Starting from 0° phase, the phase offsets are accumulated sequentially according to the optimized phase interval. The phase offset allocated to the k-th equalization branch is the product of the optimized phase interval and (k-1), where k represents the number of equalization branches. When the accumulated result exceeds 360°, a modulo operation is performed on the accumulated result, i.e., the accumulated result is divided by 360° and the remainder is taken to ensure that all phase offsets fall within the range of 0° to 360°. This process forms an initial phase configuration scheme containing N phase offsets, where each phase offset corresponds to the startup timing of an equalization branch.

[0029] It should be noted that the initial phase offset allocation process ensures that the start-up times of each equalization branch are evenly distributed along the time axis, avoiding the current superposition effect caused by multiple branches operating simultaneously. The phase spacing optimized using the golden ratio can further reduce harmonic components in specific frequency bands and improve the system's electromagnetic compatibility performance.

[0030] In the phase-coordinated execution module, a basic pulse-width modulation (PWM) signal is generated based on a synchronization timing reference. The synchronization timing reference signal uses a 1MHz square wave signal, which is divided by a digital counter to generate a 10kHz basic PWM signal. The duty cycle of the basic PWM signal is generated by comparing the counter's count value with a preset duty cycle register value. A high level is output when the count value is less than the duty cycle register value; otherwise, a low level is output. The duty cycle register value is dynamically adjusted according to the equalization current requirement, with an adjustment range of 5% to 95% and an adjustment step size of 1%. The rising edge of the basic PWM signal is strictly aligned with the rising edge of the synchronization timing reference signal.

[0031] A configurable dead time is inserted between adjacent periods of the basic pulse width modulation signal. The dead time is implemented using a separate dead time counter, which starts on each falling edge of the basic pulse width modulation signal. The specific value of the dead time is stored in a dead time register, configurable from 100 nanoseconds to 1 microsecond, with a configuration accuracy of 10 nanoseconds. During the dead time counting process, the output signal remains low, ensuring a clear time interval between adjacent periods.

[0032] The intermediate modulation signal is superimposed with the allocated initial phase offset, and precise phase alignment is achieved through digital delay-locked loop (DLL) technology. The initial phase offset is first converted into a corresponding delay control word using the formula: delay control word = phase offset divided by 360, then multiplied by the signal period, then divided by the clock period. The phase comparison unit in the digital logic circuit generates a phase error signal by detecting the time difference between the rising edges of the reference and target signals. This error signal is represented digitally, with a value range of ±100 clock cycles. A binary approximation strategy is used to adjust the delay control word. Specifically, the delay control word is first set to half of its maximum value. Based on the sign of the phase error signal, the current delay control word value is increased or decreased by 50%. This process is repeated in each subsequent signal cycle, with the adjustment amount halved each time, until the phase error is less than a preset 5 nanosecond threshold, at which point the delay control word is locked.

[0033] The phase-aligned signal undergoes power amplification and waveform shaping. Power amplification employs a three-stage amplification structure: the first stage is a voltage amplification stage, increasing the signal amplitude from 3.3 volts to 12 volts; the second stage is a current amplification stage, providing a maximum drive current of 2 amps; and the third stage is an impedance matching stage, ensuring output impedance matches load impedance. Waveform shaping is achieved using a Schmitt trigger, with rise time and fall time controlled within 50 nanoseconds, and overshoot less than 5% of the signal amplitude. The shaped signal is transmitted to each equalization branch via shielded twisted-pair cable. At the receiving end, terminating resistors are used to eliminate signal reflections, ensuring the integrity of the pulse width modulation signal waveform.

[0034] It should be noted that there are clear timing dependencies between the steps in the entire signal generation process. The generation of the basic pulse width modulation signal depends on the stability of the synchronous timing reference signal, the insertion of dead time ensures the signal's safety, the phase alignment process guarantees the coordination between the equalization branches, and power amplification and waveform shaping ensure the reliability of signal transmission. Through this layered processing method, the final generated pulse width modulation signal maintains accurate phase relationships and possesses the electrical characteristics required to drive each equalization branch.

[0035] In the dynamic phase optimization module, the bus current ripple is subjected to spectral analysis to extract the ripple energy of specific frequency bands as optimization targets. A 2048-point Fast Fourier Transform (FFT) algorithm is used to perform spectral analysis on the acquired current signal, with a sampling frequency of 100kHz and a frequency resolution of 48.8Hz. Within the frequency range of 0Hz to 10kHz, the three frequency bands with the highest ripple energy are selected as key optimization targets, with each band width set to 200Hz. The ripple energy is calculated as the sum of the squares of the amplitudes of all frequency components within each band. The FFT algorithm is executed by a digital signal processor, and the calculation process includes four stages: time-domain signal windowing, FFT operation, frequency-domain amplitude calculation, and energy accumulation for specific frequency bands.

[0036] New phase test points were constructed based on the initial phase offset, and the ripple energy corresponding to each test point was evaluated. Using the initial phase offset as a reference, a first group of seven phase test points were constructed within adjacent intervals of ±15 degrees, with a phase step size of 5 degrees. Each phase test point was sequentially applied to its corresponding equalization branch, with each test point lasting for 10 signal cycles. During this period, bus current data was collected using a current sensor at a sampling interval of 10 microseconds, with 1000 current data points collected at each test point. The ripple energy value was calculated using the root mean square method, which involves first removing the DC component of the current signal, then calculating the sum of squares of the AC components, and finally taking the square root.

[0037] By comparing the ripple energy variation trends of adjacent iteration cycles, the search range is dynamically narrowed to determine the phase offset that minimizes the ripple energy. The ripple energy values ​​corresponding to the first group of seven phase test points are compared, and the phase test points that reduce ripple energy are selected as effective optimization directions. If multiple effective optimization directions exist, the direction with the largest reduction in ripple energy is selected as the primary optimization direction. Based on the selected effective optimization directions, a second group of phase test points is constructed with a decreasing phase step size for a refined search. The phase step size of the second group of test points is set to 1 degree, narrowing the search range to ±3 degrees.

[0038] The optimized phase offsets are written to the phase configuration parameter table to construct a new phase mapping relationship. The phase configuration parameter table uses a two-dimensional array structure for storage; the first dimension records the equalization branch number, and the second dimension stores the corresponding phase offset. Each phase offset occupies 2 bytes of storage space, achieving a precision of 0.1 degrees. The new phase mapping relationship is implemented using a lookup table. When phase adjustment is needed, the corresponding phase offset is retrieved from the phase configuration parameter table based on the equalization branch number. Parameter table updates employ atomic operations to ensure that data inconsistencies do not occur during the update process.

[0039] In the specific implementation process, the first set of phase test points was constructed using a symmetrical distribution strategy, with three test points on each side of the initial phase offset. The application order of the test points was randomized to avoid systematic errors caused by the test order. Ripple energy value acquisition began in the third signal cycle after the test points were applied to ensure that the system had reached a stable state. During the second set of fine search processes, if the ripple energy value was found to increase three consecutive times, the search was immediately terminated, and the phase offset corresponding to the current minimum ripple energy value was selected as the optimization result.

[0040] It should be noted that the entire optimization process employs a closed-loop control strategy, with each optimization cycle comprising four complete steps. The time interval between optimization cycles is dynamically adjusted based on the system's operating status, set to 100 milliseconds during system startup and extended to 500 milliseconds during stable operation. This adaptive optimization mechanism ensures both system response speed and avoids unnecessary computational resource consumption. All intermediate data during the optimization process is recorded in non-volatile memory, including phase values ​​at each test point, corresponding ripple energy values, and optimization direction selection records, providing historical data support for subsequent optimization decisions.

[0041] In the system reconfiguration module, the phase optimization configuration is compared with the real-time acquired battery pack state parameters to identify the balancing branches that need adjustment. The real-time acquired battery pack state parameters include the voltage, temperature, and internal resistance of each battery cell, with a sampling period of 10 milliseconds. The voltage acquisition accuracy reaches ±1 mV, the temperature acquisition accuracy reaches ±0.5 degrees Celsius, and the internal resistance is measured using the AC injection method. During the comparison process, the voltage threshold is set to ±10 mV of the nominal voltage, the temperature threshold to ±2 degrees Celsius of the average temperature, and the internal resistance change rate threshold to 5%. When any parameter exceeds the corresponding threshold, the balancing branch corresponding to that battery cell is marked as needing adjustment. Simultaneously, the direction and magnitude of the parameter deviation are recorded to provide a basis for subsequent priority calculations.

[0042] Based on the voltage variation trend and temperature distribution characteristics of individual battery cells, a new priority sequence for equalization branches is established. The voltage variation trend is calculated using voltage data from the most recent 30 sampling periods, and the voltage variation slope is fitted using the least squares method. The temperature distribution characteristics are obtained by calculating the difference between the temperature of each battery cell and the average temperature. The priority weight is calculated as follows: the priority weight equals the absolute value of the voltage variation slope multiplied by 0.6, plus the absolute value of the temperature difference multiplied by 0.3, plus the internal resistance change rate multiplied by 0.1. Based on the calculated priority weights, all equalization branches requiring adjustment are sorted in descending order to form a new priority sequence for equalization branches. Equalization branches with higher weights will be prioritized for phase adjustment.

[0043] Based on the new balanced branch priority sequence, the initial phase offset of each branch is recalculated. The basic phase interval is obtained by dividing the 360-degree circumference by N, according to the number of balanced branches N in the priority sequence. Considering priority differences, the basic phase interval is weighted and adjusted, with the weighting coefficient determined based on the branch's position in the priority sequence. The phase offset of the k-th balanced branch is calculated as follows: phase offset equals (k-1) multiplied by the basic phase interval multiplied by the weighting coefficient. The weighting coefficient ranges from 0.8 to 1.2, with higher-priority balanced branches receiving larger weighting coefficients to ensure they obtain a better phase position. After recalculation, a configuration table containing the new phase offsets of all balanced branches is generated.

[0044] Finally, a gradual switching strategy is employed to transition the system from the current phase configuration to the new phase configuration. The difference between the current phase value and the new phase value for each equalization branch is calculated to obtain the total phase adjustment. This total phase adjustment is divided into five equal-order adjustment steps, each step representing 20% ​​of the total phase adjustment. Each adjustment step is executed sequentially at 100-millisecond intervals, followed by a 200-millisecond pause for system stabilization. During the pause, the bus current ripple is monitored. When the ripple energy value remains stable for three consecutive sampling periods with a fluctuation amplitude of less than 5%, the system is considered to have reached a stable state, and the next adjustment step is then executed. The entire transition process lasts at least 1.5 seconds to ensure a smooth system switch to the new phase configuration.

[0045] In the specific implementation process, the historical adjustment records of the balancing branches should also be considered when establishing the priority sequence. For balancing branches that have just been adjusted within the last 10 minutes, their priority weight should be appropriately reduced to avoid frequent adjustments. When recalculating the phase offset, the better-performing parts of the original phase configuration should be retained, and only the higher-priority balancing branches should be adjusted more significantly. During the gradual switching process, if a significant increase in bus current ripple (exceeding 20% ​​of the baseline value) is detected due to a certain adjustment step size, the switching process should be immediately paused, reverting to the previous stable configuration, and the adjustment strategy should be re-evaluated. All parameter changes and system response data during the adjustment process are recorded in non-volatile memory for subsequent optimization analysis and fault diagnosis.

[0046] The working principle of this invention is as follows: By establishing a global synchronous timing reference and using temperature compensation technology to ensure the stability of the clock signal, after identifying the equalization requirements based on battery state parameters, the initial phase offset is allocated using the golden ratio. Precise phase alignment is achieved through digital delay phase-locked loop technology to generate a cooperative pulse width modulation signal. The phase configuration is dynamically adjusted using spectrum analysis and iterative optimization strategies to minimize bus current ripple. Finally, a priority sequence is established according to changes in battery pack state, and the system reconfiguration is completed through a gradual switching strategy. This forms a complete closed-loop control system from timing synchronization, phase initialization, cooperative execution to dynamic optimization, effectively solving the beat frequency oscillation problem during multi-branch parallel equalization and improving the battery pack equalization accuracy and system reliability.

[0047] The foregoing has provided a detailed description of one embodiment of the present invention, but this description is merely a preferred embodiment and should not be construed as limiting the scope of the invention. All equivalent variations and modifications made within the scope of the claims of this invention should still fall within the patent coverage of this invention.

Claims

1. A high-precision intelligent balancing system for active and passive components of a vehicle power battery pack, characterized in that, include: The synchronization timing reference module is used to establish a global synchronization timing reference, generate a unified clock signal, and provide a synchronization timing reference for all equalization branches; The phase initialization configuration module, based on the synchronous timing reference, collects the state parameters of each battery cell, identifies the battery cells that need to be balanced, determines the number of balancing branches, and assigns an initial phase offset that is evenly distributed in the range of 0° to 360° to each balancing branch. The phase coordination execution module generates a pulse width modulation signal with phase coordination relationship based on the synchronous timing reference and the allocated initial phase offset, and drives each equalization branch to perform equalization operation. The dynamic phase optimization module is used to monitor the bus current ripple generated by the coordinated operation of each equalization branch, and adjust the phase offset of each equalization branch based on the ripple characteristics to form an optimized phase configuration. The system reconfiguration module updates the equalization branch configuration based on phase optimization configuration and combined with real-time monitoring of battery pack status changes, and re-executes phase allocation and optimization adjustment according to the updated equalization branch configuration.

2. The high-precision intelligent balancing system for active and passive components of a vehicle power battery pack according to claim 1, characterized in that, The establishment of a global synchronization timing reference, generating a unified clock signal to provide a synchronization timing reference for all equalization branches, specifically includes: An initial reference clock signal is generated using a temperature-compensated crystal oscillator. The initial reference clock signal is input into a multi-stage phase-locked loop. Through phase comparison and voltage-controlled oscillation, the initial reference clock signal is subjected to phase noise filtering and frequency stabilization to generate an enhanced clock signal. The enhanced clock signal is divided by an integer to generate a synchronous trigger signal suitable for each equalization branch; The synchronization trigger signal is distributed to all equalization branches through differential signal transmission lines, and the signal is reorganized at each receiving end to generate a unified clock signal.

3. The high-precision intelligent balancing system for active and passive components of a vehicle power battery pack according to claim 1, characterized in that, The allocation process for the initial phase offset is as follows: Based on the synchronous timing reference, a dynamic scan of all battery cells is started, and the parameter sets of each cell at the same time are collected, including voltage parameters, temperature parameters and internal resistance parameters. The collected parameter sets are compared with the preset equalization threshold to identify battery cells whose parameters deviate from the allowable range and to determine the number of equalization branches that need to be activated. Based on the number of balanced branches identified, the theoretical phase interval between each branch is calculated, and the theoretical phase interval is optimized and allocated using the golden ratio. Based on the optimized phase interval, an initial phase offset is generated for each equalization branch to form an initial phase configuration scheme.

4. The high-precision intelligent balancing system for active and passive components of a vehicle power battery pack according to claim 3, characterized in that, The step of calculating the theoretical phase interval between each branch based on the number of identified balanced branches, and optimizing the allocation of the theoretical phase interval using the golden ratio, specifically includes: Divide 360 ​​by the number of balanced branches to obtain the basic phase interval; Multiply the base phase interval by the golden ratio constant to obtain the optimized phase interval; Starting from 0° phase, the optimized phase offset is generated for each balanced branch by accumulating the optimized phase intervals sequentially. When the accumulated phase exceeds 360°, perform a modulo operation on the accumulated result to ensure that all phase offsets fall within the range of 0° to 360°.

5. A high-precision intelligent balancing system for active and passive components of a vehicle power battery pack according to claim 1, characterized in that, The generation of a pulse width modulation signal with phase coordination specifically includes: Generate a basic pulse width modulation signal based on a synchronous timing reference; A configurable dead time is inserted between adjacent periods of the basic pulse width modulation signal to form an intermediate modulation signal with electrical isolation characteristics; The intermediate modulation signal is superimposed with the allocated initial phase offset, and precise phase alignment is achieved through digital delay-locked loop technology. The phase-aligned signal is amplified and shaped to generate the final pulse width modulation signal used to drive each equalization branch.

6. A high-precision intelligent balancing system for active and passive components of a vehicle power battery pack according to claim 5, characterized in that, The precise phase alignment achieved through digital delay-locked loop technology specifically includes: The intermediate modulation signal is used as a reference signal and input to the digital logic circuit, while the initial phase offset is converted into the corresponding delay control word. The phase error signal is output by continuously detecting the deviation between the reference signal and the target phase through phase comparison in digital logic circuits. A binary approximation strategy is adopted, and the value of the delay control word is dynamically adjusted according to the phase error signal to reduce the phase deviation cycle by cycle; When the phase error is less than the preset threshold, the current delay control word is locked, and the phase alignment process is completed.

7. The high-precision intelligent balancing system for active and passive components of a vehicle power battery pack according to claim 1, characterized in that, The formation of the phase optimization configuration specifically includes: Spectral analysis of bus current ripple is performed to extract ripple energy in a specific frequency band as the optimization target value; Based on the initial phase offset, new phase test points are constructed, and the ripple energy corresponding to each test point is evaluated. By comparing the ripple energy variation trends of adjacent iteration cycles, the search range is dynamically narrowed to determine the phase offset that minimizes the ripple energy. The optimized phase offset is written into the phase configuration parameter table to construct a new phase mapping relationship and form a new phase optimization configuration.

8. A high-precision intelligent balancing system for active and passive components of a vehicle power battery pack according to claim 7, characterized in that, The process of constructing new phase probe points based on the initial phase offset and evaluating the ripple energy corresponding to each probe point specifically includes: Based on the initial phase offset, the first set of phase test points is constructed in adjacent intervals according to the preset phase step size; Each phase test point is applied sequentially to the corresponding equalization branch, while the ripple energy value of the bus current is collected. By comparing the ripple energy values ​​corresponding to each phase test point, the phase test points that reduce ripple energy are selected as effective optimization directions. Based on the selected effective optimization directions, a second set of phase test points is constructed according to a decreasing phase step size for fine-grained search.

9. A high-precision intelligent balancing system for active and passive components of a vehicle power battery pack according to claim 1, characterized in that, The step of re-performing phase allocation and optimization adjustments based on the updated balanced branch configuration specifically includes: The phase optimization configuration is compared with the real-time acquired battery pack state parameters to identify the equalization branches that need adjustment. Based on the voltage variation trend and temperature distribution characteristics of individual battery cells, a new priority sequence for equalization branches is established. Based on the new equal branch priority sequence, the initial phase offset of each branch is recalculated; A gradual switching strategy is adopted to transition the system from the current phase configuration to the new phase configuration.

10. A high-precision intelligent balancing system for active and passive components of a vehicle power battery pack according to claim 9, characterized in that, The gradual switching strategy used to transition the system from the current phase configuration to the new phase configuration specifically includes: Compare the current phase configuration with the new phase configuration and calculate the total phase adjustment required for each equalization branch; The total phase adjustment is divided into several arithmetic phase adjustment steps to construct a phase transition sequence; Each phase adjustment step is executed sequentially according to a preset time interval, gradually bringing the phase offset of each equalization branch closer to the target value; After each phase adjustment, monitor the bus current ripple change, and once the system is confirmed to be stable, proceed to the next long adjustment.

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