Algorithm development verification demonstration method and device, equipment and storage medium
By dynamically switching data paths using the receiving mode indication signal, a seamless connection between algorithm development and verification and product demonstration is achieved, solving the problem of low efficiency in algorithm development and verification and improving overall efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-26
- Publication Date
- 2026-03-24
AI Technical Summary
The current algorithm development and verification separation model leads to low efficiency. The algorithm is developed on the PC and the effect can only be demonstrated on the PC. The edge development process is lengthy, which reduces the efficiency of algorithm development.
By receiving mode indication signals, the data acquisition path can be dynamically switched. In development mode, the processed data can be directly received to verify the algorithm effect. In demonstration mode, the raw video data can be received and the algorithm can be processed and output autonomously, achieving a seamless connection between algorithm development and verification and product demonstration.
It effectively eliminates the conversion process between algorithm development and application, and improves the overall efficiency of algorithm development, verification and demonstration.
Smart Images
Figure CN121728322A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display control technology, and in particular to an algorithm development, verification and demonstration method, apparatus, device and storage medium. Background Technology
[0002] Currently, the common approach is to separate algorithm development, verification, and deployment. Algorithms are developed solely on PCs, and demonstrations can only be performed on PCs. Deploying algorithms requires a lengthy edge development process, significantly reducing development efficiency. Therefore, improving the efficiency of algorithm development, verification, and demonstration remains a problem that needs to be addressed.
[0003] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Summary of the Invention
[0004] The main objective of this application is to provide an algorithm development, verification, and demonstration method, apparatus, device, and storage medium, aiming to solve the technical problem of how to improve the efficiency of algorithm development, verification, and demonstration.
[0005] To achieve the above objectives, this application proposes an algorithm development, verification, and demonstration method, which includes: Receive mode indication signal; Image data and backlight data are acquired based on the mode indication signal; The backlight data is output to the backlight assembly, and the image data is converted into a demonstration drive signal and output to the demonstration device.
[0006] In one embodiment, the step of acquiring image data and backlight data based on the mode indication signal includes: When the mode indication signal indicates the development mode, image data and backlight data are received from the data communication interface; When the mode indicator signal indicates the demonstration mode, video data is received from the video input interface, and the video data is processed by an algorithm to generate image data and backlight data.
[0007] In one embodiment, the step of receiving video data from the video input interface includes: Obtain the target video source; Receive video data from the video input interface of the target video source.
[0008] In one embodiment, the step of processing the video data using an algorithm to generate image data and backlight data includes: The video data is subjected to image quality enhancement processing to generate the image data; The video data is subjected to backlight extraction processing to generate the backlight data.
[0009] In one embodiment, the step of converting the image data into a demonstration drive signal and outputting it to the demonstration device includes: The image data is converted into a demonstration drive signal in a low-voltage differential signal format; The demonstration drive signal is output to the demonstration device.
[0010] In one embodiment, the step of outputting the backlight data to the backlight assembly includes: The backlight data is encoded into a backlight control signal; The backlight control signal is output to the backlight assembly via a serial peripheral device interface.
[0011] In one embodiment, before the steps of receiving video data from the video input interface and performing algorithmic processing on the video data to generate image data and backlight data, the method further includes: Receive configuration parameters via serial communication interface; Adjust the processing parameters of the image enhancement algorithm and the backlight extraction algorithm based on the configuration parameters.
[0012] Furthermore, to achieve the above objectives, this application also proposes an algorithm development verification demonstration device, which includes: The receiving module is used to receive mode indication signals; The acquisition module is used to acquire image data and backlight data based on the mode indication signal; The output module is used to output the backlight data to the backlight component and convert the image data into a demonstration drive signal and output it to the demonstration device.
[0013] In addition, to achieve the above objectives, this application also proposes an algorithm development verification demonstration device, the device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the algorithm development verification demonstration method as described above.
[0014] In addition, to achieve the above objectives, this application also proposes a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the algorithm development, verification and demonstration method described above.
[0015] In addition, to achieve the above objectives, this application also provides a computer program product, which includes a computer program that, when executed by a processor, implements the steps of the algorithm development, verification, and demonstration method described above.
[0016] This application provides an algorithm development, verification, and demonstration method. The method involves receiving a mode indication signal; acquiring image data and backlight data based on the mode indication signal; outputting the backlight data to a backlight component; and converting the image data into a demonstration drive signal and outputting it to a demonstration device. By receiving the mode indication signal and dynamically switching the data acquisition path based on it, this application directly receives processed data in development mode to verify the algorithm's effectiveness, and receives raw video data in demonstration mode to autonomously complete algorithm processing and output. This achieves seamless integration between algorithm development verification and product demonstration, effectively eliminating the conversion step between algorithm research and development and practical application, thereby improving the overall efficiency of algorithm development, verification, and demonstration. Attached Figure Description
[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 A flowchart illustrating the first embodiment of the algorithm development, verification, and demonstration method of this application; Figure 2 A schematic diagram of the working structure of the development mode provided in Embodiment 1 of the algorithm development verification demonstration method of this application; Figure 3 A schematic diagram of the working structure of the demonstration mode provided in Embodiment 1 of the algorithm development and verification demonstration method of this application; Figure 4 A schematic diagram of the chain structure of the demonstration mode provided in Embodiment 1 of the algorithm development and verification demonstration method of this application; Figure 5 A flowchart illustrating the second embodiment of the algorithm development verification demonstration method of this application; Figure 6 This is a schematic diagram of the module structure of the algorithm development verification demonstration device for embodiments of this application; Figure 7 This is a schematic diagram of the device structure of the hardware operating environment involved in the algorithm development, verification, and demonstration method in this application embodiment.
[0020] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0021] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.
[0022] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.
[0023] This application receives a mode indication signal; acquires image data and backlight data based on the mode indication signal; outputs the backlight data to the backlight component; and converts the image data into a demonstration drive signal and outputs it to the demonstration device.
[0024] Currently, the common approach is to separate algorithm development, verification, and deployment. Algorithms are developed solely on PCs, and demonstrations can only be performed on PCs. Deploying algorithms requires a lengthy edge development process, significantly reducing development efficiency. Therefore, improving the efficiency of algorithm development, verification, and demonstration remains a problem that needs to be addressed.
[0025] This application receives a mode indicator signal and dynamically switches the data acquisition path based on the signal. In development mode, it directly receives processed data to verify the algorithm effect. In demonstration mode, it receives raw video data and autonomously completes algorithm processing and output. This achieves seamless connection between algorithm development and verification and product demonstration, effectively eliminating the conversion link between algorithm research and development and application, thereby improving the overall efficiency of algorithm development, verification and demonstration.
[0026] Based on this, the embodiments of this application provide an algorithm development, verification, and demonstration method, referring to... Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the algorithm development verification demonstration method of this application.
[0027] In this embodiment, the algorithm development, verification, and demonstration method includes steps S10 to S40: Step S10: Receive mode indication signal; It should be noted that the executing entity in this embodiment can be a computing service device with data processing, network communication, and program execution functions, such as a tablet computer, personal computer, or mobile phone, or an electronic device or algorithm development verification demonstration device capable of performing the above functions. The following description uses an algorithm development verification demonstration device as an example to illustrate this embodiment and the subsequent embodiments.
[0028] It should be noted that the specific structure of the algorithm development and verification demonstration platform includes a core processing unit, an input interface module, and an output interface module. The core processing unit can be a programmable logic device (PLC) responsible for executing the logical flow of the entire method. The input interface module may include a video input interface for receiving raw video data in demonstration mode. It should include at least one or more of a high-definition multimedia interface and a display port. A data communication interface is used to receive processed image data and backlight data in development mode and configuration parameters in demonstration mode. A cascaded communication interface is used for transmitting synchronization signals or video data with other verification platforms in daisy-chain demonstration mode. The output interface module may include a display driver interface for converting processed image data into a low-voltage differential signal format demonstration driver signal and outputting it to a liquid crystal display device. A backlight control interface is used to output backlight data to the backlight assembly, preferably a serial peripheral device interface, to precisely control the brightness of each area in the backlight module.
[0029] It should be noted that the platform receives a mode indication signal via its configuration pin or commands from the serial communication interface. This signal is a binary status quantity used to inform the system whether to enter development mode or demonstration mode. Development mode is used for algorithm verification, while demonstration mode is used for product demonstration.
[0030] Step S20: Acquire image data and backlight data based on the mode indication signal; It should be noted that the system's internal logic control unit switches the data acquisition path based on the mode indication signal. When the mode indication signal is in development mode, the platform's role is data execution and effect display. This allows algorithm engineers to quickly iterate and debug algorithms on a PC using high-level languages and rich libraries. They only need to send the algorithm results to the platform to immediately see the effects on a real screen with backlighting, improving the efficiency of early algorithm exploration and verification. In demonstration mode, the platform functions as an independent, fully functional terminal product. The platform simulates the real-world working scenario of the final product. It receives standard video streams and completes all processing using its integrated algorithm modules to demonstrate the effects.
[0031] It's important to note that image data refers to processed pixel information prepared for final display. It typically includes optimized brightness and color information, and its format is matched to the target display device. Backlight data, on the other hand, is a set of control commands or brightness values specifically used to control the luminous intensity of LEDs in different areas (zones) of the backlight module. Image data and backlight data are closely related in content and work synergistically in function. Image data determines the content displayed on the screen, while backlight data dynamically adjusts the backlight intensity based on that content. Precise synchronization between the two is necessary to achieve optimal local dimming display effects.
[0032] It should be noted that this can be used as a reference. Figure 2 , Figure 2 This diagram illustrates the working structure of the development mode. In this mode, the algorithm resides on the external PC portion of the platform, while the control board acts as an adapter. After image processing is completed on the PC, the processed image and backlight data are sent to the control board via Ethernet and serial ports. Upon receiving the data, the control board activates the LCD and backlight components. The key feature of the development mode is its use for developing and validating image enhancement and backlight extraction algorithms (Local-Dimming), with both algorithms deployed on the PC. At this point, the verification platform acts as a relay. The platform's input consists of an enhanced image and the backlight brightness value extracted by the backlight extraction algorithm. The image data is transmitted via Ethernet, and the backlight data is transmitted via a Universal Asynchronous Receiver / Transmitter (UART). The output is to send the image data to the LCD screen according to the Open Low Voltage Differential Display Interface (Open-LDI) protocol format, and to output the backlight brightness value to the backlight module via the SPI interface. Due to the bandwidth limitations of Ethernet, the development mode only supports the debugging and verification of image effects.
[0033] It should be noted that this can be used as a reference. Figure 3 , Figure 3This is a schematic diagram of the working structure in demonstration mode. In demonstration mode, the algorithm is located on the platform control board, and the external PC acts as a video source, transmitting video data to the control board through a high-definition multimedia interface (HDMI) or a display port (DisplayPort, DP). After receiving the video data, the platform performs image enhancement and backlight extraction to obtain image data and backlight data, which are then output to the LCD and backlight module. This mode is used for algorithm deployment and video effect demonstration. In this mode, the image enhancement algorithm and backlight extraction algorithm are deployed within the Field-Programmable Gate Array (FPGA) of the verification platform. The video source in demonstration mode can be either a PC or a custom video source (VDS), but only one can be used at a time; simultaneous use is not supported. The verification platform in demonstration mode, along with the LCD panel and backlight module, can be understood as a complete display product. The input to the verification platform can be unprocessed HDMI video from a PC or unprocessed video signal from a custom video source. Output data is the same as in development mode. In demonstration mode, the PC-based host computer acts as a parameter configuration and monitoring unit for the verification platform's operation. Communication between the host computer and the verification platform is via UART. The demonstration mode supports a daisy-chain-like demonstration mode; see reference [link / reference]. Figure 4 , Figure 4 This is a schematic diagram of the chain structure for demonstration mode. The daisy-chain demonstration mode is used to demonstrate the effects of different algorithms under the same hardware conditions. In this mode, the screens displayed on the n interconnected verification platforms will be completely synchronized.
[0034] Step S30: Output the backlight data to the backlight assembly, and convert the image data into a demonstration drive signal and output it to the demonstration device.
[0035] It should be noted that, on the one hand, the backlight data is sent to the backlight control circuit; on the other hand, the image data is converted into drive signals that conform to the display device interface specifications by a dedicated display control module before being output.
[0036] In one feasible approach, the step of converting the image data into a demonstration drive signal and outputting it to a demonstration device includes: converting the image data into a demonstration drive signal in a low-voltage differential signal format; and outputting the demonstration drive signal to the demonstration device.
[0037] It should be noted that the display timing controller module inside the programmable logic device reassembles the processed "image data" into a pixel data stream that conforms to the low-voltage differential signaling protocol requirements, according to parameters such as the target LCD screen's resolution and refresh rate. This data stream then drives the low-voltage differential signal transmitter chip to "convert" the parallel data into serial low-voltage differential signal pairs. The low-voltage differential signals are directly connected to the LCD screen's receiving end via the platform's display driver interface output cable, thereby driving the screen to display the image.
[0038] In one feasible approach, the step of outputting the backlight data to the backlight assembly includes: encoding the backlight data into a backlight control signal; and outputting the backlight control signal to the backlight assembly via a serial peripheral device interface.
[0039] It should be noted that the backlight data generated by the algorithm is typically a brightness value. The system encodes these values according to the communication protocol required by the backlight driver chip, forming a series of backlight control signals that can be recognized by the driver chip. The encoded control signals are then sent to the LED driver chip on the backlight module via the serial peripheral interface bus through the main controller of the programmable logic device's serial peripheral interface. Based on the received instructions, the chip precisely controls the brightness of the LEDs in each area.
[0040] This embodiment receives a mode indication signal; acquires image data and backlight data based on the mode indication signal; outputs the backlight data to the backlight component; and converts the image data into a demonstration drive signal and outputs it to the demonstration device. This embodiment receives a mode indication signal and dynamically switches the data acquisition path based on that signal. In development mode, it directly receives processed data to verify the algorithm's effectiveness; in demonstration mode, it receives raw video data and autonomously completes algorithm processing and output. This achieves seamless integration between algorithm development verification and product demonstration, effectively eliminating the conversion link between algorithm research and development and practical application, thereby improving the overall efficiency of algorithm development verification demonstration.
[0041] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to that in the first embodiment described above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 5 Step S20 also includes steps S201 to S202: Step S201: When the mode indication signal indicates the development mode, receive image data and backlight data from the data communication interface; It should be noted that in development mode, image data is generated by image enhancement algorithm software running on the computer. The image data is the processing result of the algorithm software and is transmitted to the verification platform as a file or data stream via data communication interfaces such as Ethernet. The platform treats it as the final output data and does not modify its content. Backlight data is generated by backlight extraction algorithm software (such as a local dimming algorithm) running on the computer. This algorithm analyzes the image content and calculates the ideal brightness required for the corresponding backlight zones. Backlight data is generated synchronously with image data and transmitted to the verification platform via a serial communication interface. The platform receives this data and directly uses it for backlight control.
[0042] Step S202: When the mode indication signal indicates the demonstration mode, video data is received from the video input interface, and the video data is processed by an algorithm to generate image data and backlight data.
[0043] It should be noted that in demonstration mode, the platform operates as a standalone product, receiving raw, unprocessed video streams from video input interfaces such as HD multimedia interfaces or display ports. Subsequently, the image enhancement algorithm module and backlight extraction algorithm module, pre-integrated in the programmable logic device, begin to work, processing the raw video data and generating image data for display and backlight data for backlight control in real time.
[0044] In one feasible approach, before the steps of receiving video data from the video input interface and processing the video data using algorithms to generate image data and backlight data, the method further includes: receiving configuration parameters through a serial communication interface; and adjusting the processing parameters of the image enhancement algorithm and the backlight extraction algorithm based on the configuration parameters.
[0045] It should be noted that in demonstration mode, the host computer software can send configuration parameters to the verification platform via a serial communication interface. These parameters can be those adjusting image quality (such as saturation and brightness gain) or parameters for the backlight algorithm. Upon receiving new configuration parameters, the platform updates the configuration registers of the corresponding algorithm function modules. For example, when the image enhancement module processes video data, it calls the new saturation parameters for calculation; the backlight extraction module also adjusts its brightness mapping curve based on the new dimming intensity parameters.
[0046] In one feasible approach, the step of receiving video data from the video input interface includes: acquiring a target video source; and receiving video data from the video input interface of the target video source.
[0047] It should be noted that during power-on initialization or mode switching, the platform obtains a list of currently connected video source devices by detecting the hot-plug detection pin levels of the high-definition multimedia interface and display port interface. Based on a preset priority strategy, the system selects a target video source from among multiple video sources as the active video input source and activates the decoder for that video channel to begin stably receiving video data. Other unselected video source interfaces are placed in an inactive state.
[0048] In one feasible approach, the step of processing the video data using an algorithm to generate image data and backlight data includes: performing image quality enhancement processing on the video data to generate the image data; and performing backlight extraction processing on the video data to generate the backlight data.
[0049] It should be noted that the original luminance and chrominance components, or red-green-blue format video data, are fed into the image enhancement pipeline. This pipeline specifically performs a series of processing steps, including color space conversion, gamma correction, sharpening, contrast enhancement, and noise reduction, ultimately outputting optimized image data. The same original video data is also fed into the backlight extraction algorithm module. This module analyzes the luminance information of each frame or each region of the image content, and calculates the required luminance values to drive the LEDs in different areas of the backlight module based on a local dimming algorithm, thus generating the backlight data.
[0050] In this embodiment, when the mode indicator signal indicates development mode, image data and backlight data are received from the data communication interface; when the mode indicator signal indicates demonstration mode, video data is received from the video input interface, and the video data is processed by an algorithm to generate image data and backlight data. This embodiment achieves seamless integration between algorithm development verification and product demonstration by employing different data acquisition methods in development and demonstration modes. In development mode, processed data is directly received to verify the algorithm's effectiveness; in demonstration mode, raw video data is received, and algorithm processing and output are completed autonomously. This improves the overall efficiency of algorithm development verification and demonstration.
[0051] This application also provides an algorithm development and verification demonstration device, please refer to... Figure 6 The algorithm development verification demonstration device includes: Receiver module 10 is used to receive mode indication signals; Acquisition module 20 is used to acquire image data and backlight data based on the mode indication signal; The output module 30 is used to output the backlight data to the backlight component and convert the image data into a demonstration drive signal and output it to the demonstration device.
[0052] This embodiment receives a mode indication signal; acquires image data and backlight data based on the mode indication signal; outputs the backlight data to the backlight component; and converts the image data into a demonstration drive signal and outputs it to the demonstration device. This embodiment receives a mode indication signal and dynamically switches the data acquisition path based on that signal. In development mode, it directly receives processed data to verify the algorithm's effectiveness; in demonstration mode, it receives raw video data and autonomously completes algorithm processing and output. This achieves seamless integration between algorithm development verification and product demonstration, effectively eliminating the conversion link between algorithm research and development and practical application, thereby improving the overall efficiency of algorithm development verification demonstration.
[0053] In one embodiment, the acquisition module 20 is further configured to receive image data and backlight data from the data communication interface when the mode indication signal indicates development mode; and to receive video data from the video input interface when the mode indication signal indicates demonstration mode, and to perform algorithmic processing on the video data to generate image data and backlight data.
[0054] In one embodiment, the acquisition module 20 is further configured to acquire a target video source and receive video data from the video input interface of the target video source.
[0055] In one embodiment, the acquisition module 20 is further configured to perform image quality enhancement processing on the video data to generate the image data; and to perform backlight extraction processing on the video data to generate the backlight data.
[0056] In one embodiment, the output module 30 is further configured to convert the image data into a demonstration drive signal in low voltage differential signal format; and output the demonstration drive signal to the demonstration device.
[0057] In one embodiment, the output module 30 is further configured to encode the backlight data into a backlight control signal; and output the backlight control signal to the backlight assembly via a serial peripheral device interface.
[0058] In one embodiment, the acquisition module 20 is further configured to receive configuration parameters through a serial communication interface; and adjust the processing parameters of the image enhancement algorithm and the backlight extraction algorithm based on the configuration parameters.
[0059] The algorithm development verification demonstration device provided in this application, employing the algorithm development verification demonstration method in the above embodiments, can solve the technical problem of how to improve the efficiency of algorithm development verification demonstration. Compared with the prior art, the beneficial effects of the algorithm development verification demonstration device provided in this application are the same as those of the algorithm development verification demonstration method provided in the above embodiments, and other technical features in the algorithm development verification demonstration device are the same as those disclosed in the methods of the above embodiments, and will not be repeated here.
[0060] This application provides an algorithm development and verification demonstration device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the algorithm development and verification demonstration method in Embodiment 1 above.
[0061] The following is for reference. Figure 7 The diagram illustrates a structural schematic suitable for implementing the algorithm development and verification demonstration device of this application. The algorithm development and verification demonstration device in this application may include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Description), PMPs (Portable Media Players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. Figure 7 The algorithm development and verification demonstration device shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.
[0062] like Figure 7As shown, the algorithm development and verification demonstration device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in ROM (Read Only Memory) 1002 or a program loaded from storage device 1003 into RAM (Random Access Memory) 1004. RAM 1004 also stores various programs and data required for the operation of the algorithm development and verification demonstration device. The processing unit 1001, ROM 1002, and RAM 1004 are interconnected via bus 1005. Input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to I / O interface 1006: input devices 1007 including, for example, touch screens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 1008 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 1003 including, for example, magnetic tapes, hard disks, etc.; and communication devices 1009. Communication device 1009 allows the algorithm development verification demonstration device to communicate wirelessly or wiredly with other devices to exchange data. While the figure shows an algorithm development verification demonstration device with various systems, it should be understood that implementation or possession of all the systems shown is not required. More or fewer systems may be implemented alternatively.
[0063] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.
[0064] The algorithm development verification and demonstration device provided in this application, employing the algorithm development verification and demonstration method in the above embodiments, can solve the technical problem of how to improve the efficiency of algorithm development verification and demonstration. Compared with the prior art, the beneficial effects of the algorithm development verification and demonstration device provided in this application are the same as the beneficial effects of the algorithm development verification and demonstration method provided in the above embodiments, and other technical features in this algorithm development verification and demonstration device are the same as those disclosed in the method of the previous embodiment, and will not be repeated here.
[0065] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.
[0066] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
[0067] This application provides a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, which are used to execute the algorithm development, verification, and demonstration method in the above embodiments.
[0068] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.
[0069] The aforementioned computer-readable storage medium may be included in the algorithm development and verification demonstration device; or it may exist independently and not assembled into the algorithm development and verification demonstration device.
[0070] The aforementioned computer-readable storage medium carries one or more programs that, when executed by the algorithm development and verification demonstration device, cause the algorithm development and verification demonstration device to: receive a mode indication signal; acquire image data and backlight data based on the mode indication signal; output the backlight data to the backlight component; and convert the image data into a demonstration drive signal and output it to the demonstration device.
[0071] Computer program code for performing the operations of this application can be written in one or more programming languages or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, and C++, and conventional procedural programming languages such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a Local Area Network (LAN) or a Wide Area Network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).
[0072] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.
[0073] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.
[0074] The readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for executing the above-described algorithm development, verification, and demonstration method, thereby solving the technical problem of how to improve the efficiency of algorithm development, verification, and demonstration. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the algorithm development, verification, and demonstration method provided in the above embodiments, and will not be repeated here.
[0075] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the algorithm development, verification, and demonstration method described above.
[0076] The computer program product provided in this application solves the technical problem of how to improve the efficiency of algorithm development, verification, and demonstration. Compared with the prior art, the beneficial effects of the computer program product provided in this application are the same as those of the algorithm development, verification, and demonstration method provided in the above embodiments, and will not be repeated here.
[0077] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.
Claims
1. A method for developing, verifying, and demonstrating an algorithm, characterized in that, The method includes: Receive mode indication signal; Image data and backlight data are acquired based on the mode indication signal; The backlight data is output to the backlight assembly, and the image data is converted into a demonstration drive signal and output to the demonstration device.
2. The method as described in claim 1, characterized in that, The step of acquiring image data and backlight data based on the pattern indication signal includes: When the mode indication signal indicates the development mode, image data and backlight data are received from the data communication interface; When the mode indicator signal indicates the demonstration mode, video data is received from the video input interface, and the video data is processed by an algorithm to generate image data and backlight data.
3. The method as described in claim 2, characterized in that, The step of receiving video data from the video input interface includes: Obtain the target video source; Receive video data from the video input interface of the target video source.
4. The method as described in claim 2, characterized in that, The step of processing the video data using an algorithm to generate image data and backlight data includes: The video data is subjected to image quality enhancement processing to generate the image data; The video data is subjected to backlight extraction processing to generate the backlight data.
5. The method as described in claim 1, characterized in that, The step of converting the image data into a demonstration drive signal and outputting it to the demonstration device includes: The image data is converted into a demonstration drive signal in a low-voltage differential signal format; The demonstration drive signal is output to the demonstration device.
6. The method as described in claim 1, characterized in that, The step of outputting the backlight data to the backlight assembly includes: The backlight data is encoded into a backlight control signal; The backlight control signal is output to the backlight assembly via a serial peripheral device interface.
7. The method as described in claim 2, characterized in that, Before the step of receiving video data from the video input interface and processing the video data using an algorithm to generate image data and backlight data, the method further includes: Receive configuration parameters via serial communication interface; The processing parameters of the image enhancement algorithm and the backlight extraction algorithm are adjusted based on the configuration parameters.
8. An algorithm development verification and demonstration device, characterized in that, The device includes: The receiving module is used to receive mode indication signals; The acquisition module is used to acquire image data and backlight data based on the mode indication signal; The output module is used to output the backlight data to the backlight component and convert the image data into a demonstration drive signal and output it to the demonstration device.
9. An algorithm development verification and demonstration device, characterized in that, The device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the algorithm development, verification, and demonstration method as described in any one of claims 1 to 7.
10. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements the algorithm development, verification, and demonstration method as described in any one of claims 1 to 7.