Preparation method of low-resistance silicon carbide coating based on molybdenum / tantalum metal electrode

Abstract

The invention relates to a preparation method of a low-resistance silicon carbide coating based on a molybdenum / tantalum metal electrode, which comprises the following steps: S1, substrate pretreatment: carrying out mechanical micro roughening, ultrasonic cleaning and drying on a Mo / Ta electrode, and then reducing to remove an oxidation film; s2, Si-rich nucleation: taking methyl trichlorosilane as a Si / C common source, hydrogen as carrier gas / reducing gas and nitrogen as an n-type doping source for gas supply to form a compact nucleation layer; s3, main body deposition is conducted, specifically, the temperature is adjusted to 1140-1180 DEG C, the total pressure is maintained to be 80-120 Torr, and gas supply continues to be conducted for deposition; s4, annealing and dechlorination: stopping methyl trichlorosilane, keeping hydrogen and nitrogen flushing, and then annealing; and S5, cooling and shaping: cooling and taking out the sample annealed in the step S4, and adjusting the surface roughness to a set value to obtain the low-resistance silicon carbide coating on the Mo / Ta electrode. Compared with the prior art, on the premise that conductivity is not sacrificed, atomic oxygen / oxygen ion resistance, sputtering resistance, thermal cycling stability and the like of the Mo / Ta electrode can be remarkably improved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of low-resistance silicon carbide coating and relates to a preparation method of a low-resistance silicon carbide coating based on a molybdenum / tantalum metal electrode. BACKGROUND

[0002] Molybdenum (Mo) and tantalum (Ta) are widely used as key components of spacecraft propulsion system grids, arc triggers, plasma source electrodes and the like due to their high melting points and excellent electrical conductivity. In the near-earth orbit atomic oxygen, oxygen ions and thermal cycle environment, molybdenum is easy to generate volatile molybdenum trioxide (MoO3), and the tantalum surface forms an insulating Ta2O5 film, resulting in resistance drift and life attenuation. Although the traditional insulating coating can resist corrosion, it will damage the electrical continuity of the electrode. The conductive silicon carbide (SiC) coating has both corrosion resistance and adjustable electrical conductivity, and is suitable for electrode surface protection and performance stabilization.

[0003] The existing SiC coating technology on metal-based (Mo / Ta) is generally divided into direct MTS / H2-CVD, composite process of forming a siliconized / carbonized transition layer first, and PVD thin film followed by medium temperature densification, which generally has the following pain points: (1) Interfacial reaction and thermal stress mismatch: Mo / Ta is easy to form brittle intermediate layers such as Mo2C / TaC, MoSi2 / TaSi2 with C / Si at high temperature, which leads to decreased adhesion after thickening; at the same time, the CTE difference with 3C-SiC is amplified in cold and hot cycles, resulting in microcracks and edge peeling.

[0004] (2) Gas phase side reactions and residues: Insufficient dilution or unstable flow field in MTS system can easily cause gas phase polymerization and particle co-deposition, increase of film porosity and Cl residues, and decrease of densification and corrosion resistance, resulting in larger resistance spread.

[0005] (3) Insufficient controllability of nitrogen doping: N2 doping is significantly affected by partial pressure / temperature / flow field, and over-doping can introduce point defects and reduce mobility, and uneven doping can also cause resistance drift and poor repeatability of contact resistance.

[0006] (4) Environmental stability hazards: In the atomic oxygen / oxygen ion and plasma sputtering, the surface is easy to generate insulating SiO2 or roughen, and if the interface defects are too many, it is easy to induce arc instability and local insulation.

[0007] (5) Complex morphology coverage and narrow thickness window: The thickness of small-scale electrodes such as grid holes, sharp edges and shadow areas is uneven; >10µm thick films have high internal stress and are easy to crack, and <3µm is difficult to provide sufficient corrosion resistance life.

[0008] (6) amplification and consistency: small temperature / ratio / suction drift between batches can cause thickness and electrical properties ± 10% fluctuation, online monitoring and SPC system is insufficient; tail gas HCl intensifies the corrosion of pipeline and sealing, and maintenance cost. SUMMARY

[0009] The purpose of the present application is to provide a preparation method of low resistance silicon carbide coating based on molybdenum / tantalum metal electrode, which realizes dense coating, low resistance, strong adhesion and excellent thermal cycle stability through optimized CVD process.

[0010] The purpose of the present application can be realized by the following technical solutions: A preparation method of low resistance silicon carbide coating based on molybdenum / tantalum metal electrode, comprising the following steps: S1, substrate pretreatment: The Mo / Ta electrode is mechanically roughened, ultrasonically cleaned, dried, and then reduced to remove the oxide film to obtain the pretreated Mo / Ta electrode substrate; S2, Si-rich nucleation: The Mo / Ta electrode substrate obtained in S1 is placed at 1120~1150℃, 80~120 Torr, and methyltrichlorosilane (MTS) is used as Si / C co-source, hydrogen as carrier gas / reducing gas, and nitrogen as n-type doping source to form a dense nucleation layer; S3, main body deposition: Adjust the temperature to 1140~1180℃, maintain the total pressure at 80~120 Torr, continue to supply gas for deposition; S4, annealing and dechlorination: Turn off the methyltrichlorosilane, keep flushing with hydrogen and nitrogen, and then perform annealing; S5, cooling and shaping: The sample after annealing in S4 is cooled and taken out, the surface roughness is adjusted to a set value, and a low resistance silicon carbide coating on the Mo / Ta electrode is obtained.

[0011] Further, in S1, the mechanical roughening is to adjust the surface roughness Ra of the Mo / Ta electrode to 0.1~0.3μm by mechanical method; The drying temperature is 120~200℃.

[0012] Further, in S1, the process of reducing and removing the oxide film is: reducing treatment at 600~800℃ for 5~10min in hydrogen atmosphere.

[0013] Further, in S2, the volume ratio of methyltrichlorosilane to hydrogen is 30~100:1, and the volume fraction of nitrogen in the gas supply system is 10~20%.

[0014] Further, in S2, the gas supply time is 1-3 min.

[0015] Further, in S3, the volume ratio of methyltrichlorosilane to hydrogen in the gas supply system is (45-55):1, and the volume fraction of nitrogen in the gas supply system is 18-22%. The deposition time is 60-180 min.

[0016] Further, in S4, the ratio of hydrogen to nitrogen is maintained consistent with that in S3.

[0017] Further, in S4, the process conditions for annealing are as follows: annealing at 900-1000 DEG C for 10-30 min in an Ar / H2 mixed atmosphere.

[0018] Further, in S5, the surface roughness of the sample is adjusted to Ra 0.05-0.3 µm.

[0019] Further, in S5, the thickness of the obtained low-resistance silicon carbide coating is 2-15 µm.

[0020] The traditional silicon carbide coating is mostly high-resistance, and by passing a large proportion of nitrogen in the MTS deposition process, nitrogen atoms will diffuse and be doped into the silicon carbide coating during the deposition process. These doped nitrogen atoms can provide a large number of electrons as carriers, thereby improving the electrical conductivity.

[0021] Si-rich nucleation process (first): the silicon source is relatively more "rich" (excess Si / less carbon source), and the reaction is more biased towards "first lay down silicon-related species, make it easier for SiC to nucleate". Deposition often forms a very thin transition / nucleation layer (which can be understood as SiCx (x<1) or SiC initial structure with a small amount of free Si), with very fine grains and high nucleation density. It can reduce the nucleation barrier, improve adhesion, inhibit pinhole / island growth, and create a uniform interface for subsequent continuous and dense growth.

[0022] Main deposition process (later): the ratio is pulled back to near the stoichiometric ratio (Si=C), or slightly adjusted to be Si-rich / C-rich according to the target properties, but the overall focus is on "stable and thick, long and dense". The main thickness of the SiC main layer (grain growth, structure closer to the target phase, such as beta-SiC) is formed, and the thickness, density, conductivity, corrosion resistance, hardness and other key performance are mainly determined by this section.

[0023] Compared with the prior art, the present application has the following advantages: (1) Without sacrificing electrical conductivity, significantly improving the atomic oxygen / oxygen ion resistance, sputtering and thermal cycle stability of Mo / Ta electrodes; (2) The coating is dense, low chlorine residual, low defect, and the room temperature resistivity is less than or equal to 10 -2 ~10 -3 Ω·cm, and the contact resistance is low. (3) The process window is wide, suitable for batch small component consistency deposition, and the annual output is greater than or equal to 500 pieces. BRIEF DESCRIPTION OF DRAWINGS

[0024] Fig. 1 XRD pattern of the low resistance silicon carbide coating prepared in Example 1; Fig. 2 Cross-sectional view of the low resistance silicon carbide coating prepared in Example 1; Fig. 3 Surface view of the low resistance silicon carbide coating prepared in Example 1. DETAILED DESCRIPTION

[0025] The application will be described in detail below with reference to the accompanying drawings and specific examples. The present embodiment is implemented on the premise of the technical solution of the present application, and gives a detailed implementation and specific operation process, but the protection scope of the present application is not limited to the following examples.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0027] The selection range of the terms "and / or", "or / and", and "and / or" used herein includes any one of two or more related listed items, and also includes any and all combinations of related listed items, including any two related listed items, any more related listed items, or all related listed items. It should be noted that when at least two conjunctions selected from "and / or", "or / and", and "and / or" are combined to connect at least three items, it should be understood that in the present application, the technical solution undoubtedly includes the technical solution connected by "logical and", and also undoubtedly includes the technical solution connected by "logical or".

[0028] In the present application, the technical features described in an open manner include both the closed technical solution consisting of the listed features and the open technical solution containing the listed features.

[0029] In the present application, when referring to numerical intervals, unless otherwise specified, the numerical intervals are considered to be continuous, and include the minimum and maximum values of the range, as well as every value between the minimum and maximum values. Further, when ranges are provided for integers, every integer between the minimum and maximum values is included. In addition, when multiple ranges are provided to describe a characteristic or a property, the ranges can be combined. In other words, unless otherwise indicated, all ranges disclosed herein are to be understood to include any and all sub-ranges subsumed therein.

[0030] Only some numerical ranges are specifically disclosed herein. However, any lower limit can be combined with any upper limit to form a range not explicitly recited; and any lower limit can be combined with any other lower limit to form a range not explicitly recited, as can any upper limit be combined with any other upper limit to form a range not explicitly recited. In addition, each individual disclosed point or single numerical value can itself be combined as a lower limit or an upper limit with any other point or single numerical value or with other lower limits or upper limits to form a range not explicitly recited.

[0031] In the present application, unless otherwise specified, the temperature parameters allow for both constant temperature treatment and treatment within a certain temperature interval. The constant temperature treatment allows for fluctuations within the accuracy of the instrument control. Fluctuations within a range of, for example, ±5°C, ±4°C, ±3°C, ±2°C, ±1°C are allowed.

[0032] In the present application, “suitable”, “suitably”, “any suitable way”, and the like, are used in the sense of enabling the technical solutions of the present application, solving the technical problems of the present application, and achieving the intended technical effects of the present application.

[0033] In the present application, “further”, “even further”, “in particular”, and the like, are used for the purpose of description, and should not be understood as limiting the scope of protection of the present application.

[0034] In the present application, “optionally”, “optional”, and the like, mean that something can or can not be present, i.e., either of the two parallel options “yes” or “no” is selected. If multiple “optionally” appear in a technical solution, unless otherwise specified, and there is no contradiction or mutual restriction, each “optionally” is independent of each other.

[0035] In the description of the application, “multiple” means at least two, for example, two, three, etc., unless otherwise specifically limited.

[0036] Unless otherwise indicated, all formulations and tests herein occur in an environment of 25°C.

[0037] "comprise", "contain", "include", "have" or other variants thereof are intended to be open-ended, not limiting. The terms "comprising", "comprise" and "comprises" do not exclude other steps or elements not mentioned or other steps or elements not mentioned. The compositions and methods / processes of the present application comprise, consist essentially of and consist of the essential elements and limitations described herein, as well as any additional or optional ingredients, components, steps or limitations described herein. The terms "efficacy", "performance", "effect", "efficiency" are not distinguished between herein.

[0038] If not specified, all embodiments and optional embodiments of the present application can be combined to form new technical solutions. If not specified, all technical features and optional technical features of the present application can be combined to form new technical solutions.

[0039] If not specified, all steps of the present application can be performed in sequence or randomly, preferably in sequence.

[0040] In order to realize dense, low resistance, strong adhesion and excellent thermal cycle stability of the coating, the present application provides a preparation method of low resistance silicon carbide coating based on molybdenum / tantalum metal electrode, comprising the following steps: S1, substrate pretreatment: The Mo / Ta electrode is mechanically roughened, ultrasonically cleaned, dried, and then reduced to remove the oxide film to obtain the pretreated Mo / Ta electrode substrate; S2, Si-rich nucleation: The Mo / Ta electrode substrate obtained in S1 is placed at 1120-1150℃, 80-120 Torr, and methyltrichlorosilane is used as Si / C co-source, hydrogen as carrier gas / reducing gas, and nitrogen as n-type doping source to form a dense nucleation layer; S3, main body deposition: Adjust the temperature to 1140-1180℃, maintain the total pressure at 80-120 Torr, continue to supply gas for deposition; S4, annealing and chlorine removal: Turn off the methyltrichlorosilane, keep flushing with hydrogen and nitrogen, and then perform annealing; S5, cooling and shaping: The sample after annealing in S4 is cooled and taken out, the surface roughness is adjusted to a set value, and a low resistance silicon carbide coating on the Mo / Ta electrode is obtained.

[0041] Here, it should be pointed out that the Mo / Ta electrode of the present application is a Mo electrode, a Ta electrode, or a Mo-Ta alloy electrode, etc.

[0042] In some specific embodiments, in S1, the mechanical micro-roughening is to adjust the roughness Ra of the Mo / Ta electrode surface to 0.1-0.3 μm by mechanical means; the drying temperature is 120-200 ℃. In addition, the solvent used for ultrasonic cleaning can be deionized water or the like.

[0043] In some specific embodiments, in S1, the process of reducing and removing the oxide film is to reduce and treat at 600-800 ℃ for 5-10 min in a hydrogen atmosphere. Here, the hydrogen atmosphere is provided by hydrogen / argon mixed gas, wherein the volume fraction of hydrogen can be 5% or the like.

[0044] In some specific embodiments, in S2, the volume ratio of methyltrichlorosilane to hydrogen is 30-100:1, and preferably, the volume ratio is 50:1, and the volume fraction of nitrogen in the gas supply system is 10-20%.

[0045] In some specific embodiments, in S2, the gas supply time is 1-3 min, which is used to form a thin transition layer (<0.5 μm) (carbide / silicide) as a bonding and buffer layer, and by controlling the nucleation time and temperature, the formation of a thick and brittle layer is avoided, so that the adhesion of the subsequent coating can be improved, etc. On the one hand, the thin transition layer can improve the chemical bonding at the interface: the carbide can form stable covalent / metallic-covalent bonds with the substrate, significantly reduce the interface reaction barrier and improve the wetting and nucleation density, so that the subsequent main coating layer is changed from "island growth" to continuous and dense coverage; on the other hand, as a bonding and buffer layer, its fine grains and gradient chemical composition can disperse thermal stress and growth stress, and inhibit the expansion of interface defects, pinholes and micro-cracks. By controlling the nucleation time and temperature, the formation of a thick and brittle reaction layer is avoided, so that the adhesion and anti-peeling ability of the coating are improved without sacrificing toughness.

[0046] In some specific embodiments, in S3, the volume ratio of methyltrichlorosilane to hydrogen in the gas supply system is maintained at (45-55):1, and preferably, the volume ratio is 50:1, and the volume fraction of nitrogen in the gas supply system is 18-22%, and preferably, the volume fraction is 20% or the like; in S3, the deposition time is 60-180 min, and specifically, the deposition rate can be controlled to 3-8 μm / h to obtain a coating layer with a target thickness of 3-10 μm.

[0047] In some specific embodiments, in S4, the ratio of hydrogen to nitrogen is maintained the same as in S3.

[0048] In some specific embodiments, in S4, the annealing process conditions are as follows: Ar / H2 annealing at 900-1000 ℃ for 10-30 min, and preferably, the volume fraction of H2 can be 5% or the like.

[0049] In some specific embodiments, in S5, the sample surface roughness is adjusted to Ra 0.05-0.3 μm.

[0050] In some specific embodiments, in S5, the obtained low-resistance silicon carbide coating has a thickness of 2-15 μm, and a room-temperature bulk resistivity of ≤10 -2 ~10 -3 Ω·cm; a contact resistance p c ≤1×10 -5 Ω·cm 2 .

[0051] Each of the above embodiments can be implemented alone or in any two or more combinations.

[0052] The above embodiments will be described in more detail below in conjunction with specific examples.

[0053] Example 1 This example provides a method for preparing a low-resistance silicon carbide coating based on a molybdenum metal electrode, comprising the following steps: S1, substrate pretreatment: The Mo electrode is mechanically micro-roughened to a surface roughness Ra=0.2 μm, ultrasonically cleaned, dried at 160°C, and then reduced at a temperature of 700°C in a hydrogen atmosphere for 7 min to remove the oxide film by reduction, thereby obtaining a pretreated Mo electrode substrate; S2, Si-rich nucleation: The Mo electrode substrate obtained in S1 is placed in a 1120°C, 100 Torr environment, and is supplied with methyltrichlorosilane as a Si / C co-source, hydrogen as a carrier / reducing gas, and nitrogen as an n-type doping source for 2 min, with a total gas flow rate of 5000 sccm, wherein the volume ratio of H2:MTS is 50:1, and the volume fraction of N2 is 20%, thereby forming a dense nucleation layer; S3, main body deposition: The temperature is adjusted to 1150°C, the total pressure is maintained at 100 Torr, and the deposition is continued for 90 min while maintaining the volume ratio of H2:MTS at 50:1 and the volume fraction of N2 at 20%; S4, annealing and chlorine removal: The methyltrichlorosilane is turned off, and the hydrogen and nitrogen (with the same ratio) are flushed, and then annealing is performed at 950°C in an argon atmosphere for 20 min; S5, cooling and shaping: The sample after annealing in S4 is removed by controlled cooling, and if necessary, it is slightly mechanically / ionically polished to adjust the surface roughness to Ra 0.2 μm or so, thereby obtaining a low-resistance silicon carbide coating on the Mo electrode, which has a thickness of 6 μm.

[0054] The low-resistance silicon carbide coating of Example 1 was tested, and its room temperature p≈8×10 -3 Ω·cm; after 1000 times of thermal cycling between -70 and 300℃, the sheet resistance drift was about 8%.

[0055] The performance test method or process of the above low-resistance silicon carbide coating is as follows: (1) Initial sheet resistance measurement (Rs0): Place the sample at (25±2)℃ for ≥30 min to reach thermal equilibrium; use the four-probe method to make multi-point measurements (such as 9-point / 25-point grid) in the effective area, and take the average value as Rs0. The four-probe measurement process can refer to ASTM F84 or SEMI MF84 (both are general method frameworks for four-probe resistance measurement).

[0056] (2) Thermal cycling (1000 cycles): Place the sample in a temperature cycling oven, and select the high and low temperature endpoints and temperature rise and fall conditions according to JEDEC JESD22-A104 (Temperature Cycling) (industry common windows such as -40℃ ↔ +125℃ or more severe -65℃ ↔ +150℃), set the specified dwell time (for example, 5-15 min) at the high and low temperature endpoints, and complete 1000 cycles continuously. This type of "temperature cycling / temperature change" can also be performed according to the method system of IEC 60068-2-14.

[0057] (3) Sheet resistance measurement after cycling (Rs 1000 ): After the cycle is completed, the sample is restored to (25±2)℃ and stabilized for ≥30 min, and Rs 1000 is measured using the same probe spacing, pressure, measurement point location, and statistical method as in step (1).

[0058] (4) Drift calculation and criteria: Based on the above formula calculation, the sheet resistance drift of the low-resistance silicon carbide coating in Example 1 is about 8%. At the same time, it can be known from Figs. 1 to 3 that Fig. 1 is the XRD spectrum of the coating surface, and the characteristic diffraction peaks consistent with silicon carbide can be seen, indicating that the deposition layer is mainly composed of SiC and has a certain crystallinity. Fig. 2 is the cross-sectional morphology of the metal substrate / coating, a continuous carbide transition layer is formed between the substrate and the SiC main layer, the interface profile is clear and there is no obvious debonding gap, showing that the transition layer can achieve effective bonding and play a stress buffering role. Fig. 3The display coating surface is composed of dense island-like unit stacks, with close connection between islands and fewer pores, reflecting that the coating has high coverage and densification degree, which is beneficial to improve its service stability and protective performance.

[0059] Example 2: Compared with Example 1, most of them are the same, except that in this example: Ta electrode is used as the substrate, the temperature during deposition is 1150℃, and the vacuum degree is 90 Torr. In addition, the deposition time is controlled for 120 min, and the coating thickness is 8 μm.

[0060] The low-resistance silicon carbide of Example 2 is tested, which is accumulated for 10 + minutes under 100 eV plasma. 5 After sputtering, the surface is not peeled off, and the change of p is less than 10%. Specifically, before sputtering, p0= 2.50×10 -3 Ω·cm, and after sputtering, p 10 5 s = 2.60×10 -3 Ω·cm Comparative Example 1: Compared with Example 1, most of them are the same, except that the Si-rich nucleation process is omitted, that is, the pretreated substrate is directly subjected to main body deposition, and the deposition time is adjusted to 95 min.

[0061] Comparative Example 2: Compared with Example 1, most of them are the same, except that the annealing process is changed to be carried out in air atmosphere.

[0062] Comparative Example 3: Compared with Example 1, most of them are the same, except that nitrogen is replaced by equal volume fraction of argon.

[0063] Comparative Example 4: Compared with Example 1, most of them are the same, except that the volume ratio of H2 to MTS is adjusted to 20:1.

[0064] The low-resistance silicon carbide coatings obtained in Example 1 and Comparative Examples 1 to 4 are tested for performance, as shown in Table 1 below.

[0065] Table 1 Comparing Example 1 with Comparative Example 1, from the observed morphology, Comparative Example 1 is more prone to interface microcracks / local peeling, larger sheet resistance drift after thermal cycling, and O +The resistivity rises more obviously after / AO, even peeling off; while the example 1 generally shows stronger interface bonding, less drift, more stable against bombardment / thermal cycling. The reasons are analyzed as follows: (1) nucleation and wetting mechanism, interface bonding and stress buffer, and failure path are obviously different: (1) nucleation and wetting mechanism, the Si-rich short-time nucleation of the present application forms a thin transition layer (carbide / silicide or SiC x ) of <0.5 μm on the substrate surface, significantly improving the nucleation density and wettability, and making the subsequent SiC grow from "island-like discrete growth" to faster continuous coverage; while if the step is omitted in the comparative example 1, the early stage is often island growth with low nucleation density, and the island boundary / pore is more difficult to completely eliminate, becoming a channel for subsequent oxygen corrosion and crack initiation; (2) interface bonding and stress buffer, the transition layer introduced in the example 1 provides stronger chemical bonding (bonding formed by interface reaction) and establishes a "chemical / elastic gradient", which can reduce the peak value of interfacial shear stress caused by thermal expansion mismatch; while if the transition layer is absent in the comparative example 1, SiC directly collides with the metal substrate, and interfacial fatigue cracking is more likely to occur during thermal cycling → contact area decreases → sheet resistance / ρ drift amplification; (3) failure path, since O + / AO or sputtering will preferentially attack pores, grain boundaries and interface defects; the comparative example 1 has more defects, resulting in faster reduction of the effective conductive cross-sectional area or the formation of a local insulating oxide layer, thus the ρ rises more obviously.

[0066] Comparing the example 1 with the comparative example 2, the annealing atmosphere of the two is different, and accordingly, after air annealing of the comparative example 2, the surface / interface oxidation, contact resistance rise, O + electrical drift after bombardment is intensified; the thermal cycle stability may also be deteriorated. The reasons are analyzed as follows: (1) the comparative example 2 will introduce "insulating layer / potential barrier" through oxidation in air atmosphere, thus, high-temperature annealing in air will generate SiO2 / metal oxide and other high-resistance phases on the surface of SiC, grain boundaries or metal / transition layer interface, forming "series resistance" and "contact potential barrier", directly pushing up ρ and R c ; while the specific protective atmosphere (inert / reducing or hydrogen-containing atmosphere) of the example 1 can inhibit the formation of such oxide film or promote its reduction / volatilization, thus maintaining low resistance; (2) chemical change of grain boundaries and defects, the oxygen introduced in the comparative example 2 tends to be enriched in grain boundaries and pores, resulting in the rise of grain boundary resistance and the cutting off of the current carrying channel; the subsequent O + / AO bombardment will further accelerate the oxidation expansion, causing the amplification of ρ drift; (3) mechanical reliability. The volume effect of the oxidation product of the comparative example 2 (Pilling-Bedworth related volume expansion) will introduce additional stress sources at the interface, which is more likely to induce micro-cracks and local peeling in thermal cycling.

[0067] Comparing Example 1 with Comparative Example 3, it is found that the initial resistivity is higher, the contact resistance rises, and the post-AO / O + drift is more obvious after Ar is replaced by N2. The reasons are analyzed as follows: (1) the roots of electrical regulation are different. Ar is basically inert and only plays a role of dilution / plasma momentum transfer; while N2 introduced in Example 1 can participate in defect chemistry and slight doping (forming donor-type defects or changing the intrinsic defect balance) in high-temperature CVD / annealing, thereby increasing the effective carrier concentration and reducing the grain boundary barrier, so as to realize "low resistance"; (2) low-resistance SiC is often limited by the grain boundary / interface barrier. The introduction of N can reduce the grain boundary trap state density or change the Fermi level position, so that the grain boundary is more "conductive"; after Ar is replaced, these effects disappear, and the proportion of grain boundary resistance increases, which is manifested as higher p and Rc; (3) in terms of oxygen ion resistance / AO stability, when the carrier concentration is higher and the grain boundary barrier is lower, even if the surface is slightly oxidized, the overall conductive network is still more stable; otherwise, Comparative Example 3 is more likely to have the phenomenon that "a thin oxide layer significantly raises the resistance".

[0068] Comparing Example 1 with Comparative Example 4, it is found that when the proportion deviates from the best window, the deposition morphology is coarser and the porosity increases, the proportion of free Si or non-stoichiometric SiC x increases, resulting in poor sputtering and electrical stability; the post-O + / AO p drift increases. The reason is that the competition between gas phase reaction and surface reaction is affected. Since H2: MTS determines the precursor cracking path, active group concentration and surface growth mode, too strong / weak H2 will change the effective supply ratio of Si / C and migration length, thereby causing the increase of grain boundary phase / second phase, insufficient densification, stress and defects, etc. At the same time, free Si / soft phase also appears, which is more easily removed selectively in the sputtering and oxidation environment, quickly roughened and raised in sheet resistance.

[0069] The above description of the embodiments is for the purpose of enabling a person of ordinary skill in the art to understand and use the application. Those skilled in the art can easily make various modifications to these embodiments, and apply the general principles described herein to other embodiments without creative labor. Therefore, the present application is not limited to the above embodiments, and improvements and modifications made by those skilled in the art without departing from the scope of the present application should be within the scope of protection of the present application.

Claims

1. A method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode, characterized in that, Includes the following steps: S1. Matrix pretreatment: The Mo / Ta electrode was mechanically roughened, ultrasonically cleaned, and dried. Then, the oxide film was removed by reduction to obtain the pretreated Mo / Ta electrode substrate. S2, Si-rich nucleation: The Mo / Ta electrode substrate obtained in S1 was placed at 1120~1150℃ and 80~120 Torr, with methyltrichlorosilane as the Si / C common source, hydrogen as the carrier / reducing gas, and nitrogen as the n-type dopant source to form a dense nucleation layer. S3, Main sedimentary deposits: Adjust the temperature to 1140~1180℃, maintain the total pressure at 80~120 Torr, and continue to supply gas for deposition; S4. Annealing and dechlorination: Shut down methyltrichlorosilane, maintain hydrogen and nitrogen purging, and then proceed with annealing; S5, Cooling and Shaping: The annealed sample in S4 is cooled and removed, and the surface roughness is adjusted to the set value to obtain a low-resistivity silicon carbide coating on the Mo / Ta electrode.

2. The method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode according to claim 1, characterized in that, The mechanical micro-roughening refers to adjusting the surface roughness of the Mo / Ta electrode, Ra = 0.1~0.3 μm, using mechanical methods; The drying temperature is 120~200℃.

3. The method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode according to claim 1, characterized in that, In S1, the process of reducing and removing the oxide film is as follows: under a hydrogen atmosphere, the reduction treatment is carried out at a temperature of 600~800℃ for 5~10 minutes.

4. The method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode according to claim 1, characterized in that, In S2, the volume ratio of methyltrichlorosilane to hydrogen is 30~100:1, and the volume fraction of nitrogen in the gas supply system is 10~20%.

5. The method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode according to claim 1, characterized in that, In S2, the gas supply time is 1~3 minutes.

6. The method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode according to claim 1, characterized in that, In S3, the volume ratio of methyltrichlorosilane to hydrogen in the gas supply system is maintained at (45~55):1, and the volume fraction of nitrogen in the gas supply system is 18~22%. The deposition time is 60~180 min.

7. The method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode according to claim 1, characterized in that, In S4, the ratio of hydrogen to nitrogen remains the same as in S3.

8. The method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode according to claim 1, characterized in that, In S4, the annealing process conditions are: annealing at 900~1000℃ in a mixed atmosphere of Ar and H2 for 10~30 min.

9. The method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode according to claim 1, characterized in that, In S5, the surface roughness of the sample is adjusted to Ra = 0.05~0.3 μm.

10. The method for preparing a low-resistivity silicon carbide coating based on a molybdenum / tantalum metal electrode according to claim 1, characterized in that, In S5, the thickness of the resulting low-resistivity silicon carbide coating is 2~15 μm.

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