Satellite storage battery hardware under-voltage protection circuit

Abstract

The invention discloses a satellite storage battery hardware under-voltage protection circuit comprising a sampling pulse signal circuit configured to sample the voltage of a storage battery pack and output three paths of independent driving signals to a two-out-of-three circuit; the two-out-of-three circuit is configured to receive the driving signals, and when any two paths of driving signals are valid, a discharging disconnection instruction is output to the switching circuit; and a switching circuit configured to connect the battery pack and the bus, and to disconnect the discharge path when receiving the discharge disconnect instruction. According to the scheme, high-reliability protection is realized through a hardware circuit, and a high-level driving signal is converted into a pulse signal, so that the service life of a relay coil is prevented from being shortened due to long-term power-on, and the circuit is suitable for application scenes such as satellites with extremely high reliability requirements.

Description

Technical Field

[0001] This invention relates to the field of satellite energy system technology, and in particular to a satellite battery hardware undervoltage protection circuit. Background Technology

[0002] During satellite operation, the energy system is the core support for ensuring the normal operation of the entire satellite. As a key component of the satellite's energy system, the battery pack undertakes the dual core functions of energy storage and emergency power supply. In low Earth orbit, deep space orbit, and other operating scenarios, satellites periodically experience alternating cycles of illuminated and shaded areas. In illuminated areas, the solar panels convert solar energy into electrical energy, directly powering various electrical loads on the satellite and charging the battery pack to store excess energy. In shaded areas (such as when the Earth or another celestial body blocks energy), the solar panels cannot convert energy. At this time, the battery pack must serve as the sole energy supply unit, continuously providing stable power to the satellite's control system, communication system, payload, and other electrical loads. The stability and reliability of its operation directly determine the safety of the satellite's on-orbit operation, the continuity of mission execution, and thus have a decisive impact on the overall lifespan of the satellite.

[0003] However, if over-discharge occurs during long-term cyclic charging and discharging of satellite battery packs, it will seriously damage their performance and lifespan. Specifically, over-discharging of batteries can lead to irreversible chemical changes such as the shedding of active materials from internal electrodes and the decomposition of electrolytes. This not only significantly accelerates the rate of battery capacity decay and reduces cycle life, but also increases the battery's internal resistance and reduces charging and discharging efficiency. In severe cases, it can directly cause battery failure and premature scrapping, leading to significant risks such as satellite power outages, inability to complete planned missions, or even the failure of the entire satellite.

[0004] To prevent battery over-discharge damage, software-based over-discharge protection mechanisms are now widely used in satellite power systems. These software protection schemes use the onboard control unit (OBC) to collect real-time status parameters such as battery voltage and current. Based on a preset over-discharge threshold, they make logical judgments. When the battery voltage is detected to be below the threshold, a software protection command is triggered, cutting off the power supply circuit between the battery and the load to achieve over-discharge protection. However, in the complex environment of actual satellite operation in orbit, software over-discharge protection mechanisms have significant reliability shortcomings: First, the strong electromagnetic interference environment on the satellite may interfere with the accuracy of status parameter acquisition or the reliability of protection command transmission, leading to misjudgment, delay, or even failure of protection commands; second, hardware failures or software malfunctions of the onboard control unit (such as program crashes or logical errors) may also paralyze the software protection function, failing to respond promptly to over-discharge risks; third, the execution of software protection depends on the normal operation of the onboard power supply system. If a momentary anomaly occurs in the power supply system, the software protection command may not be effectively executed.

[0005] Given the shortcomings of existing technologies, relying solely on software over-discharge protection mechanisms is insufficient to ensure the reliability of battery pack over-discharge protection under all operating conditions. To further improve the redundancy and stability of over-discharge protection for satellite battery packs, compensate for the inherent defects of software protection, and ensure that the battery can still achieve rapid and reliable disconnection under undervoltage conditions in the event of software protection failure or anomaly, thus avoiding over-discharge damage, it is urgently necessary to design a battery undervoltage protection hardware circuit independent of the software protection system. This would construct a dual protection system of "software protection + hardware protection," fundamentally guaranteeing the safe and stable operation of the battery pack and extending the satellite's on-orbit lifespan and mission execution capabilities. Summary of the Invention

[0006] This invention monitors the battery pack voltage in real time through a sampling pulse signal circuit and employs a 3-out-of-2 redundancy design to improve system reliability. When an abnormal voltage is detected, the 3-out-of-2 circuit triggers a switching circuit to cut off the discharge path, protecting the battery from damage. The sampling circuit includes an RC network for signal shaping, an operational amplifier for voltage comparison, and a voltage divider resistor group to ensure detection accuracy. The switching circuit uses a combination of relays and diodes to ensure fast response and prevent back electromotive force interference. The 3-out-of-2 circuit uses a combination of NPN transistors for logic judgment, and the redundancy design avoids protection failure due to a single point of failure. This solution achieves high-reliability protection through hardware circuitry and is suitable for applications with extremely high reliability requirements, such as satellites.

[0007] This invention provides a hardware undervoltage protection circuit for a satellite battery, characterized in that it includes: The sampling pulse signal circuit is configured to sample the battery pack voltage and output three independent drive signals to the three-out-of-two circuit. A 3-out-of-2 circuit is configured to receive the drive signals and, when any two drive signals are valid, output a discharge disconnect command to the switching circuit; and A switching circuit, configured to connect the battery pack and the bus, disconnects the discharge path upon receiving the discharge disconnect command.

[0008] In one embodiment of the present invention, the sampling pulse signal circuit includes: The voltage divider resistors include the first resistor, the second resistor, the sixth resistor, the seventh resistor, the eleventh resistor, and the twelfth resistor; The first operational amplifier, the second operational amplifier, and the third operational amplifier are used to compare voltage magnitudes; The first, second, and third reference sources are used to provide the undervoltage protection threshold voltage; Current-limiting resistors, including the fourth resistor, the ninth resistor, and the fourteenth resistor; Feedback resistors include the third resistor, the eighth resistor, and the thirteenth resistor; Resistance to ground includes the fifth, tenth, and fifteenth resistors; The pulse conversion capacitor, including a first capacitor, a second capacitor, and a third capacitor, is used to convert a high level into a pulse signal.

[0009] In one embodiment of the present invention, the sampling pulse signal circuit is connected as follows: The first end of the first resistor is connected to the positive terminal of the battery pack, and the second end of the first resistor is connected to the negative input terminal of the first operational amplifier. The first end of the second resistor is connected to the negative input terminal of the first operational amplifier, and the second end of the second resistor is grounded. The positive input terminal of the first operational amplifier is connected to the first terminal of the third resistor and the first reference source, and the output terminal of the first operational amplifier is connected to the first terminal of the fourth resistor. The second terminal of the third resistor is connected to the second terminal of the fourth resistor and the first terminal of the first capacitor; The second terminal of the first capacitor is connected to the first terminal of the fifth resistor, and outputs a drive signal 1 to the three-out-of-two circuit. The second terminal of the fifth resistor is grounded; The first end of the sixth resistor is connected to the positive terminal of the battery pack, and the second end of the sixth resistor is connected to the negative input terminal of the second operational amplifier. The first terminal of the seventh resistor is connected to the negative input terminal of the second operational amplifier, and the second terminal of the seventh resistor is grounded. The positive input terminal of the second operational amplifier is connected to the first terminal of the eighth resistor and the second reference source, and the output terminal of the second operational amplifier is connected to the first terminal of the ninth resistor. The second terminal of the eighth resistor is connected to the second terminal of the ninth resistor and the first terminal of the second capacitor. The second terminal of the second capacitor is connected to the first terminal of the tenth resistor, and outputs a drive signal 2 to the three-out-of-two circuit. The second terminal of the tenth resistor is grounded; The first end of the eleventh resistor is connected to the positive terminal of the battery pack, and the second end of the eleventh resistor is connected to the negative input terminal of the third operational amplifier. The first terminal of the twelfth resistor is connected to the negative input terminal of the third operational amplifier, and the second terminal of the twelfth resistor is grounded. The positive input terminal of the third operational amplifier is connected to the first terminal of the thirteenth resistor and the third reference source, and the output terminal of the third operational amplifier is connected to the first terminal of the fourteenth resistor. The second terminal of the thirteenth resistor is connected to the second terminal of the fourteenth resistor and the first terminal of the third capacitor; The second terminal of the third capacitor is connected to the first terminal of the fifteenth resistor, and outputs a drive signal 3 to the three-out-of-two circuit. The second terminal of the fifteenth resistor is grounded.

[0010] In one embodiment of the present invention, the switching circuit includes: Current-limiting resistors, including the sixteenth and seventeenth resistors; A relay, including a first coil, a second coil, a first switch, and a second switch, is used to control the on / off state of the battery pack discharge circuit. The first diode, the second diode, the third diode, and the fourth diode are used to suppress the reverse electromotive force of the relay coil; A 28V command bus is used to supply power to the relay.

[0011] In one embodiment of the present invention, the switching circuit is connected as follows: The first end of the sixteenth resistor is connected to the 28V command bus, and the second end of the sixteenth resistor is connected to the second end of the seventeenth resistor. The first end of the seventeenth resistor is connected to the 28V command bus, and the second end of the seventeenth resistor is connected to the positive end of the first coil. The positive terminal of the first coil is connected to the cathode of the first diode, and the negative terminal of the first coil is connected to the anode of the second diode and receives the discharge turn-on command. The anode of the first diode is connected to the cathode of the second diode; The positive terminal of the second coil is connected to the cathodes of the first and third diodes, and the negative terminal of the second coil is connected to a three-out-of-two circuit to receive a discharge disconnect command. The anode of the third diode is connected to the cathode of the fourth diode, and the cathode of the fourth diode is connected to the negative terminal of the second coil. A relay connects the battery pack and the busbar, and is used to control the on / off state of the battery pack discharge circuit.

[0012] In one embodiment of the present invention, the three-out-of-two circuit includes: Transistor 1, Transistor 2, Transistor 3, Transistor 4, Transistor 5, and Transistor 6; Current-limiting resistors, including the eighteenth, nineteenth, and twentieth resistors, are used to prevent overcurrent at the base of the transistor.

[0013] In one embodiment of the present invention, the three-out-of-two circuit is connected as follows: The base of the first transistor is connected to the sampling pulse signal circuit to receive drive signal 1. The collector of the first transistor is connected to the switching circuit. The emitter of the first transistor is connected to the collector of the second transistor. The base of the second transistor is connected to the sampling pulse signal circuit to receive drive signal 2, and the emitter of the second transistor is grounded. The base of the third transistor is connected to the sampling pulse signal circuit to receive drive signal 2. The collector of the third transistor is connected to the switching circuit. The emitter of the third transistor is connected to the collector of the fourth transistor. The base of the fourth transistor is connected to the sampling pulse signal circuit to receive drive signal 3, and the emitter of the fourth transistor is grounded. The base of the fifth transistor is connected to the sampling pulse signal circuit to receive drive signal 3; the collector of the fifth transistor is connected to the switching circuit; and the emitter of the fifth transistor is connected to the collector of the sixth transistor. The base of the sixth transistor is connected to the sampling pulse signal circuit to receive drive signal 1, and the emitter of the sixth transistor is grounded. The first end of the eighteenth resistor is connected to the base of the second transistor, and the second end of the eighteenth resistor is connected to the emitter of the second transistor. The first end of the nineteenth resistor is connected to the base of the fourth transistor, and the second end of the nineteenth resistor is connected to the emitter of the fourth transistor. The first end of the twentieth resistor is connected to the base of the sixth transistor, and the second end of the twentieth resistor is connected to the emitter of the sixth transistor.

[0014] In one embodiment of the present invention, the transistor is an NPN transistor.

[0015] In one embodiment of the present invention, during normal operation, the sampled signal after the battery pack is depressurized is greater than the reference source voltage, and the operational amplifier outputs a low level. When the battery pack voltage continues to decrease, and the sampled signal after the battery pack voltage is reduced to less than the reference source voltage, the operational amplifier outputs a high level. The high level is converted into a high-level pulse signal through the pulse conversion capacitor, and the high-level pulse signal is output as a drive signal to the three-out-of-two circuit.

[0016] In one embodiment of the present invention, before the instruction is triggered, the discharge disconnection instruction is at a high level, the first coil and the second coil have no current, the first switch and the second switch remain closed, and the battery pack discharges. When the command is triggered, the 28V command bus supplies power to the relay coil through the current-limiting resistor. After the coil is energized, the first switch and the second switch cut off the discharge circuit of the battery pack.

[0017] The present invention has the following beneficial effects: (1) The three-out-of-two redundancy design is adopted. The logic judgment is realized by combining NPN transistors, which effectively avoids protection failure caused by single point of failure. Combined with the "hardware independent protection" mode, it makes up for the inherent shortcomings of software protection, builds a dual protection system, and is suitable for scenarios with extremely high reliability requirements such as satellites.

[0018] (2) The sampling circuit integrates voltage divider resistor group, operational amplifier voltage comparison and RC network signal shaping functions, which can accurately collect the battery pack voltage signal, ensure accurate identification of undervoltage state, and avoid false triggering or missed triggering.

[0019] (3) The switching circuit adopts a combination of relay and diode structure, which can not only quickly cut off the discharge path when under voltage, but also effectively suppress reverse electromotive force interference and ensure stable circuit operation. Attached Figure Description

[0020] Figure 1 A circuit diagram of a satellite battery hardware undervoltage protection circuit according to an embodiment of the present invention is shown. Detailed Implementation

[0021] In the following description, the invention is described with reference to various embodiments. However, those skilled in the art will recognize that the embodiments may be practiced without one or more specific details or with other alternatives and / or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail so as not to obscure the inventive points of the invention. Similarly, for illustrative purposes, specific quantities, materials, and configurations are set forth to provide a comprehensive understanding of embodiments of the invention. However, the invention is not limited to these specific details.

[0022] In this invention, the various embodiments are merely intended to illustrate the solutions of the invention and should not be construed as limiting.

[0023] In this specification, references to "an embodiment" or "this embodiment" mean that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment of the invention. The phrase "in one embodiment" appearing throughout this specification does not necessarily refer to the same embodiment in all instances.

[0024] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0025] Figure 1 A circuit diagram of a satellite battery hardware undervoltage protection circuit according to an embodiment of the present invention is shown.

[0026] like Figure 1 As shown, in one embodiment of the present invention, the satellite battery hardware undervoltage protection circuit includes: The sampling pulse signal circuit 100 is used to sample and compare the satellite battery voltage with a threshold, and convert the high level output of the comparator into a high level pulse signal to avoid continuous power supply to the relay coil. At the same time, it provides three independent drive signals (drive signals 1 / 2 / 3) for the subsequent three-out-of-two circuit 300.

[0027] The sampling pulse signal circuit includes: Voltage divider resistors: first resistor R1, second resistor R2, sixth resistor R6, seventh resistor R7, eleventh resistor R11, and twelfth resistor R12; The first operational amplifier N1, the second operational amplifier N2, and the third operational amplifier N3 are used to compare voltage magnitudes and are powered by a 12V voltage. The first reference source Vref1, the second reference source Vref2, and the third reference source Vref3 are used to provide the undervoltage protection threshold voltage; Current-limiting resistors: fourth resistor R4, ninth resistor R9, and fourteenth resistor R14; Feedback resistors, third resistor R3, eighth resistor R8 and thirteenth resistor R13; Resistance to ground: fifth resistor R5, tenth resistor R10, and fifteenth resistor R15; The pulse conversion capacitors, namely capacitor C1, capacitor C2, and capacitor C3, are used to convert a high level into a pulse signal.

[0028] Its connection method is as follows: The first end of R1 is connected to the positive terminal of the battery pack, and the second end of R1 is connected to the negative input terminal of N1. The first terminal of R2 is connected to the negative input terminal of N1, and the second terminal of R2 is grounded. The positive input terminal of N1 is connected to the first terminal of resistor R3 and the reference source Vref1, and the output terminal of N1 is connected to the first terminal of R4. The second terminal of R3 is connected to the second terminal of R4 and the first terminal of C1; The second terminal of C1 is connected to the first terminal of R5, and outputs a drive signal 1 to the 3-out-of-2 circuit; The second terminal of R5 is grounded; The first end of R6 is connected to the positive terminal of the battery pack, and the second end of R6 is connected to the negative input terminal of N2. The first terminal of R7 is connected to the negative input terminal of N2, and the second terminal of R7 is grounded. The positive input terminal of N2 is connected to the first terminal of resistor R8 and the reference source Vref2, and the output terminal of N2 is connected to the first terminal of R9; The second terminal of R8 is connected to the second terminal of R9 and the first terminal of C2; The second terminal of C2 is connected to the first terminal of R10, and outputs drive signal 2 to the three-out-of-two circuit; The second terminal of R10 is grounded; The first end of R11 is connected to the positive terminal of the battery pack, and the second end of R11 is connected to the negative input terminal of N3. The first terminal of R12 is connected to the negative input terminal of N3, and the second terminal is grounded; The positive input terminal of N3 is connected to the first terminal of resistor R13 and the reference source Vref3, and the output terminal of N3 is connected to the first terminal of R14; The second end of R13 is connected to the second end of R14 and the first end of C3; The second terminal of C3 is connected to the first terminal of R15, and outputs drive signal 3 to the 3-out-of-2 circuit; The second terminal of R15 is grounded.

[0029] The operating logic of the sampling pulse signal circuit 100 is as follows: Taking drive signal 1 as an example, when the battery voltage is within the normal range, the sampled voltage after being divided by the voltage divider resistor (such as R1-R2) is higher than the undervoltage threshold voltage provided by the reference source Vref1. At this time, the voltage at the inverting input terminal of the operational amplifier N1 (as a comparator) is greater than the voltage at the non-inverting input terminal, the comparator outputs a low level, and there is no pulse signal in the RC network (C1+R5), corresponding to the invalid state of "drive signal 1".

[0030] When the battery voltage drops to the undervoltage value, the sampled voltage after voltage division is lower than the reference source threshold voltage. At this time, the voltage at the inverting input terminal of comparator N1 is less than the voltage at the non-inverting input terminal, and the comparator outputs a high level. This high level is converted into a high-level pulse signal (i.e., "drive signal 1") after being charged and discharged by the RC network, thus preventing the relay coil from being continuously energized.

[0031] The switching circuit 200 receives the discharge disconnect command triggered by the three-out-of-two circuit 300, disconnects the discharge path through the relay action, and at the same time realizes the reverse electromotive force protection of the relay coil through the diode to avoid damage to the device.

[0032] The switching circuit 200 includes the following components: Current-limiting resistors, the sixteenth resistor R16 and the seventeenth resistor R17; Relay K1, including a first coil 211 and a second coil 212, is used to control the on / off state of the battery pack discharge circuit. The first diode D1, the second diode D2, the third diode D3, and the fourth diode D4 are used to suppress the reverse electromotive force of the relay coil.

[0033] The connection method for switch circuit 200 is as follows: The first end of R16 is connected to the 28V command bus, and the second end of R16 is connected to the second end of R17. The first end of R17 is connected to the 28V command bus, and the second end of R17 is connected to the positive end of the first coil. The positive terminal of the first coil 211 is connected to the cathode of D1, and the negative terminal of the first coil 211 is connected to the anode of D2 and receives the discharge turn-on command. The anode of D1 is connected to the cathode of D2; The positive terminal of the second coil 212 is connected to cathodes D1 and D3, and the negative terminal of the second coil 212 is connected to a three-out-of-two circuit to receive a discharge disconnect command. The anode of D3 is connected to the cathode of D4, and the cathode of D4 is connected to the negative terminal of the second coil 212. Relay K1 connects the battery pack and the busbar, and is used to control the on / off state of the battery pack discharge circuit.

[0034] Before the command is triggered, the discharge disconnect command is high, there is no current in the coil of relay K1, the K1 contacts remain closed, and the battery discharges normally to the load. After the command is triggered, when the discharge disconnect command is pulled low by the 3-out-of-2 circuit 300, the 28V command bus supplies power to the coil of relay K1 through the current-limiting resistors (R16 / R17). After the coil is energized, the contacts actuate (from closed to open), and the first switch 221 and the second switch 222 directly cut off the battery discharge circuit, achieving undervoltage protection. When the relay coil is de-energized, a reverse electromotive force is generated. Diodes D1-D4 (connected in reverse series across the coil) short-circuit this electromotive force to prevent it from damaging other components in the circuit.

[0035] The switch circuit 200 connects the positive terminal of the battery pack to the busbar, and the negative terminal of the battery pack is grounded.

[0036] The 300 three-out-of-two circuit receives three drive signals from the sampling pulse signal circuit. It triggers a discharge disconnect command by using the logic that any two drive signals are valid, thus avoiding protection failure due to false triggering by a single signal or failure of a single circuit.

[0037] The 3-out-of-2 circuit 300 includes the following components: Transistor V1, transistor V2, transistor V3, transistor V4, transistor V5, and transistor V6; The current-limiting resistors, the eighteenth resistor R18, the nineteenth resistor R19, and the twentieth resistor R20, are used to prevent overcurrent at the base of the transistor.

[0038] The connection method of the three-out-of-two circuit 300 is as follows: The base of V1 is connected to the sampling pulse signal circuit to receive drive signal 1, the collector of V1 is connected to the switching circuit, and the emitter of V1 is connected to the collector of V2. The base of V2 is connected to the sampling pulse signal circuit to receive drive signal 2, and the emitter of V2 is grounded. The base of V3 is connected to the sampling pulse signal circuit to receive drive signal 2. The collector of V3 is connected to the switching circuit, and the emitter of V3 is connected to the collector of V4. The base of V4 is connected to the sampling pulse signal circuit to receive drive signal 3, and the emitter of V4 is grounded. The base of V5 is connected to the sampling pulse signal circuit to receive drive signal 3. The collector of V5 is connected to the switching circuit, and the emitter of V5 is connected to the collector of V6. The base of V6 is connected to the sampling pulse signal circuit to receive drive signal 1, and the emitter of V6 is grounded. The first end of R18 is connected to the base of V2, and the second end of R18 is connected to the emitter of V2; The first end of R19 is connected to the base of V4, and the second end of R19 is connected to the emitter of V4. The first end of R20 is connected to the base of V6, and the second end of R20 is connected to the emitter of V6.

[0039] The core of this circuit is that protection is triggered only when any two drive signals are valid, thus avoiding false triggering caused by a single sampling / comparison circuit failure. Specifically, this includes the following situations: 1. If only one drive signal (such as drive 1) is high, only V1 is turned on and V2 is turned off in the corresponding transistor group (such as V1+V2), so a path cannot be formed and the protection command will not be triggered.

[0040] 2. If two or more drive signals (such as drive 1 + drive 2) are high, V1 and V2 in the corresponding transistor group (V1 + V2) will be turned on, forming a circuit. At this time, the discharge disconnection command is triggered (the command line becomes low).

[0041] Although various embodiments of the invention have been described above, it should be understood that they are presented by way of example only and not as limitations. It will be apparent to those skilled in the art that various combinations, modifications, and alterations can be made without departing from the spirit and scope of the invention. Therefore, the breadth and scope of the invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should be defined solely by the appended claims and their equivalents.

Claims

1. A satellite battery hardware under-voltage protection circuit, characterized by, The application relates to a battery voltage sampling circuit and a battery voltage sampling method. The battery voltage sampling circuit comprises a sampling pulse signal circuit, a two-out-of-three circuit and a switch circuit. The sampling pulse signal circuit is configured to sample the battery voltage and output three independent drive signals to the two-out-of-three circuit. The two-out-of-three circuit is configured to receive the drive signals and output a discharge disconnect instruction to the switch circuit when any two drive signals are effective. The switch circuit is configured to connect the battery and a bus and disconnect the discharge path when the discharge disconnect instruction is received.

2. The satellite battery hardware undervoltage protection circuit of claim 1, wherein, The sampling pulse signal circuit comprises a voltage dividing resistor, a first operational amplifier, a second operational amplifier, a third operational amplifier, a first reference source, a second reference source, a third reference source, a current limiting resistor, a feedback resistor, a ground resistor and a pulse conversion capacitor. The voltage dividing resistor comprises a first resistor, a second resistor, a sixth resistor, a seventh resistor, an eleventh resistor and a twelfth resistor. The first operational amplifier, the second operational amplifier and the third operational amplifier are used for comparing the voltage. The first reference source, the second reference source and the third reference source are used for providing an under-voltage protection threshold voltage. The current limiting resistor comprises a fourth resistor, a ninth resistor and a fourteenth resistor. The feedback resistor comprises a third resistor, an eighth resistor and a thirteenth resistor. The ground resistor comprises a fifth resistor, a tenth resistor and a fifteenth resistor. The pulse conversion capacitor comprises a first capacitor, a second capacitor and a third capacitor.

3. The satellite battery hardware undervoltage protection circuit of claim 2, wherein, The sampling pulse signal circuit is connected as follows. The first end of the first resistor is connected to the positive electrode of the battery, and the second end of the first resistor is connected to the negative input end of the first operational amplifier. The first end of the second resistor is connected to the negative input end of the first operational amplifier, and the second end of the second resistor is grounded. The positive input end of the first operational amplifier is connected to the first end of the third resistor and the first reference source, and the output end of the first operational amplifier is connected to the first end of the fourth resistor. The second end of the third resistor is connected to the second end of the fourth resistor and the first end of the first capacitor. The second end of the first capacitor is connected to the first end of the fifth resistor, and the first capacitor outputs a drive signal 1 to the two-out-of-three circuit. The second end of the fifth resistor is grounded. The first end of the sixth resistor is connected to the positive electrode of the battery, and the second end of the sixth resistor is connected to the negative input end of the second operational amplifier. The first end of the seventh resistor is connected to the negative input end of the second operational amplifier, and the second end of the seventh resistor is grounded. The positive input end of the second operational amplifier is connected to the first end of the eighth resistor and the second reference source, and the output end of the second operational amplifier is connected to the first end of the ninth resistor. The second end of the eighth resistor is connected to the second end of the ninth resistor and the first end of the second capacitor. The second end of the second capacitor is connected to the first end of the tenth resistor, and the second capacitor outputs a drive signal 2 to the two-out-of-three circuit. The second end of the tenth resistor is grounded. The first end of the eleventh resistor is connected to the positive electrode of the battery, and the second end of the eleventh resistor is connected to the negative input end of the third operational amplifier. The first end of the twelfth resistor is connected to the negative input end of the third operational amplifier, and the second end of the twelfth resistor is grounded. The positive input end of the third operational amplifier is connected to the first end of the thirteenth resistor and the third reference source, and the output end of the third operational amplifier is connected to the first end of the fourteenth resistor. The second end of the thirteenth resistor is connected to the second end of the fourteenth resistor and the first end of the third capacitor. The second end of the third capacitor is connected to the first end of the fifteenth resistor, and outputs a driving signal 3 to the two-out-of-three circuit; The second end of the fifteenth resistor is grounded.

4. The satellite battery hardware undervoltage protection circuit of claim 1, wherein, The switch circuit comprises: A current-limiting resistor comprising a sixteenth resistor and a seventeenth resistor; A relay comprising a first coil, a second coil, a first switch and a second switch, for controlling the on-off of the battery discharge circuit; A first diode, a second diode, a third diode and a fourth diode, for suppressing the reverse electromotive force of the relay coil; A 28V command bus, for supplying power to the relay.

5. The satellite battery hardware undervoltage protection circuit of claim 4, wherein, The switch circuit is connected in the following manner: The first end of the sixteenth resistor is connected to the 28V command bus, and the second end of the sixteenth resistor is connected to the second end of the seventeenth resistor; The first end of the seventeenth resistor is connected to the 28V command bus, and the second end of the seventeenth resistor is connected to the positive end of the first coil; The positive end of the first coil is connected to the cathode of the first diode, and the negative end of the first coil is connected to the anode of the second diode and receives a discharge-on command; The anode of the first diode is connected to the cathode of the second diode; The positive end of the second coil is connected to the cathodes of the first diode and the third diode, and the negative end of the second coil is connected to the two-out-of-three circuit for receiving a discharge-off command; The anode of the third diode is connected to the cathode of the fourth diode, and the cathode of the fourth diode is connected to the negative end of the second coil; The relay connects the battery and the bus, for controlling the on-off of the battery discharge circuit.

6. The satellite battery hardware undervoltage protection circuit of claim 1, wherein, The two-out-of-three circuit comprises: A first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor; A current-limiting resistor comprising an eighteenth resistor, a nineteenth resistor and a twentieth resistor, for preventing overcurrent at the base of the transistor.

7. The satellite battery hardware undervoltage protection circuit of claim 6, wherein, The two-out-of-three circuit is connected in the following manner: The base of the first transistor is connected to the sampling pulse signal circuit and receives a driving signal 1, the collector of the first transistor is connected to the switch circuit, and the emitter of the first transistor is connected to the collector of the second transistor; The base of the second transistor is connected to the sampling pulse signal circuit and receives a driving signal 2, and the emitter of the second transistor is grounded; The base of the third transistor is connected to the sampling pulse signal circuit and receives a driving signal 2, the collector of the third transistor is connected to the switch circuit, and the emitter of the third transistor is connected to the collector of the fourth transistor; The base of the fourth transistor is connected to the sampling pulse signal circuit and receives a driving signal 3, and the emitter of the fourth transistor is grounded; The base of the fifth transistor is connected to the sampling pulse signal circuit and receives a driving signal 3, the collector of the fifth transistor is connected to the switch circuit, and the emitter of the fifth transistor is connected to the collector of the sixth transistor; The base of the sixth transistor is connected to the sampling pulse signal circuit and receives a driving signal 1, and the emitter of the sixth transistor is grounded; The first end of the eighteenth resistor is connected to the base of the second transistor, and the second end of the eighteenth resistor is connected to the emitter of the second transistor; The first end of the nineteenth resistor is connected to the base of the fourth transistor, and the second end of the nineteenth resistor is connected to the emitter of the fourth transistor; The first end of the twentieth resistor is connected to the base of the sixth transistor, and the second end of the twentieth resistor is connected to the emitter of the sixth transistor.

8. The satellite battery hardware undervoltage protection circuit of claim 6, wherein, The triode is an NPN type triode.

9. The satellite battery hardware undervoltage protection circuit of claim 2, wherein, In normal operation, the sampling signal of the battery pack after voltage division is greater than the reference source voltage, and the operational amplifier outputs a low level. When the voltage of the battery pack continues to decrease and the sampling signal of the battery pack after voltage division is less than the reference source voltage, the operational amplifier outputs a high level, the high level is converted into a high level pulse signal by a pulse conversion capacitor, and the high level pulse signal is output as a driving signal to a two-out-of-three circuit.

10. The satellite battery hardware undervoltage protection circuit of claim 4, wherein, Before the instruction is triggered, the discharge disconnect instruction is a high level, no current flows through the first wire package and the second wire package, the first switch and the second switch remain in a closed state, and the battery pack is discharged. After the instruction is triggered, the 28V instruction bus supplies power to the wire package of the relay through a current limiting resistor, and after the wire package is powered on, the first switch and the second switch cut off the discharge circuit of the battery pack.

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