DSP power supply control method and system and optical module

Abstract

The invention provides a DSP (Digital Signal Processor) power supply control method and system and an optical module. The DSP power supply control method comprises the following steps: normalizing the chip junction temperature and the signal-to-noise ratio of a DSP obtained in the current sampling period and the corresponding light receiving power and board temperature; performing weight fusion according to the chip junction temperature, the signal-to-noise ratio, the light receiving power and the board temperature after normalization processing to obtain a voltage regulation control factor of the current sampling period; determining a target voltage of the DSP in the current sampling period by combining the voltage regulation control factor, a preset voltage limit value and a voltage regulation sensitivity coefficient; and sending the target voltage of the current sampling period to a power supply unit corresponding to the DSP so as to enable the power supply unit to execute voltage regulation operation based on the target voltage. Through multi-parameter accurate control, overheating damage caused by too high voltage and performance abnormity caused by too low voltage are avoided, power consumption and performance balance is achieved, power consumption of the DSP at a high temperature can be effectively reduced, heating accumulation is reduced, and the reliability of the optical module in a high-temperature scene is improved.

Description

Technical Field

[0001] This invention relates to the field of power supply circuits, and more specifically, to a DSP power supply control method and system and an optical module. Background Technology

[0002] Optical modules are the core components of optical fiber communication systems, enabling photoelectric signal conversion. They are widely used in data centers, 5G base stations, industrial control, and other scenarios. The operating temperature range of conventional commercial-grade optical modules typically covers 0℃ to 70℃. However, due to the centralized nature of equipment, high-temperature environments are common for optical modules, making stability under high-temperature conditions a critical performance indicator. The Digital Signal Processor (DSP), as the core processing unit of the optical module, undertakes key tasks such as signal modulation and demodulation, bit error correction, and protocol adaptation. Its power consumption is positively correlated with the square of the supply voltage; therefore, the appropriateness of the DSP's supply voltage directly affects its power consumption and heat generation.

[0003] With the increasing transmission rates of optical modules, 800G and 1.6T optical modules are gradually entering mass production. DSPs from various manufacturers are also integrating more and more functions, leading to a significant increase in the computational complexity of DSPs. Power consumption and heat generation have become the most stringent challenges in optical modules. Under high temperatures, the semiconductor characteristics of DSPs change, resulting in increased leakage current. If a fixed supply voltage is still used, redundant power consumption will be converted into additional heat, creating a vicious cycle of high temperature, high power consumption, and even higher temperatures, severely impacting device lifespan and system reliability. Therefore, DSP power supply control and temperature adaptation have become key requirements for optimizing the high-temperature performance of optical modules. Summary of the Invention

[0004] The purpose of this invention is to provide a DSP power supply control method and system, as well as an optical module, to improve the above-mentioned problems.

[0005] To achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows: In a first aspect, embodiments of the present invention provide a DSP power supply control method, the method comprising: The chip junction temperature, signal-to-noise ratio, and corresponding optical power and board temperature of the DSP obtained in the current sampling period are normalized. Based on the normalized chip junction temperature, signal-to-noise ratio, received power, and board temperature, weighted fusion is performed to obtain the voltage regulation control factor for the current sampling period. By combining the voltage regulation control factor, the preset voltage limit value, and the voltage adjustment sensitivity coefficient, the target voltage of the DSP in the current sampling period is determined, wherein the voltage limit value includes a maximum voltage value and a minimum voltage value; The target voltage of the current sampling period is sent to the power supply unit corresponding to the DSP so that it can perform voltage regulation operation based on the target voltage.

[0006] Optionally, after sending the target voltage of the current sampling period to the power supply unit corresponding to the DSP so that it performs voltage regulation operation based on the target voltage, the method further includes: Read the real-time bit error rate and real-time power consumption of the DSP after performing the voltage regulation operation; Voltage adjustment and repair are performed based on the real-time bit error rate and the real-time power consumption.

[0007] Optionally, the step of voltage adjustment and repair based on the real-time bit error rate and the real-time power consumption includes: When the real-time bit error rate is less than or equal to the first bit error rate threshold and the real-time power consumption is less than or equal to the preset power consumption upper limit, it is determined that the voltage regulation operation meets expectations. Alternatively, when the real-time bit error rate is greater than the first bit error rate threshold, the target voltage is increased, and the increased voltage is sent to the power supply unit corresponding to the DSP so that it performs a voltage regulation operation based on the increased voltage. Alternatively, when the real-time bit error rate is less than or equal to the first bit error rate threshold and the real-time power consumption is greater than the preset power consumption upper limit, the voltage adjustment sensitivity coefficient is increased.

[0008] Optionally, when the real-time bit error rate is greater than a first bit error rate threshold, the voltage is increased based on the target voltage, including: The current calibration amplitude is determined based on the real-time bit error rate and the preset calibration amplitude. Based on the target voltage, the current calibration amplitude is adjusted upwards to obtain the adjusted voltage.

[0009] Optionally, the method further includes: counting the sampling periods, and when the period count value reaches a counting threshold, determining a bit error rate penalty factor based on the bit error rate of the DSP in the current sampling period; The objective function value is determined based on the total power consumption of the DSP in the current sampling period and the bit error rate penalty factor; The objective function value and the current weight coefficients are used for iterative calculations to obtain the iterative weight coefficients.

[0010] Optionally, the method further includes: obtaining the power supply voltage of the DSP during the current sampling period; The total power consumption of the DSP in the current sampling period is determined based on the DSP's load capacitance, operating frequency, leakage current, and supply voltage.

[0011] Optionally, before normalizing the chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature of the DSP obtained in the current sampling period, the method further includes: The chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature of the DSP obtained in the current sampling period are filtered.

[0012] Optionally, the normalization process for the DSP chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature obtained in the current sampling period includes: By combining the maximum and minimum values ​​of each indicator, the DSP indicators obtained in the current sampling period are normalized. The indicators are any one of chip junction temperature, signal-to-noise ratio and its corresponding optical power and board temperature.

[0013] Secondly, embodiments of the present invention provide a DSP power supply control system, comprising: a processing unit, a data acquisition unit, and a power supply unit, wherein the processing unit is connected to the data acquisition unit and the power supply unit respectively; The acquisition unit is used to acquire the chip junction temperature, signal-to-noise ratio, and corresponding optical power and board temperature of the DSP in the current sampling period, and transmit the acquired data to the processing unit. The processing unit is used to execute the DSP power supply control method described above.

[0014] Thirdly, embodiments of the present invention provide an optical module including the aforementioned DSP power supply control system.

[0015] Compared to existing technologies, the DSP power supply control method, system, and optical module provided in this invention normalize the DSP chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature obtained in the current sampling period. Based on the normalized chip junction temperature, signal-to-noise ratio, received optical power, and board temperature, weighted fusion is performed to obtain the voltage regulation control factor for the current sampling period. Combining the voltage regulation control factor, a preset voltage limit value, and a voltage adjustment sensitivity coefficient, the target voltage of the DSP in the current sampling period is determined. The target voltage for the current sampling period is sent to the corresponding power supply unit of the DSP so that it performs voltage regulation operation based on the target voltage. Through precise control of multiple parameters, overheating damage caused by excessively high voltage and performance abnormalities caused by excessively low voltage are avoided, achieving a balance between power consumption and performance. This effectively reduces the power consumption of the DSP at high temperatures, reduces heat accumulation, alleviates the vicious cycle of high temperature and high power consumption at its root, extends the high-temperature lifespan of the DSP, and improves the reliability of the optical module in high-temperature scenarios.

[0016] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of a DSP power supply control system provided in an embodiment of the present invention.

[0019] Figure 2 This is one of the flowcharts illustrating the DSP power supply control method provided in an embodiment of the present invention.

[0020] Figure 3 This is the second flowchart illustrating the DSP power supply control method provided in this embodiment of the invention.

[0021] Figure 4 This is the third flowchart illustrating the DSP power supply control method provided in this embodiment of the invention.

[0022] Figure 5 The fourth flowchart illustrates the DSP power supply control method provided in this embodiment of the invention.

[0023] Figure 6 The fifth flowchart illustrates the DSP power supply control method provided in this embodiment of the invention. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0025] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0026] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this invention, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0027] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0028] In the description of this invention, it should be noted that the terms "upper," "lower," "inner," "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of this invention is usually placed when in use. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0029] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0030] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0031] This invention provides an optical module including a digital signal processor (DSP) and a corresponding DSP power supply control system. To address the issue of altered semiconductor device characteristics and increased leakage current in high-temperature environments, using a fixed power supply voltage would lead to redundant power consumption being converted into additional heat, creating a vicious cycle of high temperature, high power consumption, and even higher temperatures. This severely impacts device lifespan and system reliability. This invention provides a DSP power supply control method that can be applied to the DSP power supply control system in optical modules.

[0032] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the DSP power supply control system provided in an embodiment of the present invention. The DSP power supply control system includes: a processing unit, a data acquisition unit, and a power supply unit, wherein the processing unit is connected to the data acquisition unit and the power supply unit, respectively.

[0033] The processing unit can be, but is not limited to, a 32-bit microprocessor unit (MCU) supporting floating-point operations to ensure the real-time performance of the algorithm. Alternatively, a field-programmable gate array (FPGA) can also be used. The data acquisition unit includes temperature sensors, current and voltage sensors, and optical power sensors.

[0034] The acquisition unit is used to obtain the chip junction temperature, signal-to-noise ratio, and corresponding optical power and board temperature of the DSP in the current sampling period, and transmit the acquired data to the processing unit. The processing unit is used to execute the following DSP power supply control method.

[0035] The power supply unit is used to perform voltage regulation operations based on the voltage control signals (such as target voltage or up-adjustment voltage as described below) provided by the processing unit, thereby completing the DSP power supply control.

[0036] The DSP power supply control system can execute the following DSP power supply control methods. Please refer to the following text for the description of the corresponding technical effects.

[0037] Please refer to Figure 2 , Figure 2 This is one of the flowcharts illustrating the DSP power supply control method provided in an embodiment of the present invention. The DSP power supply control method includes steps S12, S13, S14, and S15, which are described in detail below.

[0038] S12 normalizes the DSP chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature obtained in the current sampling period.

[0039] Optionally, an analog-to-digital converter (ADC) can be used to sample the temperature sensor built into the DSP to obtain the chip junction temperature T_junction. The sampling accuracy can be ±1℃, and the sampling period can be, but is not limited to, 5ms. The real-time signal-to-noise ratio (SNR) (in dB, sampling range 17~25dB) and bit error rate (BER) (in 10-x) can be read from the DSP's internal status register to reflect the quality of the received optical signal. The received optical power P_rx (in dBm, sampling range -15~5dBm) can be collected from the built-in PIN photodiode and transimpedance amplifier (TIA) of the optical module corresponding to the DSP to reflect the working status of the optical module receiver. The board temperature here refers to the temperature of the printed circuit board assembly (PCBA) on which the DSP is deployed. An NTC thermistor (accuracy ±0.05℃) can be installed around the DSP to collect the board temperature T_pcb.

[0040] S13. Based on the normalized chip junction temperature, signal-to-noise ratio, received optical power, and board temperature, weighted fusion is performed to obtain the voltage regulation control factor for the current sampling period.

[0041] Optionally, the formula for the voltage regulation control factor is:

[0042] The constraints are:

[0043]

[0044] in, Indicates the voltage regulation control factor. This indicates the normalized junction temperature of the chip. This represents the signal-to-noise ratio after normalization. This represents the received optical power after normalization. This indicates the plate temperature after normalization. These are the adaptive weighting coefficients corresponding to the chip junction temperature. These are the adaptive weighting coefficients corresponding to the signal-to-noise ratio. The adaptive weighting coefficients are the values ​​corresponding to the received optical power. This represents the adaptive weighting coefficient corresponding to the plate temperature.

[0045] Optionally, the weighting coefficients can be optimized in real time using the gradient descent method to make the voltage regulation control factor K more closely match the actual operating conditions.

[0046] S14, combining the voltage regulation control factor, the preset voltage limit value, and the voltage adjustment sensitivity coefficient, determines the target voltage of the DSP in the current sampling period.

[0047] The target voltage includes the core voltage, I / O voltage, and analog voltages of the DSP, and the voltage limit values ​​include the maximum voltage value ( ) and minimum voltage value ( ).

[0048] exist When the value is less than 1, the voltage adjustment sensitivity coefficient is negatively correlated with the target voltage, that is, as the voltage adjustment sensitivity coefficient increases... Increase the voltage, and the target voltage decreases.

[0049] Optionally, a piecewise linear interpolation algorithm is used to calculate the target voltage, and the formula for the target voltage is:

[0050] in, Indicates the target voltage. Indicates the maximum voltage value. Indicates the minimum voltage value. Indicates the voltage regulation control factor. This represents the voltage adjustment sensitivity coefficient. The value of can be, but is not limited to, 1.2, and can be calibrated experimentally.

[0051] In one optional implementation, the core voltage, I / O voltage, and voltage limit values ​​corresponding to each analog voltage of the DSP can be different, as shown below: Core voltage V_core: (Optimal performance) (Minimum safe voltage); IO voltage V_io: , ; Analog voltage 1 V_analog1: , ; Analog voltage 2 V_analog2: , .

[0052] S15 sends the target voltage of the current sampling period to the power supply unit corresponding to the DSP so that it can perform voltage regulation operation based on the target voltage.

[0053] The power supply unit can be, but is not limited to, a DC-DC chip. After responding, the power supply unit (DC-DC chip) feeds back the actual output voltage to the MCU to confirm whether the voltage regulation is effective. Optionally, the processing unit sends a voltage control signal to the power supply unit via the I2C bus. The response time of the power supply unit is less than the sampling period, and the response time can be set to ≤2ms.

[0054] In the DSP power supply control method provided in this embodiment of the invention, by precisely controlling multiple parameters, overheating damage caused by excessively high voltage and performance abnormalities caused by excessively low voltage are avoided, thereby achieving a balance between power consumption and performance. This can effectively reduce the power consumption of the DSP at high temperatures, reduce heat accumulation, alleviate the vicious cycle of high temperature and high power consumption from the root, extend the service life of the DSP at high temperatures, and improve the reliability of the optical module in high-temperature scenarios.

[0055] Building upon the preceding text, this invention provides an optional implementation method for reducing power consumption while maintaining DSP performance. Please refer to [link / reference needed]. Figure 3 In S15, the target voltage of the current sampling period is sent to the power supply unit corresponding to the DSP so that it can perform voltage regulation operation based on the target voltage. The DSP power supply control method also includes S16 and S17, which are described in detail below.

[0056] S16 reads the real-time bit error rate and real-time power consumption of the DSP after performing voltage regulation operation.

[0057] The real-time bit error rate can be represented as BER1, and the real-time power consumption can be represented as P_real, where P_real = V × I. It can be, but is not limited to, the power consumption corresponding to the core voltage.

[0058] S17 performs voltage adjustment and repair based on real-time bit error rate and real-time power consumption.

[0059] In the DSP power supply control method provided in this embodiment of the invention, voltage adjustment and repair are performed based on real-time bit error rate and real-time power consumption to form a power consumption-performance dual closed-loop calibration. Through the feedback calibration mechanism, while reducing power consumption and extending the DSP lifespan, it is ensured that key performance indicators such as the DSP bit error rate can meet the optical module industry standards.

[0060] Regarding the content in S17, this embodiment of the invention also provides an optional implementation method, please refer to the following. S17, voltage adjustment and repair based on real-time bit error rate and real-time power consumption, includes any one or more of S17A, S17B, and S17C.

[0061] S17A determines that the voltage regulation operation meets expectations when the real-time bit error rate is less than or equal to the first bit error rate threshold and the real-time power consumption is less than or equal to the preset power consumption limit (P_target).

[0062] The first bit error rate threshold can be, but is not limited to, 10. -10 .

[0063] The voltage adjustment operation is as expected, maintaining the current voltage within the current sampling period without requiring voltage adjustment repair.

[0064] S17B, when the real-time bit error rate is greater than the first bit error rate threshold, adjusts the target voltage upward and sends the adjusted voltage to the power supply unit corresponding to the DSP so that it can perform voltage regulation operation based on the adjusted voltage.

[0065] Increasing the voltage increases the probability that the BER will return to the acceptable range.

[0066] S17C increases the voltage adjustment sensitivity coefficient when the real-time bit error rate is less than or equal to the first bit error rate threshold and the real-time power consumption is greater than the preset power consumption limit (P_target).

[0067] It should be noted that the increased voltage adjustment sensitivity coefficient can be used to obtain the target voltage in the next sampling period, so as to reduce the target voltage in the next sampling period and keep the voltage unchanged in the current sampling period.

[0068] Based on the preceding text, regarding how the upward adjustment based on the target voltage is completed in S17B, this embodiment of the invention also provides an optional implementation method, please refer to the following text, the upward adjustment based on the target voltage includes: S17B1 and S17B2, which are specifically described below.

[0069] S17B1 determines the current calibration amplitude based on the real-time bit error rate and the preset calibration amplitude.

[0070] S17B2 adjusts the target voltage upwards based on the current calibration amplitude to obtain the adjusted voltage.

[0071] Optionally, the formula for adjusting the voltage is:

[0072] in, This indicates that the voltage is increased. Indicates the target voltage. This indicates the preset calibration range, which can be, but is not limited to, 0.02V, with a maximum calibration range of ≤0.05V. Indicates the real-time bit error rate. This indicates the current calibration range.

[0073] Building upon the preceding text, this invention also provides an optional implementation method for optimizing the weighting coefficients to better align the voltage regulation control factor K with actual operating conditions, thereby ensuring the accuracy of voltage regulation. Please refer to [link / reference needed]. Figure 4 The DSP power supply control methods also include: S23, S24 and S25, which are described in detail below.

[0074] S23, count the sampling period, and when the period count value reaches the counting threshold, determine the bit error rate penalty factor based on the bit error rate of the DSP in the current sampling period.

[0075] The counting threshold can be, but is not limited to, 50, and the weighting coefficient is dynamically adjusted every 50 sampling periods (250ms).

[0076] S24. Determine the objective function value based on the total power consumption of the DSP in the current sampling period and the bit error rate penalty factor.

[0077] S25, perform iterative calculations based on the objective function value and the current weight coefficients to obtain the iterated weight coefficients.

[0078] The weighted coefficients after iteration are used to calculate the voltage regulation control factor for subsequent sampling periods. Optionally, the period count value can be reset to zero after the iteration is completed.

[0079] Optionally, the formula for the bit error rate penalty factor is:

[0080] The formula for calculating the objective function value is:

[0081] The formula for the weight coefficients after iteration is:

[0082] in, This represents the bit error rate penalty factor. This indicates the bit error rate of the DSP in the current sampling period. This represents the first bit error rate threshold, and its value can be, but is not limited to, 10. -10 , This represents the second bit error rate threshold, which can take a value that is not limited to 10. -8 , Represents the objective function value. This represents the balance factor, which can take values ​​other than 0.7. This indicates the total power consumption of the DSP in the current sampling period. express, This represents the weight coefficient of the i-th class after iteration. This indicates iterative replenishment, and its value can be, but is not limited to, 0.01.

[0083] By updating the weighting coefficients ω1~ω4 using the gradient descent method, the objective function value J is optimized, making the voltage regulation control factor K more closely match the actual working conditions, thereby ensuring the accuracy of voltage regulation.

[0084] exist Figure 4 Based on this, regarding how to obtain the total power consumption of the DSP in the current sampling period, this embodiment of the invention also provides an optional implementation method, please refer to... Figure 5The DSP power supply control method also includes S21 and S22, which are described in detail below.

[0085] S21, obtain the power supply voltage of the DSP in the current sampling period.

[0086] Optionally, the power supply current and voltage of each DSP channel can be acquired by connecting a series sampling resistor.

[0087] S22 determines the total power consumption of the DSP in the current sampling cycle based on the DSP's load capacitance, operating frequency, leakage current, and supply voltage.

[0088] Optionally, the formula for the total power consumption of the DSP in the current sampling period is:

[0089]

[0090]

[0091]

[0092] in, This indicates the total power consumption of the DSP in the current sampling period. Indicates dynamic power consumption. This indicates static power consumption (the proportion of static power consumption increases significantly at high temperatures). Indicates the load capacitance. Indicates the supply voltage. Indicates the operating frequency. Indicates leakage current;

[0093] in, The reference leakage current is given by q, the electron charge is given by k1, and the Boltzmann constant is given by k1. The reference temperature is 25°C (which can be, but is not limited to, 25°C), and T is the current temperature of the DSP, which can be the current junction temperature of the DSP.

[0094] Leakage current The relationship with temperature is exponential, leading to the conclusion that reducing the supply voltage V at high temperatures can simultaneously suppress dynamic power consumption (square relationship) and static power consumption (linear relationship), making it the core means of reducing temperature and power consumption.

[0095] Building upon the foregoing, this invention provides an optional implementation method to further ensure the accuracy of DSP power supply control. Please refer to [link / reference needed]. Figure 6Before normalizing the DSP chip junction temperature, signal-to-noise ratio, and corresponding optical power and board temperature obtained in the current sampling period in S12, the DSP power supply control method also includes: S11, which is described in detail below.

[0096] S11 filters the DSP chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature obtained in the current sampling period.

[0097] Filtering can be performed using, but is not limited to, the Kalman filter algorithm to suppress noise data, ensure the accuracy of subsequent calculations, and thus ensure the accuracy of DSP power supply control.

[0098] Alternatively, the filtering formula is:

[0099] in, A =1, B =0, H =1, K k For filter gain, Indicates that the system is in k The state vector at time t, express The estimated value, express k The state value before the time step. The control input vector represents the known control input to the external system. Indicates time k The actual observed vector, i.e. the measured value.

[0100] It should be understood that, in order to eliminate the differences in the dimensions of different parameters, the collected data is normalized to the [0,1] interval. Based on this, regarding the content of S12, this embodiment of the invention also provides an optional implementation method, please refer to the following. S12, normalizes the chip junction temperature, signal-to-noise ratio and their corresponding received optical power and board temperature of the DSP obtained in the current sampling period, including: S12A, which is described in detail below.

[0101] S12A normalizes the DSP metrics obtained in the current sampling period by combining the maximum and minimum values ​​of each metric. The metrics are any one of chip junction temperature, signal-to-noise ratio and its corresponding received optical power and board temperature.

[0102] Optionally, the normalization formula for the first type of indicator is:

[0103] in, This refers to either the chip junction temperature or its corresponding optical power and board temperature. As an indicator The corresponding normalization result, As an indicator The corresponding maximum value, As an indicator The corresponding minimum value; junction temperature T_junction: , (Rated high temperature limit of optical module); Received optical power P_rx: =-15dBm (loss of signal point), (Saturation point); Board temperature T_pcb: , (Safe upper limit of PCBA board temperature).

[0104] Optionally, the normalization formula for the signal-to-noise ratio is:

[0105] in, For the signal-to-noise ratio of the DSP, This is the normalized result corresponding to the signal-to-noise ratio. This represents the maximum value corresponding to the signal-to-noise ratio, and can take any value, but is not limited to, 25dB. This is the minimum value corresponding to the signal-to-noise ratio. It can take any value, but is not limited to 17dB. When normalizing, take the reciprocal. The lower the SNR, the greater the load, and the closer the normalized value is to 1.

[0106] In one optional implementation, the DSP power supply control method further includes: S30, as detailed below.

[0107] S30: The chip junction temperature, corresponding board temperature, and power supply voltage of the DSP obtained in the current sampling period are monitored for abnormalities and alarms.

[0108] Optionally, S30 includes S31 and S32, as detailed below.

[0109] S31, if the chip junction temperature T_junction ≥ 85℃ or the board temperature T_pcb ≥ 95℃, the emergency voltage regulation logic is triggered, controlling the power supply unit to output the corresponding minimum voltage value on each power supply circuit. At the same time, the high temperature alarm is reported through the optical module. If the temperature rises further, the module enters fault mode, shuts down the enable of all power supply units, and enters the lowest power consumption state. S32: If the supply voltage exceeds the safe range (e.g., V_core < 0.4V or > 1.0V), the power supply unit is triggered to reset and restore the default voltage to avoid damage to the DSP.

[0110] In one alternative implementation, during the initialization phase, i.e. after the optical module is powered on: The processing unit reads the parameter thresholds pre-stored in the flash memory. , , as well as (etc.), initial weighting coefficients ω1~ω4 (default values: 0.4, 0.3, 0.15, 0.15), voltage upper and lower limits. and ; The power supply unit outputs the default standard voltage (V_core=0.7V, V_io=1.8V, V_analog1=0.75V, V_analog2=0.9V), and enters normal working state after the DSP is initialized.

[0111] In summary, the DSP power supply control method, system, and optical module provided in this invention normalize the DSP chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature obtained in the current sampling period. Based on the normalized chip junction temperature, signal-to-noise ratio, received optical power, and board temperature, weighted fusion is performed to obtain the voltage regulation control factor for the current sampling period. Combining the voltage regulation control factor, a preset voltage limit value, and a voltage adjustment sensitivity coefficient, the target voltage of the DSP in the current sampling period is determined. The target voltage for the current sampling period is sent to the corresponding power supply unit of the DSP so that it performs voltage regulation operation based on the target voltage. Through precise control of multiple parameters, overheating damage caused by excessively high voltage and performance abnormalities caused by excessively low voltage are avoided, achieving a balance between power consumption and performance. This effectively reduces the power consumption of the DSP at high temperatures, reduces heat accumulation, alleviates the vicious cycle of high temperature and high power consumption at its root, extends the high-temperature lifespan of the DSP, and improves the reliability of the optical module in high-temperature scenarios.

[0112] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0113] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A DSP power supply control method, characterized in that, The method includes: The chip junction temperature, signal-to-noise ratio, and corresponding optical power and board temperature of the DSP obtained in the current sampling period are normalized. Based on the normalized chip junction temperature, signal-to-noise ratio, received power, and board temperature, weighted fusion is performed to obtain the voltage regulation control factor for the current sampling period. By combining the voltage regulation control factor, the preset voltage limit value, and the voltage adjustment sensitivity coefficient, the target voltage of the DSP in the current sampling period is determined, wherein the voltage limit value includes a maximum voltage value and a minimum voltage value; The target voltage of the current sampling period is sent to the power supply unit corresponding to the DSP so that it can perform voltage regulation operation based on the target voltage.

2. The DSP power supply control method as described in claim 1, characterized in that, After sending the target voltage of the current sampling period to the power supply unit corresponding to the DSP so that it performs voltage regulation operation based on the target voltage, the method further includes: Read the real-time bit error rate and real-time power consumption of the DSP after performing the voltage regulation operation; Voltage adjustment and repair are performed based on the real-time bit error rate and the real-time power consumption.

3. The DSP power supply control method as described in claim 2, characterized in that, The voltage adjustment and repair based on the real-time bit error rate and the real-time power consumption includes: When the real-time bit error rate is less than or equal to the first bit error rate threshold and the real-time power consumption is less than or equal to the preset power consumption upper limit, it is determined that the voltage regulation operation meets expectations. Alternatively, when the real-time bit error rate is greater than the first bit error rate threshold, the target voltage is increased, and the increased voltage is sent to the power supply unit corresponding to the DSP so that it performs a voltage regulation operation based on the increased voltage. Alternatively, when the real-time bit error rate is less than or equal to the first bit error rate threshold and the real-time power consumption is greater than the preset power consumption upper limit, the voltage adjustment sensitivity coefficient is increased.

4. The DSP power supply control method as described in claim 3, characterized in that, When the real-time bit error rate is greater than a first bit error rate threshold, the voltage is increased based on the target voltage, including: The current calibration amplitude is determined based on the real-time bit error rate and the preset calibration amplitude. Based on the target voltage, the current calibration amplitude is adjusted upwards to obtain the adjusted voltage.

5. The DSP power supply control method as described in claim 1, characterized in that, The method further includes: The sampling period is counted, and when the period count value reaches the count threshold, the bit error rate penalty factor is determined based on the bit error rate of the DSP in the current sampling period. The objective function value is determined based on the total power consumption of the DSP in the current sampling period and the bit error rate penalty factor; The objective function value and the current weight coefficients are used for iterative calculations to obtain the iterative weight coefficients.

6. The DSP power supply control method as described in claim 5, characterized in that, The method further includes: Obtain the power supply voltage of the DSP during the current sampling period; The total power consumption of the DSP in the current sampling period is determined based on the DSP's load capacitance, operating frequency, leakage current, and supply voltage.

7. The DSP power supply control method as described in claim 1, characterized in that, Before normalizing the DSP chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature obtained in the current sampling period, the method further includes: The chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature of the DSP obtained in the current sampling period are filtered.

8. The DSP power supply control method as described in claim 1, characterized in that, The normalization process for the DSP chip junction temperature, signal-to-noise ratio, and corresponding received optical power and board temperature obtained in the current sampling period includes: By combining the maximum and minimum values ​​of each indicator, the DSP indicators obtained in the current sampling period are normalized. The indicators are any one of chip junction temperature, signal-to-noise ratio and its corresponding optical power and board temperature.

9. A DSP power supply control system, characterized in that, include: The system includes a processing unit, a data acquisition unit, and a power supply unit, wherein the processing unit is connected to the data acquisition unit and the power supply unit, respectively. The acquisition unit is used to acquire the chip junction temperature, signal-to-noise ratio, and corresponding optical power and board temperature of the DSP in the current sampling period, and transmit the acquired data to the processing unit. The processing unit is used to execute the DSP power supply control method according to any one of claims 1-8.

10. An optical module, characterized in that, Includes the DSP power supply control system as described in claim 9.

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