Method and apparatus for efficient metadata management for bulk volume storage

Abstract

A method and apparatus for efficient metadata management for bulk volume storage are provided in which a volume manager receives a command having a corresponding volume logical block address (vLBA) set; the volume manager determines a bucket of a variable granularity volume mapping (VVM) for block volume storage in the storage device based on the corresponding vLBA set; entries of the VVM are divided into buckets, and the entries include a variable vLBA range; the volume manager determines an entry for a vLBA set in a VVM or fine-grained volume mapping (FVM) for block volume storage based on the determined bucket; the FVM includes granularity per vLBA.

Description

Technical Field

[0001] This disclosure generally relates to data storage management systems, and more specifically, to methods for efficiently managing metadata for large volume storage rows. Background Technology

[0002] This background section is intended to provide context only, and the disclosure of any concepts in this section does not constitute an admission that the concepts are prior art.

[0003] With the increasing adoption of physical solid-state drives (SSDs), such as low-cost quad-level cell (QLC) SSDs, the inherent challenges related to endurance need to be addressed. QLC SSDs offer extremely high storage density at a low cost per byte (GB). However, this increased density can lead to reduced endurance because QLC SSDs have a limited number of program / erase cycles, making them more susceptible to wear and degradation over time.

[0004] To efficiently manage storage operations, a logical volume manager (referred to as a volume manager in this document) acts as an intermediary between applications and storage devices, providing a logical abstraction of the physical storage. A volume manager can run on the controller or within the host where the application is running. Applications can rely on the volume manager to perform operations such as writing data to and reading data from an SSD. To efficiently map logical operations to physical storage locations, the volume manager utilizes volume mapping. Volume mapping establishes a one-to-one relationship between volume logical block addresses (vLBAs) and drive logical block addresses (dLBAs), indicating the physical location of data on the storage medium. This mapping is crucial for locating data on the storage medium and ensuring efficient data retrieval.

[0005] As storage capacity increases, the size of metadata required to maintain volume mappings grows significantly. For example, in a petabyte (PB) logical block volume, volume mapping metadata can span several terabytes (TB). To mitigate the overhead of storing large metadata datasets, static volume mappings can be employed. These techniques encode metadata into a smaller number of bytes, allowing the dLBA to be reconstructed by decoding the stored metadata.

[0006] To further improve efficiency, high-speed non-volatile memory (e.g., Computer Fast Link Attachment (CXL Attachment) persistent memory) can be used to cache and store metadata. This type of memory provides fast access times and persistence across power cycles, which is ideal for storage volume mapping. However, as the size of static volume mapping increases, it may exceed the capacity of the memory device, leading to a capacity overflow problem. Overflow can cause performance degradation, increased latency, and inefficiency in managing large-scale block storage systems. Summary of the Invention

[0007] According to an embodiment, a method is provided in which a device's volume manager receives a command having a corresponding vLBA set. The volume manager determines buckets for a variable-granularity volume mapping (VVM) for block volume storage in the storage device based on the corresponding vLBA set. VVM entries are divided into buckets, and each entry includes a variable range of vLBAs. Based on the determined buckets, the volume manager determines entries for the vLBA set in either the VVM for block volume storage or the fine-grained volume mapping (FVM). The FVM includes per-vLBA granularity.

[0008] According to this embodiment, a bucket can correspond to a corresponding vLBA range, and the corresponding vLBA set can be within the vLBA range of the determined bucket. The command can be a write command. When the determined bucket includes empty entries, the corresponding vLBA set can be encoded for the VVM, and the encoded vLBA set can be written to the VVM entry. When the determined bucket does not have empty entries, the corresponding vLBA set can be encoded for the FVM, and the encoded vLBA set can be written to the FVM. Alternatively, a vLBA set can be evicted from the VVM entry; the corresponding vLBA set can be encoded for the VVM, and the encoded vLBA set can be written to the VVM entry; the evicted vLBA set can be encoded for the FVM, and the evicted vLBA set can be written to the FVM.

[0009] According to this embodiment, the command can be a write command, which can encode the corresponding vLBA set for the VVM, and can update the VVM entries with the encoded vLBA set. When the command is a write command and the determined bucket includes empty entries, the existing entries of the VVM can be updated with a portion of the corresponding vLBA set, the remaining portion of the corresponding vLBA set can be encoded for the VVM, and the encoded remaining portion of the vLBA set can be written to the VVM entries. When the determined bucket does not have empty entries, the existing entries of the VVM can be updated with a portion of the corresponding vLBA set, the remaining portion of the corresponding vLBA set can be encoded for the FVM, and the encoded remaining portion of the vLBA set can be written to the FVM.

[0010] According to this embodiment, the command can be a read command, the entry can be in the VVM, and the dLBA of the entry can be reconstructed using decoded information from the entry and segment mappings for block volume storage. When the entry tag in the determined bucket indicates FVM storage, the dLBA of the FVM entry can be reconstructed using segment mappings for block volume storage.

[0011] According to an embodiment, an apparatus is provided that includes a controller and a non-transitory computer-readable storage medium storing instructions. When executed, the instructions cause the controller to receive a command having a corresponding vLBA set and, based on the corresponding vLBA set, determine buckets for a Virtual Virtual Machine (VVM) for block volume storage in the storage device. Entry points for the VVM are divided into buckets, and each entry includes a variable range of vLBAs. The instructions further cause the controller to determine entries for the vLBA set within either the VVM or an Open Virtual Machine (FVM) for block volume storage based on the determined buckets. The FVM includes per-vLBA granularity.

[0012] According to this embodiment, a bucket can correspond to a corresponding vLBA range, and the corresponding vLBA set can be within the vLBA range of the determined bucket. The command can be a write command. When the determined bucket includes empty entries, the instruction can cause the controller to encode the corresponding vLBA set for the VVM and write the encoded vLBA set into the VVM entry. When the determined bucket does not have empty entries, the instruction can cause the controller to encode the corresponding vLBA set for the FVM and write the encoded vLBA set into the FVM. Alternatively, the instruction can cause the controller to evict a vLBA set from the VVM entry, encode the corresponding vLBA set for the VVM, write the encoded vLBA set into the VVM entry, encode the evicted vLBA set for the FVM, and write the evicted vLBA set into the FVM.

[0013] According to this embodiment, the command can be a write command, and the instructions can cause the controller to encode the corresponding vLBA set for the VVM and update the VVM entries with the encoded vLBA set. When the command is a write command and the determined bucket includes empty entries, the instructions can cause the controller to update the existing entries of the VVM with a portion of the corresponding vLBA set, encode the remaining portion of the corresponding vLBA set for the VVM, and write the encoded remaining portion of the vLBA set into the VVM entries. When the determined bucket does not have empty entries, the instructions can cause the controller to update the existing entries of the VVM with a portion of the corresponding vLBA set, encode the remaining portion of the corresponding vLBA set for the FVM, and write the encoded remaining portion of the vLBA set into the FVM.

[0014] According to this embodiment, the command can be a read command, the entry can be in the VVM, and the instruction can cause the controller to reconstruct the dLBA of the entry using decoded information from the entry and segment mappings for block volume storage. When the entry tag in the determined bucket indicates FVM storage, the instruction can cause the controller to reconstruct the dLBA of the FVM entry using segment mappings for block volume storage. Attached Figure Description

[0015] The accompanying drawings described below are examples of how embodiments of this disclosure may be implemented and are not intended to limit the scope of embodiments of this disclosure. Various embodiments of this disclosure may include elements not shown in particular drawings and / or elements shown in particular drawings may be omitted. The drawings are intended to provide illustration and may not be to scale. The above and other aspects, features, and advantages of certain embodiments of this disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0016] Figure 1 This is a diagram illustrating a data storage management system for processing commands in an electronic device according to an embodiment of the present disclosure;

[0017] Figure 2 This is a diagram illustrating block volume storage and volume mapping according to embodiments of the present disclosure;

[0018] Figure 3 This is a diagram illustrating entries for volume mapping according to embodiments of the present disclosure;

[0019] Figure 4 This is a diagram illustrating a volume mapping in persistent or non-volatile memory according to embodiments of the present disclosure;

[0020] Figure 5 This is a diagram illustrating a VVM page according to an embodiment of the present disclosure;

[0021] Figure 6 This is a flowchart illustrating a vLBA method for preprocessing received commands according to an embodiment of the present disclosure;

[0022] Figure 7 This is a flowchart illustrating a method for inserting into a volume map in response to a write command vLBA, according to an embodiment of the present disclosure;

[0023] Figure 8 This is a flowchart illustrating a method for retrieving an entry using a volume mapping in response to a read command, according to embodiments of the present disclosure; and

[0024] Figure 9 This is a block diagram of an electronic device for processing commands in a network environment according to embodiments of the present disclosure. Detailed Implementation

[0025] In the following description, embodiments of the present disclosure are described in detail with reference to the accompanying drawings. It should be noted that although the same elements are shown in different drawings, the same elements will be designated by the same reference numerals. In the following description, only specific details such as detailed configurations and components are provided to aid in a comprehensive understanding of the embodiments of the present disclosure. Therefore, it will be apparent to those skilled in the art that various changes and modifications can be made to the embodiments described herein without departing from the scope of the present disclosure. Furthermore, for clarity and brevity, descriptions of well-known functions and constructions have been omitted. The terminology described below is defined in consideration of the functions in this disclosure and may vary depending on the user, the user's intent, or habits. Therefore, the definitions of the terms should be determined based on the content throughout this specification.

[0026] This disclosure can have various modifications and various embodiments, of which are described in detail below with reference to the accompanying drawings. However, it should be understood that this disclosure is not limited to the embodiments, but includes all modifications, equivalents, and substitutions within the scope of this disclosure.

[0027] Although terms including ordinal numbers such as first, second, etc., can be used to describe various elements, structural elements are not limited by these terms. These terms are used only to distinguish one element from another. For example, a first structural element may be referred to as a second structural element without departing from the scope of this disclosure. Similarly, a second structural element may also be referred to as a first structural element. As used herein, the term "and / or" includes any and all combinations of one or more related items.

[0028] The terminology used herein is for describing various embodiments of this disclosure only and is not intended to limit this disclosure. Unless the context clearly indicates otherwise, the singular form is intended to include the plural form. In this disclosure, it should be understood that the terms “comprising” or “having” indicate the presence of a feature, number, step, operation, structural element, component, or combination thereof, and do not exclude the probability of the presence or addition of one or more other features, numbers, steps, operations, structural elements, components, or combinations thereof.

[0029] Unless otherwise defined, all terms used herein have the same meaning as understood by one of ordinary skill in the art to which this disclosure pertains. Terms such as those defined in commonly used dictionaries should be interpreted as having the same meaning as in the context of the relevant field, and should not be interpreted as having an ideal or overly formal meaning unless expressly defined in this disclosure.

[0030] The terminology used in this disclosure is not intended to limit the disclosure, but rather to include various changes, equivalents, or substitutions for corresponding embodiments. Regarding the description of the drawings, similar reference numerals may be used to refer to similar or related elements. The singular form of a noun corresponding to an item may include one or more of things unless the relevant context clearly indicates otherwise. As used herein, each of the phrases such as “A or B,” “at least one of A and B,” “at least one of A or B,” “A, B, or C,” “at least one of A, B, and C,” and “at least one of A, B, or C” may include all possible combinations of items listed together in the corresponding phrase. As used herein, terms such as “first,” “second,” “first,” and “second” may be used to distinguish a corresponding component from another component, but are not intended to limit the components in other ways (e.g., importance or order). If an element (e.g., a first element) is referred to as “coupled to another element (e.g., a second element)”, “coupled to another element (e.g., a second element)”, “connected to another element (e.g., a second element)”, or “connected to another element (e.g., a second element)” with or without the terms “operably” or “communically”, it indicates that the element can be coupled to the other element directly (e.g., wired), wirelessly, or via a third element.

[0031] As used herein, the term "module" can include units implemented in hardware, software, firmware, or a combination thereof, and is used interchangeably with other terms such as "logic," "logic block," "part," and "circuit." A module can be a single integrated component or the smallest unit or part thereof adapted to perform one or more functions. For example, according to one embodiment, a module can be implemented as an application-specific integrated circuit (ASIC), a coprocessor, or a field-programmable gate array (FPGA).

[0032] According to one embodiment, the electronic device can be one of various types of electronic devices that utilize storage devices (e.g., memory devices). The electronic device can use any suitable storage and / or interconnect interface standard, such as Peripheral Component Interconnect Fast (PCIe), Non-Volatile Memory Fast (NVMe), Mesh NVMe-over-fabric (NVMeoF), Advanced Scalable Interface (AXI), Hyper Path Interconnect (UPI), Ethernet, Transmission Control Protocol / Internet Protocol (TCP / IP), Remote Direct Memory Access (RDMA), RDMA over Converged Ethernet (ROCE), Fibre Channel (FC), InfiniBand (IB), Serial Advanced Technology Attachment (SATA), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), Internet Wide Area RDMA Protocol (iWARP), and any combination thereof. In some embodiments, the interconnect interface may be implemented using one or more memory semantics and / or memory coherence interfaces and / or protocols, including one or more Compute Fast Link (CXL) protocols (such as CXL.mem, CXL.io, and / or CXL.cache), Gen-Z, Coherent Accelerator Processor Interface (CAPI), Cache Coherent Interconnect for Accelerators (CCIX), and any combination thereof. Any memory device may be implemented using one or more of any type of memory device interface, including Double Data Rate (DDR), DDR2, DDR3, DDR4, DDR5, Low Power DDR (LPDDRX), Open Memory Interface (OMI), Nvlink High Bandwidth Memory (HBM), HBM2, HBM3, etc. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computers, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. However, electronic devices are not limited to those described above.

[0033] Figure 1This is a diagram illustrating a data storage management system for processing commands in an electronic device according to an embodiment. Storage system 100 includes a host 102 and a storage device 104 (e.g., a memory device). Although one host and one storage device are depicted, storage system 100 may include multiple hosts and / or multiple storage devices. Storage device 104 may be an SSD, universal flash memory (UFS), etc. Storage device 104 includes a controller 106 and a storage medium 108 connected to the controller 106. Controller 106 may be an SSD controller, a UFS controller, etc. Storage medium 108 may include volatile memory, non-volatile memory, or both, and may include one or more flash memory chips (or other storage media). Controller 106 may include one or more processors, one or more error correction circuitry, one or more FPGAs, one or more host interfaces, one or more flash bus interfaces, etc., or combinations thereof. Controller 106 may be configured to facilitate the transfer of data / commands between host 102 and storage medium 108. Host 102 sends data / commands to storage device 104 for reception by controller 106 and processing in conjunction with storage medium 108. Volume manager 110 can be positioned between host 102 and storage device 104. Alternatively, volume manager 110 can be located within host 102 itself. Thus, volume manager 110 can operate on the controller or within host 102 to map vLBAs to dLBAs on storage device 104.

[0034] Figure 2 This is a diagram illustrating block volume storage and block volume metadata according to an embodiment. Block volume storage 202 may include data divided into individual blocks that can be directly accessed by compute instances. Block volume storage 202 can provide high-performance, flexible storage that can be read and written quickly, ideal for demanding workloads. Block volume storage 202 may be a fast, scalable storage solution that utilizes SSD technology to deliver rapid data access. For example, block volume storage 202 may include a series of QLC SSDs 204.

[0035] Block volume metadata can be provided in non-volatile memory 206. Non-volatile memory 206 may include static volume mapping 208, which can be used by the volume manager to place data into and retrieve data from QLC SSD 204 according to application requests. Static volume mapping 208 may have a one-to-one relationship between vLBA and dLBA. Specifically, each entry in volume mapping 208 may correspond to vLBA 210. Each entry in static volume mapping 208 may be M bytes (B), resulting in a very large volume mapping size (e.g., when M=17B, for a 1PB storage volume, the volume mapping size can be greater than 1TB).

[0036] Figure 3 This is a diagram illustrating entries for volume mapping according to an embodiment.

[0037] Each entry 302 of the volume map may include a first region 304 for valid bits, a second region 306 for segment number and stripe number, a third region 308 for stripe offset, a fourth region 310 for bucket offset, a fifth region 312 for dLBA offset, and an unused sixth region 314. The first region 304 may be 1 bit (b), and the second region 306 may be S... g Bit (e.g., 14b), the third region 308 can be S t For example, 5b, the fourth region 310 can be bit B0, the fifth region 312 can be bit L0, and the sixth region 314 can be bit B. m Bits (e.g., 4b).

[0038] Reducing the entry size can result in a volume mapping size significantly larger than GB, which may still exceed the capacity of persistent storage devices, thus causing overflow problems.

[0039] According to embodiments, space-efficient encoding and decoding of volume and drive metadata can be provided for variable address ranges in each volume mapping entry. For large volume management, a hybrid mapping scheme can be provided to amortize space utilization and sequential access. The hybrid mapping scheme can include configurable, variable-granularity volume mapping that reduces read and write amplification of volume mapping accesses and can be configured based on expected workload. Mapping entries can be efficiently merged, split, and moved within and between VVMs and FVMs.

[0040] Figure 4 This is a diagram illustrating a volume mapping in persistent or non-volatile memory according to an embodiment. Persistent memory (e.g., a persistent memory device attached to a CXL) 402 may include segment mapping 404, VVM 406, and FVM 408. Segment mapping 404 can map segment numbers to drive numbers and start dLBAs (sdLBAs).

[0041] A VVM 406 can be a fixed-size volume mapping with variable vLBA granularity per entry. The VVM 406 can be configured based on the expected workload that will use the volume manager. Specifically, multiple sequential vLBAs can be merged to store data. The metadata or mapping data of the merged vLBAs can be stored as a single entry in the VVM 406, resulting in per-entry metadata rather than per-vLBA metadata, as shown in the documentation. Figure 3 As described. Therefore, one or more vLBAs are mapped to each dLBA entry, as described in more detail in section 5. Figure 3Compared to volume mapping, VVM 406 can be significantly smaller and reduces read and write amplification for mapped access.

[0042] The VVM 406 address range, which is the same as the volume manager's address range, can be divided into a fixed number of buckets, each with one or more volume mapping entries. The bucket address range can be fixed (e.g., 32 vLBAs or 1 stripe), but the number of volume mapping entries per bucket can be configurable at initialization and can be referred to as the Reserved Space Factor (RSF). The RSF can be set to a value that is a power of 2, but smaller than the cache line access granularity / entry size C. L / E m (For example, cache line access granularity can be equal to 64B, and RSF=1, 2, 4, 8, or 16). For instance, the maximum bucket size can be set to 64B, providing zero-overhead transaction support for VVM 406 in devices attached to the CXL when writing stripes. The address range of each volume mapping entry can be variable, but must fall within the bucket's address range (strip address range). Multiple entries for a stripe can be stored within a bucket.

[0043] Therefore, multiple buckets can form a volume mapping page P. m (e.g., 512B). Reads of the volume map can occur at the page level because this provides optimal latency and bandwidth. The number of buckets within a page depends on the cache line size (C). L ) and RSF. Access can be optimized by caching or buffering volume-mapped pages in the host dynamic random access memory (DRAM).

[0044] Figure 5 This is a diagram illustrating a VVM page according to an embodiment. Although Figure 5 The diagram illustrates, for example, defined index page sizes, index page address ranges, number of buckets, and bucket address ranges, but this is for illustrative purposes only, and the embodiments are not limited to these defined sizes and ranges. Depending on the first RSF setting, the first VVM page 502 may have a bucket 504 with two entries (i.e., RSF=2). Bucket 504 may have a range from N to (N+(C...)). L / RSF)-1) of C L / RSF is a fixed address range of vLBAs. Each subsequent bucket has the next (C L / RSF) range of vLBAs (e.g., (N+(C L / RSF) to (N+2) (C) L / RSF)-1). Volume mapping page 502 can have a size P mAnd can have a fixed address range based on the bucket range and the number of buckets. When three merged vLBAs with a range of N to (N+2) are received, they can be placed in the entry of the bucket containing that range (e.g., with a range of N to (N+2)). L The first entry 506) of the bucket with a range of (N+6) to (N+19) is placed in the bucket containing that range (e.g., the second entry 508 of the bucket with a range of N to (N+31).

[0045] According to another RSF setting, the second VVM 510 page can have a bucket 512 with four entries (i.e., RSF=4). The first entry 514 is shown as having three merged vLBAs (N to (N+2)), the second entry 516 is shown as having one vLBA (N+3), the third entry 518 is shown as having fourteen merged vLBAs ((N+6) to (N+19)), and the fourth entry 520 is empty.

[0046] If an additional vLBA is received for a bucket with fully occupied entries, the additional vLBA can be provided to FVM 408. Alternatively, the vLBA of one of the occupied entries can be evicted, allowing the newly received vLBA to be stored in the entry. This may occur if it is determined that the newly received vLBA has a wider range than the vLBAs in the occupied entries. The evicted vLBA can then be provided to FVM 408.

[0047] Return to reference Figure 4 Each entry in VVM 406 may include a first region indicating valid bits, a second region indicating the segment number in the driver, and a third region indicating the stripe number in the segment. Each entry may also include a fourth region indicating the stripe offset in the segment and a fifth region indicating the index bucket offset, the stripe offset being used to identify the start dLBA of the data, and the index bucket offset being used to identify the start vLBA of the data. Each entry may further include a sixth region indicating the dLBA offset and a seventh region indicating possible entries in the FVM, the dLBA offset being used to identify the end of both the vLBA and dLBA. Specifically, the seventh region may be used to mark whether there is an entry in FVM 408 for the vLBA range of that bucket, or to identify the number of entries in FVM for that vLBA range. The format of the seventh region may depend on the available bits and size. The seventh region may be set only on the first entry of the bucket in VVM 406.

[0048] FVM 408 is a scalable volume mapping with per-vLBA granularity (e.g., a one-to-one relationship between vLBA and dLBA entries). As described above, FVM 408 can receive vLBAs when all entries in a bucket containing the range of vLBAs are occupied, or when a vLBA is evicted from an entry in VVM 406. Because FVM 408 has a one-to-one mapping, any merged vLBAs received can be separated in the encoding for FVM 408.

[0049] The FVM 408 can be workload-dependent. The total size of the VVM and FVM can be equal or different. The number of persistent memory accesses can depend on the hash collision handling mechanism in the FVM. For each query, accesses can be kept between one or two, restricted to stripes.

[0050] Figure 6 This is a flowchart illustrating a method for preprocessing received vLBAs according to an embodiment. At 602, the number of vLBAs and stripes can be determined. Specifically, the received vLBAs can be determined as a single received vLBA (A), multiple merged vLBAs within a single stripe (B), or multiple merged vLBAs across multiple stripes (C).

[0051] If the received vLBA is multiple merged vLBAs (C) spanning multiple stripes, the merged vLBAs are divided into stripes at 604. After being divided into stripes, or if the received vLBA is within a single stripe (B), the start and end vLBAs can be determined at 606. Then, at 608, the VVM pages and buckets in the VVM containing the range of the received vLBAs can be determined.

[0052] Figure 7 This is a flowchart illustrating a method for inserting a vLBA into a volume map in response to a write command, according to an embodiment. At 702, preprocessing of the vLBA received by the write command can be performed, as described above regarding... Figure 6 The description refers to determining the VVM page and bucket for the received vLBA. At 704, the write insert type can be determined. Specifically, regarding the first insert type (A), a new entry is received, and no entry exists with the newly requested vLBA range. Regarding the second insert type (B), an update to an old entry is received, where the newly requested vLBA range matches or is greater than the old entry. Regarding the third insert type (C), an update to a partial entry is received, where the newly requested vLBA range partially matches the old entry.

[0053] If the new request is for a new entry (i.e., insertion type (A)), at 706, it can be determined whether the bucket identified in preprocessing has an empty entry. If it is determined that the bucket has an empty entry, at 708, the vLBA and dLBA can be encoded into a single entry for the VVM, i.e., encoded for the Low-Granularity Volume Mapping (LGVM), and at 710, the single entry can be inserted into the VVM's bucket. The bucket entries can also be sorted if needed. If it is determined that the bucket does not have any empty entries, at 712, it can be determined whether an existing entry in the bucket has a smaller vLBA range than the new entry. If it is determined that an existing entry with a smaller range exists, at 714, the vLBA can be evicted from the VVM's entry. At 708, the new entry can be encoded for the VVM, and at 710, it is inserted into the VVM's bucket. The evicted vLBA can be encoded against the FVM at 716, i.e., against the High-Granularity Volume Map (HGVM), and inserted into one or more entries in the FVM at 718. If it is determined that no entry with a smaller range exists, a new entry can be encoded against the FVM at 716 and inserted into the FVM at 718.

[0054] If the new request is a complete update of an existing entry (i.e., insert type (B)), the vLBA and dLBA can be encoded into a single entry at 720, i.e., encoded for LGVM, and the old entry in VVM can be updated at 722.

[0055] If the new request is a partial update of an existing entry (i.e., insert type (C)), then at 724, the existing entry can be modified based on the corresponding part of the new request, and the VVM can be updated. At 726, it can be determined whether the bucket identified in preprocessing has empty entries. If it is determined that the bucket has empty entries, then at 708, the new vLBA and dLBA information of the new request can be encoded into a single entry in the VVM, and at 710, the new entry can be inserted into the VVM. The bucket entries can also be sorted if necessary. If it is determined that the bucket does not have empty entries, then the new information of the new request can be encoded against the FVM at 716, and the new entry can be inserted into the FVM at 718.

[0056] Figure 8 This is a flowchart illustrating a method for retrieving an entry using a volume map in response to a read command, according to an embodiment. At 802, preprocessing of the vLBA range requested in the read command can be performed, as described above regarding... Figure 6The process described above identifies VVM pages and buckets, specifically LGVM buckets. At 804, a search can be performed on the vLBA within the identified bucket. At 806, it can be determined whether an entry was found. If an entry is found in the VVM, at 808, a segment map can be used to reconstruct the dLBA from the entry. If no entry is found in the VVM, at 810, it can be determined whether the bucket's entry includes a marker indicating the presence of a vLBA within that range in the FVM, specifically a marker indicating the HGVM. If it is determined that the corresponding vLBA does not exist in the FVM, at 812, a result indicating that the entry does not exist can be returned. If it is determined that the vLBA exists in the FVM, at 814, a search can be performed on the FVM, specifically the HGVM. At 816, it can be determined whether an entry was found in the FVM. If an entry is found in the FVM, at 808, a segment map can be used to reconstruct the dLBA from the returned entry. If no entry is found, at 812, a result indicating that the entry does not exist can be returned.

[0057] Figure 9 This is a block diagram of an electronic device in a network environment 900 for processing commands according to an embodiment. The electronic device may utilize the above-described... Figure 1 and Figure 6 One of the various types of electronic devices described in the text, which is a storage device.

[0058] refer to Figure 9 In network environment 900, electronic device 901 can communicate with electronic device 902 via a first network 998 (e.g., a short-range wireless communication network), or with electronic device 904 or server 908 via a second network 999 (e.g., a long-range wireless communication network). Electronic device 901 can communicate with electronic device 904 via server 908. Electronic device 901 may include processor (or controller) 920, memory 930, input device 950, sound output device 955, display device 960, audio module 970, sensor module 976, interface 977, haptic module 979, camera module 980, power management module 988, battery 989, communication module 990, subscriber identification module (SIM) 996, or antenna module 997. In one embodiment, at least one of the components (e.g., display device 960 or camera module 980) may be omitted from electronic device 901, or one or more other components may be added to electronic device 901. Some of the components may be implemented as a single integrated circuit (IC). For example, a sensor module 976 (e.g., a fingerprint sensor, an iris sensor, or an illuminance sensor) may be embedded in a display device 960 (e.g., a display).

[0059] Processor 920 can execute software (e.g., program 940) to control at least one other component (e.g., hardware or software component) of electronic device 901 coupled to processor 920, and can perform various data processing or calculations. Processor 920 may include Figure 1 Volume Manager 110.

[0060] As at least part of data processing or computation, processor 920 can load commands or data received from a host or another component (e.g., sensor module 976 or communication module 990) into volatile memory 932, process the commands or data stored in volatile memory 932, and store the resulting data in non-volatile memory 934. Processor 920 may include a main processor 921 (e.g., a central processing unit (CPU) or application processor (AP)) and an auxiliary processor 923 (e.g., a graphics processing unit (GPU), image signal processor (ISP), sensor hub processor, or communication processor (CP)) that can operate independently of or in conjunction with the main processor 921. Additionally or alternatively, auxiliary processor 923 may be adapted to consume less power than the main processor 921 or to perform specific functions. Auxiliary processor 923 may be implemented separately from or as part of the main processor 921.

[0061] The auxiliary processor 923 can replace the main processor 921 when the main processor 921 is inactive (e.g., in sleep) or, when the main processor 921 is active (e.g., executing an application), work with the main processor 921 to control at least some of the functions or states associated with at least one component of the electronic device 901 (e.g., display device 960, sensor module 976, or communication module 990). The auxiliary processor 923 (e.g., an image signal processor or a communication processor) can be implemented as part of another component (e.g., a camera module 980 or communication module 990) that is functionally associated with the auxiliary processor 923.

[0062] Memory 930 may store various data used by at least one component of electronic device 901 (e.g., processor 920 or sensor module 976). The various data may include, for example, input or output data of software (e.g., program 940) and associated commands. Memory 930 may include volatile memory 932 or non-volatile memory 934. Non-volatile memory 934 may include internal memory 936 and / or external memory 938.

[0063] Program 940 can be stored as software in memory 930 and may include, for example, an operating system (OS) 942, middleware 944, or application 946.

[0064] Input device 950 can receive commands or data from outside electronic device 901 (e.g., a user) to be used by another component of electronic device 901 (e.g., processor 920). Input device 950 may include, for example, a microphone, mouse, or keyboard.

[0065] The sound output device 955 can output sound signals to the outside of the electronic device 901. The sound output device 955 may include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as playing multimedia or recording, and the receiver can be used to receive incoming calls. The receiver can be implemented separately from the speaker or as part of the speaker.

[0066] Display device 960 can visually provide information to the outside of electronic device 901 (e.g., to a user). Display device 960 may include, for example, a display, a holographic device, or a projector, and control circuitry for controlling a corresponding one of the display, holographic device, and projector. Display device 960 may include touch circuitry adapted to detect touch or sensor circuitry adapted to measure the intensity of the force caused by touch (e.g., a pressure sensor).

[0067] The audio module 970 can convert sound into electrical signals and vice versa. The audio module 970 can acquire sound via the input device 950, or output sound via the sound output device 955 or headphones of the external electronic device 902 that are directly (e.g., wired) or wirelessly coupled to the electronic device 901.

[0068] Sensor module 976 can detect the operating state of electronic device 901 (e.g., power or temperature) or the environmental state outside electronic device 901 (e.g., user state), and then generate an electrical signal or data value corresponding to the detected state. Sensor module 976 may include, for example, a gesture sensor, gyroscope sensor, atmospheric pressure sensor, magnetic sensor, accelerometer, grip sensor, proximity sensor, color sensor, infrared (IR) sensor, biometric sensor, temperature sensor, humidity sensor, or illuminance sensor.

[0069] Interface 977 may support one or more specified protocols for direct (e.g., wired) or wireless coupling of electronic device 901 to external electronic device 902. Interface 977 may include, for example, a High Definition Multimedia Interface (HDMI), a Universal Serial Bus (USB) interface, a Secure Digital Card (SD) interface, or an audio interface.

[0070] Connection terminal 978 may include a connector through which electronic device 901 can be physically connected to external electronic device 902. Connection terminal 978 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0071] The haptic module 979 can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that can be recognized by a user through tactile or kinesthetic sensation. The haptic module 979 may include, for example, a motor, a piezoelectric element, or an electrical stimulator.

[0072] Camera module 980 can capture still or moving images. Camera module 980 may include one or more lenses, image sensors, image signal processors, or flashes. Power management module 988 can manage the power supplied to electronic device 901. Power management module 988 may be implemented as at least a part of, for example, a power management integrated circuit (PMIC).

[0073] The battery 989 can supply power to at least one component of the electronic device 901. The battery 989 may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0074] Communication module 990 can support the establishment of a direct (e.g., wired) or wireless communication channel between electronic device 901 and external electronic devices (e.g., electronic device 902, electronic device 904, or server 908), and perform communication via the established communication channel. Communication module 990 may include one or more communication processors that can operate independently of processor 920 (e.g., AP) and support direct (e.g., wired) or wireless communication. Communication module 990 may include wireless communication module 992 (e.g., cellular communication module, short-range wireless communication module, or Global Navigation Satellite System (GNSS) communication module) or wired communication module 994 (e.g., local area network (LAN) communication module or power line communication (PLC) module). The respective communication modules among these communication modules can communicate via a first network 998 (e.g., a short-range communication network, such as BLUETOOTH). TMThe communication module 992 communicates with external electronic devices via a wireless communication module 993 (e.g., a Wi-Fi Direct or Infrared Data Association (IrDA) standard) or a second network 999 (e.g., a remote communication network, such as a cellular network, the Internet, or a computer network (e.g., a LAN or a wide area network (WAN))). These various types of communication modules can be implemented as a single component (e.g., a single IC) or as multiple components that are separate from each other (e.g., multiple ICs). The wireless communication module 992 can use subscriber information (e.g., International Mobile Subscriber Identity (IMSI)) stored in the subscriber identification module 996 to identify and authenticate electronic devices 901 in the communication network (e.g., a first network 998 or a second network 999).

[0075] Antenna module 997 can transmit or receive signals or power to or from the outside of electronic device 901 (e.g., external electronic device). Antenna module 997 may include one or more antennas, and at least one antenna suitable for a communication scheme used in a communication network such as a first network 998 or a second network 999 can be selected, for example, by communication module 990 (e.g., wireless communication module 992). Signals or power can then be transmitted or received between communication module 990 and external electronic device via the selected at least one antenna.

[0076] Commands or data can be sent or received between electronic device 901 and external electronic device 904 via server 908 coupled to a second network 999. Each of electronic devices 902 and 904 can be a device of the same or different type as electronic device 901. All or some operations to be performed at electronic device 901 can be performed at one or more of the external electronic devices 902, 904, or server 908. For example, if electronic device 901 is required to automatically or in response to a request from a user or another device to perform a function or service, instead of performing the function or service, or in addition to performing the function or service, electronic device 901 may request one or more external electronic devices to perform at least a portion of the function or service. The one or more external electronic devices receiving the request may perform at least a portion of the requested function or service, or additional functions or services related to the request, and transmit the result of the execution to electronic device 901. Electronic device 901 may provide the result as at least part of a response to the request, with or without further processing of the result. For this purpose, cloud computing, distributed computing, or client-server computing technologies may be used, for example.

[0077] Embodiments of the subject matter and operation described in this specification may be implemented as digital electronic circuits, or as computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or combinations thereof. Embodiments of the subject matter described in this specification may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on a computer storage medium for execution by a data processing apparatus or for controlling the operation of a data processing apparatus. Alternatively or additionally, the program instructions may be encoded on artificially generated propagating signals, such as machine-generated electrical, optical, or electromagnetic signals, generated to encode information for transmission to a suitable receiver device for execution by the data processing apparatus. The computer storage medium may be or be included in a computer-readable storage device, a computer-readable storage substrate, a random or serial access memory array or device, or a combination thereof. Furthermore, although the computer storage medium is not a propagating signal, it may be a source or destination of computer program instructions encoded in artificially generated propagating signals. The computer storage medium may also be one or more separate physical components or media (e.g., multiple CDs, disks, or other storage devices), or included therein. Furthermore, the operations described in this specification can be implemented as operations performed by a data processing apparatus on data stored on one or more computer-readable storage devices or received from other sources.

[0078] While this specification may contain numerous specific details of implementation, these details should not be construed as limiting the scope of any claimed subject matter, but rather as descriptions of features specific to particular embodiments. Certain features described in the context of individual embodiments in this specification may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments. Furthermore, although features may be described above as functioning in certain combinations and even initially claimed in this way, one or more features from a claimed combination may be removed from the combination in some cases, and the claimed combination may be for sub-combinations or variations thereof.

[0079] Similarly, although the operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring these operations to be performed in the specific order shown or sequentially, or to perform all the shown operations to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of the various system components in the above embodiments should not be construed as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.

[0080] Therefore, specific embodiments of the subject matter have been described herein. Other embodiments are within the scope of the following claims. In some cases, the actions set forth in the claims may be performed in a different order and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific order or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing may be advantageous.

[0081] Although certain embodiments of this disclosure have been described in detail herein, modifications may be made in various forms without departing from the scope of this disclosure. Therefore, the scope of this disclosure should not be determined solely based on the described embodiments, but rather on the appended claims and their equivalents.

Claims

1. A method for operating a volume manager, comprising: Receive commands with the corresponding set of volume logical block addresses (vLBAs); Based on the corresponding vLBA set, buckets for variable-granularity volume mapping VVMs used for block volume storage in the storage device are determined, wherein entries of the VVMs are divided into buckets, and the entries include variable vLBA ranges; and Based on the determined bucket, entries for the corresponding vLBA set are determined in the VVM or fine-grained volume mapping FVM for the block volume storage, wherein the FVM includes per vLBA granularity.

2. The operating method according to claim 1, wherein, The bucket corresponds to a corresponding vLBA range, and the corresponding vLBA set is within the vLBA range of the determined bucket.

3. The operating method according to claim 2, wherein, The command is a write command, and the determined bucket includes empty entries, and the operation method further includes: The corresponding vLBA set is encoded for the VVM; and Write the encoded vLBA set into the entry of the VVM.

4. The operating method according to claim 2, wherein, The command is a write command and the determined bucket has no empty entries, and the operation method further includes: The corresponding vLBA set is encoded for the FVM; and Write the encoded vLBA set into the FVM.

5. The operating method according to claim 2, wherein, The command is a write command and the determined bucket has no empty entries, and the operation method further includes: Evict the vLBA set from the entries of the VVM; The corresponding vLBA set is encoded for the VVM; Write the encoded vLBA set into the entry of the VVM; For the vLBA set that is expelled by the FVM encoding; and Write the expelled vLBA set into the FVM.

6. The operating method according to claim 2, wherein, The command is a write command, and the operation method further includes: The corresponding vLBA set is encoded for the VVM; and Update the entry of the VVM with the encoded vLBA set.

7. The operating method according to claim 2, wherein, The command is a write command, and the determined bucket includes empty entries, and the operation method further includes: Update the existing entries of the VVM with a portion of the corresponding vLBA set; The remaining portion of the corresponding vLBA set is encoded for the VVM; and The remaining portion of the encoding of the corresponding vLBA set is written into the entry of the VVM.

8. The operating method according to claim 2, wherein, The command is a write command and the determined bucket has no empty entries, and the operation method further includes: Update the existing entries of the VVM with a portion of the corresponding vLBA set; The remaining portion of the corresponding vLBA set is encoded for the FVM; and The remaining portion of the encoding of the corresponding vLBA set is written into the FVM.

9. The operating method according to claim 2, wherein, The command is a read command and the entry is in the VVM, and the operation method further includes: The driver logical block address dLBA of the entry is reconstructed using information decoded from the entry and segment mapping for the block volume storage.

10. The operating method according to claim 2, wherein, The command is a read command and the entry marker in the determined bucket indicates FVM storage, and the operation method further includes: The dLBA of the entry for the FVM is reconstructed using the segment mapping for the block volume storage.

11. A storage device, comprising: Controller; and A non-transitory computer-readable storage medium storing instructions that, when executed, cause the controller to: Receive commands with the corresponding set of volume logical block addresses (vLBAs); Based on the corresponding vLBA set, buckets for variable-granularity volume mapping VVMs used for block volume storage in the storage device are determined, wherein entries of the VVMs are divided into buckets, and the entries include variable vLBA ranges; and Based on the determined bucket, entries for the corresponding vLBA set are determined in the VVM or fine-grained volume mapping FVM for the block volume storage, wherein the FVM includes per vLBA granularity.

12. The device according to claim 11, wherein, The bucket corresponds to a corresponding vLBA range, and the corresponding vLBA set is within the vLBA range of the determined bucket.

13. The device according to claim 12, wherein, The command includes a write command, the determined bucket includes empty entries, and the instruction also causes the controller to: The corresponding vLBA set is encoded for the VVM; and Write the encoded vLBA set into the entry of the VVM.

14. The device according to claim 12, wherein, The command is a write command, the determined bucket has no empty entries, and the instruction also causes the controller to: The corresponding vLBA set is encoded for the FVM; and Write the encoded vLBA set into the FVM.

15. The device according to claim 12, wherein, The command is a write command, the determined bucket has no empty entries, and the instruction also causes the controller to: Evict the vLBA set from the entries of the VVM; The corresponding vLBA set is encoded for the VVM; Write the encoded vLBA set into the entry of the VVM; For the vLBA set that is expelled by the FVM encoding; and Write the expelled vLBA set into the FVM.

16. The device according to claim 12, wherein, The command is a write command, and the instruction also causes the controller to: The corresponding vLBA set is encoded for the VVM; and Update the entry of the VVM with the encoded vLBA set.

17. The device according to claim 12, wherein, The command is a write command, the determined bucket includes empty entries, and the instruction also causes the controller to: Update the existing entries of the VVM with a portion of the corresponding vLBA set; The remaining portion of the corresponding vLBA set is encoded for the VVM; and The remaining portion of the encoding of the corresponding vLBA set is written into the entry of the VVM.

18. The device according to claim 12, wherein, The command is a write command, the determined bucket has no empty entries, and the instruction also causes the controller to: Update the existing entries of the VVM with a portion of the corresponding vLBA set; The remaining portion of the corresponding vLBA set is encoded for the FVM; and The remaining portion of the encoding of the corresponding vLBA set is written into the FVM.

19. The device according to claim 12, wherein, The command is a read command, the entry is in the VVM, and the instruction also causes the controller to: The driver logical block address dLBA of the entry is reconstructed using information decoded from the entry and segment mapping for the block volume storage.

20. The device according to claim 12, wherein, The command is a read command, the entry marker in the determined bucket indicates FVM storage, and the instruction also causes the controller to: The dLBA of the entry for the FVM is reconstructed using the segment mapping for the block volume storage.

Images