Dual encryption method based on voltage regulation memristor

Abstract

The invention relates to the technical field of encryption, and discloses a dual encryption method based on a voltage regulation memristor, which comprises the following steps: obtaining nine non-volatile resistance states of the memristor by regulating an operation voltage applied to the memristor; nine memristive devices are integrated according to a 3 * 3 array and correspond to nine physical digital keys, and the nine memristive devices correspond to nine resistance states of the memristive devices respectively, so that a physical key-resistance state-operation voltage corresponding relation is formed; the method comprises the following steps: for a password containing letters, numbers and symbols, converting each letter, number or symbol into a decimal code, performing nounary conversion to obtain a nounary code, and mapping the nounary code to nine keys of the numbers to obtain a combined physical key corresponding to the password; according to each physical key in the combined physical keys, corresponding operation voltages are applied to the nine memristive devices respectively, so that the memristive devices are switched to corresponding resistance states respectively, and combined resistance states corresponding to the combined physical keys are formed and serve as corresponding secret keys to execute subsequent encryption operation.

Description

Technical Field

[0001] This invention relates to the field of encryption technology, and in particular to a dual encryption method based on a voltage-controlled memristor. Background Technology

[0002] In the rapid development of the information society, encryption technology, as a core protection method for information and property security, has been widely applied in many fields such as financial transactions, smart homes, government systems, and personal privacy protection. Existing encryption technologies are mainly divided into two categories:

[0003] Digital encryption technology uses decimal number combinations as the unique identity verification carrier. Encryption is achieved through the storage and comparison of passwords via microcontrollers, application-specific integrated circuits (ASICs), or software algorithms. The core logic relies solely on the uniqueness of the numerical sequence for verification, without incorporating the physical properties of any functional materials. It is suitable for scenarios with low security requirements, such as general home door locks and consumer payment applications.

[0004] Memristor encryption technology utilizes the physical characteristics and nonlinear response of memristors for encryption. Currently, there are three types of devices: ternary memristor encoding-storage-decoding technology, memristor image chaotic encryption devices, and memristor array physically non-cloning function generators. These three types of memristor encryption devices focus on specific fields such as in-memory computing, image encryption (medical / power engineering scenarios, etc.), and hardware security verification.

[0005] However, digital encryption technology suffers from a lack of flexibility: limited by character format and encryption length, it cannot accommodate letters, symbols, or other characters, resulting in low flexibility and difficulty in adapting to user security needs. This leads to a simplistic and monotonous encryption method, making it vulnerable to brute-force or dictionary attacks. Furthermore, it suffers from high power consumption: the verification process relies on continuous power supply to the microcontroller or signal processing by dedicated integrated circuits. Some network-connected solutions require additional power to maintain data transmission encryption. Lacking low-voltage optimization design, it consumes a lot of power over long-term use, making it unsuitable for low-power scenarios (such as portable electronic devices).

[0006] Memristor encryption technology also suffers from a lack of flexibility. For example, a ternary memristor encoder-store decoder only supports a fixed conversion logic of "three binary signals to one ternary signal", lacks character encoding adaptation design, and cannot be extended to letters, symbols, or other characters. The password length is limited by the number of array units. Furthermore, because it relies on the physical randomness of the device to generate encryption signals, it cannot support user-defined passwords, thus lacking flexibility. Summary of the Invention

[0007] The purpose of this invention is to provide a dual encryption method based on voltage-regulated memristors to solve the above-mentioned problems.

[0008] This invention provides a dual encryption method based on a voltage-controlled memristor, comprising the following steps: Obtain a pre-fabricated memristor device; By adjusting the operating voltage applied to the memristor, nine non-volatile resistive states of the memristor at a preset read voltage can be obtained. Nine memristor devices are integrated in a 3×3 array, corresponding to a physical nine-key digital key. Each of the nine memristor devices corresponds to one of the nine resistive states of the memristor device, thus forming a correspondence between physical key, resistive state, and operating voltage. For multi-character passwords that contain letters, numbers, and symbols, each letter, number, or symbol in the multi-character password is converted into a decimal code, and then the decimal code is converted into a base-9 code to obtain the corresponding base-9 code. The base-9 code is then mapped to the number nine key to obtain the combination of physical keys corresponding to the multi-character password. Based on each physical button in the combined physical button and the correspondence between physical button-resistance state-operating voltage, the corresponding operating voltage is applied to each of the nine memristor devices, so that each memristor device switches to the corresponding resistance state. After the preset reading voltage is used to verify the matching, the combined resistance state corresponding to the combined physical button is formed. The combined resistance state is used as the key for the multi-character cipher to perform encryption operations.

[0009] Furthermore, the memristor device is prepared through the following process: After ultrasonic cleaning in deionized water, acetone and anhydrous ethanol, the FTO / Glass substrate was dried with high-purity nitrogen gas for later use. CsBr, CuBr, and BiBr3 were dissolved in dimethyl sulfoxide solvent according to a preset stoichiometric ratio. The solution was stirred at 90-100℃ until completely dissolved and then cooled to room temperature to obtain a yellow and transparent precursor solution. The precursor solution was coated onto the treated FTO / Glass substrate using a sol-gel spin coating method. The wet film sample was obtained by spin coating at a low speed of 500-800 rpm for 15-20 seconds and a high speed of 4000-5000 rpm for 40-50 seconds. The wet film sample was placed on a preheated heating plate and annealed at 240-260℃ for 30 minutes to form a CCBB memristor film on the substrate. Inert metal electrodes were fabricated on the surface of CCBB memristor thin films using ion sputtering or magnetron sputtering to complete the fabrication of memristor devices.

[0010] Furthermore, the nine non-volatile resistive states are HRS_1, LRS_2, LRS_3, LRS_4, LRS_5, LRS_6, LRS_7, and HRS_8, with corresponding resistance values ​​as follows: ≥30MΩ, 10-20MΩ, 3-4MΩ, 1-2MΩ, 200-300kΩ, 30-50kΩ, 8-20kΩ, 0.9-1kΩ, and <300Ω.

[0011] Furthermore, in the nine memristor devices integrated in a 3×3 array, the resistance states of the first row of memristor devices are HRS, LRS_1, and LRS_2, the resistance states of the second row of memristor devices are LRS_3, LRS_4, and LRS_5, and the resistance states of the third row of memristor devices are LRS_6, LRS_7, and LRS_8.

[0012] Furthermore, the nine non-volatile resistive states are obtained sequentially by applying the following eight operating voltages to the memristor device: 1.2V, 1.4V, 1.5V, 1.6V, 1.7V, 1.9V, 2.0V, and 2.1V.

[0013] Furthermore, the preset reading voltage is -0.7V.

[0014] Furthermore, the decimal encoding is ASCII code.

[0015] The dual encryption method based on voltage-controlled memristors provided by this invention has the following beneficial effects: First, the existing digital encryption is extended by using multi-character encryption that includes letters, numbers, and symbols. For multi-character encryption, the conversion is achieved using memristor devices. This is equivalent to combining memristor encryption technology with extended digital encryption technology to achieve encryption, thereby breaking the limitations of digital encryption technology and memristor encryption technology.

[0016] Specifically, through the decoding logic of multi-character password-decimal encoding-non-base encoding, the pure numeric password is extended to any coded characters such as letters and symbols, completely breaking the limitation of pure numbers. At the same time, based on the mapping relationship between the nine stable resistance states of the memristor device and the nine-key numeric keypad, the password length can be flexibly set according to user needs. The password space scale far exceeds that of pure numeric schemes and ternary memristor technology, greatly enhancing the resistance to brute-force attacks and effectively solving the shortcomings of existing technologies that are "single-character, fixed-length" and not flexible enough.

[0017] Meanwhile, the above nine resistance states are stably regulated by varying the operating voltage. The voltage is reduced by nearly an order of magnitude compared to the voltage of a digital password lock (≥4.5V). Thanks to the non-volatility of the memristor's resistance states, the encrypted state does not require continuous power supply. The operating power consumption depends only on the resistance state switching process. This power consumption is far lower than the continuous signal processing power consumption of digital password technology, and also lower than the modulation power consumption of existing magnetically controlled memristors. It can be adapted to portable electronic devices, low-power smart home scenarios, etc. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0019] Figure 1 A flowchart illustrating a dual encryption method based on a voltage-controlled memristor provided by the present invention; Figure 2 A schematic diagram of the fabrication process of an Au / CCBB / FTO / Glass device provided by the present invention; Figure 3 This invention provides a schematic diagram showing the positions and corresponding resistance states of nine resistive buttons obtained by adjusting the operating voltage under a read voltage of −0.7V using a memristor device. Figure 4 This invention provides an IV schematic diagram of a memristor device under different operating voltages; Figure 5 This is a schematic diagram illustrating the decimal-to-nine-base decoding process of a memristor device for decoding cryptographic characters, as provided by the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0021] Existing pure digital encryption technologies suffer from drawbacks such as limited encryption dimensions, weak resistance to cracking, and vulnerability to attacks. Furthermore, existing memristor encryption technologies are still immature in terms of high security, convenience, and versatility.

[0022] This invention employs the innovative concept of "deep integration of voltage-controlled nine-state memristor and decimal nine-base encoding" to design a password character expansion device based on a multi-state memristor. The core objective is to utilize the voltage control characteristics of the nine-state memristor to optimize the hardware structure of the password lock, increase encryption flexibility, and improve encryption security and stability. Specifically, it is manifested as follows:

[0023] (1) Although existing pure digital encryption technology has a simple unit structure, it requires additional integration of software encryption modules and anti-tampering circuits to improve security. The cost advantage in large-scale applications is easily offset by the additional functions. This invention eliminates the software encoding module and multi-module connection lines in digital encryption, simplifies the "resistance-character" conversion link, improves the response speed and accuracy of password recognition, and effectively reduces power consumption;

[0024] (2) This invention fully covers the encoding of all characters (including uppercase letters, lowercase letters, numbers, and symbols) through nine-state combinations, thus expanding the flexibility of password form settings; (3) The present invention achieves cryptographic encryption through hardware resistance, which can greatly improve the anti-electromagnetic interference and anti-cracking capabilities of the cryptographic system and enhance system stability.

[0025] The technical solutions provided by the various embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0026] One embodiment of the present invention relates to a dual encryption method based on a voltage-controlled memristor. The specific process of the dual encryption method based on a voltage-controlled memristor in this embodiment can be described as follows: Figure 1 As shown, it includes: Step 101: Obtain the pre-prepared memristor device.

[0027] Step 102: By adjusting the operating voltage applied to the memristor, nine non-volatile resistive states of the memristor under a preset read voltage are obtained.

[0028] Step 103: Integrate the nine memristor devices in a 3×3 array, corresponding to the physical nine-key digital key. The nine memristor devices correspond to the nine resistive states of the memristor devices, so as to form a correspondence between physical key, resistive state and operating voltage.

[0029] Step 104: For a multi-character password that contains letters, numbers and symbols, each letter, number or symbol in the multi-character password is converted into a decimal code, and then the decimal code is converted into a base-9 code to obtain the corresponding base-9 code. The base-9 code is then mapped to the number nine keys to obtain the combination of physical keys corresponding to the multi-character password.

[0030] Step 105: Based on each physical button in the combined physical button and the correspondence between physical button-resistance state-operating voltage, apply the corresponding operating voltage to each of the 9 memristor devices, so that each memristor device switches to the corresponding resistance state. After the preset reading voltage is used to verify the matching, the combined resistance state corresponding to the combined physical button is formed.

[0031] Step 106: Use the combined resistive state as the key corresponding to the multi-character cipher to perform the encryption operation.

[0032] The following is a detailed description of the implementation details of the dual encryption method based on voltage-regulated memristors in this embodiment. The following content is only for the convenience of understanding the implementation details and is not necessary for implementing this solution.

[0033] The dual encryption method based on voltage-regulated memristors in this embodiment essentially comprises two parts: the first part is the fabrication of the memristor device in step 101; the second part is the implementation of the encryption function through the memristor device in steps 102 to 106.

[0034] The fabrication method of the memristor device (Au / CCBB / FTO / Glass device unit) in this embodiment is as follows: Figure 2 As shown, the specific steps are as follows: (1) ITO / Glass substrate pretreatment: The substrate was sequentially placed in deionized water, acetone, anhydrous ethanol, and ultrasonic cleaning to remove surface organic matter and particulate contamination, and then dried with high-purity nitrogen for later use.

[0035] (2) Preparation of Cs2CuBiBr6 (CCBB) memristor layer: CsBr, CuBr, and BiBr3 were dissolved in dimethyl sulfoxide (DMSO) in a specific stoichiometric ratio. The solution was stirred at 90-100°C until completely dissolved, and then cooled to room temperature to obtain a yellow, transparent precursor solution. The precursor solution was then coated onto an FTO / Glass substrate using a sol-gel spin-coating method. Spin-coating was performed sequentially at a low speed of 500-800 rpm for 15-20 seconds and a high speed of 4000-5000 rpm for 40-50 seconds. The resulting wet film sample was then annealed on a preheated plate at 240-260°C for 30 minutes, ultimately forming a dense and uniform CCBB memristor thin film layer on the substrate.

[0036] In a specific example, CsBr, CuBr, and BiBr3 were dissolved in DMSO solvent in a stoichiometric ratio of 2:1:1. The mixture was stirred continuously at 90°C for 24 hours until the solutes dissolved. After cooling to room temperature, a yellow CCBB precursor solution was obtained and allowed to stand for 24 hours. An appropriate amount of the precursor solution was taken and spin-coated onto an FTO / Glass surface at 500 rpm for 15 seconds and 4500 rpm for 45 seconds. The resulting wet film sample was annealed on a hot plate at 250°C for 30 minutes to finally obtain the CCBB memristor thin film layer.

[0037] (3) Preparation of inert electrodes: CCBB thin films were deposited on the surface using ion sputtering or magnetron sputtering under suitable conditions, such as 10 -1 -10 -2 Torr, 10-20mA, for preparing inert metal (Au, Pt, etc.) electrodes.

[0038] In a specific example, at a vacuum level of 10... -2 Under the ion sputtering conditions of Torr and 20mA current, an Au top electrode layer was obtained by sputtering on the CCBB thin film for 180s, thereby completing the fabrication of the Au / CCBB / FTO / Glass device.

[0039] The following explains how to achieve encryption functionality by adjusting the memristor behavior of Au / CCBB / FTO / Glass devices using voltage regulation: First, such as Figure 3 As shown in (a), by adjusting the operating voltage applied to the memristor device, the operating voltage was successively adjusted to 1.2V, 1.4V, 1.5V, 1.6V, 1.7V, 1.9V, 2.0V, and 2.1V, and nine stable and discrete (non-volatile) resistive states were measured at the read voltage (−0.7V). Based on resistance values ​​from smallest to largest, the nine resistance states are defined as follows: HRS (≥30MΩ, 1.2V), LRS_1 (10-20MΩ, 1.2V), LRS_2 (3-4MΩ, 1.4V), LRS_3 (1-2MΩ, 1.5V), LRS_4 (200-300kΩ, 1.6V), LRS_5 (30-50kΩ, 1.7V), LRS_6 (8-20kΩ, 1.9V), LRS_7 (0.9-1kΩ, 2.0V), and HRS_8 (<300Ω, 2.1V). These resistance states can be stably maintained for two months or more (e.g., over 4000 seconds), demonstrating excellent retention and durability.

[0040] A memristor is a non-linear resistive element with memory function and bipolar resistance switching behavior. Due to the linear hysteresis path, two resistance (current) values ​​can be obtained under the same read voltage, such as... Figure 4 As shown, therefore, only 8 voltages are needed for 9 different resistive states.

[0041] Then, the button encryption operation corresponding to the 9 resistive states was designed: The 9 memristor devices were integrated in a 3×3 array, with each memristor device corresponding to a physical button, establishing a fixed mapping: Row 1, Columns 1-3, i.e., buttons 1-3, correspond to HRS, LRS_1, and LRS_2 respectively; Row 2, Columns 1-3, i.e., buttons 4-6, correspond to LRS_3, LRS_4, and LRS_5 respectively; Row 3, Columns 1-3, i.e., buttons 7-9, correspond to LRS_6, LRS_7, and LRS_8 respectively (corresponding to the physical nine-key key and the 9 resistive states of the memristor devices), forming a one-to-one correspondence between "physical button - resistive state - operating voltage," as follows: Figure 3 As shown in (b) of the diagram.

[0042] Based on the correspondence between the physical button, resistance state, and operating voltage, a multi-character password (including letters, numbers, and symbols) is set. For example, to set the password "Hi2025", the corresponding buttons are: 191237166164166169. The password setting logic is as follows: Figure 5 As shown.

[0043] This mapping table converts characters to decimal codes (such as ASCII codes), then takes the remainder after dividing by 9 to obtain a base-9 number (0-8), which is then mapped to the target key (e.g., "H" → ASCII 72 → (three-digit) base-9 080 → key 1, 9, 1). Figure 3 When setting the password, the system will convert the entered password into a base-9 sequence ("2025" → 2 → 0 → 2 → 5 → corresponding keys (1, 6, 6) → (1, 6, 4) → (1, 6, 6) → (1, 6, 9); "Hi" → "H" → 72 → keys 1, 9, 1, "i" → 105 → keys 2, 3, 7).

[0044] The control system applies write voltages of 1.2V, 1.4V, 1.5V, 1.6V, 1.7V, 1.9V, 2.0V, and 2.1V to the corresponding devices according to the sequence, causing the devices to switch to the target resistance state. After verifying the match by reading the voltage (−0.7V), the resistance state combination is stored as a key. During unlocking, the system reverses the conversion and resistance state verification; if a match is found, the corresponding current signal is output to unlock.

[0045] This design achieves stable resistance through precise low-voltage control and extends to multi-character passwords by combining base-9 conversion. It retains the ease of operation of 3×3 buttons while enhancing encryption security through hardware resistance storage. It is compatible with both pure numeric and character password formats, providing a flexible and efficient encryption solution for security scenarios.

[0046] This embodiment, based on the voltage-controlled polymorphic characteristics of CCBB-based memristors, constructs an encoding and decoding link of "operating voltage → resistance state → numeric nine-key → ASCII decimal to nine-key conversion," designing a password recognition device with customizable character functionality. It can cover all ASCII characters, including letters and symbols, achieving hardware-level encryption and fast response. This technical approach deeply integrates device physical control with general password input logic, simplifying the "resistance state-character" conversion process. It overcomes the character and scenario limitations of existing encryption technologies, such as pure numeric nine-key password technology and ternary memristor encoding-storage-decoding technology. Specific advantages are as follows:

[0047] 1. Overcoming the limitations of character and password flexibility, expanding encryption dimensions: By directly mapping 9 impedance states to the numeric keypad and combining ASCII code decimal to 9-base decoding logic, it can fully cover all characters including uppercase letters, lowercase letters, numbers, and symbols. The password character type and length can be flexibly set according to user needs, expanding the password complexity and customization, and effectively solving the limitations of existing technologies such as "single character and limited password space".

[0048] 2. Achieve stable low-voltage regulation and low-power operation, adapting to multiple scenarios: Based on the memristor encryption technology of CCBB-based memristors, no continuous power supply is required. Only the low energy required for resistive state switching, such as −0.7V, is needed. The overall power consumption is lower than the multi-unit power consumption of a three-value memristor array and even lower than the continuous signal processing power consumption of a pure digital nine-key key. It is suitable for battery-powered scenarios such as portable electronic devices and low-power smart homes, and meets the development needs of "low voltage and low power consumption" electronic systems.

[0049] 3. Enhance hardware encryption anti-interference capabilities and improve response speed: By deeply binding encryption logic with memristor hardware resistance states, encryption is achieved through physical resistance state switching. This improves resistance to electromagnetic interference and anti-cracking capabilities while eliminating the need for external modules and wiring, simplifying the "resistance state → character" conversion link, reducing signal transmission nodes, and thus improving password recognition response speed.

[0050] 4. Simplify hardware structure and facilitate miniaturized integration: This invention adopts a single-device structure of "electrode-thin film material layer-electrode" and prepares the memristor functional layer through a simple sol-gel method. It does not require a cross array of ternary memristors and multiple auxiliary modules. The hardware structure is compact and highly integrated, which can meet the application requirements of space-constrained scenarios such as wearable security devices and miniature smart locks, and makes up for the shortcomings of existing technologies that are difficult to miniaturize and integrate.

[0051] In summary, this invention takes "deep integration of voltage-regulated nine-state memristor and ASCII nine-base encoding" as its core design. While realizing custom recognition of password characters (covering all ASCII characters such as letters, numbers, and symbols) and hardware-level encryption, it solves the defects of "single character type and no hardware physical encryption anti-interference capability" of nine-key pure numeric encryption technology, as well as the limitations of existing memristor encryption technology such as "limited number of resistive states, fixed encoding logic, low integration or high power consumption". It provides necessary technical guidance and path for the miniaturization, low power consumption, device adaptability and universality of cryptographic system hardware required in the high-security field.

[0052] The steps of the various methods described above are only for clarity. In practice, they can be combined into one step or some steps can be split into multiple steps. As long as they include the same logical relationship, they are all within the protection scope of this invention.

[0053] Those skilled in the art will understand that the above embodiments are specific embodiments for implementing the present invention, and in practical applications, various changes in form and detail can be made without departing from the spirit and scope of the embodiments of the present invention. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the embodiments of the present invention; therefore, the scope of protection of the embodiments of the present invention should be determined by the scope defined in the claims.

Claims

1. A dual encryption method based on a voltage-controlled memristor, characterized in that, The method includes: Obtain a pre-fabricated memristor device; By adjusting the operating voltage applied to the memristor, nine non-volatile resistive states of the memristor at a preset read voltage can be obtained. Nine memristor devices are integrated in a 3×3 array, corresponding to a physical nine-key digital key. Each of the nine memristor devices corresponds to one of the nine resistive states of the memristor device, thus forming a correspondence between physical key, resistive state, and operating voltage. For multi-character passwords that contain letters, numbers, and symbols, each letter, number, or symbol in the multi-character password is converted into a decimal code, and then the decimal code is converted into a base-9 code to obtain the corresponding base-9 code. The base-9 code is then mapped to the number nine key to obtain the combination of physical keys corresponding to the multi-character password. Based on each physical button in the combined physical button and the correspondence between physical button-resistance state-operating voltage, the corresponding operating voltage is applied to each of the nine memristor devices, so that each memristor device switches to the corresponding resistance state. After the preset reading voltage is used to verify the matching, the combined resistance state corresponding to the combined physical button is formed. The combined resistance state is used as the key for the multi-character cipher to perform encryption operations.

2. The dual encryption method based on a voltage-regulated memristor according to claim 1, characterized in that, The memristor device is prepared by the following process: After ultrasonic cleaning in deionized water, acetone and anhydrous ethanol, the FTO / Glass substrate was dried with high-purity nitrogen gas for later use. CsBr, CuBr, and BiBr3 were dissolved in dimethyl sulfoxide solvent according to a preset stoichiometric ratio. The solution was stirred at 90-100℃ until completely dissolved and then cooled to room temperature to obtain a yellow and transparent precursor solution. The precursor solution was coated onto the treated FTO / Glass substrate using a sol-gel spin coating method. The wet film sample was obtained by spin coating at a low speed of 500-800 rpm for 15-20 seconds and a high speed of 4000-5000 rpm for 40-50 seconds. The wet film sample was placed on a preheated heating plate and annealed at 240-260℃ for 30 minutes to form a CCBB memristor film on the substrate. Inert metal electrodes were fabricated on the surface of CCBB memristor thin films using ion sputtering or magnetron sputtering to complete the fabrication of memristor devices.

3. The dual encryption method based on voltage-regulated memristors according to claim 1, characterized in that, The nine non-volatile resistive states are HRS, LRS_1, LRS_2, LRS_3, LRS_4, LRS_5, LRS_6, LRS_7, and HRS_8, with corresponding resistance values ​​as follows: ≥30MΩ, 10-20MΩ, 3-4MΩ, 1-2MΩ, 200-300kΩ, 30-50kΩ, 8-20kΩ, 0.9-1kΩ, and <300Ω.

4. The dual encryption method based on voltage-regulated memristors according to claim 3, wherein the resistance states of the first row of memristors in the 9 memristors integrated in a 3×3 array are HRS, LRS_1 and LRS_2, the resistance states of the second row of memristors are LRS_3, LRS_4 and LRS_5, and the resistance states of the third row of memristors are LRS_6, LRS_7 and LRS_8.

5. The dual encryption method based on a voltage-regulated memristor according to claim 1, characterized in that, The nine non-volatile resistive states are obtained sequentially by applying the following eight operating voltages to the memristor device: 1.2V, 1.4V, 1.5V, 1.6V, 1.7V, 1.9V, 2.0V and 2.1V.

6. The dual encryption method based on a voltage-regulated memristor according to claim 5, characterized in that, The preset reading voltage is -0.7V.

7. The dual encryption method based on voltage-regulated memristor according to claim 1, wherein the decimal encoding is ASCII code.

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