Electronic component fault diagnosis method fused with artificial intelligence large model

Abstract

The invention relates to the technical field of electronic testing and artificial intelligence, and discloses an electronic component fault diagnosis method fused with an artificial intelligence large model, which comprises the following steps: constructing a circuit multi-element coupling hypergraph model and acquiring a real-time sequence signal; generating an initial hyperedge attention weight and a physical semantic prompt vector based on the signal; inputting the semantic vector and the topological feature based on attention weight aggregation into a large language model to obtain an initial fault diagnosis hypothesis; generating an anti-factual waveform according to the hypothesis by using a microcircuit solver, and calculating physical residual loss with a real-time signal; and finally, according to the lost gradient, reversely updating the semantic vector and the attention weight, and obtaining a final diagnosis report through closed-loop iteration. Through a gradient backtracking mechanism driven by a physical residual error, a physical simulation error is used as a supervision signal, input of a large model is corrected in real time, physical consistency and high reliability of a diagnosis conclusion are ensured, and a complex unknown fault can be diagnosed in a self-adaptive mode.

Description

Technical Field

[0001] This invention relates to the fields of electronic testing and artificial intelligence technology, specifically to a method for diagnosing electronic component faults by integrating a large artificial intelligence model. Background Technology

[0002] Fault diagnosis of electronic components is a crucial step in ensuring the reliability of electronic systems. Traditional fault diagnosis methods mainly rely on establishing accurate physical circuit models or feature engineering based on signal processing. Physical model-based methods locate faults by analyzing circuit equations, but when dealing with large-scale, nonlinear systems, model construction is complex and computationally intensive. Signal processing-based methods extract time-domain or frequency-domain features and use expert systems or traditional machine learning classifiers for fault identification. While these methods are effective in specific scenarios, their performance is highly dependent on manually designed features, has limited generalization ability, and struggles to handle complex and ever-changing fault modes.

[0003] With the development of artificial intelligence technology, deep learning models, especially graph neural networks, have begun to be applied to circuit fault diagnosis. By representing the circuit topology as a graph, these methods can automatically learn the relationship between the circuit's structural features and signal responses, giving them an advantage over traditional methods when dealing with complex topologies. However, these models typically require a large amount of labeled data for supervised training. Their diagnostic capabilities significantly decrease when dealing with novel or unknown fault types not found in the dataset. Furthermore, the diagnostic process of these models remains a data-driven black box, with their decisions lacking clear physical meaning.

[0004] Recently, pre-trained large language models have demonstrated their potential to solve problems in various fields due to their powerful zero-shot and few-shot reasoning capabilities. When directly applied to fault diagnosis, although they can utilize their rich prior knowledge to analyze text descriptions or signal data, their reasoning process is essentially based on probability-based text generation and lacks an intrinsic understanding of the physical laws of circuits. Therefore, without physical constraints, the diagnostic conclusions generated by large language models may not match the actual physical behavior of the circuit, leading to unreliable diagnostic results and limiting their application value. How to effectively combine the general reasoning capabilities of large language models with the physical laws of circuit systems to achieve accurate, reliable, and interpretable diagnosis of complex faults is a challenge currently facing the technology field. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a fault diagnosis method for electronic components that integrates a large artificial intelligence model. This method solves the problems of existing diagnostic methods relying on predefined fault libraries, insufficient generalization ability, and unreliable diagnostic results due to the lack of physical law constraints in the reasoning process of large language models.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a fault diagnosis method for electronic components integrating a large-scale artificial intelligence model, comprising the following steps: Obtain the netlist file and real-time timing signals of the circuit to be diagnosed, and construct a multi-element coupling hypergraph model of the circuit based on the netlist file; Initial hyperedge attention weights and physical semantic cue vectors are generated based on the real-time temporal signals; The physical semantic cue vector and the topological context features aggregated based on the initial hyperedge attention weights are input into the pre-trained large language model to obtain the initial fault diagnosis hypothesis. Based on the initial fault diagnosis assumptions, a counterfactual waveform is generated using a differentiable circuit solver, and the physical residual loss between the counterfactual waveform and the real-time timing signal is calculated. The physical semantic cue vector and the initial hyperedge attention weights are updated by gradient backtracking based on the physical residual loss, and the final fault diagnosis report is obtained iteratively.

[0007] The constructed circuit multi-coupling hypergraph model includes: Map the components in the circuit to be diagnosed as vertices; The electrical connection network in the circuit to be diagnosed is mapped as a hyperedge to establish a multi-element coupled hypergraph model of the circuit.

[0008] The generation of initial hyperedge attention weights and physical semantic cue vectors based on the real-time time-series signal includes: Perform time-frequency transformation on the real-time time-series signal to extract the frequency domain feature tensor; Global feature aggregation is performed on the frequency domain feature tensor, and the aggregated signal feature vector is concatenated with the static attribute embedding vector of each hyperedge. The initial hyperedge attention weight is calculated through a neural network layer. The physical basis function projector is used to perform feature encoding and dimension projection on the real-time time series signal to generate the physical semantic cue vector.

[0009] The process of obtaining initial fault diagnosis hypotheses includes: Based on the initial hyperedge attention weights, the circuit multi-coupling hypergraph model is aggregated using a hypergraph neural network to generate the topological context features. An input sequence is constructed by concatenating the task instruction embedding, the physical semantic cue vector, and the topological context features; The input sequence is fed into the pre-trained large language model for forward inference, and the output is parsed to extract the initial fault diagnosis hypothesis containing fault component location, fault mode, and fault parameter estimation.

[0010] The extraction of the initial fault diagnosis hypothesis includes: Based on the hidden state vector of the token corresponding to the output layer of the pre-trained large language model, the continuous numerical values ​​of the fault parameter estimates are obtained through differentiable linear regression head mapping.

[0011] The generation of counterfactual waveforms using a differentiable circuit solver includes: Construct a differentiable circuit equation based on the modified nodal analysis method, and map the fault parameters in the initial fault diagnosis assumption to the coefficient matrix of the equation; The time-domain integration of the differentiable circuit equations is performed using a differentiable ordinary differential equation solver to generate the counterfactual waveform.

[0012] The physical residual loss takes into account both the amplitude error and waveform shape similarity between the counterfactual waveform and the real-time timing signal.

[0013] The step of performing gradient backtracking update based on the physical residual loss includes: Determine whether the physical residual loss meets the preset convergence condition; If the conditions are not met, then freeze the parameters of the pre-trained large language model and the differentiable circuit solver; Calculate the gradient of the physical residual loss with respect to the physical semantic cue vector and the initial hyperedge attention weights; The calculated gradient is used to update the physical semantic cue vector and the initial hyperedge attention weights online.

[0014] The method further includes: Based on the updated initial hyperedge attention weights, a pruning operation is performed on the circuit multi-coupling hypergraph model to generate a fault subgraph. The topological context features are recalculated based on the fault subgraph, and the corrected physical semantic cue vector and the recalculated topological context features are fed back to the pre-trained large language model to initiate a new round of fault hypothesis generation.

[0015] The final fault diagnosis report includes verified fault component location, fault mode, and physical confidence index.

[0016] This invention provides a method for fault diagnosis of electronic components that integrates a large-scale artificial intelligence model. It has the following beneficial effects: 1. This invention introduces a differentiable circuit solver to transform the fault assumptions generated by the large language model into physically simulable counterfactual waveforms. The physical residual loss is calculated by comparing the waveforms with real-time signals. This loss directly reflects the deviation between the diagnostic assumptions and physical reality. The gradient generated by this physical residual is used to correct the model input in reverse, thus constructing a closed-loop iterative optimization mechanism. This forces the model's inference results to converge to solutions that conform to physical laws such as Kirchhoff's laws, thereby effectively avoiding the hallucination phenomenon that may occur in conventional artificial intelligence models and ensuring the physical authenticity and high accuracy of the diagnostic conclusions.

[0017] 2. This invention constructs a circuit multi-coupling hypergraph model and introduces signal-driven hyperedge attention weights. During the closed-loop optimization process, the gradient of the physical residual not only corrects the semantic understanding of the model but also dynamically adjusts the focus of attention on the circuit topology. Through iteration, the weights of circuit parts unrelated to the fault are reduced, while the weights of parts related to the fault propagation path are enhanced. Ultimately, automatic pruning of fault-related subgraphs can be achieved. This process makes the decision path of the diagnostic model transparent and visible, allowing technicians to intuitively understand how the model gradually focuses on the fault region, thus enhancing the interpretability of the diagnosis.

[0018] 3. This invention combines the powerful zero-sample / few-sample reasoning capabilities of large language models with accurate physical simulation. Based on its massive prior knowledge, the large language model can generate preliminary hypotheses for complex and unknown fault modes not explicitly recorded in the datasheet or caused by multi-component coupling. Subsequently, the physical verification closed loop can effectively screen and refine these innovative hypotheses. This mechanism of bold hypothesis and careful verification makes this method not limited to a predefined fault library, but can adaptively explore and diagnose new or rare fault types, significantly expanding the applicability of the diagnostic system. Attached Figure Description

[0019] Figure 1 This is a flowchart of the method of the present invention; Figure 2 This is a system architecture diagram of the present invention.

[0020] The module consists of: 10. Data acquisition module; 20. Hypergraph construction module; 30. Feature mapping module; 40. Inference engine module; 50. Simulation verification module; and 60. Optimization control module. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] Example: Please see the appendix Figure 1 -Appendix Figure 2 This invention provides a method for fault diagnosis of electronic components that integrates a large artificial intelligence model, comprising the following steps: S100. Construct a multi-element coupling hypergraph model of the circuit and obtain the real-time timing signals of the circuit to be diagnosed. S200. Based on the frequency domain energy characteristics of real-time time-series signals, generate the initial hyperedge attention weights of the circuit hypergraph and map the real-time time-series signals into physical semantic cue vectors. S300: Input the physical semantic cue vector and the topological features aggregated based on the initial hyperedge attention weights into the pre-trained large language model to obtain the initial fault diagnosis hypothesis; S400: Input the initial fault diagnosis assumptions into the differentiable circuit solver to generate the counterfactual waveform and calculate the physical residual loss between the counterfactual waveform and the real-time timing signal. S500. Determine whether the physical residual loss meets the convergence condition. If the physical residual loss does not meet the convergence condition, calculate the gradient of the physical residual loss with respect to the physical semantic cue vector and the hyperedge attention weight. Backtrack to update the physical semantic cue vector and the hyperedge attention weight. Based on the updated hyperedge attention weight, reconstruct and prune the circuit hypergraph. Return to step S300 for iterative reasoning. S600 When the physical residual loss meets the convergence condition, output the final fault diagnosis report.

[0023] Please see the appendix Figure 2 This invention provides an electronic component fault diagnosis system that integrates a large artificial intelligence model, including: a data acquisition module 10, a hypergraph construction module 20, a feature mapping module 30, an inference engine module 40, a simulation verification module 50, and an optimization control module 60.

[0024] The data acquisition module 10 is connected to the test point of the circuit to be diagnosed and is used to synchronously acquire voltage and current signals to form real-time timing signals. The real-time timing signals contain transient response characteristics during circuit operation. The hypergraph construction module 20 is used to parse the netlist file of the circuit to be diagnosed and establish a multi-coupling hypergraph model of the circuit. In this model, circuit components are mapped as hypergraph vertices and electrical connection networks are mapped as hypergraph edges, thereby expressing the electrical coupling relationship of multiple components sharing a node.

[0025] The feature mapping module 30 receives real-time timing signals and circuit multi-coupling hypergraph models respectively. The feature mapping module 30 first performs frequency domain analysis on the real-time timing signals to extract frequency domain energy features, and uses these features to calculate the initial hyperedge attention weights of each hyperedge in the circuit hypergraph. At the same time, the feature mapping module 30 projects the continuous real-time timing signals onto the discrete semantic space through the built-in physical basis function encoder to generate a physical semantic cue vector. This vector is used to describe the physical morphological features of the signal to subsequent modules.

[0026] The inference engine module 40 loads a pre-trained large language model. The inference engine module 40 receives physical semantic cue vectors and performs feature aggregation on the circuit multi-coupling hypergraph model according to the initial hyperedge attention weights to generate topological context features. The inference engine module 40 combines the physical semantic cue vectors and topological context features to perform logical inference and outputs an initial fault diagnosis hypothesis containing the location of the faulty component, the fault mode, and the estimated value of the fault parameters.

[0027] The simulation verification module 50 includes a differentiable circuit solver based on ordinary differential equations. The simulation verification module 50 receives the fault parameters and circuit topology in the initial fault diagnosis assumptions, reconstructs the circuit state and applies excitation in the simulation environment, and generates the corresponding counterfactual waveform. The simulation verification module 50 further calculates the difference between the counterfactual waveform and the real-time timing signal acquired by the data acquisition module 10 to obtain the physical residual loss.

[0028] The optimization control module 60 is used to execute closed-loop feedback based on physical consistency. When the physical residual loss is higher than a preset threshold, the optimization control module 60 fixes the parameters of the large language model and the differentiable circuit solver, and calculates the gradient of the physical residual loss relative to the physical semantic cue vector and the hyperedge attention weights at the input. The optimization control module 60 uses this gradient to correct the value of the physical semantic cue vector along the reverse path and updates the hyperedge attention weights.

[0029] The optimization control module 60 is also used to remove hyperedges with weights below a threshold based on the updated hyperedge attention weights, generate a fault subgraph, and feed back the corrected state parameters to the inference engine module 40. The system iterates through the inference engine module 40, simulation verification module 50, and optimization control module 60 until the physical residual loss converges, and finally the inference engine module 40 outputs a determined fault diagnosis report.

[0030] In step S100, a multi-element coupled hypergraph model of the circuit is constructed, and the real-time timing signals of the circuit to be diagnosed are obtained. This step aims to transform the physical topology of the electronic circuit into a mathematical graph structure that can be processed by a computer, while acquiring physical signals reflecting the circuit's operating state. To more clearly illustrate this process, step S100 may specifically include the following sub-steps: Obtain the netlist file of the circuit to be diagnosed, map the components in the circuit as vertices, map the electrical connection network in the circuit as hyperedges, and construct a multi-element coupled hypergraph model of the circuit.

[0031] For electronic circuits, the connection relationship often has multi-coupling characteristics, that is, the electrical connection network may connect two or more component pins at the same time, such as power rails or ground networks. Traditional simple graph models can only express the connection between two points and are difficult to accurately describe such topologies. Therefore, this embodiment uses a hypergraph for modeling.

[0032] Specifically, the SPICE netlist or other equivalent circuit description file of the analytical circuit defines the multi-element coupling hypergraph model of the circuit as follows: ,in, Represents the set of vertices. The total number of pins or independent components in the circuit; Denotes the set of superedges. The total number of independent electrical connection networks in the circuit; in this model, each hyperedge... A subset of the associated vertices, and the size of the subset is unlimited.

[0033] To mathematically express this relationship, a hyperedge incidence matrix is ​​constructed. If the vertex Connect to electrical connection network Then matrix elements ,otherwise .

[0034] At the same time, in order to introduce the physical properties of the components, for each vertex Initialize feature vectors The feature vector contains the component type code, nominal value, tolerance level and rated power parameter. For discrete features such as type code, unique coding or embedding layer is used for processing, and for continuous features such as nominal value, normalization processing is performed.

[0035] Using multi-channel data acquisition equipment, voltage and current signals at key test points of the circuit under diagnosis are acquired simultaneously to form an original signal matrix.

[0036] By using an oscilloscope probe, current probe, or onboard analog-to-digital converter connected to a critical node on the circuit board, at a preset sampling frequency... Synchronous sampling is performed, and the collected data constitutes a real-time time-series signal, which is represented as the original signal matrix. ,in, This represents the total number of time steps within the sampling time window. This indicates the number of sensor channels. Each column in the matrix corresponds to the observation sequence of a sensor channel over a period of time, and each row corresponds to the sampled values ​​of all channels at the same time.

[0037] The original signal matrix is ​​subjected to time-frequency transformation to extract the frequency domain feature tensor, which is used for subsequent attention weight calculation.

[0038] Considering that electronic component failures are often accompanied by anomalies in specific frequency components, such as parasitic oscillations, harmonic distortions, or ripple noise, it is difficult to fully capture these characteristics using only time-domain signals. Therefore, the original signal matrix... Each channel of data undergoes a time-frequency transformation operation.

[0039] In this embodiment, short-time Fourier transform or wavelet transform is used as the specific implementation of time-frequency transformation. Taking short-time Fourier transform as an example, for the first... Signal sequence of each channel Calculate its spectral distribution to obtain the frequency domain feature tensor. ,in The number of frequency points, The transformed time frame number is used. For wavelet transform, multi-scale decomposition is used to obtain detail coefficients and approximation coefficients for different frequency bands. The specific algorithm flow for short-time Fourier transform and wavelet transform described above is a well-known technique in the field of digital signal processing and will not be elaborated here. This frequency domain feature tensor This data will then be used as input to drive the dynamic generation of hyperedge attention weights.

[0040] In step S200, based on the frequency domain energy characteristics of the real-time time-series signal, initial hyperedge attention weights of the circuit hypergraph are generated, and the real-time time-series signal is mapped into a physical semantic cue vector. The core of this step is to establish the mapping relationship between the signal feature space, the circuit topology space, and the natural language semantic space, thereby achieving cross-modal data alignment and parameter initialization. To explain this process in detail, step S200 may specifically include the following sub-steps: Global feature aggregation is performed on the frequency domain feature tensor, and the aggregated signal feature vector is concatenated with the static attribute embedding vector of each hyperedge in the circuit hypergraph. The initial hyperedge attention weights are calculated through a learnable neural network layer.

[0041] Traditional graph neural networks, when dealing with circuit faults, often assume that all electrical connections are equally important or depend only on the static structure. However, in actual physical circuits, fault signals of different frequencies tend to propagate along specific impedance paths. For example, high-frequency oscillation signals are mainly affected by the loops containing parasitic inductance and capacitance, while DC bias anomalies are mainly related to resistor divider networks. In order to enable the model to dynamically adjust its focus on the circuit topology according to the current signal state, this embodiment designs a signal-driven weight generation mechanism.

[0042] In practice, the frequency domain feature tensor extracted in the first step is... Performing global average pooling compresses information from both the time and frequency dimensions to obtain a global signal feature vector. ,in As a feature dimension, this vector represents the overall frequency domain energy distribution of the circuit at the current moment.

[0043] At the same time, for each hyperedge in the circuit hypergraph Assign static attribute embedding vectors The embedding vector is used to encode the inherent electrical properties of the hyperedge, such as whether the hyperedge is a power network, a ground network, a clock signal network, or a general data transmission network.

[0044] Subsequently, the global signal feature vector With a specific superedge Static attribute embedding vector A concatenation operation is performed to obtain a fused feature vector. This fused feature vector is then input into a computational unit consisting of a linear transformation layer and a nonlinear activation function, which outputs the initial hyperedge attention weights. .

[0045] This calculation process can be described by the following mathematical relationship: ; In the above relation, This represents a vector concatenation operation; The projection matrix of the signal features is used to adjust the feature dimensions to match the hyperedge embedding; For nonlinear activation functions, such as modified linear units; and These are the weight vector and bias scalar of the output layer, respectively; The sigmoid function maps output values ​​to the interval between 0 and 1, representing the probability distribution of attention intensity. Through this step, the system... Each hyperedge generates a corresponding weight set. .

[0046] By using a physical basis function projector to perform feature encoding and dimension projection on real-time time-series signals, a physical semantic cue vector adapted to the input dimension of a large language model is generated.

[0047] Large language models can typically only process discrete text symbol embeddings and cannot directly understand continuously changing analog voltage or current signals. To bridge this semantic gap, this embodiment uses a physical basis function projector to map the signal space to the semantic space of the language model. This projector consists of two parts: a feature encoder and a linear projection layer.

[0048] Specifically, the original real-time timing signal The input feature encoder, which can employ a one-dimensional convolutional neural network or residual network structure, is used to extract local morphological features in the signal, such as rising edge slope, overshoot amplitude, ringing attenuation rate, and other physical features. The output of the encoder is a set of feature sequences.

[0049] Next, the above feature sequences are mapped to the word embedding dimension of the large language model through a linear projection layer. In a consistent space, physical semantic cue vectors are formed. This vector is numerically represented by a set of continuous matrices. ,in The sequence length of the hint vector.

[0050] In the semantic space of a large language model, a well-trained projector can enable... The vector distribution closely resembles the natural language word vectors describing the signal's features; for example, when the input signal contains obvious periodic spikes, the generated vectors... The embedding vector in the vector space is close to the text description of periodic impulse interference. This approach allows subsequent large language models to read waveform signals like reading text, thereby introducing the signal characteristics of the physical world into the symbolic reasoning process.

[0051] In step S300, the physical semantic cue vector and the topological features aggregated based on the initial hyperedge attention weights are input into the pre-trained large language model to obtain the initial fault diagnosis hypothesis. This step aims to utilize the logical reasoning capability of the large language model, combined with the structured topological information of the circuit and the unstructured signal semantics, to generate a fault hypothesis with physical interpretability. Step S300 may specifically include the following steps: Based on the initial hyperedge attention weights, a hypergraph neural network is used to aggregate and update the features of the circuit multi-coupling hypergraph model, generating topological context features that contain the global connectivity relationships of the circuit.

[0052] To enable large language models to understand the connection logic of circuits, the graph-structured netlist needs to be transformed into vector-based context embeddings. Considering that components in the circuit are coupled in multiple ways through nodes, a hypergraph neural network is used for feature extraction. Unlike traditional graph convolution, this process utilizes the initial hyperedge attention weights generated in step S200. This guides the direction of information dissemination, ensuring that circuit paths strongly correlated with current signal characteristics dominate feature aggregation.

[0053] The feature aggregation process involves two stages of information transfer: from vertex to hyperedge, and from hyperedge back to vertex.

[0054] First, perform information aggregation from vertices to hyperedges. For each hyperedge in the hypergraph... It gathers all the vertices it connects to. Based on the characteristics, generate hyperedge feature vectors. This process can be expressed mathematically as follows: ; in, For the set of vertices, The elements of the hyperedge incidence matrix (if the vertex) Connect to hyperedge (The value is 1 if it is 1, otherwise it is 0). Indicates the first Vertices in a layered network eigenvectors.

[0055] Subsequently, information updates from the hyperedge to the vertex are performed. During this stage, initial hyperedge attention weights are explicitly introduced. For each vertex The features of all connected hyperedges are aggregated, and then subjected to linear transformation and nonlinear activation to obtain updated vertex features. : ; in, For a set of superedges, The learnable convolution transformation matrix. It is a non-linear activation function.

[0056] go through After the hypergraph convolution operation, node features containing high-order neighborhood information are obtained. Finally, a global readout operation is performed on the feature vectors of all vertices, such as using average pooling or max pooling, to generate vectors of fixed dimensions, i.e., topological context features. This vector highly condenses the circuit topology information under the current signal's focus.

[0057] The input sequence for constructing a large language model is concatenated with task instruction embeddings, physical semantic cue vectors, and mapped topological context features.

[0058] Since the input dimension of a large language model is fixed, the topological context features generated in the previous steps are processed through a linear projection layer. The word embedding dimension space mapped to a large language model is denoted as . .

[0059] Construct the complete input sequence The sequence consists of three parts: Task instruction embedding: a vector representation corresponding to natural language instructions, such as analyzing input signals and combining circuit structure to diagnose faulty components and parameters; Physical semantic cue vector : From step S200, it carries the waveform feature semantics of the signal; Topological context embedding It carries the structural connection information of the circuit.

[0060] The input sequence can be represented in vector space as follows: ; in This represents a sequence concatenation operation; This is the embedding vector of the instruction.

[0061] The constructed input sequence is fed into a pre-trained large language model with frozen parameters for forward inference, and the output text is parsed to extract initial fault diagnosis hypotheses.

[0062] Will The input is fed into a pre-trained large language model. During the reasoning process, the main parameters of the large language model remain frozen, utilizing only its pre-trained logical reasoning ability and common-sense physical knowledge. The model uses an attention mechanism to process the input sequence, establishing a connection between signal semantics and circuit topology. For example, the model will combine... voltage drop semantics and By analyzing the LDO feedback resistor connection information, potential causal relationships can be inferred.

[0063] The model outputs a piece of natural language text, from which a structured initial fault diagnosis hypothesis is extracted using a pre-defined regular expression parser or structured decoder. This hypothesis contains three key fields: Faulty component location: Indicate the specific component number that failed; Failure mode: Indicates the physical type of the failure; Fault parameter estimates : A quantitative numerical value representing the degree of failure.

[0064] The initial fault diagnosis assumption It will serve as the input basis for subsequent counterfactual verification steps, rather than as the final conclusion.

[0065] In step S400, the initial fault diagnosis hypothesis is input into the differentiable circuit solver to generate a counterfactual waveform, and the physical residual loss between the counterfactual waveform and the real-time timing signal is calculated. This step introduces a verification step based on physical mechanisms, using a circuit simulation model as a verifier of neural common sense to ensure that the inference results conform to Kirchhoff's laws and the physical characteristics of the components. In order to realize subsequent gradient backtracking, the simulator used here must have differentiability. Step S400 may specifically include the following steps: A differentiable circuit equation based on the modified node analysis method is constructed, and the fault parameters in the initial fault diagnosis assumptions are mapped to the coefficient matrix of the equation.

[0066] In order to simulate the physical process in the computational graph, the system equations of the circuit to be diagnosed are established using the modified nodal analysis method. These equations are usually expressed as a set of nonlinear ordinary differential equations.

[0067] The dynamic behavior equations of the circuit are defined as follows: ; In the above equation, It is a state vector, containing the voltage of the circuit nodes and the current of the inductor branch; Let be the derivative of the state vector with respect to time; This is the external excitation input vector of the circuit, such as the power supply voltage or signal source input.

[0068] This is an energy storage element matrix, including capacitor and inductor parameters; This is a conductance matrix, containing resistance and cross-conductance parameters; This is the current-voltage characteristic function of a nonlinear element; The input is the correlation matrix.

[0069] In this step, the initial fault diagnosis assumptions output in step S300 are... Fault parameter estimates Injected into the above matrix, for example, if we assume the capacitance of capacitor C1 is decreasing, then modify the matrix. The element value corresponding to C1; if it is assumed that the MOSFET has broken down, then the nonlinear function is modified. The relevant parameters in the model are used to transform the abstract fault semantics into specific mathematical model constraints.

[0070] The time-domain integration of the constructed circuit equations is performed using a differentiable ordinary differential equation solver to generate counterfactual waveforms under the assumed conditions.

[0071] The constructed circuit equations are input into a differentiable ordinary differential equation solver, which uses a numerical integration algorithm within a time window. Inner state vector Solve the problem.

[0072] Unlike traditional SPICE simulators, the solver used in this embodiment supports accompanying sensitivity analysis or backpropagation over time. This means that the output waveform generated by the simulation not only contains numerical information, but also retains the graph gradient information of the output with respect to the input parameters and circuit topology weights.

[0073] The solver outputs a sequence of circuit responses assuming the fault exists, i.e., counterfactual waveforms. It is called counterfactual because the waveform is generated based on the inference assumptions of a large language model, representing the waveform that the sensor should observe if the circuit did indeed experience the fault.

[0074] Physical residual loss The calculation formula is as follows: ; The first term in the formula is the L2 norm distance (mean square error), which is used to measure the absolute difference in amplitude between two waveforms; This is the amplitude loss weighting coefficient.

[0075] The second term in the formula is based on cosine similarity and is used to measure the consistency of the shape trend between two waveforms. This indicates the vector dot product operation; the smaller the value of this term, the more similar the waveform shapes. This is the shape loss weighting coefficient.

[0076] The scalar value is obtained through the above calculations. The smaller the value, the more the fault assumptions of the large language model match the actual physical operating state of the circuit. Conversely, if the value is large, it indicates that there is a deviation in the current inference path, and the subsequent closed-loop correction process needs to be initiated.

[0077] In steps S500 and S600, the system performs topological attention reconstruction and closed-loop iteration based on physical residual gradients. These two steps form the core innovative mechanism of this invention, namely, using physical laws as supervision signals to reverse-correct the input semantics and circuit topology concerns of the large language model, thereby achieving test-time training. To elaborate on this dynamic optimization process, step S500 may specifically include the following sub-steps: Determine whether the physical residual loss meets the preset convergence condition. If not, freeze the parameters of the large language model and the differentiable circuit solver, and calculate the gradient of the physical residual loss with respect to the physical semantic cue vector and the hyperedge attention weight.

[0078] The system first calculates the physical residual loss obtained in step S400. With the preset convergence threshold If a comparison is made, This indicates that the counterfactual waveform generated by the current fault hypothesis is highly consistent with the actual observed signal, and the diagnostic conclusion has a high degree of confidence. The process directly jumps to step S600. This indicates that there is a deviation in the reasoning result, and the gradient backtracking correction mechanism needs to be activated.

[0079] Maintaining the large language model during backpropagation Differentiable circuit solver With the internal weight parameters unchanged, the gradient of the physical residual loss with respect to the input variables is calculated using the chain rule of the computation graph. Specifically, the gradient is calculated with respect to the physical semantic cue vector. semantic gradient And the attention weights relative to the hyperedge topological gradient .

[0080] This gradient calculation process can be mathematically expressed as: ; ; The above formula clearly reveals how physical errors pass through the solver and language model, and are ultimately fed back to the input. The term is obtained by the adjoint state method of the differentiable circuit solver. and The terms are obtained through the backpropagation algorithm of the large language model.

[0081] The calculated gradients are used to update the physics semantic cue vector and hyperedge attention weights online to minimize the physics residual loss.

[0082] The gradient descent algorithm is used to iteratively update the input state. This is an online optimization strategy for a single test sample, and the update rules are as follows: ; ; in, and They represent the first The semantic vector and weight vector at the next iteration; and This is the preset learning rate hyperparameter.

[0083] This update process has a clear physical meaning: Semantic correction: gradient Forced physical semantic cue vector The shift occurs in the high-dimensional semantic space.

[0084] Attention Reconstruction: Gradient The attention distribution of the circuit topology has been adjusted. If the high weight of some hyperedges leads to an incorrect inference path, the gradient will automatically reduce its weight. Conversely, if the critical path of fault propagation is ignored, the gradient will increase its weight.

[0085] Based on the updated hyperedge attention weights, the circuit multi-coupling hypergraph model is pruned to generate a fault subgraph, and the corrected state is fed back to the inference step.

[0086] To further reduce the search space for inference and eliminate noise interference, the updated weights are utilized. Generate binary mask vector Set a significance threshold For any hyperedge If its weight ,but ,otherwise .

[0087] This mask is used to prune the circuit hypergraph, retaining only... Construct a fault-related subgraph from the hyperedges and their associated vertices. Recalculate the topological context features based on this subgraph .

[0088] Subsequently, the corrected physical semantic cue vector and new topological context features The large language model is re-input into step S300, initiating a new round of fault hypothesis generation. This closed-loop iterative process continues until the physical residual convergence condition is met or the preset maximum number of iterations is reached. .

[0089] When the physical residual loss meets the convergence condition, execute step S600 and output the final fault diagnosis report.

[0090] The final output report not only includes the fault conclusions, but also the verified physical confidence index. Since the conclusions are generated through repeated refinement of the closed-loop hypothesis simulation verification, they have a high degree of consistency and interpretability at the physical level, effectively solving the technical problem that large language models are prone to producing illusions in the field of industrial diagnosis.

Claims

1. A method for fault diagnosis of electronic components integrating a large-scale artificial intelligence model, characterized in that, Includes the following steps: Obtain the netlist file and real-time timing signals of the circuit to be diagnosed, and construct a multi-element coupling hypergraph model of the circuit based on the netlist file; Initial hyperedge attention weights and physical semantic cue vectors are generated based on the real-time temporal signals; The physical semantic cue vector and the topological context features aggregated based on the initial hyperedge attention weights are input into the pre-trained large language model to obtain the initial fault diagnosis hypothesis. Based on the initial fault diagnosis assumptions, a counterfactual waveform is generated using a differentiable circuit solver, and the physical residual loss between the counterfactual waveform and the real-time timing signal is calculated. The physical semantic cue vector and the initial hyperedge attention weights are updated by gradient backtracking based on the physical residual loss, and the final fault diagnosis report is obtained iteratively.

2. The method for fault diagnosis of electronic components integrating a large artificial intelligence model according to claim 1, characterized in that, The constructed circuit multi-coupling hypergraph model includes: Map the components in the circuit to be diagnosed as vertices; The electrical connection network in the circuit to be diagnosed is mapped as a hyperedge to establish a multi-element coupled hypergraph model of the circuit.

3. The method for fault diagnosis of electronic components integrating a large artificial intelligence model according to claim 1, characterized in that, The generation of initial hyperedge attention weights and physical semantic cue vectors based on the real-time time-series signal includes: Perform time-frequency transformation on the real-time time-series signal to extract the frequency domain feature tensor; Global feature aggregation is performed on the frequency domain feature tensor, and the aggregated signal feature vector is concatenated with the static attribute embedding vector of each hyperedge. The initial hyperedge attention weight is calculated through a neural network layer. The physical basis function projector is used to perform feature encoding and dimension projection on the real-time time series signal to generate the physical semantic cue vector.

4. The method for fault diagnosis of electronic components integrating a large artificial intelligence model according to claim 1, characterized in that, The process of obtaining initial fault diagnosis hypotheses includes: Based on the initial hyperedge attention weights, the circuit multi-coupling hypergraph model is aggregated using a hypergraph neural network to generate the topological context features. An input sequence is constructed by concatenating the task instruction embedding, the physical semantic cue vector, and the topological context features; The input sequence is fed into the pre-trained large language model for forward inference, and the output is parsed to extract the initial fault diagnosis hypothesis containing fault component location, fault mode, and fault parameter estimation.

5. The method for fault diagnosis of electronic components integrating a large artificial intelligence model according to claim 1, characterized in that, The extraction of the initial fault diagnosis hypothesis includes: Based on the hidden state vector of the token corresponding to the output layer of the pre-trained large language model, the continuous numerical values ​​of the fault parameter estimates are obtained through differentiable linear regression head mapping.

6. The method for fault diagnosis of electronic components integrating a large artificial intelligence model according to claim 1, characterized in that, The generation of counterfactual waveforms using a differentiable circuit solver includes: Construct a differentiable circuit equation based on the modified nodal analysis method, and map the fault parameters in the initial fault diagnosis assumption to the coefficient matrix of the equation; The time-domain integration of the differentiable circuit equations is performed using a differentiable ordinary differential equation solver to generate the counterfactual waveform.

7. The method for fault diagnosis of electronic components integrating a large artificial intelligence model according to claim 1, characterized in that, The physical residual loss takes into account both the amplitude error and waveform shape similarity between the counterfactual waveform and the real-time timing signal.

8. The method for fault diagnosis of electronic components integrating a large artificial intelligence model according to claim 1, characterized in that, The step of performing gradient backtracking update based on the physical residual loss includes: Determine whether the physical residual loss meets the preset convergence condition; If the conditions are not met, then freeze the parameters of the pre-trained large language model and the differentiable circuit solver; Calculate the gradient of the physical residual loss with respect to the physical semantic cue vector and the initial hyperedge attention weights; The calculated gradient is used to update the physical semantic cue vector and the initial hyperedge attention weights online.

9. The method for fault diagnosis of electronic components integrating a large artificial intelligence model according to claim 8, characterized in that, The method further includes: Based on the updated initial hyperedge attention weights, a pruning operation is performed on the circuit multi-coupling hypergraph model to generate a fault subgraph. The topological context features are recalculated based on the fault subgraph, and the corrected physical semantic cue vector and the recalculated topological context features are fed back to the pre-trained large language model to initiate a new round of fault hypothesis generation.

10. The method for fault diagnosis of electronic components integrating a large artificial intelligence model according to claim 1, characterized in that, The final fault diagnosis report includes verified fault component location, fault mode, and physical confidence index.

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