Data read-write method, electronic equipment, storage medium and chip

Abstract

The invention provides a data reading and writing method, electronic equipment, a storage medium and a chip. In the method, when the electronic equipment reads certain data in a Flash memory, if data reading is abnormal and a temperature interval during data reading is across a temperature zone compared with a temperature interval during data writing, when the data cannot be successfully recovered, the electronic equipment stops executing a processing flow of a data reading command, for example, the processing flow is hanged; other I / O commands for the Flash memory continue to be processed. In this way, the problem that the physical block of the Flash memory is mistakenly marked as RTBB due to high-strength temperature-crossing reading and writing can be avoided, then the problem that the data is permanently lost is avoided, and protection of abnormal data caused by high-strength temperature-crossing reading and writing is achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memory, and in particular to a data read-write method, an electronic device, a storage medium and a chip. BACKGROUND

[0002] Flash memory is a kind of non-volatile memory, which has the characteristics of high storage density, low power consumption and long service life. In the Flash memory, data storage is completed by charging the storage unit (cell). The threshold voltage (VT) of the storage unit corresponds to the stored data value. When reading data in the Flash memory, the data value is obtained by comparing the threshold voltage of the storage unit with the reference voltage (V ref ).

[0003] The span of the temperature when writing data in the Flash memory and the temperature when reading this piece of data can be very large. If the cross-temperature range exceeds the capacity that the medium can withstand, the threshold voltage of the storage unit can drift, causing data reading to be abnormal. Further, after multiple read retries and error correction, this piece of data can be marked as UECC (Uncorrectable Error Correction Code, uncorrectable error code), and even the physical block (Block) storing this piece of data is marked as RTBB (Runtime Bad Block, runtime bad block), thereby causing this piece of data to be permanently lost. SUMMARY

[0004] The present application provides a data read-write method, an electronic device, a storage medium and a chip. In the method, when the span of the temperature when reading data in the Flash memory and the data write temperature is large, if the data reading is abnormal and cannot be recovered, the data reading process is stopped to avoid the problem that the Flash memory physical block is mistakenly marked as RTBB due to high-intensity cross-temperature read-write.

[0005] In a first aspect, the embodiments of the present application provide a data read-write method. The method comprises: reading first data from a main storage area of a first physical page of a Flash memory, determining that data reading is abnormal and the first data cannot be recovered; reading first mark information from a backup storage area of the first physical page of the Flash memory; wherein the mark information is used to describe a temperature interval when the data is written into the physical page, the temperature interval comprises a first interval, a second interval and a third interval, the temperature included in the first interval is less than the temperature included in the second interval, and the temperature included in the second interval is less than the temperature included in the third interval; determining that a target temperature interval described by the first mark information is the first interval or the third interval, and determining that a temperature interval at a current time is different from and not adjacent to the temperature interval described by the first mark information; and stopping a processing flow of reading the first data in the first physical page.

[0006] The first physical page can be any physical page in the Flash memory for storing data, and each physical page has a main storage area and a backup storage area. The second physical page, the third physical page, etc. mentioned below are the same, and will not be described again.

[0007] The first interval, the second interval and the third interval can refer to the ultra-low temperature interval, the normal temperature interval and the ultra-high temperature interval mentioned below, respectively.

[0008] The temperature interval at the current time is different from and not adjacent to the temperature interval described by the first mark information, which can be understood as: the temperature interval at the current time is the first interval, and the temperature interval described by the first mark information is the third interval; or the temperature interval at the current time is the third interval, and the temperature interval described by the first mark information is the first interval.

[0009] The processing flow of reading the first data in the first physical page can be hung, and then other read-write commands for the Flash memory can be processed.

[0010] In this way, when the temperature span of reading data in the Flash memory and the data writing temperature is large, even if the data reading is abnormal and cannot be recovered, the data will not be marked as an uncorrectable error code, and the physical block storing the data will not be marked as a runtime bad block. In this way, the problem of the Flash memory physical block being mistakenly marked as a runtime bad block due to high-intensity cross-temperature read-write is avoided, and the problem of permanent loss of the data is avoided, thereby achieving protection of abnormal data caused by high-intensity cross-temperature read-write.

[0011] According to the first aspect, after stopping the process of reading the first data in the first physical page, the method further comprises: reading the first data from the main storage area of the first physical page of the Flash memory.

[0012] In this way, the present embodiment protects abnormal data caused by high-intensity cross-temperature read and write. When the temperature span between the temperature at which the data is read from the Flash memory and the temperature at which the data is written is not large, the data can still be normally read and used.

[0013] According to the first aspect, the method comprises: at a first time, reading first data from a main storage area of a first physical page of a Flash memory, determining that data reading is abnormal and that the first data cannot be recovered; reading first mark information from a backup storage area of the first physical page of the Flash memory; wherein the mark information is used to describe a temperature interval at which data is written to a physical page, the temperature interval comprising a first interval, a second interval and a third interval, the first interval comprising temperatures that are all less than the second interval, and the second interval comprising temperatures that are all less than the third interval; determining that a target temperature interval described by the first mark information is the first interval or the third interval, and determining that a temperature interval at a current time is different from and not adjacent to the temperature interval described by the first mark information; and stopping a process of reading the first data in the first physical page.

[0014] At a second time, the first data is read from the main storage area of the first physical page of the Flash memory, the second time being later than the first time. Wherein the temperature interval at the second time is the same as or adjacent to the target temperature interval described by the first mark information.

[0015] According to the first aspect, the method further comprises: reading second data from a main storage area of a second physical page of the Flash memory, determining that data reading is abnormal and that the second data cannot be recovered; reading second mark information from a backup storage area of the second physical page of the Flash memory; determining that the target temperature interval described by the first mark information is the first interval or the third interval; determining that the temperature interval at the current time is the same as or adjacent to the temperature interval described by the first mark information; marking data in the second physical page as an uncorrectable error code, or marking a physical block in which the second physical page is located as a runtime bad block.

[0016] In the embodiment, the temperature interval during data writing is not the normal temperature interval, and the temperature interval in which the current environment temperature is located and the temperature interval during data writing do not cross the temperature interval, which indicates that the data reading exception in the second physical page main storage area should be irrelevant to the high-intensity cross-temperature. In this case, if the firmware inherent strategy of the Flash memory is used for exception processing, and the data in the second physical page main storage area cannot be successfully recovered, the data in the first physical page can be marked as an uncorrectable error code or the physical block in which the first physical page is located can be marked as a runtime bad block according to the existing processing logic.

[0017] According to the first aspect or any one of the implementations of the first aspect, the method further includes: reading third data from a main storage area of a third physical page of the Flash memory, determining a data reading exception, and failing to recover the third data; reading third mark information from a backup storage area of the third physical page of the Flash memory; determining that a target temperature interval described by the third mark information is the second interval; and marking the data in the third physical page as an uncorrectable error code or marking a physical block in which the third physical page is located as a runtime bad block.

[0018] In the embodiment, if the temperature interval in which the environment temperature is located during data writing in the third physical page main storage area is a normal temperature interval, the temperature interval in which the data is read from the third physical page main storage area does not need to be considered. In this case, no matter whether the temperature interval in which the data is read is the ultra-low temperature interval, the ultra-high temperature interval, or the normal temperature interval, since the data is not written under the extreme temperature condition, the cross-temperature degree of the data reading and writing is not too large, and is mostly within the reading and writing cross-temperature range that can be borne by the Flash memory medium. Therefore, the data reading exception in the third physical page main storage area is probably irrelevant to the cross-temperature scenario, and the existing processing logic can be used for processing when the data cannot be successfully recovered.

[0019] According to the first aspect or any one of the implementations of the first aspect, the method further includes: polling the temperature sensor according to a preset period, the temperature sensor being configured to monitor the environment temperature information in which the Flash memory is located; and recording the temperature information currently collected by the sensor into a cache.

[0020] In this way, the environment temperature during data writing can be acquired in time when the data is written into the Flash memory, and the temperature intervals during data reading and writing can be compared when the data is read from the Flash memory.

[0021] According to the first aspect or any one of the implementations of the first aspect, the method further includes: acquiring fourth data;

[0022] write the fourth data into a main storage area of a fourth physical page of the Flash memory; determine a temperature interval in which the current temperature information is located, and write a target value used to describe the temperature interval as the mark information into a backup storage area of the fourth physical page.

[0023] In the embodiment, when writing data into the Flash memory, the current temperature information is written simultaneously, so as to determine whether there is a high-intensity cross-temperature phenomenon of data reading and writing when reading the data, and then a suitable processing strategy can be selected based on the determination result.

[0024] According to the first aspect, or any one of the implementation forms of the first aspect, the number of bit positions of the mark information is equal to the number of bit positions stored in each storage unit of the Flash memory.

[0025] In the embodiment, the number of bit positions of the mark information is equal to the number of bit positions stored in each storage unit of the Flash memory, that is, equal to the number of bit positions stored in each cell of the Flash memory.

[0026] For example, when the NAND Flash memory adopts the QLC technology, the number of bit positions of the mark information is 4. Similarly, when the NAND Flash memory adopts the PLC technology, the number of bit positions of the mark information is 5.

[0027] According to the first aspect, or any one of the implementation forms of the first aspect, determining the target temperature interval described by the target mark information comprises: reading a value of the target mark information; determining that the value is a target value, or determining that the value is a valid alternative value of the target value; and taking a temperature interval described by the target value as the target temperature interval.

[0028] The target mark information can be any one of the first mark information, the second mark information, and the third mark information mentioned above.

[0029] Taking QLC technology in Flash memory as an example, the target value describing the first interval can be "1111", the target value describing the third interval can be "1110", and the target value describing the second interval can be "1100". If the temperature zone marker information read from the Flash memory is not any of the target values ​​"1111", "1110", or "1100", then when the target marker information read from the Flash memory is a valid substitute for the target value, the temperature interval represented by the target value is used as the temperature interval for data writing. For example, the values ​​"0111", "0011", and "1011" are all valid substitutes for the value "1111", the values ​​"0110", "0010", and "1010" are all valid substitutes for the value "1110", and the values ​​"1001", "0001", "0101", "1101", "0100", "0000", and "1000" are all valid substitutes for the value "1100".

[0030] This significantly improves the reliability of writing temperature zone marking information into Flash memory. Taking QLC technology in Flash memory as an example, writing temperature zone marking information into one cell of Flash memory is equivalent to dividing the 16 states in each cell of QLC technology into 3 states (these 3 states correspond to three temperature ranges), which is between the two states per cell in SLC technology and the four states per cell in MLC technology. In other words, the reliability of writing temperature zone marking information into QLC media is between the reliability of writing data into SLC media and the reliability of writing data into MLC media, ensuring accurate reading of temperature zone marking information in cross-temperature read / write scenarios.

[0031] According to the first aspect, or any implementation of the first aspect above, the Flash memory is a NAND Flash memory, and the number of bits stored in each storage cell of the NAND Flash memory is greater than or equal to 4.

[0032] Considering that QLC products are far inferior to TLC products in terms of temperature resistance, and anticipating that PLC products will be even worse than QLC in terms of temperature resistance, when the number of bits stored in each storage cell of the NAND Flash memory is greater than or equal to 4, the solution provided in this embodiment can more effectively reduce the possibility of physical blocks being mistakenly marked as RTBBs due to high-intensity temperature resistance.

[0033] According to the first aspect, or any of the above implementations of the first aspect, the temperature span of the second region is 70°C.

[0034] Secondly, embodiments of this application provide an electronic device. The electronic device includes: one or more processors; a memory; a Flash memory; and one or more computer programs, wherein the one or more computer programs are stored in the memory, and when executed by the one or more processors, the electronic device performs a data read / write method as described in the first aspect or any one of the first aspects.

[0035] The second aspect and any implementation thereof correspond to the first aspect and any implementation thereof, respectively. The technical effects of the second aspect and any implementation thereof are similar to those of the first aspect and any implementation thereof, and will not be repeated here.

[0036] Thirdly, embodiments of this application provide a computer-readable storage medium. This computer-readable storage medium includes a computer program that, when run on an electronic device, causes the electronic device to perform the data read / write method of the first aspect and any one thereof.

[0037] The third aspect and any implementation thereof correspond to the first aspect and any implementation thereof, respectively. The technical effects of the third aspect and any implementation thereof are similar to those of the first aspect and any implementation thereof, and will not be repeated here.

[0038] Fourthly, embodiments of this application provide a computer program product, including a computer program that, when run, causes a computer to perform a data read / write method as described in the first aspect or any one of the first aspects.

[0039] The fourth aspect and any implementation thereof correspond to the first aspect and any implementation thereof, respectively. The technical effects of the fourth aspect and any implementation thereof are similar to those of the first aspect and any implementation thereof, and will not be repeated here.

[0040] Fifthly, this application provides a chip including a processor and a Flash memory, wherein the processor is used to call a stored computer program to execute a data read / write method as described in the first aspect or any one of the first aspects.

[0041] The fifth aspect and any implementation thereof correspond to the first aspect and any implementation thereof, respectively. The technical effects of the fifth aspect and any implementation thereof are similar to those of the first aspect and any implementation thereof, and will not be repeated here. Attached Figure Description

[0042] Figure 1 This is a schematic diagram of the hardware structure of an electronic device as an example.

[0043] Figure 2 This is a schematic diagram illustrating the comparison of threshold voltage distribution curves for various storage technologies;

[0044] Figure 3 This is a schematic diagram illustrating the threshold distribution curve offset of SLC technology as an example.

[0045] Figure 4 This is a schematic diagram illustrating the threshold distribution curve offset of QLC technology as an example.

[0046] Figure 5 This is a schematic diagram illustrating the division of temperature ranges as an example.

[0047] Figure 6 This is an exemplary schematic diagram illustrating the process of a host writing data to a UFS device;

[0048] Figure 7 This is an example illustration of writing temperature range markers;

[0049] Figure 8 This is a schematic diagram illustrating the process of writing data into a NAND Flash memory;

[0050] Figure 9 This is an exemplary schematic diagram illustrating the process of a host reading data from a UFS device.

[0051] Figure 10 This is a schematic diagram illustrating the process of reading data from a NAND Flash memory;

[0052] Figure 11 This is an illustrative diagram illustrating a scenario of reading and writing data in a NAND Flash memory.

[0053] Figure 12a This is an example illustration of a scenario where an electronic device reads and writes data in a NAND Flash memory during garbage collection (GC).

[0054] Figure 12b This is an example illustration of a scenario where an electronic device reads and writes data in a NAND Flash memory during garbage collection (GC).

[0055] Figure 13 This diagram illustrates, for example, a scenario where an electronic device reads and writes data in a NAND Flash memory during garbage collection (GC). Detailed Implementation

[0056] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0057] In this article, the term "and / or" is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent three situations: A exists alone, A and B exist simultaneously, and B exists alone.

[0058] The terms "first" and "second," etc., used in the specification and claims of this application are used to distinguish different objects, not to describe a specific order of objects. For example, "first target object" and "second target object," etc., are used to distinguish different target objects, not to describe a specific order of target objects.

[0059] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0060] In the description of the embodiments in this application, unless otherwise stated, "multiple" means two or more. For example, multiple processing units means two or more processing units; multiple systems means two or more systems.

[0061] This application provides a data read / write method that can be applied to a memory, which can be used in an electronic device such as a tablet computer, mobile phone, wearable device, laptop computer, ultra-mobile personal computer (UMPC), netbook, personal digital assistant (PDA), etc. This application does not limit the specific type of electronic device.

[0062] Figure 1 A schematic diagram of an electronic device is shown. It should be understood that... Figure 1The electronic device shown is merely an example of an electronic device, and electronic devices may have more or fewer components than those shown in the figure, may combine two or more components, or may have different component configurations. Figure 1 The various components shown can be implemented in hardware, software, or a combination of hardware and software, including one or more signal processing and / or application-specific integrated circuits.

[0063] The electronic device may include: a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc.

[0064] Processor 110 may include one or more processing units, such as: application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, memory, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0065] The controller can serve as the nerve center and command center of an electronic device. Based on the instruction opcode and timing signals, the controller generates operation control signals to control the fetching and execution of instructions.

[0066] The processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store instructions or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the instruction or data again, it can retrieve it directly from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0067] It is understood that the interface connection relationships between the modules illustrated in the embodiments of this application are merely illustrative and do not constitute a limitation on the structure of the electronic device. In other embodiments of this application, the electronic device may also employ different interface connection methods or combinations of multiple interface connection methods as described in the above embodiments.

[0068] Internal memory 121 can be used to store computer executable program code, which includes instructions. Processor 110 executes various functional applications and data processing of the electronic device by running the instructions stored in internal memory 121. Internal memory 121 may include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback, image playback, etc.), etc. The data storage area may store data created during the use of the electronic device (such as audio data, phonebook, etc.). Furthermore, internal memory 121 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc.

[0069] In the embodiments of this application, data and the like can be stored in physical pages of internal memory, such as physical pages of NAND Flash memory.

[0070] Electronic devices can implement audio functions such as music playback and recording through audio modules 170, speakers 170A, receivers 170B, microphones 170C, headphone jacks 170D, and application processors.

[0071] The audio module 170 is used to convert digital audio information into analog audio signals for output, and also to convert analog audio input into digital audio signals. The audio module 170 can also be used for encoding and decoding audio signals. In some embodiments, the audio module 170 may be located in the processor 110, or some functional modules of the audio module 170 may be located in the processor 110.

[0072] The sensor module 180 may include pressure sensors, gyroscope sensors, barometric pressure sensors, magnetic sensors, accelerometers, distance sensors, proximity sensors, fingerprint sensors, temperature sensors, touch sensors, ambient light sensors, bone conduction sensors, etc., which will not be listed here, and this application does not limit them.

[0073] The electronic device implements display functions through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU performs mathematical and geometric calculations and is used for graphics rendering. The processor 110 may include one or more GPUs, which execute program instructions to generate or modify display information. The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. In some embodiments, the electronic device 100 may include one or N displays screens 194, where N is a positive integer greater than 1.

[0074] This application does not specifically limit the structure of the execution subject of a data read / write method. Any method can be executed by running code containing the data read / write method of this application. For example, the execution subject of the data read / write method provided in this application can be an electronic device, a functional module of the electronic device capable of calling and executing a program, or a chip, such as a control module of a Flash memory or a main control module (e.g., a FlashController module) in a UFS device.

[0075] Flash memory can store programs and data. A cell is the basic storage unit of Flash memory, a semiconductor storage unit composed of floating-gate transistors. Related functional modules can be programmed to write data into a cell and can also read data from a cell.

[0076] The cell can be viewed as a regular Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), often simply called a MOS transistor. A MOS transistor only requires a small voltage applied to its gate to turn it on. If a certain number of electrons are injected into the floating gate of the MOS transistor, creating an electric field between the substrate and the floating gate, a larger voltage needs to be applied to the gate to overcome this electric field in order to turn the MOS transistor on.

[0077] Based on the above principle, as an example of programming data into a cell, applying a programming voltage (e.g., 10V) to the cell's floating gate is equivalent to injecting a certain number of electrons into the cell's floating gate, and the data "0" is written into the cell. Conversely, if no programming voltage is applied to the cell's floating gate (e.g., keeping it at 1V), it is equivalent to not injecting electrons into the cell's floating gate, and the data in the cell is "1".

[0078] Based on the above principle, as an example of reading data from this cell, when a 5V voltage is applied to the gate, an unprogrammed cell is turned on, and current flows through it; a programmed cell remains in the off state, and no current flows through it. Therefore, whether the data in the cell is "1" or "0" can be determined by whether current flows through it. Alternatively, the data in the cell can be determined by the threshold voltage at which the cell is turned on. Since a certain number of electrons are injected into the floating gate of the cell by applying a programming voltage, the reference voltage is determined to be 8V. When reading the data stored in the cell, if the threshold voltage at which the cell is turned on is 10.5V, which is greater than the reference voltage of 8V, then the data in the cell is determined to be 0. Therefore, whether the data in the cell is "1" or "0" can be determined by comparing the threshold voltage at which the cell is turned on with the reference voltage.

[0079] In this way, 1 bit of data can be written into a single cell; this storage technology is called single-level cell (SLC). To store more bits of data in a single cell, multi-level cell (MLC) technology emerged, where each cell can store 2 bits of data; then triple-level cell (TLC) technology was developed, where each cell can store 3 bits of data; then quadruple-level cell (QLC) technology was developed, where each cell can store 4 bits of data; and even penta-level cell (PLC) technology was developed, where each cell can store 5 bits of data.

[0080] When a cell needs to store more bits of data, it may contain more than just the two states "1" and "0". For example, it may contain "11", "01", "00" and "10". Of course, depending on the amount of bits of data stored, there may be even more states.

[0081] To distinguish different cell states, different programming voltages are applied to the cell's floating gate, which is equivalent to injecting different numbers of electrons into the floating gate. Different programming voltages correspond to different states. For example, 3V corresponds to state "11", 6V corresponds to state "01", 9V corresponds to state "00", and 12V corresponds to state "10". Reference voltages for distinguishing different states can be set as follows: 4.5V, 7.5V, and 10.5V.

[0082] If the cell's threshold voltage is 2.9V when reading data, and 2.9V is less than 4.5V, then the read data is "11". Similarly, if the cell's threshold voltage is 6.2V when reading data, and 6.2V is between 4.5V and 7.5V, then the read data is "01". Similarly, if the cell's threshold voltage is 8.9V when reading data, and 8.9V is between 7.5V and 10.5V, then the read data is "00". Similarly, if the cell's threshold voltage is 12.3V when reading data, and 12.3V is greater than 10.5V, then the read data is "10".

[0083] In practical applications, for multiple cells in the same state, the threshold voltages that turn on these cells follow a normal distribution, meaning that the threshold voltages are most concentrated at the center of the normal distribution, such as 3V, 6V, 9V, and 12V in the example above.

[0084] If the reference voltage is set to the voltage corresponding to the center position of the normal distribution, then the data of the cells with the threshold voltage to the left of the center position of the normal distribution will be read normally; the data of the cells with the threshold voltage to the right of the center position of the normal distribution may be read incorrectly. Therefore, the reference voltage can be set to a value greater than the threshold voltage of most cells, so that the data of most cells can be read normally.

[0085] For a clearer understanding of the above description, please refer to... Figure 2 The diagram shows the threshold voltage distribution curve.

[0086] Reference Figure 2 This is a schematic diagram comparing the threshold voltage distribution curves of multiple storage technologies provided in the embodiments of this application.

[0087] In single-level cell storage technology, a cell stores 1 bit of data and includes two states with a wide interval between the threshold voltage distributions of the states. As more bits of data are stored in a cell, the cell includes more states, and the interval between the threshold voltage distributions of the states becomes narrower.

[0088] In order to ensure that the reference voltage can cover the threshold voltage of most cells in this state, the reference voltage is usually set to the voltage corresponding to the trough position between the normal distribution of the current state and the normal distribution of the next state.

[0089] It's understandable that the fewer bits a cell stores, the wider the distribution of threshold voltages between different states, and the greater the distance between adjacent states, making it less prone to errors when determining the read data based on the read voltage. Conversely, the more bits a cell stores, the narrower the distribution of threshold voltages between different states, and the closer the distance between adjacent states, potentially even causing overlap, making it more prone to errors when determining the read data based on the reference voltage. This leads to a decrease in reliability as the number of bits stored in each cell increases.

[0090] Furthermore, at low temperatures, electron energies are lower, resulting in a lower probability of quantum tunneling. Consequently, fewer electrons are trapped in the floating gate, leading to a smaller electric field from the substrate to the floating gate. When data needs to be read out, the positive threshold voltage required at the gate decreases, manifesting as a leftward shift in the VT curve at low temperatures.

[0091] Similarly, at high temperatures, electrons have higher energy and a higher probability of quantum tunneling. Therefore, more electrons are trapped in the floating gate, resulting in a stronger electric field from the substrate to the floating gate. When data needs to be read out, the positive threshold voltage that needs to be applied to the gate increases, which manifests as a rightward shift in the VT curve at high temperatures.

[0092] Reference Figure 3 and Figure 4 This is a comparison chart of VT curves under ultra-low temperature and ultra-high temperature environments provided in the embodiments of this application.

[0093] Reference Figure 3 The figures show the VT curves for SLC memory technology when writing data in an ultra-low temperature environment and when reading data in an ultra-high temperature environment. Understandably, the VT curve shifts to the right when the memory transitions from an ultra-low temperature environment to an ultra-high temperature environment. Because the normal distribution of threshold voltages in different states is relatively large under SLC technology, even with the VT curve shift, data can still be correctly read using the reference voltage.

[0094] Reference Figure 4 The figures show the VT curves for QLC memory technology when writing data in an ultra-low temperature environment and when reading data in an ultra-high temperature environment. Understandably, as the memory transitions from an ultra-low temperature environment to an ultra-high temperature environment, the VT curve shifts to the right. Because the threshold voltages of different states in QLC technology are relatively close in their normal distribution, this VT curve shift can lead to data read errors in some cells when reading data based on the reference voltage.

[0095] As storage technology has evolved from SLC to QLC, and even to PLC, storage capacity has increased and costs have decreased, but it also suffers from drawbacks such as fewer rewrite cycles and lower reliability. In terms of temperature tolerance, QLC products are far inferior to TLC products. Temperature tolerance, as the name suggests, refers to the ability to read and write data normally at different temperatures; for example, the ability to write data at a certain temperature and then read that data normally in an environment with a significant temperature difference. Experiments have shown that the temperature tolerance of QLC products is about 40°C lower than that of TLC products, suggesting that PLC products will likely have even worse temperature tolerance than QLC.

[0096] The quality of temperature tolerance directly impacts data security. If the temperature range for data read / write exceeds the medium's tolerance, the cell's threshold voltage will shift, leading to data read errors. For example, writing data to a cell at a low temperature but reading it at a higher temperature will cause some cells to read incorrect data due to the shifted threshold voltage. After multiple retries, if ECC (Error Checking and Correcting) technology fails to correct the error, the data will be marked as UECC, or even the physical block storing the data may be marked as RTBB, resulting in permanent data loss.

[0097] Compared to SLC, MLC, and TLC, QLC has an advantage in terms of storage capacity growth. With the increasing amount of user data stored in current electronic devices, QLC, and even PLC, will inevitably become the next-generation cell storage technology. As the amount of data stored in each cell increases, the requirements for data reading accuracy within the cell also increase, as do the requirements for the cell's VT offset. This makes the product's read / write cross-temperature capability worse, meaning that read anomalies are more likely to occur when reading data across temperature ranges within the cell. Consequently, the likelihood of data being marked as UECC and physical blocks being marked as RTBB increases. Once a physical block is marked as RTBB, the data stored on that physical block will be permanently lost.

[0098] Therefore, improving data reliability is an urgent problem to be solved in Flash memory read / write scenarios, especially in high-intensity Flash memory read / write scenarios.

[0099] For example, the type of Flash memory that supports SLC, MLC, TLC, QLC, PLC, or even more layers of cell storage technology can be NAND Flash memory. It should be noted that with the development of storage technology, other types of Flash memory may also support SLC, MLC, TLC, QLC, PLC, or even more layers of cell storage technology. This application does not limit the type of Flash memory.

[0100] To address the aforementioned issues, this application embodiment divides the temperature into intervals. When writing data to the Flash memory, the Flash controller also writes a temperature interval (hereinafter referred to as the temperature interval) marker corresponding to the data. Furthermore, when the Flash controller reads data from the Flash memory based on a certain I / O (Input / Output) command, if the data reading is abnormal and the temperature difference between the data reading and the data writing is large, for example, the temperature difference exceeds a preset threshold (such as 70°C), then when the data cannot be recovered, the Flash controller stops executing the processing flow of this data reading command, for example, by hanging the processing flow of this data reading command. At this time, the Flash controller can continue to process other I / O commands.

[0101] In this way, when the temperature difference between reading data from the Flash memory and the data writing temperature is large, even if the data read is abnormal and cannot be recovered, this data will not be marked as UECC, and the physical block storing this data will not be marked as RTBB. This avoids the problem of the Flash memory physical block being mistakenly marked as RTBB due to high-intensity cross-temperature read / write operations, thereby preventing the permanent loss of this data and protecting against abnormal data caused by high-intensity cross-temperature read / write operations. When the temperature difference between reading this data from the Flash memory and the data writing temperature is not large, this data can still be read and used normally.

[0102] In this embodiment, the temperature can be divided into three zones: an ultra-low temperature zone, a normal temperature zone, and an ultra-high temperature zone. It is understood that when dividing the temperature, the normal temperature zone can be determined based on the operating environment of the Flash memory, and the temperature zone lower than the normal temperature zone can be designated as the ultra-low temperature zone, while the temperature zone higher than the normal temperature zone can be designated as the ultra-high temperature zone.

[0103] For example, refer to Figure 5The temperature can be divided into three zones using temperature thresholds t1 and t2. In the ultra-low temperature zone, the temperature t is less than or equal to temperature threshold t1; in the normal temperature zone, the temperature t is greater than temperature threshold t1 but less than temperature threshold t2; and in the ultra-high temperature zone, the temperature t is greater than or equal to temperature threshold t2. That is, the temperature span of the normal temperature zone is t2-t1. In this embodiment, when the data read / write temperature span exceeds t2-t1, it can be considered a high-intensity cross-temperature read / write scenario in the Flash memory. For example, the temperature span of the normal temperature zone is 70℃, and for instance, temperature threshold t1 can be -20℃ and temperature threshold t2 can be 50℃. In practical applications, temperature thresholds t1 and t2 can also be other temperature values, and this embodiment does not limit this.

[0104] In this embodiment, the temperature difference between the normal temperature zone and the ultra-low temperature zone is not too large (e.g., the temperature range does not exceed a preset threshold (e.g., 70°C)), the VT curve shift is not too severe, and the reliability of writing and reading data between them remains high. Similarly, the temperature difference between the normal temperature zone and the ultra-high temperature zone is not too large, the VT curve shift is not severe, and the reliability of reading and writing data between them remains high.

[0105] In this embodiment, the Flash memory may have a built-in temperature sensor that can collect the ambient temperature of the Flash memory at a certain sampling frequency.

[0106] The following uses NAND Flash memory as an example to explain the data read and write method provided in the embodiments of this application.

[0107] Reference Figure 6 This is a schematic diagram illustrating the process of a host writing data to a UFS device. The specific process may include:

[0108] 1.1 The Host sends a HostWrite command to the UFS device.

[0109] The Host side can be understood as the SOC (System on Chip) side. The Host side can send HostWrite commands to the Host Controller of the UFS device through its interface with the UFS device.

[0110] 2.1 The Host Controller of the UFS device requests a Buffer from the System.

[0111] 2.2 The Host Controller of the UFS device obtains the data to be written from the Host side and writes the data to the Buffer.

[0112] 2.3 The Host Controller of the UFS device returns Response information to the Host side in response to the HostWrite command.

[0113] 3.1 The front-end of the UFS device obtains the frontwrite command from the host controller.

[0114] 3.2 The front-end of the UFS device writes the frontWrite command to the cache.

[0115] 3.3 After the front-end of the UFS device is full, it flushes the entire cache to the back-end via the system.

[0116] 4.1 The back-end of the UFS device requests block resources from the Block Table (physical block table).

[0117] 4.2 The UFS device's Back-End generates a BackWrite command based on the requested Block resources and sends the BackWrite command to the Flash Controller.

[0118] The Flash Controller of the 5.0 UFS device accesses the temperature sensor at preset intervals (e.g., every 5 minutes) and records the current temperature information.

[0119] In this embodiment, the Flash Controller polls the temperature sensor at preset intervals to obtain the current temperature information and records it in the cache. When the Flash Controller programs the NAND Flash storage medium, it can read the current temperature information from the cache and write it into the NAND Flash storage medium along with the data to be written to the NAND Flash storage medium.

[0120] 5.1 The Flash Controller of the UFS device retrieves data from the Buffer according to the BackWrite command.

[0121] 5.2 The Flash Controller of the UFS device sends a NAND Write command to the NAND Flash memory. The NAND Flash memory executes the NAND Write command and writes data and the temperature range marking information of the current temperature into the NAND Flash memory.

[0122] The process by which the Flash Controller writes data and the temperature range marking information to the NAND Flash memory is the process of the Flash Controller programming the NAND Flash memory.

[0123] In this embodiment, the Flash Controller can write data to the main storage area of ​​a physical page in the NAND Flash memory, and write the temperature range marking information of the temperature at which the data is written to the spare storage area of ​​the physical page.

[0124] Reference Figure 7 When writing data to NAND Flash memory, it is not done on a per-cell basis, but on a per-page basis. A physical block of NAND Flash memory consists of multiple physical pages, and a physical page consists of multiple cells. Each physical page includes a main memory area and a spare memory area.

[0125] In this embodiment, the Flash Controller can control the writing of data to the main storage area of ​​each physical page, and use a cell in the spare storage area to record the temperature zone marker information when data is written to that physical page. The number of bits in the temperature zone marker information can be the same as the number of layers in the cell storage technology used in the NAND Flash memory, that is, equal to the number of bits stored in each storage cell (cell) of the NAND Flash memory. For example, taking the NAND Flash memory using QLC technology as an example, the number of bits in the temperature zone marker information is 4 bits. Similarly, taking the NAND Flash memory using PLC technology as an example, the number of bits in the temperature zone marker information is 5 bits.

[0126] Taking NAND Flash memory using QLC technology as an example, the marking information for the ultra-low temperature zone can be "1111", the marking information for the ultra-high temperature zone can be "1110", and the marking information for the normal temperature zone can be "1100" or "1101".

[0127] Considering that the VT curve of a cell may shift during data read / write operations across temperature ranges, the values ​​used for temperature zone marking information may be misread as other values. For example, the preset values ​​describing the temperature zone marking information are a first value, a second value, and a third value. The first value indicates that the temperature range during data writing is the ultra-low temperature range, the second value indicates that the temperature range during data writing is the ultra-high temperature range, and the third value indicates that the temperature range during data writing is the normal temperature range. Specifically, the first value can be a value corresponding to a cell VT below the minimum reference voltage, such as "1111" in QLC technology or "111" in TLC technology; the second value can be a value corresponding to a cell VT above the maximum reference voltage, such as "1110" in QLC technology or "110" in TLC technology; and the third value can be a value corresponding to a cell VT close to the intermediate reference voltage, such as "1100" or "1101" in QLC technology or "101" or "100" in TLC technology. The center reference voltage refers to the reference voltage located in the middle position after sorting all reference voltages in a certain cell storage technology from smallest to largest. It is the (n+1)th reference voltage out of 2n+1 reference voltages, such as the 16th reference voltage in PLC technology, the 8th reference voltage in QLC technology, and the 4th reference voltage in TLC technology. The cell VTs adjacent to the center reference voltage can be understood as those distributed to its left and right.

[0128] If the temperature zone marker information read from the NAND Flash memory is any one of the first, second, and third values, the Flash Controller will use the temperature range represented by the read value as the temperature range for data writing. If the temperature zone marker information read from the NAND Flash memory is not any one of the first, second, and third values, the Flash Controller will compare the cell VT corresponding to the read value with the cell VT corresponding to the first, second, and third values, respectively. If the cell VT corresponding to the value read by the Flash Controller is closest to the cell VT corresponding to the target value (one of the first, second, and third values), the Flash Controller will use the temperature range represented by the target value as the temperature range for data writing.

[0129] Optionally, if the value of the temperature zone marker information read in the NAND Flash memory is not any of the first, second, and third values, then when the value of the temperature zone marker information read in the NAND Flash memory is a valid substitute value for the target value, the Flash Controller will use the temperature range represented by the target value as the temperature range for data writing.

[0130] For example, in this embodiment, after the cell's VT curve is shifted, several values ​​that might be read from the ultra-low temperature zone marker information "1111" are also considered as ultra-low temperature zone marker information. For instance, the cell VT corresponding to the value "1111" is adjacent to the cell VT corresponding to the values ​​"0111", "0011", and "1011", respectively. After the cell's VT curve is shifted, the value "1111" might be misread as the values ​​"0111", "0011", and "1011". The values ​​"0111", "0011", and "1011" are all valid substitute values ​​for the value "1111". Therefore, if the temperature zone marker information "1111" is read in the NAND Flash memory, the Flash Controller determines that the temperature range during data writing is the ultra-low temperature zone; if the temperature zone marker information "0111", "0011", and "1011" are read in the NAND Flash memory, the Flash Controller also determines that the temperature range during data writing is the ultra-low temperature zone.

[0131] Similarly, in this embodiment, after the cell's VT curve is shifted, several values ​​that might be read from the ultra-high temperature zone marker "1110" are also considered as ultra-high temperature zone marker information. For example, the cell VT corresponding to the value "1110" is adjacent to the cell VTs corresponding to the values ​​"0110", "0010", and "1010" respectively. After the cell's VT curve is shifted, the value "1110" might be misread as the values ​​"0110", "0010", and "1010". The values ​​"0110", "0010", and "1010" are all valid substitute values ​​for the value "1110". Therefore, if the temperature zone marker information "1110" is read in the NAND Flash memory, the Flash Controller determines that the temperature range during data writing is the ultra-high temperature zone; if the temperature zone marker information "0110", "0010", and "1010" are read in the NAND Flash memory, the Flash Controller also determines that the temperature range during data writing is the ultra-high temperature zone.

[0132] Similarly, taking the label information "1100" for the normal temperature zone as an example, in this embodiment, after the cell's VT curve is shifted, several values ​​that might be read from the label information "1100" for the normal temperature zone are also identified as label information for the ultra-high temperature zone. For example, the cell VT corresponding to the value "1100" is adjacent to the cell VT corresponding to the values ​​"1001", "0001", "0101", "1101", "0100", "0000", and "1000" respectively. After the cell's VT curve is shifted, the value "1100" might be misread as the values ​​"1001", "0001", "0101", "1101", "0100", "0000", and "1000". The values ​​"1001", "0001", "0101", "1101", "0100", "0000", and "1000" are all valid substitute values ​​for the value "1100". Therefore, if the temperature zone marker information read in the NAND Flash memory is "1100", the Flash Controller determines that the temperature range during data writing is the normal temperature range; if the temperature zone marker information read in the NAND Flash memory is "1001", "0001", "0101", "1101", "0100", "0000", or "1000", the Flash Controller also determines that the temperature range during data writing is the normal temperature range.

[0133] This significantly improves the reliability of writing temperature zone marking information into NAND Flash memory. Taking QLC technology in NAND Flash memory as an example, writing temperature zone marking information into one cell of NAND Flash memory is equivalent to dividing the 16 states of each cell in QLC technology into 3 states (these 3 states correspond to three temperature ranges), which is between the two states per cell in SLC technology and the four states per cell in MLC technology. In other words, the reliability of writing temperature zone marking information into QLC medium is between the reliability of writing data into SLC medium and the reliability of writing data into MLC medium, ensuring accurate reading of temperature zone marking information in cross-temperature read / write scenarios.

[0134] It is understood that the numerical values ​​of the temperature zone marking information recorded above are for illustrative purposes only. In practical applications, different values ​​may be used to record the temperature zone marking information, depending on the circumstances.

[0135] 5.3 The NAND Flash memory of the UFS device returns NAND Write Response information to the Flash Controller.

[0136] 5.4 The Flash Controller of the UFS device returns BackResponse information to the Back-End in response to the BackWrite command.

[0137] 6.1 The back-end of the UFS device updates the address mapping table based on the actual write address.

[0138] Figure 6 For any parts of the process that are not explained in detail, please refer to existing technologies; they will not be elaborated upon here.

[0139] The following explanation uses writing data to the first physical page of a NAND Flash memory as an example to illustrate the data writing method. Figure 8 As shown, the data writing method specifically includes the following steps:

[0140] S201, the Flash Controller accesses the temperature sensor at preset time intervals and records the current ambient temperature.

[0141] In this embodiment, a temperature sensor in the NAND Flash memory monitors the ambient temperature of the NAND Flash memory at a preset sampling rate. For example, the Flash Controller can access the temperature sensor every five minutes to obtain the latest ambient temperature detected by the sensor and write it into the cache as the current ambient temperature. In this way, when the Flash Controller writes data to the physical pages of the NAND Flash memory, it can read the current ambient temperature from the cache to determine the temperature range for data writing.

[0142] In this embodiment, the temperature sensor can be located either inside or near the NAND Flash memory to monitor the ambient temperature around the Flash storage medium. Because the temperature of the Flash storage medium may rise during frequent read / write operations, its temperature is generally higher than the ambient temperature. Therefore, placing the temperature sensor inside the NAND Flash memory provides a more accurate representation of the Flash storage medium's actual temperature compared to placing it near the NAND Flash memory.

[0143] S202, the Flash Controller writes data to the main memory area of ​​the first physical page of the NAND Flash memory.

[0144] S203, The Flash Controller determines the current ambient temperature range. If the current ambient temperature is in the normal temperature range, proceed to S204; if the current ambient temperature is in the extremely high temperature range, proceed to S205; if the current ambient temperature is in the extremely low temperature range, proceed to S206.

[0145] The Flash Controller reads the current ambient temperature from the cache and determines which temperature range the current ambient temperature belongs to based on the temperature range division, that is, the temperature range when data is written in the first physical page.

[0146] For example, if the current ambient temperature is less than or equal to -20°C, the Flash Controller determines that the current ambient temperature belongs to the ultra-low temperature zone; if the current ambient temperature is greater than -20°C and less than 50°C, the Flash Controller determines that the current ambient temperature belongs to the normal temperature zone; if the current ambient temperature is greater than or equal to 50°C, the Flash Controller determines that the current ambient temperature belongs to the ultra-high temperature zone.

[0147] S204, the Flash Controller writes a mark indicating the normal temperature zone to the spare storage area of ​​the first physical page of the Flash memory.

[0148] For example, taking the Flash memory using QLC technology as an example, if the current ambient temperature is in the normal temperature range, then the normal temperature range marker "1100" is written into a cell of the spare storage area of ​​the first physical page.

[0149] S205, the Flash Controller writes a mark for the ultra-high temperature zone in the spare storage area of ​​the first physical page of the Flash memory.

[0150] For example, taking the Flash memory using QLC technology as an example, if the current ambient temperature is in the ultra-high temperature range, then the normal temperature range marker "1110" is written into a cell of the spare storage area of ​​the first physical page.

[0151] S206, the Flash Controller writes a marker for the ultra-low temperature zone to the spare storage area of ​​the first physical page of the Flash memory.

[0152] For example, taking the Flash memory using QLC technology as an example, if the current ambient temperature is in the ultra-low temperature range, then the mark "1111" of the normal temperature range is written into a cell of the spare storage area of ​​the first physical page.

[0153] In the above process, before writing data to the main storage area of ​​the first physical page of the NAND Flash memory, the Flash Controller can also determine the current ambient temperature range. This embodiment does not limit the timing sequence of S202 and S203.

[0154] For any parts of this process that are not explained in detail, please refer to the previous text; they will not be repeated here.

[0155] The above explanation uses writing data to the first physical page of the Flash memory as an example. It is understandable that the same applies when the Flash Controller writes data to the second physical page or other physical pages of the Flash memory; data is written to the main storage area of ​​the second physical page, and temperature zone marking information is written to the spare storage area of ​​the second physical page.

[0156] Reference Figure 9 This is a schematic diagram illustrating the process of reading data from a UFS device on the host side. The specific process may include:

[0157] 1.1 The Host sends a HostRead command to the UFS device.

[0158] The host can send the HostRead command to the Host Controller of the UFS device through its interface with the UFS device.

[0159] 2.1 The Host Controller of the UFS device requests Buffer resources from the System.

[0160] 3.1 The front-end of the UFS device obtains the frontread command from the host controller.

[0161] 3.2 The Front-End Request Address Mapping Table of the UFS device provides the physical address of the data storage.

[0162] 4.1 The back-end of the UFS device obtains the physical address of the data storage from the address mapping table.

[0163] 4.2 The UFS device's Back-End generates a BackWrite command based on the physical address of the data storage and sends the BackWrite command to the Flash Controller.

[0164] The Flash Controller of the 5.0 UFS device accesses the temperature sensor at preset intervals (e.g., every 5 minutes) and records the current temperature information.

[0165] 5.1 The Flash Controller of the UFS device sends a NAND Read command to the NAND Flash memory, and the NAND Flash memory executes the NAND Read command to read data from the NAND Flash memory.

[0166] When the NAND Flash memory executes the NAND Read command to read data in the NAND Flash memory, it includes reading data in the main storage area of ​​the physical page and reading temperature zone marker information in the spare storage area of ​​the physical page.

[0167] 5.2 The NAND Flash memory of the UFS device returns NAND Read Response information to the Flash Controller.

[0168] 5.3_1 Under normal data reading conditions, the Flash Controller of the UFS device will write the data read from the main storage area of ​​the physical page into the buffer.

[0169] 5.3_2 In the event of a data read error, the Flash Controller of the UFS device continues to call the read error handling module to handle the error.

[0170] Anomaly handling may include, but is not limited to, data recovery processing, data error correction processing (such as ECC processing), and retry.

[0171] In this embodiment, if the exception handling module fails to recover the read data, the Flash Controller can determine whether a high-intensity temperature difference exists during data read / write. A high-intensity temperature difference refers to a temperature range exceeding a preset threshold (e.g., 70°C) between the ambient temperature during data read and the ambient temperature during data write. For example, the ambient temperature during data write might be in an ultra-low temperature range, while the ambient temperature during data read might be in an ultra-high temperature range; conversely, the ambient temperature during data write might be in an ultra-high temperature range, while the ambient temperature during data read might be in an ultra-low temperature range. If the Flash Controller determines that a high-intensity temperature difference does not exist during data read / write, it can handle the exception according to the inherent firmware policy, such as marking the corresponding data as UECC or marking the physical block containing the data as RTBB. If the Flash Controller determines that a high-intensity temperature difference exists during data read / write, it will not handle the exception according to the inherent firmware policy but will stop the data read process, such as hanging the data read process and continuing to process other IO commands.

[0172] In this way, physical blocks in the Flash memory will not be mistakenly identified as RTBBs due to high-intensity temperature fluctuations during data read / write operations, thus preventing the permanent loss of data stored in those physical blocks. As long as the temperature difference between reading this data from the Flash memory and the data writing temperature is not significant, the data can still be read and used normally, thereby improving the reliability of data storage.

[0173] 5.4 The Flash Controller of the UFS device returns BackResponse information to the Back-End in response to the BackRead command.

[0174] 6.1 The UFS device's Back-End returns Response information to the Front-End.

[0175] 7.1 The front-end of the UFS device returns a response message to the host controller for the frontread command.

[0176] 8.1 When the response information indicates that the data reading is normal, the Host Controller of the UFS device reads the data from the Buffer and sends the data to the Host side.

[0177] 8.2 The Host Controller of the UFS device returns Response information to the Host side in response to the HostRead command.

[0178] Figure 9 For any parts of the process that are not explained in detail, please refer to existing technologies; they will not be elaborated upon here.

[0179] The following explanation uses reading data from the first physical page of a NAND Flash memory as an example to illustrate the data reading method. Figure 10 As shown, the data writing method specifically includes the following steps:

[0180] S301, the Flash Controller accesses the temperature sensor at preset time intervals and records the current ambient temperature.

[0181] S302, the Flash Controller reads data from the first physical page of the NAND Flash memory.

[0182] The Flash Controller can read the data that has been written and saved in the main storage area of ​​the second physical page, and it can also read the temperature zone marker information used to indicate the temperature range when writing data in the spare storage area of ​​the first physical page.

[0183] S303, the Flash Controller determines whether the temperature range when writing data in the main storage area of ​​the first physical page is within the normal temperature range. If not, it executes S304; if so, it executes S309.

[0184] Taking a Flash memory using QLC technology as an example, if the Flash Controller reads a temperature zone marker value of "1111" from the spare storage area of ​​the first physical page, then the temperature range during which data is written to the main storage area of ​​the first physical page is determined to be an ultra-low temperature zone. If the Flash Controller reads a temperature zone marker value of "1110" from the spare storage area of ​​the first physical page, then the temperature range during which data is written to the main storage area of ​​the first physical page is determined to be an ultra-high temperature zone. If the Flash Controller reads a temperature zone marker value of "1100" from the spare storage area of ​​the first physical page, then the temperature range during which data is written to the main storage area of ​​the first physical page is determined to be a normal temperature zone.

[0185] Considering the potential range of data read / write temperatures in NAND Flash memory, the temperature zone marker information read by the Flash Controller from the spare storage area of ​​the first physical page may change. Taking the NAND Flash memory using QLC technology as an example, if the temperature zone marker information read by the Flash Controller from the spare storage area of ​​the first physical page is not any of the values ​​"1111", "1110", or "1100", the Flash Controller can compare the cell VT corresponding to the read value with the cell VT corresponding to the values ​​"1111", "1110", and "1100", respectively. If the cell VT corresponding to the value read by the Flash Controller is closest to the cell VT corresponding to the value "1111", then the Flash Controller will use the temperature range represented by the value "1111", i.e., the ultra-low temperature zone, as the temperature range for data being written to the main storage area of ​​the first physical page. Understandably, if the cell VT corresponding to the value read by the Flash Controller is closest to the cell VT corresponding to the value "1110" or the value "1100", then the Flash Controller will use the temperature range represented by the value "1110" or the value "1100" as the temperature range when data is written to the main memory area of ​​the first physical page.

[0186] Optionally, still taking the NAND Flash memory using QLC technology as an example, if the value of the temperature zone marker information read by the Flash Controller from the spare storage area of ​​the first physical page is not any of the values ​​"1111", "1110", or "1100", then when the value of the temperature zone marker information read from the spare storage area of ​​the first physical page is a valid substitute value for the value "1111", "1110", or "1100", then the Flash Controller will use the temperature range represented by the value "1111", "1110", or "1100" as the temperature range when data is written to the main storage area of ​​the first physical page.

[0187] For example, if the temperature zone marker information read by the Flash Controller from the spare storage area of ​​the first physical page is any one of the values ​​"0111", "0011", or "1011", and "0111", "0011", or "1011" are valid alternative values ​​to "1111", then the Flash Controller can also determine that the temperature zone when data in the main storage area of ​​the first physical page is written is an ultra-low temperature zone. If the temperature zone marker information read by the Flash Controller from the spare storage area of ​​the first physical page is any one of the values ​​"0110", "0010", or "1010", and "0110", "0010", or "1010" are valid alternative values ​​to "1110", then the Flash Controller can also determine that the temperature zone when data in the main storage area of ​​the first physical page is written is an ultra-high temperature zone. If the temperature zone marker information read by the Flash Controller from the spare storage area of ​​the first physical page is any one of the values ​​"1001", "0001", "0101", "1101", "0100", "0000", and "1000", and the values ​​"1001", "0001", "0101", "1101", "0100", "0000", and "1000" are valid alternative values ​​to "1100", then the Flash Controller can also determine that the temperature zone range when the data in the main storage area of ​​the first physical page is written is the normal temperature zone.

[0188] S304, the Flash Controller determines whether there is an error when reading data from the main storage area of ​​the first physical page. If yes, it executes S305; otherwise, it executes S310.

[0189] S305, the Flash Controller reads the current ambient temperature and determines the temperature range within which the current ambient temperature falls.

[0190] The Flash Controller reads the current ambient temperature from the cache and determines which temperature range the current ambient temperature belongs to based on the temperature range division.

[0191] S306, The Flash Controller compares the current ambient temperature range with the temperature range when the data is written, and determines whether the two ranges are different. If they are, then S307 is executed; otherwise, S308 is executed.

[0192] In this context, the temperature range where the current ambient temperature is located and the temperature range at the time of data writing are cross-temperature ranges mean that these two temperature ranges are not the same and are not adjacent. In this embodiment, the temperature ranges include an ultra-low temperature range, a normal temperature range, and an ultra-high temperature range. The ultra-low temperature range and the ultra-high temperature range are cross-temperature ranges, and the normal temperature range separates them.

[0193] When the temperature range during data writing is not within the normal temperature range, i.e., the temperature range during data writing is in an ultra-low temperature range or an ultra-high temperature range, it indicates that the data is being written under extreme temperature conditions. If the current ambient temperature range is outside the normal temperature range compared to the temperature range during data writing, it indicates that the data read / write operation of the first physical page's main memory area is a high-intensity temperature cross-range operation, exceeding the normal temperature range (e.g., 70°C). For example, if the current ambient temperature range is in an ultra-low temperature range and the temperature range during data writing is in an ultra-high temperature range, or vice versa, both cases indicate that the current ambient temperature range is outside the normal temperature range compared to the temperature range during data writing.

[0194] S307 If the data in the main storage area of ​​the first physical page cannot be successfully recovered, the Flash Controller stops executing the data reading process in the first physical page.

[0195] In this embodiment, for abnormal data read from the main storage area of ​​the first physical page, the inherent firmware strategy of Flash storage can be used for abnormal handling, including but not limited to data recovery processing, data error correction processing (such as ECC processing), retry, etc.

[0196] The temperature range during data writing is not within the normal temperature range, and the current ambient temperature range overlaps with the temperature range during data writing, indicating that the abnormal data read in the first physical page's main memory area may be related to a high-intensity temperature jump. In this case, if the inherent error handling strategy of the Flash memory firmware fails to recover the data in the first physical page's main memory area, the Flash Controller can stop the data reading process in the first physical page, for example, by hanging the data reading process in the first physical page.

[0197] S308 If the data in the main storage area of ​​the first physical page cannot be successfully recovered, the Flash Controller will mark the data in the first physical page as UECC or mark the physical block where the first physical page is located as RTBB.

[0198] The temperature range during data writing is not within the normal temperature range, and the current ambient temperature range does not overlap with the temperature range during data writing (i.e., the current ambient temperature range is the same as or adjacent to the temperature range during data writing). This indicates that the data read anomaly in the first physical page's main memory area should be unrelated to high-intensity temperature crossover. In this case, if the Flash Controller uses the inherent firmware strategy of the Flash memory for anomaly handling and still cannot successfully recover the data in the first physical page's main memory area, the Flash Controller can, according to its existing processing logic, mark the data in the first physical page as UECC or mark the physical block containing the first physical page as RTBB.

[0199] It should be noted that the process of the Flash Controller determining whether the current ambient temperature range crosses the temperature range during data writing can be performed before or after the Flash Controller uses the inherent firmware strategy of the Flash memory to handle data read errors. This embodiment does not limit this. If the Flash Controller fails to recover the data in the main memory area of ​​the first physical page even after using the inherent firmware strategy of the Flash memory for error handling, the Flash Controller needs to determine, based on the determination result of whether the current ambient temperature range crosses the temperature range during data writing (abnormal temperature range), whether to mark the data in the first physical page as UECC or mark the physical block where the first physical page is located as RTBB according to the existing processing logic, or to hang the data reading process in the first physical page to stop the execution of the data reading process in the first physical page.

[0200] In this way, when the temperature range during data writing is not the normal temperature range, and the temperature range during data reading is different from the temperature range during data writing, that is, when the data reading anomaly may be related to high-intensity temperature crossing during data reading and writing, the Flash Controller will not mark the data in the first physical page as UECC or mark the physical block where the first physical page is located as RTBB according to the existing processing logic. Instead, it will hang the processing flow for reading this data to avoid the data being mistakenly marked as UECC or the corresponding physical block being mistakenly marked as RTBB due to high-intensity temperature crossing during data reading and writing. This improves the reliability of data storage and avoids the permanent loss of this data due to high-intensity temperature crossing during data reading and writing.

[0201] S309, the Flash Controller determines whether there is an error when reading data from the main storage area of ​​the first physical page. If yes, it executes S308; otherwise, it executes S310.

[0202] When the Flash Controller reads data from the main memory area of ​​the first physical page, if the temperature range during data writing is within the normal temperature range, it can execute the data read process according to the existing logic. In case of a data read failure, the Flash Controller can use the inherent firmware strategy of the Flash memory for exception handling. If the data in the main memory area of ​​the first physical page cannot be successfully recovered, the Flash Controller can mark the data in the first physical page as UECC or mark the physical block containing the first physical page as RTBB, according to the existing processing logic.

[0203] In this embodiment, if the ambient temperature range when data is written to the main memory area of ​​the first physical page is within the normal temperature range, then the temperature range when data is read from the main memory area of ​​the first physical page does not need to be considered. In this case, regardless of whether the temperature range when reading data is in the ultra-low temperature range, ultra-high temperature range, or normal temperature range, since the data is not written under extreme temperature conditions, the degree of temperature difference between data read / write is not significant (i.e., the current ambient temperature range does not cross the temperature range when the data is written), and it is mostly within the temperature range that the Flash memory medium can withstand. Therefore, abnormal data reading in the main memory area of ​​the first physical page is likely unrelated to the temperature difference scenario, and can be handled according to the existing processing logic when data cannot be successfully recovered.

[0204] S310, the Flash Controller continues to process other I / O commands.

[0205] For any parts of this process that are not explained in detail, please refer to the previous text; they will not be repeated here.

[0206] The above explanation uses data reading from the first physical page of the Flash memory as an example. It is understandable that the same applies when the Flash Controller reads data from the second physical page or other physical pages of the Flash memory, and will not be elaborated further here.

[0207] The following uses two specific application scenarios as examples to explain the data reading and writing method provided in this application embodiment.

[0208] Scene 1

[0209] This scenario describes a routine write and read operation in a NAND Flash memory. Figure 11An exemplary scenario is shown where data 1 is written to and read from a NAND Flash memory.

[0210] Reference Figure 11 In (1), the NAND Flash memory includes a physical page, Page 1. The temperature at the first moment is t1, which falls within the ultra-low temperature zone. At the first moment, the electronic device writes data 1 into Page 1 of the NAND Flash memory. Specifically, the electronic device writes data 1 into the main storage area of ​​Page 1, and simultaneously writes the ultra-low temperature zone marker into the spare storage area of ​​Page 1.

[0211] Continue to refer to Figure 11 In (2), the temperature at the second moment (later than the first moment) is t2, which falls within the ultra-high temperature range. That is, the temperature range of t2 is across the temperature range of t1. At the second moment, when the electronic device reads data 1 from Page 1 of the NAND Flash memory, a data reading error occurs, and data 1 cannot be successfully recovered, causing the data reading process to hang. For example, if data 1 is audio data, the electronic device may experience audio playback pauses or interruptions due to the hanging of the data reading process until subsequent audio data is successfully read from the NAND Flash memory. For another example, if data 1 is image data, the electronic device may experience screen stuttering or image loss due to the hanging of the data reading process until subsequent image data is successfully read from the NAND Flash memory.

[0212] Understandably, in this embodiment, there is a high-intensity temperature-dependent problem in reading and writing data 1. However, data 1 is not marked as UECC, and the physical block where data 1 is located is not marked as RTBB. Therefore, data 1 may be successfully read by electronic devices in the future and will not be permanently lost.

[0213] Continue to refer to Figure 11 In step (3), the temperature at the third moment (later than the second moment) is t3, which falls within the ultra-low temperature range or the normal temperature range. That is, the temperature range of t3 does not cross the temperature range of t1. At the third moment, the electronic device reads data 1 from Page 1 of the NAND Flash memory, and data 1 is successfully read.

[0214] Scene 2

[0215] This scenario describes an electronic device performing Garbage Collection (GC) operations. After garbage collection, memory fragmentation may occur. To improve memory utilization, the electronic device may reorganize the memory space during GC, arranging surviving objects compactly together to better allocate new objects. The data reading and writing processes performed by the electronic device during the GC process also follow the data reading and writing methods provided in the embodiments of this application.

[0216] Figure 12a An exemplary scenario is shown where an electronic device reads and writes data 2 into a NAND Flash memory during a garbage collection (GC) process.

[0217] Reference Figure 12a In (1), the NAND Flash memory includes physical pages Page 2 and Page 3. The temperature at the fourth moment is t4, which falls within the ultra-high temperature range. At the fourth moment, the electronic device writes data 2 into Page 2 of the NAND Flash memory. Specifically, the electronic device writes data 2 into the main storage area of ​​Page 2, while simultaneously writing the ultra-high temperature range marker into the spare storage area of ​​Page 2.

[0218] Continue to refer to Figure 12a In step (2), the electronic device performs the GC memory compaction process. The temperature at the fifth moment (later than the fourth moment) is t5, which falls within the ultra-high temperature zone. That is, the temperature zone of t5 is the same as that of t4, without crossing temperature zones. At the fifth moment, the electronic device reads data 2 from Page 2 of the NAND Flash memory, and data 2 is successfully read. The temperature at the sixth moment (later than the fifth moment) is t6, which falls within the ultra-high temperature zone. At the sixth moment, the electronic device writes data 2 to Page 3 of the NAND Flash memory. Specifically, the electronic device writes data 2 to the main memory area of ​​Page 3, and simultaneously writes the ultra-high temperature zone marker to the spare memory area of ​​Page 3. In this way, the electronic device completes the compaction process for data 2.

[0219] Figure 12b An exemplary scenario is shown where another electronic device reads data 2 from NAND Flash memory during garbage collection (GC). Regarding... Figure 12b The explanation of (1) can be found by referring to Figure 12a (1) will not be elaborated upon here. Please refer to [reference] for further details. Figure 12bIn step (2), the electronic device performs the GC memory compaction process. The temperature at the fifth moment (later than the fourth moment) is t5, but the temperature range of t5 is in the ultra-low temperature range, which is different from the temperature range of t4. At the fifth moment, when the electronic device reads data 2 from Page 2 of the NAND Flash memory, a data read exception occurs, and data 2 cannot be successfully recovered, so the process of reading data 2 is suspended. At this time, the electronic device cannot complete the compaction process of data 2.

[0220] Understandably, when the electronic device executes the GC process again later, it can still successfully read data 2 from Page 2 to complete the data tidying process. (See also...) Figure 12a The situation shown in (2) will not be repeated here.

[0221] Figure 13 An exemplary scenario is shown where another electronic device reads and writes data 3 into the NAND Flash memory during GC.

[0222] Reference Figure 13 In (1), the NAND Flash memory includes physical pages Page 4 and Page 5. The temperature at the seventh moment is t7, which falls within the normal temperature range. At the seventh moment, the electronic device writes data 3 into Page 4 of the NAND Flash memory. Specifically, the electronic device writes data 3 into the main storage area of ​​Page 4, while simultaneously writing the normal temperature range marker into the spare storage area of ​​Page 4.

[0223] Continue to refer to Figure 13 In step (2), the electronic device performs the GC memory compaction process. The temperature at the eighth moment (later than the seventh moment) is t8, which falls within the ultra-low temperature zone. The temperature zone of t8 does not cross the temperature zone of t7, so there is no high-intensity temperature crossing problem during the reading and writing of data 3. At the eighth moment, the electronic device reads data 3 from Page 4 of the NAND Flash memory, and data 3 is successfully read. The temperature at the ninth moment (later than the eighth moment) is t9, which falls within the ultra-low temperature zone. At the ninth moment, the electronic device writes data 3 to Page 5 of the NAND Flash memory. Specifically, the electronic device writes data 3 to the main memory area of ​​Page 5, and simultaneously writes the ultra-low temperature zone marker to the spare memory area of ​​Page 5. In this way, the electronic device completes the compaction process for data 3. It is understandable that if the temperature zones of t8 and t9 are in the ultra-high temperature zone or the normal temperature zone, the same process would be followed, which will not be elaborated further.

[0224] It should be pointed out that, in cases such asFigure 13 In the scenario shown, at the eighth moment, when the electronic device reads data 3 from Page 4 of the NAND Flash memory, a data read error occurs and data 3 cannot be successfully recovered. In this case, data 3 may be marked as UECC, or the physical block where Page 4 is located may be marked as RTBB.

[0225] This embodiment also provides a computer storage medium storing computer instructions. When the computer instructions are executed on an electronic device, the electronic device performs the aforementioned method steps to implement the data read / write method described in the above embodiment.

[0226] This embodiment also provides a computer program product that, when run on a computer, causes the computer to perform the aforementioned steps to implement the data read / write method described in the above embodiment.

[0227] In addition, embodiments of this application also provide an apparatus, which may specifically be a chip, component or module. The apparatus may include a connected processor and a memory. The memory is used to store computer execution instructions. When the apparatus is running, the processor can execute the computer execution instructions stored in the memory to cause the chip to execute the data read and write methods in the above-described method embodiments.

[0228] In this embodiment, the electronic devices (such as mobile phones), computer storage media, computer program products, or chips are all used to execute the corresponding methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects in the corresponding methods provided above, and will not be repeated here.

[0229] Through the above description of the embodiments, those skilled in the art will understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0230] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0231] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit it. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A data read / write method, characterized in that, include: Read the first data from the main memory area of ​​the first physical page of the Flash memory, determine that the data read is abnormal and the first data cannot be recovered; First marker information is read from the spare storage area of ​​the first physical page of the Flash memory; wherein, the marker information is used to describe the temperature range when data is written to the physical page, the temperature range includes a first range, a second range and a third range, the temperature included in the first range is lower than the temperature included in the second range, and the temperature included in the second range is lower than the temperature included in the third range; The target temperature range described by the first marking information is determined to be either the first range or the third range; It is determined that the temperature range at the current moment is different from and not adjacent to the temperature range described by the first marking information; Stop the process of reading the first data from the first physical page.

2. The method according to claim 1, characterized in that, After stopping the process of reading the first data from the first physical page, the process further includes: The first data is read from the main memory area of ​​the first physical page of the Flash memory.

3. The method according to claim 1, characterized in that, Also includes: The second data was read from the main storage area of ​​the second physical page of the Flash memory, and it was determined that the data read was abnormal and the second data could not be recovered. The second tag information is read from the spare storage area of ​​the second physical page of the Flash memory; The target temperature range described by the first marking information is determined to be either the first range or the third range; Determine whether the temperature range at the current moment is the same as or adjacent to the temperature range described by the first marking information; The data in the second physical page is marked as an uncorrectable error code, or the physical block containing the second physical page is marked as a runtime bad block.

4. The method according to claim 1, characterized in that, Also includes: The third data was read from the main storage area of ​​the third physical page of the Flash memory, and it was determined that the data read was abnormal and the third data could not be recovered. The third tag information was read from the spare storage area of ​​the third physical page of the Flash memory; The target temperature range described by the third marking information is determined to be the second range; The data in the third physical page is marked as an uncorrectable error code, or the physical block containing the third physical page is marked as a runtime bad block.

5. The method according to claim 1, characterized in that, Also includes: The temperature sensor is polled according to a preset period, and the temperature sensor is used to monitor the ambient temperature information of the Flash memory. The temperature information currently collected by the sensor is recorded in the cache.

6. The method according to claim 4, characterized in that, Also includes: Obtain the fourth data; The fourth data is written into the main storage area of ​​the fourth physical page of the Flash memory; The temperature range in which the current temperature information is located is determined, and the target value used to describe the temperature range is written as tag information into the spare storage area of ​​the fourth physical page.

7. The method according to any one of claims 1-6, characterized in that, The number of bits in the marker information is equal to the number of bits stored in each storage cell of the Flash memory.

8. The method according to claim 7, characterized in that, Determine the target temperature range described by the target marking information, including: Read the numerical value of the target marker information; The value is determined to be the target value, or the value is determined to be a valid alternative value to the target value; The temperature range described by the target value is taken as the target temperature range.

9. The method according to claim 8, characterized in that, The Flash memory is a NAND Flash memory, and the number of bits stored in each storage cell of the NAND Flash memory is greater than or equal to 4.

10. The method according to claim 1, characterized in that, The temperature range of the second zone is 70°C.

11. An electronic device, characterized in that, include: One or more processors; Memory; Flash memory; And one or more computer programs, wherein the one or more computer programs are stored on the memory, and when the computer programs are executed by the one or more processors, cause the electronic device to perform the data read / write method as described in any one of claims 1-10.

12. A computer-readable storage medium comprising a computer program, characterized in that, When the computer program is run on an electronic device, it causes the electronic device to perform the data read / write method as described in any one of claims 1-10.

13. A chip, characterized in that, The chip includes a processor and a Flash memory, wherein the processor is used to invoke a stored computer program to execute the data read / write method as described in any one of claims 1-10.

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