A backplane bus system, data acquisition method, device and medium
By employing differentiated bus design and adaptive control in the modular acquisition system, the problems of power consumption surge and scalability in the modular acquisition system are solved, achieving efficient and flexible data acquisition and improved device stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN AVIC SHIXING TECH CO LTD
- Filing Date
- 2026-03-09
- Publication Date
- 2026-06-12
AI Technical Summary
Existing modular acquisition systems suffer from problems such as power consumption surges, power concentration, a prominent contradiction between scalability and energy efficiency, and a lack of adaptive adjustment mechanisms when facing high and low rate signal compatibility. This is especially true in space-constrained environments such as airborne and vehicle-mounted systems, which affect the stability and reliability of the equipment.
It adopts a differentiated bus type design, with a high-bandwidth unidirectional data bus for the uplink and a low-bandwidth control bus for the downlink. Combined with an adaptive control mechanism, it achieves dynamic power balance distribution and flexible expansion, and supports plug and play.
It effectively reduces overall system power consumption, improves heat dissipation balance and reliability, achieves optimal energy efficiency, and supports flexible plugging of modules of different speeds and types without the need to reconfigure bus parameters.
Smart Images
Figure CN121807756B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic technology, and in particular to a baseboard bus system, data acquisition method, device and medium. Background Technology
[0002] In various complex industrial and special application scenarios, such as airborne flight data acquisition, railway operation status data acquisition, and blasting performance test data acquisition, data acquisition systems must meet the needs of acquiring signals of multiple types, multiple channels, and multiple rates. These scenarios typically involve multiple signal types, including analog quantities (such as temperature, pressure, and vibration), digital quantities (such as switch states and pulse signals), and high-speed serial data (such as bus communication, video streams, and fiber optics). Furthermore, the data output rates of different sensors vary significantly (some signal rates are as low as Kbps, while others can reach several Gbps or even 10 Gbps). To improve the versatility, maintainability, and scalability of the equipment, current mainstream solutions generally adopt a modular acquisition architecture. This involves connecting multiple functionally independent acquisition modules through a standardized baseboard bus, enabling on-demand configuration and flexible expansion. This architecture supports the access of different types and numbers of sensors, effectively improving the system's adaptability and deployment efficiency.
[0003] Currently, most common backplane bus systems employ symmetrical structures, such as PCIe, USB, or custom parallel buses. These systems are designed with a focus on balanced uplink and downlink bandwidth allocation to adapt to general application scenarios. Typical examples of existing technologies include: 1. PCIe-based backplane buses: offer high bandwidth but consume more power, and the symmetrical design leads to wasted downlink resources. 2. Ethernet-based backplane buses (such as RS-485 or CAN bus): low power consumption but limited bandwidth, unable to adapt to high-sampling-rate multi-module parallel acquisition. 3. Adaptive bus systems (such as some FPGA-based designs): can dynamically adjust parameters, but are mostly symmetrical structures and lack optimization mechanisms for low power consumption.
[0004] However, with the continuous expansion of data acquisition needs, especially the increasing types of data to be acquired and the number of channels, existing modular data acquisition systems face the following key challenges:
[0005] 1. High-low speed compatibility leads to a surge in power consumption: In order to achieve compatibility with high-speed signals, the system is usually designed with bus bandwidth and main control processing capability according to the highest data rate. Even if most channels are working at low speed, the system still needs to maintain a high clock frequency and wide data path, resulting in a "large horse pulling a small cart" phenomenon, which leads to a significant increase in overall power consumption.
[0006] 2. Increased Power Consumption and Heat Dissipation Pressure: In traditional symmetrical backplane bus architectures, all modules share the same power supply and communication resources. The main control module needs to process both high-speed and low-speed data streams simultaneously, resulting in a highly concentrated computing and communication load and significantly higher power consumption than other modules. This imbalance in power consumption not only increases the overall system energy consumption but also leads to serious heat dissipation problems. Especially in environments with limited space and harsh heat dissipation conditions, such as airborne and vehicle-mounted systems, this directly affects the long-term operational stability and reliability of the equipment.
[0007] 3. The contradiction between scalability and energy efficiency is prominent: In order to cope with future expansion needs, the system usually reserves sufficient power consumption and bandwidth redundancy. However, this "static reservation" method causes resource waste in most operating conditions, making it difficult to achieve dynamic on-demand allocation, resulting in increased equipment size, complex power supply design, and reduced battery life.
[0008] 4. Lack of adaptive adjustment mechanism: Most existing backplane buses adopt a fixed working mode, which cannot dynamically adjust the communication bandwidth, voltage frequency and power consumption strategy according to the actual acquisition task, making it difficult to achieve refined energy efficiency management. Summary of the Invention
[0009] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a backplane bus system that, while ensuring compatibility with high and low speed signals and supporting flexible expansion, can achieve dynamic power consumption balance, reduce overall system power consumption, alleviate the problem of concentrated load on the main control module, and improve the system's energy efficiency ratio and operational stability through asymmetric communication design and adaptive control mechanism.
[0010] This application also provides a data acquisition method, a control device for performing the data acquisition method, and a computer-readable storage medium.
[0011] A baseboard bus system according to a first aspect embodiment of the present application is applied to a modular acquisition system, the baseboard bus system comprising:
[0012] A backplane substrate is provided with multiple standardized module slots, which are respectively used to insert the main control module and multiple acquisition modules of the modular acquisition system.
[0013] The baseboard bus structure includes a low-bandwidth control bus and a high-bandwidth unidirectional data bus, both mounted on the backplane substrate. The low-bandwidth control bus serves as the downlink data link from the main control module to the multiple acquisition modules, and the high-bandwidth unidirectional data bus serves as the uplink data link from each acquisition module to the main control module. The data transmission rate and power consumption of the low-bandwidth control bus are lower than those of the high-bandwidth unidirectional data bus. The high-bandwidth unidirectional data bus supports multiple different transmission rates. Each acquisition module determines its uplink bus transmission rate based on its acquisition capability and maximum bandwidth. The main control module adaptively receives the acquisition data uploaded at different uplink bus transmission rates.
[0014] The backplane bus system according to the embodiments of this application has at least the following beneficial effects:
[0015] This application addresses the asymmetric characteristics of uplink and downlink data traffic by employing differentiated bus types. The uplink data link uses a high-bandwidth unidirectional data bus, while the downlink data link uses a low-bandwidth control bus, effectively reducing system design complexity and overall power consumption. The high-bandwidth unidirectional data bus supports multiple transmission rates. Each acquisition module determines its uplink bus transmission rate based on its acquisition capabilities and maximum bandwidth. The main control module adaptively receives data uploaded at different uplink bus transmission rates, thus allocating bandwidth and power consumption as needed. This ensures high scalability while optimizing energy efficiency. The main control module is only responsible for high-speed data reception, distributing communication power consumption across all acquisition modules, avoiding localized overheating of the main control module, and improving the overall system's heat dissipation balance and reliability. This application uses a unified interface and hybrid bus architecture, supporting the mixed insertion of acquisition modules of different rates and types, enabling plug-and-play functionality without reconfiguring bus parameters, significantly improving system flexibility and deployment efficiency.
[0016] According to some embodiments of this application, the high-bandwidth unidirectional data bus adopts a GTX bus.
[0017] According to some embodiments of this application, each of the acquisition modules communicates with the main control module via a point-to-point communication method through the GTX bus.
[0018] According to some embodiments of this application, the low-bandwidth control bus adopts the BLVDS bus.
[0019] According to some embodiments of this application, the main control module communicates with multiple acquisition modules via the BLVDS bus using a point-to-multipoint communication method.
[0020] The data acquisition method according to a second aspect of this application, applied to the backplane bus system as described in the first aspect of the present application, includes:
[0021] The system collects data in response to the acquisition command issued by the main control module, and obtains the collected data.
[0022] The uplink bus transmission rate of the acquired data is determined based on the acquisition module's own acquisition capability and maximum bandwidth, and the acquired data is uploaded to the main control module through the high-bandwidth unidirectional data bus at the uplink bus transmission rate.
[0023] The data acquisition method according to the embodiments of this application has at least the following beneficial effects:
[0024] This application addresses the asymmetric characteristics of uplink and downlink data traffic by employing differentiated bus types. The uplink data link uses a high-bandwidth unidirectional data bus, while the downlink data link uses a low-bandwidth control bus, effectively reducing system design complexity and overall power consumption. The high-bandwidth unidirectional data bus supports multiple transmission rates. Each acquisition module determines its uplink bus transmission rate based on its acquisition capabilities and maximum bandwidth. The main control module adaptively receives data uploaded at different uplink bus transmission rates, thus allocating bandwidth and power consumption as needed. This ensures high scalability while optimizing energy efficiency. The main control module is only responsible for high-speed data reception, distributing communication power consumption across all acquisition modules, avoiding localized overheating of the main control module, and improving the overall system's heat dissipation balance and reliability. This application uses a unified interface and hybrid bus architecture, supporting the mixed insertion of acquisition modules of different rates and types, enabling plug-and-play functionality without reconfiguring bus parameters, significantly improving system flexibility and deployment efficiency.
[0025] According to some embodiments of this application, the high-bandwidth unidirectional data bus adopts a GTX bus, and each of the acquisition modules communicates with the main control module via the GTX bus in a point-to-point manner.
[0026] The step of determining the uplink bus transmission rate of the acquired data based on the acquisition module's own acquisition capability and maximum bandwidth, and uploading the acquired data to the main control module via the high-bandwidth unidirectional data bus at the uplink bus transmission rate, includes:
[0027] The uplink bus transmission rate of the acquired data is determined based on the acquisition module's own acquisition capability and maximum bandwidth, and the acquired data is uploaded to the main control module via the GTX bus in a point-to-point communication manner at the uplink bus transmission rate.
[0028] According to some embodiments of this application, the low-bandwidth control bus adopts a BLVDS bus, and the main control module communicates with multiple acquisition modules via the BLVDS bus in a point-to-multipoint communication manner. The acquisition command is issued through the following steps:
[0029] In response to the task instruction, the acquisition instruction is generated;
[0030] The acquisition command is sent to each acquisition module via the BLVDS bus using a time-division multiplexing mechanism, so that the target acquisition module can acquire data according to the acquisition command and obtain the acquired data. The target acquisition module is one of the multiple acquisition modules.
[0031] A control device according to a third aspect embodiment of this application includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the data acquisition method as described in the second aspect embodiment above. Since the control device employs all the technical solutions of the data acquisition method of the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments.
[0032] According to a fourth aspect embodiment of this application, a computer-readable storage medium stores computer-executable instructions for performing the data acquisition method as described in the second aspect embodiment above. Since the computer-readable storage medium employs all the technical solutions of the data acquisition method of the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments.
[0033] Other features and advantages of this application will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing this application. Attached Figure Description
[0034] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:
[0035] Figure 1 This is a schematic diagram of the structure of a baseboard bus system according to an embodiment of this application;
[0036] Figure 2 This is a schematic diagram of the connection of the baseboard bus structure according to an embodiment of this application;
[0037] Figure 3 This is a flowchart of a data acquisition method according to an embodiment of this application. Detailed Implementation
[0038] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0039] In the description of this application, the use of terms such as "first," "second," etc., is for the purpose of distinguishing technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or the order of the technical features indicated.
[0040] In the description of this application, it should be understood that the orientation descriptions, such as up, down, etc., are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0041] In the description of this application, it should be noted that, unless otherwise explicitly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.
[0042] The following will combine Figures 1 to 3 The backplane bus system and data acquisition method of the embodiments of this application will be clearly and completely described. Obviously, the embodiments described below are some embodiments of this application, not all embodiments.
[0043] refer to Figures 1 to 3 , Figure 1 This is a schematic diagram of the structure of a backplane bus system according to an embodiment of this application. Figure 2 This is a connection diagram of a baseboard bus structure according to an embodiment of this application. Figure 3 This is a flowchart of a data acquisition method according to an embodiment of this application.
[0044] According to a first aspect embodiment of the present application, a baseboard bus system is applied to a modular acquisition system. The baseboard bus system includes a backplane substrate and a baseboard bus structure.
[0045] The backplane substrate has multiple standardized module slots, which are used to insert the main control module and multiple acquisition modules of the modular acquisition system.
[0046] The backplane bus structure includes a low-bandwidth control bus and a high-bandwidth unidirectional data bus, both mounted on the backplane substrate. The low-bandwidth control bus serves as the downlink data link from the main control module to multiple acquisition modules, while the high-bandwidth unidirectional data bus serves as the uplink data link from each acquisition module to the main control module. The data transmission rate and power consumption of the low-bandwidth control bus are lower than those of the high-bandwidth unidirectional data bus. The high-bandwidth unidirectional data bus supports multiple different transmission rates. Each acquisition module determines the uplink bus transmission rate of the acquired data based on its own acquisition capability and maximum bandwidth. The main control module adaptively receives the acquired data uploaded at different uplink bus transmission rates.
[0047] like Figure 1 As shown, its baseboard design includes 11 standard slots and debugging interfaces. Among them, the power module slot, solid-state storage slot, and real-time data processing module slot are fixed configurations, while the remaining 8 slots are flexible card slots. Both the main control module and the acquisition board module adopt a card-type structure. The main control module is fixedly installed in the first slot, and the remaining slots are used to carry acquisition modules, supporting flexible deployment of various acquisition modules.
[0048] In some embodiments of this application, reference is made to Figure 1 and Figure 2 The high-bandwidth unidirectional data bus uses the GTX bus, and each acquisition module communicates with the main control module via a point-to-point communication method through the GTX bus. The low-bandwidth control bus uses the BLVDS bus, and the main control module communicates with multiple acquisition modules via a point-to-multipoint communication method through the BLVDS bus.
[0049] The main control module communicates with the acquisition module via the BLVDS bus. The BLVDS bus technology has the following characteristics: (1) It has a simple wiring structure and requires fewer signal lines; (2) It supports point-to-multipoint communication topology; (3) It has low requirements for the hardware resources and performance of the FPGA on the acquisition board and is generally compatible with existing design schemes; (4) The transmission rate can reach 200Mbps, which fully meets the system configuration and data transmission requirements.
[0050] The acquisition module and the main control module communicate using the GTX bus. The GTX bus supports configurable speed, which helps to further reduce system power consumption. The GTX bus technology has the following characteristics: (1) different transmission signals are available; (2) different speeds are available for adaptation; (3) high and low data volume are adaptive; (4) point-to-point transmission is available, and a single acquisition module does not affect other acquisition modules.
[0051] The composite bus technology solution of this application mainly presents the following technical features: (1) It provides multiple transmission rates that can be adapted: 600MHz, 1GHz to 10GHz, with a 500MHz interval from 1GHz to 10GHz; (2) It has the ability to adapt to high / low data volume; (3) It adopts a point-to-point independent transmission architecture to ensure that the data volume of a single module does not affect the transmission of other modules; (4) It has good backward expansion capability and can flexibly cope with the growth of data volume without worrying about storage and processing limitations.
[0052] The main control module and the acquisition modules communicate via a BLVDS bus, supporting point-to-multipoint connections. Only one pair of BLVDS buses is needed to transmit data with multiple acquisition modules, and the system communication remains unaffected by increasing or decreasing the number of acquisition modules. The BLVDS bus supports operating at speeds up to 200Mb / s, features low power consumption, and employs a time-division multiplexing mechanism for communication with each acquisition module, significantly reducing the hardware design complexity and overall power consumption from the main control module to the acquisition modules.
[0053] The main control module and the acquisition module communicate via a point-to-multipoint method, using acquisition commands containing board location numbers for addressing and differentiation. Upon receiving an acquisition command, each acquisition module determines whether it should process the command based on the board location number it contains. If the physical electrical location number of the acquisition module matches the board location number in the acquisition command, it is processed; otherwise, no processing is performed.
[0054] In some embodiments, the acquisition module performs the following steps:
[0055] The first board location number of the target acquisition module and the acquisition command issued by the main control module are obtained. The acquisition command includes the second board location number. Acquisition modules in different standardized module slots have different board location numbers. The target acquisition module is one of multiple acquisition modules.
[0056] If the location number of the first board is the same as that of the second board, data is collected according to the acquisition command to obtain the collected data;
[0057] The uplink bus transmission rate of the acquired data is determined based on the acquisition module's own acquisition capability and maximum bandwidth, and the acquired data is uploaded to the main control module through a high-bandwidth unidirectional data bus at the uplink bus transmission rate.
[0058] If the location number of the first board is different from that of the second board, no processing will be performed.
[0059] The acquisition modules and the main control module communicate point-to-point via a GTX bus, ensuring that data transmission between each acquisition module and the main control module is independent and does not interfere with each other. The GTX bus supports various transmission rates from 600Mb / s to 10Gb / s. Compared with commonly used communication methods such as PCIe and fiber optics, it offers a wider range of configurable rate levels, which can flexibly adapt to the data throughput requirements of different acquisition modules.
[0060] This application addresses the data characteristics of modular acquisition systems that prioritize uplink over downlink. It abandons the traditional single bidirectional symmetrical bus mode and adopts an asymmetric architecture that integrates multiple buses. Through differentiated design at the physical layer and adaptive algorithms at the link layer, it maximizes the utilization of bus resources and effectively solves the power consumption and heat dissipation problems in the background technology.
[0061] 1. Asymmetric simplified design of the physical layer:
[0062] Architecture splitting: The backplane bus logic is split into a "high-bandwidth unidirectional data bus" and a "low-bandwidth control bus".
[0063] Cost reduction and energy saving: For downlink configuration streams, a low-speed, low-power BLVDS bus is used with a high-speed clock and low power consumption. One bus supports multiple boards, completely eliminating redundant high-bandwidth transmission circuits in the downlink channel.
[0064] Advantages: Significantly reduces the complexity of the baseboard wiring and the static power consumption of the interface chip, and reduces the hardware bandwidth redundancy of the system.
[0065] 2. Adaptive mechanism for speed and power consumption:
[0066] Rate Adaptive: The acquisition module autonomously determines the actual bandwidth for sending data to the GTX bus based on its own data generation rate (such as sampling rate). The master control module, as a passive receiver, does not need to predict this and only needs to receive data at the matched rate. The bus interface circuit has clock data recovery (CDR) or rate negotiation capabilities, and can automatically adapt to the rates from different acquisition modules.
[0067] Power consumption adaptation: The rate adaptation feature itself includes some power consumption adaptation capabilities. Additionally, when a card is not inserted into a particular acquisition module slot, or when an inserted card is idle, its corresponding uplink data link automatically enters a no-signal or low-power standby state. The corresponding channel on the main control module's receiver can also be shut down, thereby eliminating power consumption in idle channels.
[0068] Advantages: This mechanism not only simplifies the logic design of the main control module, but also ensures that the link can automatically reduce power consumption under low load, achieving the optimal energy efficiency ratio at different rates.
[0069] 3. Distributed thermal management and scalability optimization:
[0070] Wake-up on demand: Since data transmission is dominated by the acquisition module, the bus automatically stops transmitting signals when a card is not inserted into a slot or when it is idle.
[0071] Power consumption is distributed across the various acquisition modules, avoiding excessive power consumption and localized overheating caused by the main control module undertaking all data receiving tasks.
[0072] Advantages: It achieves a balanced distribution of system heat, solves the heat dissipation bottleneck of the main control module, and supports more flexible module expansion (plug and play, no need to reconfigure bus parameters).
[0073] According to the backplane bus system of this application embodiment, this application adopts differentiated bus types to address the asymmetric characteristics of uplink and downlink data traffic. The uplink data link uses a high-bandwidth unidirectional data bus, while the downlink data link uses a low-bandwidth control bus, effectively reducing the complexity of system design and overall power consumption. The high-bandwidth unidirectional data bus of this application supports multiple different transmission rates. Each acquisition module determines the uplink bus transmission rate of the acquired data based on its own acquisition capability and maximum bandwidth. The main control module adaptively receives the acquired data uploaded at different uplink bus transmission rates, thereby allocating bandwidth and power consumption as needed, achieving optimal energy efficiency while ensuring high scalability. The main control module is only responsible for high-speed data reception, distributing communication power consumption to each acquisition module, avoiding local overheating of the main control module, and improving the overall heat dissipation balance and reliability of the system. This application adopts a unified interface and hybrid bus architecture, supporting the mixed insertion of acquisition modules of different rates and types, achieving plug-and-play functionality without reconfiguring bus parameters, greatly improving system flexibility and deployment efficiency.
[0074] The data acquisition method according to a second aspect of this application, applied to a backplane bus system as described in the first aspect of the present application, includes:
[0075] It responds to the acquisition command issued by the main control module to acquire data and obtain the acquired data;
[0076] The uplink bus transmission rate of the acquired data is determined based on the acquisition module's own acquisition capability and maximum bandwidth, and the acquired data is uploaded to the main control module through a high-bandwidth unidirectional data bus at the uplink bus transmission rate.
[0077] In some embodiments of this application, reference is made to Figure 1 and Figure 2 The high-bandwidth unidirectional data bus adopts the GTX bus, and each acquisition module communicates with the main control module via the GTX bus in a point-to-point manner.
[0078] The uplink bus transmission rate of the acquired data is determined based on the acquisition module's own acquisition capability and maximum bandwidth. The acquired data is then uploaded to the main control module via a high-bandwidth unidirectional data bus at this uplink bus transmission rate, including:
[0079] The uplink bus transmission rate of the acquired data is determined based on the acquisition module's own acquisition capability and maximum bandwidth. The acquired data is then uploaded to the main control module via the GTX bus in a point-to-point communication manner at the uplink bus transmission rate.
[0080] In some embodiments of this application, reference is made to Figure 1 and Figure 2 The low-bandwidth control bus uses the BLVDS bus. The main control module communicates with multiple acquisition modules via a point-to-multipoint communication method through the BLVDS bus. Acquisition commands are issued through the following steps:
[0081] In response to task instructions, generate acquisition instructions;
[0082] The acquisition command is sent to each acquisition module via the BLVDS bus using a time-division multiplexing mechanism, so that the target acquisition module can acquire data according to the acquisition command and obtain the acquired data. The target acquisition module is one of multiple acquisition modules.
[0083] According to the data acquisition method of this application embodiment, this application adopts differentiated bus types to address the asymmetric characteristics of uplink and downlink data traffic. The uplink data link uses a high-bandwidth unidirectional data bus, while the downlink data link uses a low-bandwidth control bus, effectively reducing the complexity of system design and overall power consumption. The high-bandwidth unidirectional data bus of this application supports multiple different transmission rates. Each acquisition module determines the uplink bus transmission rate of the acquired data based on its own acquisition capability and maximum bandwidth. The main control module adaptively receives the acquired data uploaded at different uplink bus transmission rates, thereby allocating bandwidth and power consumption as needed, achieving optimal energy efficiency while ensuring high scalability. The main control module is only responsible for high-speed data reception, distributing communication power consumption to each acquisition module, avoiding local overheating of the main control module, and improving the overall heat dissipation balance and reliability of the system. This application adopts a unified interface and hybrid bus architecture, supporting the mixed insertion of acquisition modules of different rates and types, achieving plug-and-play functionality without reconfiguring bus parameters, greatly improving system flexibility and deployment efficiency.
[0084] Since the data acquisition method adopts all the technical solutions of the baseboard bus system in the above embodiments, it has at least all the beneficial effects brought about by the technical solutions in the above embodiments, and will not be repeated here.
[0085] Additionally, one embodiment of this application provides a control device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor. The processor and the memory can be connected via a bus or other means.
[0086] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.
[0087] The non-transient software program and instructions required to implement the data acquisition method of the above embodiments are stored in the memory. When executed by the processor, the data acquisition method of the above embodiments is executed.
[0088] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.
[0089] Furthermore, one embodiment of this application provides a computer-readable storage medium storing computer-executable instructions that are executed by a processor or controller, for example, by a processor of the aforementioned control device, causing the processor to perform the data acquisition method described above.
[0090] It will be understood by those skilled in the art that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.
[0091] The embodiments of this application have been described in detail above with reference to the accompanying drawings. However, this application is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this application.
Claims
1. A baseboard bus system, applied to a modular acquisition system, characterized in that, The baseboard bus system includes: A backplane substrate is provided with multiple standardized module slots, which are respectively used to insert the main control module and multiple acquisition modules of the modular acquisition system. The baseboard bus structure includes a low-bandwidth control bus and a high-bandwidth unidirectional data bus, both mounted on the backplane base plate. The high-bandwidth unidirectional data bus uses a GTX bus, and the low-bandwidth control bus uses a BLVDS bus. The low-bandwidth control bus serves as the downlink data link from the main control module to multiple acquisition modules. Communication between the main control module and the multiple acquisition modules is point-to-multipoint via the BLVDS bus, using acquisition commands containing board location numbers for addressing and differentiation. The high-bandwidth unidirectional data bus serves as the uplink data link from each acquisition module to the main control module. Communication between each acquisition module and the main control module is point-to-point via the GTX bus. In terms of communication, after receiving the acquisition command, each acquisition module determines whether it should process the data based on the board location number included in the acquisition command. If the physical electrical location number of the acquisition module matches the board location number in the acquisition command, it will process the data; otherwise, it will not process the data. The data transmission rate and power consumption of the low-bandwidth control bus are lower than those of the high-bandwidth unidirectional data bus. The high-bandwidth unidirectional data bus supports multiple different transmission rates. Each acquisition module determines the uplink bus transmission rate of the acquired data based on its own acquisition capability and maximum bandwidth. The main control module adaptively receives the acquired data uploaded at different uplink bus transmission rates.
2. A data acquisition method, characterized in that, Applied to the baseboard bus system as described in claim 1, the data acquisition method includes: The system collects data in response to the acquisition command issued by the main control module, and obtains the collected data. The uplink bus transmission rate of the acquired data is determined based on the acquisition module's own acquisition capability and maximum bandwidth, and the acquired data is uploaded to the main control module through the high-bandwidth unidirectional data bus at the uplink bus transmission rate.
3. The data acquisition method according to claim 2, characterized in that, The step of determining the uplink bus transmission rate of the acquired data based on the acquisition module's own acquisition capability and maximum bandwidth, and uploading the acquired data to the main control module via the high-bandwidth unidirectional data bus at the uplink bus transmission rate, includes: The uplink bus transmission rate of the acquired data is determined based on the acquisition module's own acquisition capability and maximum bandwidth, and the acquired data is uploaded to the main control module via the GTX bus in a point-to-point communication manner at the uplink bus transmission rate.
4. The data acquisition method according to claim 2, characterized in that, The acquisition command is issued through the following steps: In response to the task instruction, the acquisition instruction is generated; The acquisition command is sent to each acquisition module via the BLVDS bus using a time-division multiplexing mechanism, so that the target acquisition module can acquire data according to the acquisition command and obtain the acquired data. The target acquisition module is one of the multiple acquisition modules.
5. A control device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the data acquisition method as described in any one of claims 2 to 4.
6. A computer-readable storage medium storing computer-executable instructions, characterized in that, The computer-executable instructions are used to perform the data acquisition method as described in any one of claims 2 to 4.