SMT solver selection method and system, and storage medium

By adopting a pairwise classification SMT solver selection method based on a voting mechanism, the problems of low accuracy and efficiency in SMT solver selection are solved. This method enables automated selection of the optimal solver, adapts to large-scale and diverse application scenarios, and improves the efficiency and accuracy of circuit design verification.

CN121808252APending Publication Date: 2026-04-07SHENZHEN GOUWEIXIN TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-22
Publication Date
2026-04-07

AI Technical Summary

Technical Problem

The selection accuracy and efficiency of existing SMT solvers are not high, making it difficult to adapt to large-scale instances and diverse application scenarios, resulting in large differences in circuit design verification time, and the accuracy of traditional rules of thumb is less than 40%.

Method used

A pairwise classification SMT solver selection method based on a voting mechanism is adopted. The pairwise comparison model of SMT solvers is trained by pre-classifying logic types to form a set of candidate solvers. The solver with the most votes is selected by a lightweight machine learning model and a pairwise comparison model. Combined with adaptive coefficients and outlier handling mechanisms, the accuracy and efficiency of solver selection are improved.

Benefits of technology

It automatically learns solver performance and selects the optimal solver, improving the ability to handle large-scale instances, adapting to different logic types, reducing the impact of noise, supporting cross-domain applications, and integrating into existing EDA toolchains to achieve intelligent scheduling of SMT solvers.

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Abstract

The invention discloses an SMT solver selection method and system, and a storage medium. The selection method of the SMT solver based on the pairing classification of the voting mechanism comprises the following steps: classifying logic types of SMT problems in advance, training pairing comparison models of the SMT solver for each logic type, and outputting a voting result of the SMT solver of the corresponding logic type by each pairing comparison model; pre-selecting an SMT solver for the SMT problem to be solved corresponding to the circuit design, and forming a candidate solver set; and according to the logic type of the SMT problem to be solved, selecting the corresponding pairwise comparison model to perform pairwise comparison iteration of every two solvers in the candidate solver set for each solver pair, and selecting the SMT solver with the maximum voting number as the solver of the SMT problem to be solved. According to the method, the selection efficiency and accuracy of the SMT solver can be remarkably improved.
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Description

Technical Field

[0001] This invention relates to the technical field of computer software and automated decision-making, and in particular to a method and system for intelligent selection of pairwise classification SMT solvers based on a hierarchical voting mechanism, which is applicable to scenarios requiring efficient SMT solving, such as hardware design verification and software testing. Background Technology

[0002] SMT (Satisfiability Modulus Theory) solvers, as core tools for formal verification, have been deeply integrated into key areas such as hardware design verification, software security analysis, and protocol compliance testing. With the exponential growth in complexity of industrial scenarios, the traditional single-solver approach faces two major challenges. First, the scale bottleneck: ultra-large-scale instances (such as verifying circuits with billions of gates) impose extreme demands on solution efficiency. Second, domain differentiation: new application scenarios are giving rise to highly customized solver variants.

[0003] To address these challenges, the industry has developed hundreds of solver configurations with different heuristic strategies and theoretical optimizations. However, this diversity leads to a selection dilemma. Experimental data shows that the performance difference for the same problem on different solvers can reach three orders of magnitude, with solvers like Z3 taking 0.5 seconds to solve compared to CVC5 taking 500 seconds. Currently, there is a lack of effective methods for selecting the optimal solver; traditional empirical rules have an accuracy of less than 40% and are inefficient.

[0004] Therefore, how to improve the accuracy and efficiency of the solver selection for various SMT problems in circuit design is a technical problem to be solved. Summary of the Invention

[0005] To address the technical problems of low accuracy and low efficiency in the selection of the optimal solver in the prior art, this invention proposes a method, system, and storage medium for selecting the SMT solver.

[0006] The method for selecting SMT solvers based on a voting mechanism and pairwise classification according to the present invention includes:

[0007] The logic types of SMT problems are pre-classified, and a pairwise comparison model of the SMT solver is trained for each logic type. Each pairwise comparison model outputs the voting results of the SMT solver for the corresponding logic type.

[0008] Pre-select SMT solvers for the SMT problem to be solved corresponding to the circuit design, and form a set of candidate solvers;

[0009] Based on the logic type of the SMT problem to be solved, the corresponding pairwise comparison model is selected. When performing pairwise comparison iterations for every two solvers in the candidate solver set for each solver pair, the SMT solver with the most votes is selected as the solver for the SMT problem to be solved.

[0010] Furthermore, during the pairwise comparison iteration process, the voting results are checked every n times, and when ΔV > α√(M –V) is satisfied... total When ), the iteration process ends;

[0011] ΔV is the difference in votes between the SMT solver with the most votes and the second-place solver;

[0012] α is the adaptive coefficient;

[0013] M is the maximum possible number of votes;

[0014] V total This is the current number of votes cast.

[0015] Furthermore, the pairwise comparison model for training the SMT solver for each logic type includes:

[0016] Create an N × N classifier matrix to store a comparison classifier for each pair of solvers;

[0017] For each SMT file of this logical type, initialize the voting counter;

[0018] Iterate through all solver pairs and predict the solution time of the two solvers for each SMT file, and generate corresponding binary classification labels to train the corresponding comparison classifiers so that each comparison classifier can determine whether one of the corresponding solver pairs is faster than the other for each logic type of SMT file. The voting counter counts the votes for the faster solver in the solver pair.

[0019] Furthermore, the upper triangular portion of the classifier matrix stores a comparison classifier for each pair of solvers, while the remaining portion is empty.

[0020] Furthermore, a lightweight machine learning model is used to evaluate the performance or score of each SMT solver based on the numerical feature vector of the SMT problem to be solved, and the SMT solvers are pre-selected in descending order of performance or score.

[0021] Furthermore, the number of solvers in the candidate solver set is k = log2N + 3.

[0022] Furthermore, the features of the numerical feature vector include syntactic features and structural features.

[0023] Furthermore, the logic type includes at least one of quantized free linear integer arithmetic, quantized free bit vector, quantized free array, and linear real number arithmetic.

[0024] The SMT solver selection system based on a voting mechanism and pairwise classification proposed in this invention includes: a pre-selection module and a final selection module;

[0025] The pre-selection module is used to pre-select SMT solvers for the SMT problem to be solved corresponding to the circuit design, and forms a set of candidate solvers;

[0026] The final selection module selects the corresponding pairwise comparison model from the pre-trained model based on the logic type of the SMT problem to be solved. When performing pairwise comparison iterations for each pair of candidate solvers, the SMT solver with the most votes is selected as the solver for the SMT problem to be solved.

[0027] This invention proposes a computer storage medium for storing computer programs, which, when running, execute the above-mentioned technical solution's method for selecting SMT solvers based on a voting mechanism and pairwise classification.

[0028] This invention automatically learns the relationship between benchmark features and solver performance, and automatically selects the optimal solver based on the learning results, thereby improving solving efficiency. The automatic selection of the optimal solver through a machine learning model enhances the ability to handle large-scale instances. Simultaneously, this invention pioneers a sub-logic modeling mechanism, effectively solving the adaptation problem of different theoretical logics (QF_BV, AUFLIA, etc.). It can automatically adapt to new solvers and problem types without redesigning selection rules, supporting cross-domain applications and adapting to scenarios such as hardware verification and software testing. Furthermore, the outlier handling mechanism (3x time truncation) reduces the impact of noisy data, improving model robustness, and the logarithmic transformation technique makes the data distribution more consistent with model assumptions, automatically avoiding invalid solution attempts. During model training, this invention also employs cross-validation to ensure that results are of equal significance, and the technology can be seamlessly integrated into existing EDA toolchains, supporting automated processes from RTL to SMT verification and solving the problem of intelligent scheduling of SMT solvers. Attached Figure Description

[0029] The present invention will now be described in detail with reference to the embodiments and accompanying drawings, wherein:

[0030] Figure 1 This is a flowchart of an embodiment of the present invention.

[0031] Figure 2 This is a flowchart of numerical feature vector extraction according to an embodiment of the present invention.

[0032] Figure 3This is a flowchart of the pairwise comparison model training process according to an embodiment of the present invention.

[0033] Figure 4 This is a flowchart of the solver pair traversal according to an embodiment of the present invention.

[0034] Figure 5 This is a system processing flowchart of an embodiment of the present invention.

[0035] Figure 6 This is a flowchart of the prediction process for the final selection module according to an embodiment of the present invention. Detailed Implementation

[0036] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only for explaining the present invention and are not intended to limit the present invention.

[0037] Therefore, a feature pointed out in this specification is used to describe one feature of one embodiment of the invention, and does not imply that every embodiment of the invention must have the described feature. Furthermore, it should be noted that this specification describes many features. Although certain features may be combined to illustrate possible system designs, these features may also be used in other combinations not explicitly stated. Therefore, unless otherwise stated, the described combinations are not intended to be limiting.

[0038] As circuits become increasingly larger, the number of SMT (Surface Mount Technology) instances is also enormous. Since the solution time for the same problem varies significantly across different solvers, finding a suitable solver for each SMT instance is a very time-consuming task. Relying solely on experience for selection is inaccurate and can lead to large differences in solution time for SMT problems in large-scale circuit designs. To quickly find a suitable SMT solver, this invention provides an intelligent SMT solver selection method based on a hierarchical voting mechanism and pairwise classification. In a basic embodiment, this invention's pairwise classification SMT solver selection method based on a voting mechanism mainly includes the following steps.

[0039] like Figure 1 As shown, the logic types of SMT problems are classified in advance, and a pairwise comparison model of the SMT solver is trained for each logic type. Each pairwise comparison model outputs the voting results of the SMT solver for the corresponding logic type.

[0040] Pre-select SMT solvers for the SMT problem to be solved corresponding to the circuit design, and form a set of candidate solvers;

[0041] Based on the logic type of the SMT problem to be solved, the corresponding pairwise comparison model is selected to perform pairwise comparison iterations of every two solvers in the candidate solver set, and the SMT solver with the most votes is selected as the solver for the SMT problem to be solved.

[0042] This invention employs a two-step process to select a suitable SMT solver. First, all SMT solvers are pre-selected to avoid the inefficiency of pairwise comparisons. This pre-selection is a rough selection, using experience or quick selection methods to eliminate obviously unsuitable solvers, thus reducing the number of solvers compared in pairs and improving selection efficiency. Second, the selected solvers are compared pairwise using a trained pairwise comparison model. The SMT solver with the most votes is chosen as the most suitable solver, improving both the efficiency of solver selection and the overall solution efficiency for large-scale SMT problems.

[0043] When using a pairwise comparison model for pairwise comparison iteration, assuming 10 solvers are selected from the candidate solver set, the pairwise comparison model can compare all 10 solvers pairwise to obtain the SMT solver with the most votes. However, when the number of solvers in the candidate solver set is large, comparing all pairwise solvers will obviously affect the solver selection efficiency. Therefore, in a preferred embodiment, during the pairwise comparison iteration process, the present invention checks the voting results every n times, and when ΔV > α√(M – V) is satisfied... total When n reaches n, the iteration process ends; the value of n depends on the number of solvers in the candidate solver set.

[0044] ΔV is the difference in votes between the SMT solver with the most votes and the second-place solver;

[0045] α is an adaptive coefficient that can be adjusted as needed by those skilled in the art; for example, 0.5 ≤ α ≤ 2.0. This range covers typical scenarios, and those skilled in the art can adjust the value of α experimentally according to the actual application (such as problem complexity or the number of solvers). For example, in scenarios requiring high accuracy, α can be set to 1.5; in scenarios prioritizing efficiency, α can be set to 0.8.

[0046] When α < 1.0, a smaller α makes termination easier (i.e., ending the iteration earlier), which may improve efficiency but reduce accuracy. When α > 1.0, a larger α (e.g., > 1.0) makes termination more stringent, which may improve accuracy but increase computational cost. Therefore, α is a key parameter for balancing efficiency and accuracy. In a preferred embodiment, the value of α in this invention is 0.8 ≤ α ≤ 1.2.

[0047] M is the maximum possible number of votes, M≤N-1.

[0048] V total This is the current number of votes cast.

[0049] In this embodiment, when the vote difference between the first and second place reaches the corresponding threshold, the iterative comparison of the remaining solver pairs will end, so as to improve the selection efficiency of the solvers.

[0050] like Figure 3 As shown, in one specific embodiment, training a pairwise comparison model for the SMT solver for each logic type includes the following steps.

[0051] Collect numerical feature vectors of historical SMT problems;

[0052] For the current pairwise comparison model, create an N × N classifier matrix; N is the number of all solvers.

[0053] For each historical SMT file or historical SMT issue of this logic type, initialize the voting counter. Here, the historical SMT file is the SMT file used for testing, that is, the SMT issue used for testing. A standard SMT file usually contains only one SMT issue.

[0054] like Figure 4 As shown, all solver pairs are traversed, and based on the numerical feature vectors of historical SMT problems, the solution time of the two solvers for each historical SMT problem is predicted, and corresponding binary classification labels are generated. The solver's binary classification labels are used to train the corresponding comparison classifier, so that each comparison classifier can determine whether one of the corresponding solver pairs is faster than the other for each logical type of historical SMT problem. A voting counter counts the votes for the faster solver in the solver pair.

[0055] This embodiment uses a matrix to store multiple comparison classifiers. Each comparison classifier is trained based on historical data to learn the relative performance relationship of each pair of solvers in handling a corresponding type of SMT problem, so as to quickly select a suitable SMT solver in the future.

[0056] The training process employed cross-validation to ensure the generalization ability and statistical significance of the lightweight machine learning model in the pairwise comparison model and the pre-selected modules.

[0057] When training the pairwise comparison model for each logic type, we use a historical SMT problem instance dataset. This dataset is randomly partitioned into multiple subsets (e.g., k-fold cross-validation) for training and validating each binary classifier (i.e., the comparison classifier). For example, when training the comparison classifier for solvers i and j, we use cross-validation to tune model parameters (e.g., the depth of the decision tree) and evaluate the model's accuracy on unseen data, thus ensuring the robustness of the model's predictions. This avoids overfitting and guarantees that the performance differences between different solvers are statistically significant.

[0058] When selecting the corresponding pairwise comparison model to perform pairwise comparison iterations for each pair of solvers in the candidate solver set, the specific processing procedure is similar to that during training.

[0059] Based on the number of solvers in the candidate solver set, a matrix of corresponding size is initialized. The matrix stores the comparison classifier corresponding to each solver pair. The trained comparison classifier is used to quickly determine whether solver i is faster than solver j in each pair of solvers, and a vote is taken for the faster solver. When the voting results are checked every n times, if the vote difference between the current first and second place meets the corresponding threshold, the iteration process ends and the solver with the most votes is selected as the solver for the corresponding SMT problem.

[0060] In a further embodiment, the upper triangular portion of the classifier matrix stores one comparison classifier for each pair of solvers, while the remaining portion is empty. That is, the classifier matrix is ​​only filled with the upper triangular portion to avoid repeated comparisons and ensure the efficiency of solver selection.

[0061] In one embodiment, a lightweight machine learning model is used to evaluate the performance or score of each SMT solver based on the numerical feature vector of the SMT problem to be solved, and the SMT solvers are pre-selected in descending order of performance or score.

[0062] Lightweight machine learning models refer to learning models with fewer parameters and lower computational complexity than the corresponding preset values. In other words, lightweight machine learning models have low computational resource requirements, fast processing speed, and can quickly output corresponding results to achieve rapid coarse selection of SMT solvers in the initial stage.

[0063] When training lightweight machine learning models, this invention also employs cross-validation to optimize model hyperparameters, ensuring the reliability of their scores or rankings. The cross-validation results are used to select the optimal model configuration, thereby improving the accuracy of the pre-selection stage.

[0064] In one specific embodiment, the number of solvers in the candidate solver set is k = log₂N + c, where c is an integer constant and its value ranges from 1 to 5. c can be dynamically adjusted according to the total number of solvers N and the characteristics of the problem. For example, when N is large, c takes a smaller value (such as 1) to control the size of the candidate set; when N is small, c takes a larger value (such as 5) to retain more candidate solvers.

[0065] This formula ensures that the candidate set size is proportional to the logarithm of N, avoiding a candidate set that is too large (affecting efficiency) or too small (affecting accuracy). Experiments show that c in the range of 1 to 5 can cover most application scenarios.

[0066] The logical types of SMT problems referred to in the above technical solutions of this invention include at least one of quantized free linear integer arithmetic, quantized free bit vectors, quantized free arrays, and linear real number arithmetic.

[0067] like Figure 5 As shown, the SMT solver selection system based on a voting mechanism and paired classification proposed in this invention corresponds to the above-mentioned SMT solver selection method based on a voting mechanism and paired classification, and includes a pre-selection module and a final selection module.

[0068] The pre-selection module pre-selects SMT solvers for the SMT problem to be solved corresponding to the circuit design, and forms a set of candidate solvers;

[0069] like Figure 6 As shown, the final selection module selects the corresponding pairwise comparison model from the pre-trained model based on the logic type of the SMT problem to be solved. When performing pairwise comparison iterations for each pair of candidate solvers for each solver pair, the SMT solver with the most votes is selected as the solver for the SMT problem to be solved.

[0070] Whether it's a pre-selection module or a final selection module, each module provides standardized input / output interfaces, such as REST APIs, command-line tools, or dynamic link libraries. EDA tools (such as formal verification tools) simply need to pass the SMT problem instance to the voting-based pairwise classification SMT solver selection system of this invention through the standardized input / output interfaces and receive the returned name of the optimal solver.

[0071] The pairwise classification SMT solver selection system based on voting mechanism of the present invention supports the standard SMT-LIB format as input, which is consistent with the SMT problem format generated by mainstream EDA tools and requires no additional conversion.

[0072] In actual integration, the system of the present invention can be integrated into the EDA tool simply by calling the pre-selected module and final selection module of the system of the present invention in the EDA tool, without modifying the core code of the EDA tool.

[0073] Since the system of this invention is independent and relies on a general machine learning framework (such as TensorFlow), the integration process mainly involves configuration and interface calls, without involving modification of the underlying algorithm. Therefore, the technical difficulty is controllable and it is suitable for large-scale deployment.

[0074] A preferred embodiment of the present invention is described below.

[0075] First, the SMT problem is transformed into a numerical feature vector that can be processed by machine learning. Numerical features are a set of numerical features extracted from SMT problem instances and used as input to machine learning models. Obtaining the numerical feature vector of the SMT problem aims to capture its essential properties to differentiate the performance of different solvers. Numerical features include, but are not limited to, the syntactic and structural features listed below.

[0076] Syntactic features include the number and type of operators (such as arithmetic operators, logical operators, comparison operators), the number of variables (free variables and bound variables), the number of clauses, the number of assertions, etc. in SMT problems.

[0077] Structural features include the size of the SMT problem (e.g., number of characters, number of tokens, depth of the abstract syntax tree), the complexity of the dependency graph (e.g., number of nodes, number of edges), and the nesting depth.

[0078] These numerical features were extracted through static analysis of the SMT problem file and transformed into fixed-length numerical vectors for input into the machine learning model. The feature extraction process can be found in [reference needed]. Figure 2 The SMT problem is parsed, and then the corresponding features are extracted and transformed into corresponding numerical feature vectors. This process includes steps such as parsing, feature calculation and normalization.

[0079] Next, a pairwise comparison model is trained.

[0080] Create an N × N classifier matrix, where N = the number of solvers;

[0081] The solver fills only the upper triangular portion of the classifier matrix for the corresponding comparison classifier to avoid redundant comparisons. Each cell (i, j) of the classifier matrix, where i < j in this embodiment, stores a binary classifier model (i.e., a comparison classifier) ​​to predict whether solver i is faster than solver j. During the training phase, these comparison classifiers are trained based on historical data, and each comparison classifier learns the relative performance relationship between solvers i and j.

[0082] For each pair of solvers (i,j), generate a binary label that is used to mark whether solver i is faster than solver j in the solution of the SMT file.

[0083] The training process for the comparison classifier to predict whether "solver i is faster than solver j" is as follows.

[0084] Initialize the voting counter for each SMT file;

[0085] Iterate through all solver pairs in the classifier matrix, such as Figure 2 As shown.

[0086] Each comparison classifier has a corresponding vote. The comparison classifier predicts whether solver i is faster than solver j. The winner gets 1 vote.

[0087] Then, the total number of votes is counted, and ideally, the solver with the most votes is selected.

[0088] The training process described above can create dedicated pairwise comparison models for each logic type, and automatically select the corresponding model based on the logic type of the SMT problem.

[0089] Pairwise classification matrices focus only on relative order rather than absolute time values. That is, each classifier in a pairwise comparison model only predicts which of the two solvers is faster (i.e., the relative order), without predicting the specific solution time values ​​of each solver. This simplifies model training because relative order is easier to learn than absolute time and is more robust to noise.

[0090] During the prediction phase, when a new SMT problem is input, the comparison classifiers in the corresponding classifier matrix are activated to perform pairwise comparisons. Each comparison generates a vote (the winner gets 1 vote), and the number of votes is recorded in real time in a separate vote counter (non-matrix structure).

[0091] Therefore, the pairwise classification matrix is ​​a storage container for comparing classifier models, while the vote count is a dynamic temporary variable.

[0092] The binary classification labels in the above technical solution are Boolean labels defined for each SMT problem instance and each pair of solvers (i,j), which are used to train the comparison classifier.

[0093] The binary label is defined as follows: for a given SMT problem instance, based on the actual solution time, when the label is 1 (true), the solution time of solver i is less than the solution time of solver j (i.e., i is faster than j), otherwise it is 0 (false). It is a binary classification based on relative performance.

[0094] For each comparison classifier, i.e., for each pair of solvers (i,j), a binary classifier (such as a support vector machine, decision tree, etc.) is trained using the feature vectors and corresponding labels of historical SMT problem instances. This comparison classifier predicts whether "solver i is faster than solver j".

[0095] In the application phase, for a new SMT problem, all comparison classifiers (i.e., the upper triangular part of the matrix) are traversed. After each comparison classifier makes a prediction, the winning solver receives 1 vote. The voting results are accumulated in a voting counter, and finally, the solver with the most votes is selected.

[0096] The aforementioned technical solution mentions that "a dedicated pairwise ranking comparison model can be created for each logic type." The logic type refers to the theoretical logic to which the SMT problem belongs, such as:

[0097] QF_LIA (Quantization-free linear integer arithmetic);

[0098] QF_BV (quantized free bit vector);

[0099] QF_ARR (quantized free array);

[0100] LRA (Linear Real Arithmetic).

[0101] For different logic types, independent pairwise classification models are trained because the solver performance characteristics can vary greatly under different logic types. The selection of pairwise classification models is automatically triggered based on the logic type of the input problem.

[0102] In the specific application stage, the numerical feature vector of the SMT problem instance is first input into the pre-selected module.

[0103] The pre-selection module activates a lightweight machine learning model for prediction. This lightweight machine learning model can be, for example, LightGBM for rapid classification. This is a significant difference between this invention and existing technologies, which may involve directly using a single model to select the solver, but lack the hierarchical selection mechanism of this invention. The role of the pre-selection module is to quickly narrow down the set of candidate solvers, thereby reducing the computational cost of subsequent pairwise comparisons.

[0104] like Figure 5 As shown, the numerical feature vectors of SMT problem instances are first input into a pre-selection module. This pre-selection module uses a lightweight machine learning model (such as LightGBM, random forest, or simple neural network) to make fast predictions and outputs a preliminary score or ranking for each solver.

[0105] Lightweight machine learning models, compared to pairwise classification models, are independent models (such as multi-class or regression models). They directly predict the solver's performance probability or score based on problem features, resulting in faster response times. Lightweight machine learning models are trained using historical data to efficiently estimate solver performance, prioritizing prediction speed over accuracy. For example, LightGBM is often used for such tasks due to its efficiency. Then, top-k candidate solvers (k = log2N + 3, where N is the total number of solvers) are selected and passed to the final selection module, which contains the pairwise comparison model. The pre-selection module quickly filters using lightweight models, avoiding full pairwise comparisons and improving overall efficiency, while the final selection module improves the accuracy of solver selection. Both are key components of the hierarchical voting mechanism.

[0106] The specific process is described below.

[0107] The pre-selection module performs fast prediction to select the top-k candidate solvers set, k = log2N +3 (N is the total number of solvers), and then passes the candidate solvers set to the final selection module.

[0108] The final selection module activates a pairwise comparison loop. In each loop iteration, it loads the comparison classifier for a specific solver pair, performs binary classification prediction, increments the vote of the winning solver by 1, and checks the dynamic termination condition in real time. The termination condition is checked once every n votes, for example, once every 5 votes.

[0109] The iterative loop terminates early when the leading vote difference ΔV exceeds a threshold. That is, ΔV > α√(M – V) total When ΔV = 0, the iteration process terminates. Here, ΔV is the vote difference between the current leader and the second-place finisher. α is an adaptive coefficient, ranging from 0.8 to 1.2, used to adjust threshold sensitivity. M is the maximum possible number of votes, and V... total This represents the current number of votes cast. This early termination condition ensures that when the vote difference is large enough, the optimal solver can be reliably selected even if not all pairwise comparisons have been completed, thus improving computational efficiency.

[0110] It's important to note that M represents the maximum number of votes a solver can obtain in a full voting scenario (all pairwise comparisons are performed). Assume there are N solvers, each performing pairwise comparisons with the other N-1 solvers. However, the pairwise classification matrix only contains the upper triangular portion (i.e., the number of comparisons is C(N,2) = N(N-1) / 2), with one vote cast for each comparison. Therefore, each solver can obtain at most N-1 votes (i.e., win all comparisons with the other N-1 solvers). Hence, M = N-1, where N is the total number of solvers. In dynamic termination discrimination, M is used as a reference value to calculate the threshold. It can be set to a pre-known constant, specifically determined by the size of the solver set, such as the size of the candidate solver set or the size of the solver set during the training phase.

[0111] The final selection module returns the optimal solver, and the SMT problem instance obtains the final selection result.

[0112] This invention also protects a computer storage medium for storing a computer program, which, when running, executes the above-described method for selecting a pairwise SMT solver based on a voting mechanism.

[0113] The numerical feature vectors of the SMT problem in this invention are applied to both the pre-selection module and the final selection module, that is, simultaneously to the lightweight machine learning model and the pairwise comparison model. Both the lightweight model of the pre-selection module and the pairwise comparison model of the final selection module use the same numerical feature vectors as input. These features include syntactic features (such as operator type and number of variables) and structural features (such as AST depth and graph complexity), extracted through static analysis of the SMT problem file and normalized into fixed-length vectors.

[0114] However, the model design and mechanism of the two modules are significantly different.

[0115] Lightweight models (such as LightGBM) are single models that output a performance score or probability for each solver, and then select the top-k candidates based on the scores. They focus on absolute performance estimation.

[0116] The pairwise comparison model consists of multiple binary classifiers (one solver per classifier), each classifier outputs a binary result (whether solver i is faster than j), and the optimal solver is determined through a voting mechanism. It focuses on relative performance comparison.

[0117] The voting mechanism is the core of the pairwise comparison model, which dynamically selects the winner by accumulating votes, while the lightweight model has no voting mechanism.

[0118] Pairwise comparison models are trained for specific logic types and are more refined; lightweight models may be more general but have lower accuracy.

[0119] Pairwise comparison models are generally more accurate, but computationally more expensive (requiring multiple binary classification predictions), so they are only used for final selection; lightweight models are more efficient and are used for preliminary screening.

[0120] Therefore, although they share feature vectors, their model structures, outputs, and decision-making mechanisms differ, forming a hierarchical selection process that balances efficiency and accuracy.

[0121] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for selecting an SMT solver based on pairwise classification using a voting mechanism, characterized in that, include: The logic types of SMT problems are pre-classified, and a pairwise comparison model of the SMT solver is trained for each logic type. Each pairwise comparison model outputs the voting results of the SMT solver for the corresponding logic type. Pre-select SMT solvers for the SMT problem to be solved corresponding to the circuit design, and form a set of candidate solvers; Based on the logic type of the SMT problem to be solved, the corresponding pairwise comparison model is selected. When performing pairwise comparison iterations for every two solvers in the candidate solver set for each solver pair, the SMT solver with the most votes is selected as the solver for the SMT problem to be solved.

2. The method for selecting SMT solvers based on pairwise classification using a voting mechanism as described in claim 1, characterized in that, During the pairwise comparison iteration, the voting results are checked every n times. The condition ΔV > α√(M – V) is met. total When ), the iteration process ends; ΔV is the difference in votes between the SMT solver with the most votes and the second-place solver; α is the adaptive coefficient; M is the maximum possible number of votes; V total This is the current number of votes cast.

3. The method for selecting SMT solvers based on pairwise classification using a voting mechanism as described in claim 1, characterized in that, The pairwise comparison models for training the SMT solver for each logic type include: Collect numerical feature vectors of historical SMT problems; Create an N × N classifier matrix to store a comparison classifier for each pair of solvers; For each historical SMT problem of this logic type, initialize the voting counter; Iterate through all solver pairs and, based on the numerical feature vectors of historical SMT problems, predict the solution time of the two solvers for each historical SMT problem, and generate corresponding binary classification labels for training the corresponding comparison classifiers. This ensures that each comparison classifier can determine whether one of the solver pairs is faster than the other for each logic type of historical SMT problem. The voting counter counts the votes for the faster solver in the solver pair.

4. The method for selecting SMT solvers based on pairwise classification using a voting mechanism as described in claim 3, characterized in that, The upper triangular part of the classifier matrix stores a comparison classifier for each pair of solvers, and the remaining part is empty.

5. The method for selecting SMT solvers based on pairwise classification using a voting mechanism as described in claim 1, characterized in that, A lightweight machine learning model is used to evaluate the performance or score of each SMT solver based on the numerical feature vector of the SMT problem to be solved, and the SMT solvers are pre-selected in descending order of performance or score.

6. The method for selecting SMT solvers based on pairwise classification using a voting mechanism as described in claim 5, characterized in that, The number of solvers in the candidate solver set is k = log2N + 3.

7. The method for selecting SMT solvers based on pairwise classification using a voting mechanism as described in claim 3 or 5, characterized in that, The features of the numerical feature vector include syntactic features and structural features.

8. The method for selecting SMT solvers based on pairwise classification using a voting mechanism as described in claim 1, characterized in that, The logical type includes at least one of quantized free linear integer arithmetic, quantized free bit vector, quantized free array, and linear real number arithmetic.

9. A selection system for SMT solvers based on a pairwise classification system using a voting mechanism, characterized in that, include: Pre-selected modules and final selection modules; The pre-selection module is used to pre-select SMT solvers for the SMT problem to be solved corresponding to the circuit design, and forms a set of candidate solvers; The final selection module selects the corresponding pairwise comparison model from the pre-trained model based on the logic type of the SMT problem to be solved. When performing pairwise comparison iterations for each pair of candidate solvers, the SMT solver with the most votes is selected as the solver for the SMT problem to be solved.

10. A computer storage medium for storing computer programs, characterized in that, When the computer program runs, it executes the method for selecting SMT solvers based on a pairwise classification voting mechanism as described in any one of claims 1 to 8.