IGBT cellular structure for optimizing trade-off relation between turn-off loss and turn-off overvoltage

Abstract

The invention provides an IGBT cellular structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage. The section of a substrate or epitaxy sequentially comprises a collector electrode, a collector region, a field stop layer, a drift region, a highly-doped carrier storage layer and a base region layer from bottom to top; the upper surface of the substrate or the epitaxy is an emitter of the IGBT cell; a plurality of parallel U-shaped grooves are formed in the substrate or the epitaxy to form an active groove gate and an emitter groove gate; n + emitter regions are arranged in the base region layer on the two sides of the active trench gate, and the injection depth of the N + emitter regions does not exceed the base region layer; the N + emitter region is also provided with a contact hole penetrating through the N + emitter region, and the N + emitter region at the two sides of the active trench gate is led to an emitter on the surface of the substrate or the epitaxy; the base region layer between the emitter trench gates is in a floating state to form a floating P-type region; according to the structure, Miller capacitance can be reduced, the turn-off speed of the device is improved, turn-off loss is reduced, and VCESAT increase caused by reduction of the proportion of the active trench gate is optimized on the premise that breakdown voltage is not reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor power devices, mainly IGBT devices, and particularly relates to an IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage of an insulated gate bipolar transistor. BACKGROUND

[0002] An insulated gate bipolar transistor (IGBT) is a semiconductor power electronic device that combines the gate electrode voltage control characteristics of a metal-oxide-semiconductor field-effect transistor (MOSFET) and the Darlington structure of a bipolar junction transistor (BJT), and has the characteristics of voltage control, large input impedance, small driving power, small on-resistance, low switching loss, and high operating frequency. It is an ideal semiconductor power switching device, and has a wide development and application prospect. The switching frequency is between 10K and 100K hertz, and it is a core switching device of an energy conversion system such as an electric vehicle drive inverter. In the function of an IGBT power device, the speed of switching and the corresponding switching loss are important indicators for evaluating the performance of an IGBT.

[0003] The turn-off characteristics directly determine the efficiency and reliability of the system. During the turn-off process, due to the existence of parasitic inductance in the circuit, the rapidly changing current (di / dt) will generate a turn-off overvoltage spike, which threatens the safety of the device. Traditionally, the voltage spike can be suppressed by increasing the gate turn-off resistance, but this will inevitably increase the switching loss.

[0004] Some advanced micro-groove IGBT structures exhibit a non-monotonic turn-off characteristic: when the turn-off resistance is reduced to a certain critical value, further reducing the resistance will actually reduce the turn-off overvoltage. Working in this "non-monotonic region" is expected to achieve the ideal combination of low loss and low voltage stress. However, the non-monotonic region of existing micro-groove IGBTs is very narrow, and usually only appears at very low turn-off resistance, at which the corresponding turn-off overvoltage is still much higher than the safety limit, limiting its practical application. Therefore, how to widen the non-monotonic region so that it takes effect in a more practical turn-off resistance range and further reduces the absolute value of the overvoltage has become a technical problem to be solved in the field. SUMMARY

[0005] The present application provides an IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage, which aims to widen the turn-off resistance range in which the turn-off resistance decreases and the turn-off overvoltage spike decreases, while reducing the size of the turn-off overvoltage spike, and optimizing the trade-off characteristics of low loss and low voltage stress of IGBT turn-off dynamic characteristics.

[0006] To address the aforementioned issues, the IGBT cell structure of this invention, which optimizes the trade-off relationship between turn-off loss and turn-off overvoltage, comprises, from bottom to top, a collector, a collector region, a field blocking layer, a drift region, a highly doped carrier storage layer, and a base region layer in a cross-section within a substrate or epitaxial layer; the upper surface of the substrate or epitaxial layer serves as the emitter of the IGBT cell. There are multiple parallel U-shaped trenches in the substrate or epitaxial layer, and the U-shaped trenches include active trench gates and emitter trench gates; the multiple U-shaped trenches extend downward from the substrate or epitaxial surface through the base region layer and the carrier storage layer. The active trench gate has N+ emitter regions in the base layers on both sides, and the implantation depth of the N+ emitter regions does not exceed the base layer. The N+ emitter regions also have contact holes that penetrate the N+ emitter regions, leading the N+ emitter regions on both sides of the active trench gate to emitters on the substrate or epitaxial surface. The base layer between the emitter trench gates is in a floating state, forming a floating P-type region.

[0007] Preferably, the current collector region is a heavily doped P-type region, and the field blocking layer is a heavily doped N-type region.

[0008] Preferably, the multiple U-shaped trenches have the same structure, wherein the ratio of the number of active trench gates to emitter trench gates is 2:4.

[0009] Preferably, the active trench gates are adjacent, and the emitter trench gates are symmetrically arranged on both sides of the adjacent active trench gates.

[0010] Preferably, a floating P-type region is provided between the emitter trench gates, and P-type base regions are provided on both sides of the active trench gate.

[0011] Preferably, the base region layer depth is 1.5 μm.

[0012] Preferably, the P-type base regions on both sides of the active trench gate and the floating P-type regions are injected simultaneously in the same process, without the need for additional process steps or layout.

[0013] Preferably, the emitter trench gate is connected to the emitter to reduce the Miller capacitance of the device.

[0014] Preferably, the floating P-type region between the emitter trench gate can reduce the saturation voltage drop V between the collector and emitter. CESAT .

[0015] The IGBT cell structure described in this invention optimizes the trade-off between turn-off loss and turn-off overvoltage. By replacing the active trench gate with an emitter trench gate portion, the Miller capacitance is reduced, the turn-off speed is increased, and the turn-off loss is reduced by decreasing the gate area. Simultaneously, by employing a rationally distributed floating P-type region instead of increasing the carrier storage layer doping concentration, the conduction characteristics of the device are optimized. This optimizes the Vo caused by reducing the proportion of the active trench gate without causing a drop in breakdown voltage. CESAT Increase. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a cross-sectional view of the IGBT cell structure of the present invention, which improves the trade-off relationship between turn-off loss and turn-off overvoltage.

[0018] Figure 2 This is a comparison curve of the turn-off overshoot voltage between the IGBT device of the present invention, which improves the trade-off relationship between turn-off loss and turn-off overvoltage, and the traditional micro-trench IGBT device.

[0019] Figure 3 This is a comparison curve of the trade-off relationship between turn-off overshoot voltage and turn-off loss between the IGBT device of the present invention, which improves the trade-off relationship between turn-off loss and turn-off overvoltage, and the traditional micro-trench IGBT device. Detailed Implementation

[0020] The following detailed description, in conjunction with the accompanying drawings, provides specific embodiments of the present invention and clearly and completely describes the technical solutions of the present invention. However, the present invention is not limited to the following embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise ratios, and are only used for the purpose of conveniently and clearly illustrating the embodiments of the present invention. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] It should be understood that the present invention can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated, and the same reference numerals denote the same elements throughout. It should be understood that when an element or layer is referred to as “on,” “adjacent to,” “connected to,” or “coupled to” other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as “directly on,” “directly adjacent to,” “directly connected to,” or “directly coupled to” other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, or part discussed below may be referred to as the second element, component, region, layer, or part.

[0022] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below with reference to specific illustrations.

[0023] Reducing the turn-off resistance of IGBTs can improve the device's turn-off speed and reduce turn-off losses. However, due to the influence of external parasitic stray inductance, reducing the turn-off resistance will increase the turn-off overshoot voltage, threatening device safety.

[0024] To address the aforementioned technical problems, this invention provides an IGBT cell structure that improves the trade-off between turn-off loss and turn-off overvoltage. From bottom to top, it includes a collector, a collector region, a field-blocking layer, a drift region, a highly doped carrier storage layer, and a P-type base region. An active trench gate and an emitter trench gate penetrate the base region and the carrier storage layer. An N-type emitter region is formed on the upper part of the P-type base region, located on both sides of the active trench gate. The emitter covers the device surface. A floating P-type region is formed on the side of the emitter trench gate without an emitter region.

[0025] Specifically, in one embodiment, please refer to Figure 1The diagram shows a specific cross-sectional structure based on the principles of this invention. The device of this invention, from bottom to top, includes a collector 100, a P+ collector region 101, an N+ field blocking layer 102, an N- drift region 103, an N-type carrier storage layer 104, a P-type base region layer 105, an active trench gate 106, and an emitter trench gate 107 penetrating the P-type base region 105 and the N-type carrier storage layer 104. An N+ emitter region 108 is formed on the upper part of the P-type base region 105, located on both sides of the trench gate 106. A floating P-type region 109 is formed between the emitter trench gates. An emitter 110 covers the device surface.

[0026] In a preferred embodiment, the ratio of active trench gates to emitter trench gates is 2:4, and the two active trench gates are adjacent, as are the four emitter trench gates. Figure 1 As shown, the N-drift region 103 has six parallel U-shaped trenches on its front side, namely the active trench gate 106 and the emitter trench gate 107. Figure 1 In the middle, the third and fourth U-shaped trenches are active trench gates (G) 106, which are connected to the gate. The parasitic capacitance Cgc formed between the active trench gate 106 and the collector 100 constitutes the Miller capacitance (Cres). The first, second, fifth, and sixth U-shaped trenches are emitter trench gates (E) 107. These emitter trench gates are connected to the emitter, which changes Cgc, which should constitute the Miller capacitance, to Cge, thereby reducing the Miller capacitance Cres of the device, improving the capacitance structure of the device, and reducing turn-off losses.

[0027] This structure utilizes the emitter trench gate portion to replace the active trench gate. By reducing the gate area, Miller capacitance can be reduced, the turn-off speed of the device can be improved, and turn-off losses can be reduced. However, it will affect other static parameters of the device to some extent. For example, reducing the proportion of the active trench gate will increase the saturation voltage drop V between the collector and emitter. CESAT Increase. In IGBT structures with a carrier storage layer, when the device operates in blocking mode, the applied collector voltage is almost entirely borne by the PN junction formed by the reverse-biased N-type carrier storage layer and the P-type base region (cs-base). Therefore, to ensure that the device breakdown voltage does not decrease, the doping concentration of the carrier storage layer in IGBTs with a carrier storage layer must be strictly limited. In the IGBT device of this invention that improves the trade-off relationship between turn-off loss and turn-off overvoltage, the conduction characteristics of the device are optimized by using a reasonably distributed floating P-type region instead of increasing the doping concentration of the carrier storage layer. Therefore, the doping concentration of the carrier storage layer in the structure of this invention can be basically consistent with the doping concentration of the carrier storage layer in existing structures, generally 1e15~1e16CM. -3No additional adjustments are required. The reduction in the proportion of active trench gates optimizes V without causing a drop in breakdown voltage. CESAT Increase.

[0028] For an IGBT device with an emitter trench gate replacing the active trench gate, and the ratio of active trench gate to emitter trench gate is 2:4, compared to an IGBT device without an emitter trench gate, its V CESAT It will increase by 10%; while in IGBT devices with emitter trench gates instead of active trench gates, and with an active trench gate to emitter trench gate ratio of 2:4, after adding a floating P-type region between the emitter trench gates, V CESAT It can reduce the impact by 11%, which can completely compensate for the reduction of active trench gates.

[0029] The P-type base region 105 and the floating P-type region 109 have the same depth, with a junction depth of 1.5 μm. The P-type base region and the floating P-type region can be implanted simultaneously in the same process without the need for additional process steps or layout.

[0030] Figure 2 This presentation shows a comparison of turn-off overshoot voltage curves between an IGBT device with a floating P-type emitter trench gate replacing part of the active trench gate and a conventional micro-trench IGBT device. Both the conventional micro-trench IGBT device and the IGBT device of this invention with a floating P-type emitter trench gate replacing part of the active trench gate exhibit a non-monotonic characteristic of the turn-off overshoot voltage decreasing with the turn-off resistance. Before the turn-off overshoot voltage inflection point, the magnitude of the turn-off resistance determines the turn-off speed of the IGBT device; the smaller the turn-off resistance, the faster the IGBT turn-off speed, exhibiting a larger di / dtoff. This results in a larger overshoot voltage due to the influence of external stray inductance. After the turn-off overshoot voltage inflection point, the smaller the turn-off resistance, the smaller the overshoot voltage, eventually stabilizing at a fixed value. This is because, under very small turn-off resistance conditions, during carrier extraction, the gate voltage has already dropped below the threshold voltage, at which point no carriers are replenished into the IGBT device through the front channel. During the turn-off process, the number of carriers that need to be extracted is reduced, which can decrease di / dtoff and suppress the overshoot voltage generated during the turn-off process.

[0031] Traditional IGBT devices exhibit a turn-off overshoot voltage inflection point when the turn-off resistance is less than 4 ohms. However, IGBT devices with a floating P-type emitter trench gate replacing part of the active trench gate significantly widen the self-controlled turn-off operating region, with an overshoot voltage inflection point appearing even at a turn-off resistance of 10 ohms. The appearance of the overshoot voltage inflection point indicates that the gate voltage has dropped below the threshold voltage during carrier extraction. Therefore, the overshoot voltage inflection point occurring at a larger turn-off resistance indicates a faster turn-off speed. IGBT devices with an emitter trench gate replacing part of the active trench gate have a faster turn-off speed due to the reduced Miller capacitance. Furthermore, IGBT devices with a floating P-type emitter trench gate replacing part of the active trench gate can suppress turn-off overshoot voltage across the entire range of turn-off resistance variations, improving the reliability of the IGBT during switching.

[0032] Figure 3 This presentation shows a comparison of the trade-off relationship between turn-off overshoot voltage and turn-off loss for IGBT devices with a floating P-region emitter trench gate replacing part of the active trench gate, and traditional micro-trench IGBT devices. A smaller turn-off resistance in an IGBT device results in a faster turn-off speed and lower turn-off loss, but also an increase in di / dtoff and turn-off overshoot voltage. Therefore, there is a trade-off relationship between turn-off overshoot voltage and turn-off loss in IGBT devices. Before the turn-off overshoot voltage inflection point, the turn-off loss and turn-off overshoot voltage perfectly conform to this trade-off relationship. After the turn-off overshoot voltage inflection point, the faster turn-off speed causes the gate voltage to drop below the threshold voltage during carrier extraction, breaking the original trade-off relationship between turn-off overshoot voltage and turn-off loss. IGBT devices with emitter trench gates that have floating P-regions, replacing part of the active trench gate, can achieve lower turn-off losses with smaller turn-off overshoot voltages compared to traditional IGBT devices. This optimizes the trade-off relationship between turn-off overshoot voltage and turn-off losses, resulting in highly reliable, low-loss, and high-performance IGBT devices.

[0033] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the present invention. Various changes and modifications can be made to the present invention without departing from its spirit and scope. All such changes and modifications fall within the scope of the present invention as claimed, which is defined by the appended claims and their equivalents.

Claims

1. An IGBT cell structure that optimizes the trade-off between turn-off loss and turn-off overvoltage, characterized in that: The IGBT cell structure, in the substrate or epitaxial layer, includes, from bottom to top, a collector, a collector region, a field blocking layer, a drift region, a highly doped carrier storage layer, and a base region layer; the upper surface of the substrate or epitaxial layer is the emitter of the IGBT cell; There are multiple parallel U-shaped trenches in the substrate or epitaxial layer, and the U-shaped trenches include active trench gates and emitter trench gates; the multiple U-shaped trenches extend downward from the substrate or epitaxial surface through the base region layer and the carrier storage layer. The active trench gate has N+ emitter regions in the base layers on both sides, and the implantation depth of the N+ emitter regions does not exceed the base layer. The N+ emitter regions also have contact holes that penetrate the N+ emitter regions, leading the N+ emitter regions on both sides of the active trench gate to emitters on the substrate or epitaxial surface. The base layer between the emitter trench gates is in a floating state, forming a floating P-type region.

2. The IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage as described in claim 1, characterized in that: The current collector region is a heavily doped P-type region, and the field blocking layer is a heavily doped N-type region.

3. The IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage as described in claim 1, characterized in that: The multiple U-shaped trenches described herein have the same structure, wherein the ratio of the number of active trench gates to emitter trench gates is 2:

4.

4. The IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage as described in claim 1, characterized in that: The active trench gates are adjacent, and the emitter trench gates are symmetrically arranged on both sides of the adjacent active trench gates.

5. The IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage as described in claim 1, characterized in that: A floating P-region is provided between the emitter trench gates, while P-type base regions are provided on both sides of the active trench gate.

6. The IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage as described in claim 1, characterized in that: The junction depth of the base layer and the floating P-type region is 1.5 μm.

7. The IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage as described in claim 1, characterized in that: The base regions on both sides of the active trench gate and the floating P-type region are injected simultaneously in the same process, without the need for additional process steps or layout.

8. The IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage as described in claim 1, characterized in that: The emitter trench gate is connected to the emitter to reduce the Miller capacitance of the device; the emitter trench gate is led out to form the gate electrode.

9. The IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage as described in claim 1, characterized in that: The floating P-type region between the emitter trench gate can reduce the saturation voltage drop V between the collector and emitter. CESAT .

10. The IGBT cell structure for optimizing the trade-off relationship between turn-off loss and turn-off overvoltage as described in claim 1, characterized in that: The doping concentration of the carrier storage layer is 1e15 to 1e16 cm. -3 .

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