Hard disk backboard, circuit board and electronic equipment

Abstract

The invention discloses a hard disk backboard, a circuit board and electronic equipment, and relates to the technical field of electronic circuits, and the hard disk backboard comprises at least one complex programmable logic device and a hard disk slot. The complex programmable logic device is configured to be connected with the controller through a first bus and is further configured to be connected with a hard disk slot through a second bus, and the hard disk slot is configured to be connected with a hard disk. The complex programmable logic device directly obtains the hard disk state information of the hard disk, the controller does not need to intervene in control of a hard disk bottom layer, the management burden of the controller is shared through the complex programmable logic device, and management and control resources of the controller are saved. Therefore, the technical problem of low management and control efficiency of the hard disk in related technologies can be solved, and the technical effects of improving the management and control efficiency of the hard disk and improving the response rate of the system are achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic circuits, and in particular to a hard disk backboard, a circuit board and an electronic device. BACKGROUND

[0002] Hard disks have become the core components of high-performance storage in data centers, and the realization of low-latency characteristics is irreplaceable in scenarios such as model training and real-time data analysis. In the case where multiple hard disks need to be deployed in a device, there is a problem of low efficiency of hard disk management and control in the related art.

[0003] In view of the above problems existing in the related art, no effective solution has been proposed so far. SUMMARY

[0004] The present application provides a hard disk backboard, a circuit board and an electronic device to at least solve the problem of low efficiency of hard disk management and control in the related art.

[0005] The present application provides a hard disk backboard, comprising: at least one complex programmable logic device, a hard disk slot; at least one complex programmable logic device is configured to be connected with a controller through a first bus; at least one complex programmable logic device is further configured to be connected with the hard disk slot through a second bus, wherein the rate of data transmission of the second bus is less than the rate of data transmission of the first bus, and different complex programmable logic devices are connected with different hard disk slots; the hard disk slot is configured to be connected with a hard disk; the complex programmable logic device is used to obtain hard disk state information of the hard disk inserted in the hard disk slot, and send the hard disk state information to the controller.

[0006] In one exemplary embodiment, the complex programmable logic device comprises a hard disk management module, the hard disk management module is used to perform at least one of the following: in the case of detecting that the hard disk is powered on, sending an enumeration instruction to the hard disk slot of the hard disk to determine initialization information of the hard disk, and storing the initialization information; receiving a control instruction sent by the controller, and driving a target hard disk indicated by the control instruction to execute the control instruction; receiving an acquisition instruction sent by the controller, and sending information indicated by the acquisition instruction to the controller based on the acquisition instruction.

[0007] In one exemplary embodiment, the hard disk backboard further comprises a state sensor, and the complex programmable logic device further comprises a monitoring management module, the monitoring management module being connected with the state sensor; the state sensor is used to collect backboard state information of the hard disk backboard, and send the backboard state information to the monitoring management module; the monitoring management module is used to execute a target operation based on abnormal information in the case of determining that the abnormal information exists in the backboard state information, and execute an alarm operation.

[0008] In an example embodiment, when the abnormal information comprises a temperature, performing the target operation based on the abnormal information comprises: when the temperature is greater than a first threshold value and less than or equal to a second threshold value, controlling a fan included in the hard disk backboard to rotate at a target rotating speed, and marking a state of an abnormal hard disk corresponding to the abnormal information as a target state, wherein the target rotating speed is greater than a current rotating speed of the fan; sending first notification information to the controller, wherein the first notification information is used to notify the controller that the abnormal hard disk is in an abnormal state and the fan has rotated at the target rotating speed; when the temperature is greater than the second threshold value, turning on an indicator light of the abnormal hard disk and controlling the abnormal hard disk to power off; and sending second notification information to the controller, wherein the second notification information is used to notify the controller that the abnormal hard disk is in an abnormal state and the abnormal hard disk has powered off.

[0009] In an example embodiment, the complex programmable logic device further comprises a hot plug management module connected with the hard disk slot; the hot plug management module is configured to send a slow start signal to a power supply in the hard disk backboard to instruct the power supply to slow start power supply to a target slot when it is detected that the target slot included in the hard disk slot is inserted with a hard disk; and / or the complex programmable logic device further comprises a light-on module configured to receive a light-on control instruction sent by the controller and turn on or off a light-on control instruction corresponding light-on based on the light-on control instruction.

[0010] In an example embodiment, the complex programmable logic device is further configured to perform at least one of the following: count a number of cyclic redundancy errors of a link in the hard disk backboard, and send a reset request to the controller when the number is greater than a preset threshold value, wherein the reset request is used to request a reset of the link; receive a firmware upgrade package sent by the controller through the first bus, and send the firmware upgrade package to the hard disk to upgrade firmware of the hard disk.

[0011] The application further provides a circuit board comprising a controller and a hard disk backboard according to any one of the above embodiments, wherein the controller is connected with the complex programmable logic device included in the hard disk backboard through the first bus.

[0012] In an example embodiment, the controller comprises a central processing unit and a baseboard management controller; the central processing unit and the baseboard management controller are both connected with the complex programmable logic device through the first bus, and the priority of the central processing unit in sending data through the first bus is higher than the priority of the baseboard management controller in sending data through the first bus.

[0013] The application further provides an electronic device comprising the circuit board according to any one of the above embodiments.

[0014] The application further provides a hard disk management method applied to the hard disk backboard in any of the above embodiments, comprising: obtaining hard disk state information of a hard disk inserted in a hard disk slot; and sending the hard disk state information to a controller.

[0015] In an example embodiment, the hard disk management method further comprises: in the case of detecting that the hard disk is powered on, sending an enumeration instruction to the hard disk slot of the hard disk to determine initialization information of the hard disk, and storing the initialization information.

[0016] In an example embodiment, the hard disk management method further comprises: receiving a control instruction sent by the controller; and driving a target hard disk indicated by the control instruction to execute the control instruction.

[0017] In an example embodiment, the hard disk management method further comprises: receiving an acquisition instruction sent by the controller, and sending information indicated by the acquisition instruction to the controller based on the acquisition instruction.

[0018] In an example embodiment, the hard disk management method further comprises: receiving backboard state information of the hard disk backboard acquired by a state sensor included in the hard disk backboard; in the case of determining that there is abnormal information in the backboard state information, determining an abnormal level based on the abnormal information; performing a target operation according to the abnormal level, and performing an alarm operation.

[0019] In an example embodiment, in the case that the abnormal information includes temperature, performing the target operation based on the abnormal information comprises: in the case that the temperature is greater than a first threshold value and less than or equal to a second threshold value, controlling a fan included in the hard disk backboard to rotate at a target rotating speed, and marking a state of an abnormal hard disk corresponding to the abnormal information as a target state, wherein the target rotating speed is greater than a current rotating speed of the fan; sending first notification information to the controller, wherein the first notification information is used to notify the controller that the abnormal hard disk is in an abnormal state and the fan has rotated at the target rotating speed; in the case that the temperature is greater than the second threshold value, turning on an indicator light of the abnormal hard disk, and controlling the abnormal hard disk to power off; and sending second notification information to the controller, wherein the second notification information is used to notify the controller that the abnormal hard disk is in an abnormal state and the abnormal hard disk has powered off.

[0020] In an example embodiment, the hard disk management method further comprises: in the case of detecting that a target slot included in the hard disk slot inserts a hard disk, sending a slow start signal to a power supply in the hard disk backboard to instruct the power supply to slow start power supply to the target slot.

[0021] In an example embodiment, the hard disk management method further comprises: receiving a positioning lamp control instruction sent by the controller; and turning on or off a positioning lamp corresponding to the positioning lamp control instruction based on the positioning lamp control instruction.

[0022] In an example embodiment, the hard disk management method further includes: counting a number of cyclic redundancy errors of the links in the hard disk backplane; and sending a reset request to the controller when the number is greater than a preset threshold, wherein the reset request is used to request resetting the links.

[0023] In an example embodiment, the hard disk management method further includes: receiving a firmware upgrade package sent by the controller through the first bus; and sending the firmware upgrade package to the hard disk to upgrade firmware of the hard disk.

[0024] The application further provides an electronic device, including a memory configured to store a computer program, and a processor configured to execute the computer program to implement the steps of any of the hard disk management methods.

[0025] The application further provides a computer readable storage medium, which stores a computer program, wherein the computer program is executed by a processor to implement the steps of any of the hard disk management methods.

[0026] The application further provides a computer program product, which includes a computer program, wherein the computer program is executed by a processor to implement the steps of any of the hard disk management methods.

[0027] Through the application, at least one complex programmable logic device and a hard disk slot can be arranged on the hard disk backplane. The at least one complex programmable logic device can be configured to be connected with the controller through the first bus, and the complex programmable logic device can be further configured to be connected with the hard disk slot through the second bus, wherein the second bus has a data transmission rate smaller than that of the first bus. The hard disk slot can be configured to be connected with the hard disk. The complex programmable logic device can be used to acquire hard disk state information of the hard disk inserted into the hard disk slot and send the hard disk state information to the controller. Since the complex programmable logic device can directly acquire the hard disk state information of the hard disk, the controller does not need to intervene in the control of the hard disk bottom layer, the management burden of the controller is shared by the complex programmable logic device, and the management and control resources of the controller are saved. In addition, the complex programmable logic device can be connected with the controller through the first bus, and the first bus has a data transmission rate greater than that of the second bus, thereby improving the data transmission rate and the stability of the communication link. Therefore, the technical problem of low hard disk management efficiency in the related art can be solved, and the technical effects of improving the hard disk management efficiency and the system response rate can be achieved. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0029] Figure 1 is a schematic diagram of a hard disk backboard structure according to an embodiment of the present application;

[0030] Figure 2 is a flow chart of CPLD health management of a hard disk backboard according to an embodiment of the present application;

[0031] Figure 3 is a schematic diagram of a hard disk backboard structure according to a specific embodiment of the present application;

[0032] Figure 4 is a hardware structure block diagram of a hard disk management method according to an embodiment of the present application;

[0033] Figure 5 is a flow chart of a hard disk management method according to an embodiment of the present application. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without any creative effort fall within the protection scope of the present application.

[0035] It should be noted that, in the description of the present application, the terms "comprise", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment comprising a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or equipment. The terms "first", "second" and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0036] In order to make the skilled in the art better understand the present application, the present application will be further described in detail below with reference to the drawings and specific embodiments.

[0037] The embodiments of the present application provide a hard disk backboard, Figure 1 is a schematic diagram of a hard disk backboard structure according to an embodiment of the present application, as Figure 1 shown, the hard disk backboard comprises: at least one complex programmable logic device 12, a hard disk slot 14;

[0038] In the embodiment, the complex programmable logic device (CPLD) is a digital integrated circuit that can be programmed by users to achieve specific logic functions according to specific applications. In the embodiment, the CPLD is used to implement local management control of the NVMe hard disk and backplane health status monitoring.

[0039] The hard disk slot is a physical interface on the backplane for inserting a hard disk, providing data transmission and power supply. In the embodiment, the CPLD monitors the in-place state of the hard disk and performs hot plug protection.

[0040] The at least one complex programmable logic device 12 is configured to be connected with the controller through a first bus;

[0041] In the embodiment, the first bus can be an I3C bus. I3C is an extended protocol of the improved internal integrated circuit bus (I2C), supporting higher speed and multi-host management. The controller can be a controller disposed on a mainboard and can include a BMC (Baseboard Management Controller) and a CPU (Central Processing Unit). The BMC and the CPU can be controllers integrated in the same mainboard and can be used for remote monitoring and management of server hardware status. The controller and the CPLD can be connected through the first bus I3C. Through the first bus, data transmission and device management can be achieved. The first bus can adopt a “star + daisy chain” hybrid topology. The CPU (master device 1) and the BMC (master device 2) are connected to multiple CPLDs (slave devices) through the same group of I3C buses (SDA / SCL differential lines + interrupt lines + reset lines). The bus rate is configured to be 10 Mbps (much higher than 1 MHz of I2C). Based on the native multi-host arbitration of the I3C protocol, when the CPU and the BMC request the bus at the same time, the priority is set as “business instruction (CPU) > operation and maintenance instruction (BMC)” (for example, when the CPU upgrades the hard disk firmware, the BMC automatically releases the bus control right.

[0042] The at least one complex programmable logic device 12 is further configured to be connected with the hard disk slot through a second bus, wherein the rate of data transmission of the second bus is less than the rate of data transmission of the first bus, and different complex programmable logic devices are connected to different hard disk slots;

[0043] In this embodiment, the second bus can be an I2C (Inter-Integrated Circuit) bus, through which the CPLD can connect to the hard drive slot, which is configured to connect to the hard drive. The hard drive can be an NVMe (Non-Volatile Memory Express) hard drive. The hard drive can utilize PCIe bus technology, featuring low latency and high bandwidth, and is a key component of data center storage.

[0044] In this embodiment, the number of hard drive slots can be one or more, and the number of hard drives can also be one or more. When there are multiple CPLDs, one CPLD can manage multiple hard drives, and each CPLD manages different hard drives. The number of CPLDs can be configured according to the number of hard drives; one CPLD can manage a fixed number of hard drives. All CPLDs are connected to the controller via an I3C bus.

[0045] Complex programmable logic devices are used to acquire the hard disk status information of the hard disk inserted in the hard disk slot and send the hard disk status information to the controller.

[0046] In this embodiment, the CPLD can acquire hard drive status information of the hard drives inserted into the hard drive slots via the second bus. This hard drive status information can include hard drive health status (such as bad sector count, write volume), temperature, current, and other data, collected by the CPLD and periodically reported to the BMC via the I3C bus. For example, the CPLD can connect to the SMART chip of each hard drive via the I2C interface to collect hard drive health status (bad sector count, write volume) and simultaneously read INA230 (current) and LM75A (temperature) data, updating the local status database every 100ms. The CPLD can also report hard drive status information to the controller at predetermined time intervals. Specifically, the CPLD can aggregate and report data, integrating data such as "hard drive status + backplane voltage + link error + fan speed" into a 32-byte summary message, which is reported to the controller via the first bus at predetermined time intervals. For example, reporting to the BMC once per second via I3C eliminates the need for module-by-module data collection by the BMC; it only needs to parse the summary message to complete operation and maintenance monitoring, improving management efficiency.

[0047] In this embodiment, the Complex Programmable Logic Device (CPLD) on the hard drive backplane connects to the hard drive slot via a second bus and is responsible for collecting the hard drive's status information. Although the transmission rate of the second bus is lower than that of the first bus, this configuration does not affect the efficiency of data transmission since it mainly carries status data. The CPLD, acting as the acquisition and processing center for hard drive status, sends this information to the controller via the first bus, enabling real-time monitoring of the hard drive status. This design effectively alleviates the load bottleneck of the Baseboard Management Controller (BMC) in high-density NVMe hard drive deployment scenarios in related technologies, because the BMC no longer directly connects to and manages each hard drive, but instead indirectly aggregates and monitors information through the CPLD, greatly reducing the number of direct interventions and workload of the BMC.

[0048] Furthermore, the introduction of CPLDs and the application of a second bus solved the problems caused by insufficient bandwidth and addressing limitations of the I2C bus. Since CPLDs can directly handle multiple hard drives without needing to allocate a separate I2C bus for each drive, this significantly improves the backplane's management capabilities and efficiency, allowing a single backplane to support a larger number of hard drives. Simultaneously, the design of the second bus overcomes, to some extent, the addressing limitations of the I2C bus, enabling the backplane to manage and address even more hard drive devices.

[0049] Furthermore, this application simplifies the hardware chain and reduces the difficulty of fault location. Due to the adoption of CPLD distributed management, the complex wiring between the backplane and motherboard is reduced, lowering the risk of failure and making fault location faster and more accurate. The CPLD not only manages the hard drive status but also monitors the backplane health, improving the overall management efficiency and reliability of the hard drive backplane through real-time data processing and feedback.

[0050] By using CPLD and a two-bus configuration, key technical issues in high-density NVMe hard drive deployment scenarios are solved, improving the management performance and reliability of the hard drive backplane, and providing data centers with a more efficient, stable and easy-to-maintain storage solution.

[0051] This application allows for the installation of at least one complex programmable logic device (CPL) and a hard drive slot on a hard drive backplane. The CPL can be configured to connect to a controller via a first bus; it can also be configured to connect to the hard drive slot via a second bus, where the data transmission rate of the second bus is lower than that of the first bus. The hard drive slot can be configured to connect to a hard drive. The CPL can acquire the hard drive status information of the hard drive inserted in the slot and send this information to the controller. Since the CPL can directly acquire the hard drive status information, the controller does not need to intervene in the underlying control of the hard drive, thus reducing the controller's management burden and saving control resources. Furthermore, the CPL's connection to the controller via the first bus, with a data transmission rate higher than that of the second bus, improves data transmission rate and communication link stability. Therefore, this addresses the technical problem of low hard drive control efficiency in related technologies, achieving improved hard drive control efficiency and enhanced system response speed.

[0052] In one exemplary embodiment, the complex programmable logic device includes a hard disk management module. The hard disk management module, upon detecting that the hard disk is powered on, sends an enumeration command to the hard disk slot to determine the hard disk's initialization information and stores the initialization information. In this embodiment, see Appendix [Figure Number]. Figure 1 ,like Figure 1 As shown, the complex programmable logic device (CPLD) may include a hard disk management module 1202. When the hard disk is powered on, the CPLD can automatically send PCIe enumeration instructions to complete hard disk identification and speed negotiation (PCIe 4.0 x4), and store initialization information, such as the initialization result (success / failure, hard disk model, serial number), in a local register. The enumeration instructions are used to identify and configure the hardware device. They are automatically sent by the CPLD when the hard disk is powered on to complete the hard disk initialization and identification. The initialization information can be basic device information obtained through the enumeration instructions after the hard disk is powered on, including the hard disk model and serial number, which is collected and stored by the CPLD for querying by the BMC or CPU.

[0053] In this embodiment, the Complex Programmable Logic Device (CPLD) integrates a hard disk management module. Upon detecting that the hard disk is powered on, this module actively sends an enumeration command to the hard disk slot. The purpose of this command is to determine the hard disk's initialization information, including but not limited to hard disk identification, speed negotiation to the PCIe 4.0 x4 standard, and recording important parameters such as whether the hard disk was successfully initialized, its model, and serial number. The initialization information is then stored in the CPLD's local registers for subsequent management and monitoring. By embedding the hard disk initialization process into the CPLD, the burden on the BMC (Backplane Management System) can be reduced, enabling more efficient and faster hard disk status response, while also improving the overall management efficiency and flexibility of the NVMe hard disk smart backplane.

[0054] In an exemplary embodiment, the hard disk management module is further configured to receive control commands sent by the controller and drive the target hard disk indicated by the control commands to execute the control commands. In this embodiment, the control commands may include commands to trigger a hard disk reset, commands to turn on the LOCATE light, commands to turn off the LOCATE light, commands to restart the hard disk, etc. The control commands may be commands sent by the BMC or commands sent by the CPU.

[0055] In this embodiment, the CPLD can receive control commands from the BMC / CPU (such as "turn on the LOCATE light" or "trigger hard disk reset") and directly drive the hardware to execute (such as outputting a 3.3V drive signal to control the LOCATE light to turn on, or sending a PCIe reset signal to restart the faulty hard disk).

[0056] In this embodiment, the CPLD is not only responsible for hard drive initialization but also continuously performs real-time status acquisition. This includes connecting to the SMART chip of each hard drive via the I2C interface to collect information about the hard drive's health status, such as the number of bad sectors and total write volume. Simultaneously, it reads data from the INA230 (for current monitoring) and LM75A (for temperature monitoring) to update the local status database, at a frequency of once every 100 milliseconds. Furthermore, the CPLD can directly respond to low-level control execution commands from the BMC or CPU, such as lighting up indicator lights or triggering a hard drive reset. This makes the CPLD the local management core of the NVMe hard drive, optimizing the execution path of management tasks, shortening response time, and enhancing the overall operational stability of the system.

[0057] In this embodiment, the complex programmable logic device (CPLD) includes a hard disk management module. This module is responsible for receiving control commands from the controller and executing corresponding control operations on the target hard disk specified by the commands. This design achieves precise control and efficient management of NVMe hard drives. The control commands cover multiple dimensions, including hard drive initialization, real-time status acquisition, and low-level control execution. This allows the CPLD to autonomously manage the hard drive locally without frequent intervention from the BMC in the low-level control process, thereby reducing the management burden on the BMC and improving system response speed and management efficiency. In specific implementation, the CPLD can directly drive hardware operations, such as hardware hot-swap protection and LED status control, by parsing the control commands. It also has local decision-making capabilities in abnormal situations. For example, when the hard drive temperature exceeds the limit, it can immediately adjust the fan speed, issue an over-temperature alarm, and even trigger hard drive power-down protection when necessary. All of this is done automatically without direct intervention from the BMC, demonstrating the powerful functionality of the CPLD as a local management core. In addition, by using CPLD to summarize and organize status data and reporting it to BMC at a fixed frequency, the data transmission link is simplified, the CPU utilization is reduced, the management architecture is further optimized, distributed processing of management tasks is realized, and the platform's compatibility and overall system stability are enhanced.

[0058] In one exemplary embodiment, the hard disk management module is further configured to receive an acquisition command sent by the controller, and based on the acquisition command, send information to the controller indicating the acquisition information. In this embodiment, the controller can perform "aggregated data interaction" with the CPLD via the I3C bus, without directly accessing the hard disk. The acquisition command may include hard disk temperature acquisition commands, hard disk current acquisition commands, hard disk online status acquisition commands, etc. The controller can acquire key indicator data of the hard disk, such as hard disk status data, at a first time interval, and acquire a complete report at a second time interval.

[0059] For example, when the BMC queries the temperature of 24 hard drives, it only needs to send one "I3C read temperature summary" command to each of the two CPLDs. The CPLDs directly return the maximum and minimum temperature values ​​of 12 hard drives, as well as the abnormal hard drive numbers (without requiring the BMC to query each drive individually). The BMC can obtain critical status (temperature, current, hard drive online status) from the CPLDs every second and a complete health report every 10 seconds, reducing the BMC's CPU utilization and response latency.

[0060] In one exemplary embodiment, the hard disk backplane further includes a status sensor, and the complex programmable logic device further includes a monitoring and management module connected to the status sensor. The status sensor is used to collect backplane status information of the hard disk backplane and send the backplane status information to the monitoring and management module. The monitoring and management module is used to perform a target operation based on the abnormal information and to perform an alarm operation when it is determined that there is abnormal information in the backplane status information. In this embodiment, see Appendix Figure 1 ,like Figure 1 As shown, the hard drive backplane also includes a status sensor 16, which may include a voltage / current sensor, a temperature sensor, and a field replaceable unit (FRU). The CPLD may include a monitoring and management module 1204, which can be connected to the status sensors via a second bus. The CPLD can obtain backplane status information through the monitoring and management module. This backplane status information may include current, voltage, temperature, etc.

[0061] In this embodiment, determining the target operation based on anomaly information may include determining the anomaly level of the anomaly information and performing the target operation based on the anomaly level. Different anomaly levels correspond to different operations.

[0062] In this embodiment, determining the target operation based on abnormal information may further include: the CPLD can acquire the power supply voltage of the hard disk backplane (accuracy ±1%) through the ADC interface, and trigger an interrupt locally when the voltage is lower than a first voltage threshold or higher than a second voltage threshold. For example, the CPLD can acquire the 12V power supply voltage of the backplane (accuracy ±1%) through the ADC interface, and trigger an interrupt locally when the voltage is lower than 11.4V or higher than 12.6V.

[0063] In this embodiment, the hard drive backplane integrates a status sensor, which is connected to the monitoring and management module in the complex programmable logic device (CPLD). The status sensor is responsible for collecting backplane status information, including but not limited to key parameters such as voltage, temperature, and link error counts, and sending this information to the CPLD's monitoring and management module in real time. Upon receiving the status information, the monitoring and management module can quickly analyze and determine whether there is any abnormal information. Once an abnormality is detected, such as voltage fluctuations exceeding the safe range, excessively high temperature, or frequent link errors, it will automatically execute corresponding recovery operations based on a preset abnormality level, such as controlling voltage stabilization, triggering temperature protection mechanisms, or resetting links. At the same time, it will send an alarm signal to the BMC to ensure that abnormal situations are responded to and handled in a timely manner. This design improves the system's adaptability and fault response efficiency through the CPLD's local intelligent decision-making, reduces dependence on the BMC, and achieves more efficient and reliable data center storage management.

[0064] In an exemplary embodiment, the monitoring and management module is further configured to comprehensively analyze the backplane status information collected by the status sensors to predict potential hardware failures. For example, the monitoring and management module can integrate the hard drive status information of each hard drive and the backplane status information of the hard drive backplane to predict potential hardware failures. First, the hard drive status information of each hard drive and the backplane status information of the hard drive backplane can be acquired for a predetermined period of time and unified to the same time reference. The hard drive status information and backplane status information are then cleaned, denoised, and resampled to construct a high-quality status dataset. The temporal and frequency domain features of each status in the status dataset are extracted. A first health status score is determined by the temporal features, and a second health status score is determined by the frequency domain features. The weight of each status information is also determined, and a comprehensive score is determined based on the weight, the first health status score, and the second health status score. Then, trend visualization, threshold management, and machine learning models (such as unsupervised anomaly detection or supervised RUL prediction models) are used to identify failure precursor patterns such as continuous deterioration and increased fluctuations, and the degradation rate is quantified. Finally, the model is deployed to a real-time pipeline, a tiered early warning mechanism is set up, and the model is validated and iteratively optimized by continuously collecting maintenance feedback, forming a closed loop from data insights to maintenance decisions. Throughout the process, a deep understanding of the equipment mechanism and the balance of early warning sensitivity / false alarm rate is crucial.

[0065] In an exemplary embodiment, when the abnormal information includes temperature, performing a target operation based on the abnormal information includes: when the temperature is greater than a first threshold and less than or equal to a second threshold, controlling the fan included in the hard disk backplane to rotate at a target speed, and marking the state of the abnormal hard disk corresponding to the abnormal information as the target state, wherein the target speed is greater than the current speed of the fan; sending a first notification message to the controller, wherein the first notification message is used to notify the controller that the abnormal hard disk is in an abnormal state and the fan has rotated at the target speed; when the temperature is greater than the second threshold, turning on the indicator light of the abnormal hard disk and controlling the abnormal hard disk to power down; sending a second notification message to the controller, wherein the second notification message is used to notify the controller that the abnormal hard disk is in an abnormal state and the abnormal hard disk has been powered down. In this embodiment, the CPLD can have built-in threshold judgment logic, such as when the hard disk temperature exceeds 70°C, directly driving the fan speed to increase (controlling the backplane fan through a PWM signal), and simultaneously sending a "temperature over-limit alarm" to the BMC; if the temperature continues to exceed 75°C, the CPLD can automatically trigger hard disk power-down protection to avoid hardware damage.

[0066] In this embodiment, the flowchart for CPLD's hard drive backplane health management can be found in the appendix. Figure 2 ,like Figure 2 As shown, the process includes:

[0067] Step S202: Periodically collect the backplane status information of the hard disk backplane.

[0068] Step S204: Is the temperature exceeding the limit? If it is slightly exceeding the limit, proceed to step S206; if it is severely exceeding the limit, proceed to step S208; if it is within the limit, proceed to step S202.

[0069] Step S206, CPLD local decision: Drive the Sensirion SFM3000 fan to increase its speed; mark the hard drive as "pending attention".

[0070] Step S208, CPLD local emergency handling: immediately trigger the hard drive power-down protection (to avoid hardware damage); drive the hard drive's ERROR light and LOCATE light to remain constantly on.

[0071] In step S210, the CPLD reports to the BMC via I3C: the hard disk X temperature is slightly out of range (e.g., 72°C), and the rotation speed has been increased.

[0072] Step S212, BMC triggers local audible and visual alarm (server panel LED flashes).

[0073] In step S214, the CPLD makes a second judgment on whether the temperature has dropped; if the judgment result is that the temperature is less than or equal to 70°C, step S216 is executed; if the judgment result is no, step S204 is executed.

[0074] Step S216: The CPLD reduces the fan speed to 50% and reports to the BMC.

[0075] In step S218, the CPLD sends an emergency alarm to the BMC via I3C: "Hard disk X temperature is seriously out of limit (e.g., 76°C) and has been powered off."

[0076] Step S220, BMC upgrades alarm level: triggers data center operation and maintenance.

[0077] Step S222, End, wait for maintenance personnel to replace the faulty hard drive.

[0078] In one exemplary embodiment, the complex programmable logic device further includes a hot-swap management module connected to a hard disk slot. The hot-swap management module is configured to send a soft-start signal to the power supply in the hard disk backplane upon detecting that a hard disk has been inserted into a target slot within the hard disk slot, thereby instructing the power supply to soft-start powering the target slot. In this embodiment, see Appendix Figure 1 ,like Figure 1 As shown, the CPLD may also include a hot-swap management module 1206. The CPLD can also collect the "present signal" of the hard drive slot. When the hard drive is detected to be inserted, the CPLD first controls the power supply to start slowly (to avoid instantaneous impact) and then completes the PCIe enumeration. The whole process does not require BMC intervention.

[0079] In this embodiment, the Complex Programmable Logic Device (CPLD) in the hard drive backplane integrates a hot-swap management module, which is directly connected to the hard drive slot. When the hot-swap management module detects that a hard drive has been inserted into the target hard drive slot, it automatically sends a soft-start signal to the power supply in the backplane, instructing the power supply to use a soft-start method to supply power to the target hard drive slot. This design ensures that the hard drive can be powered on smoothly when inserted, avoiding potential damage to the hard drive and backplane hardware from instantaneous high current surges, thus improving system stability and hard drive lifespan. Through the intelligent control of the CPLD, the entire process does not require the intervention of the BMC, reducing management latency, simplifying the hot-swap operation process, and enhancing the system's real-time response capability and reliability.

[0080] In one exemplary embodiment, the complex programmable logic device further includes an illumination module, which receives positioning light control commands sent by the controller and turns the corresponding positioning light on or off based on the positioning light control commands. In this embodiment, see Appendix [reference needed]. Figure 1 ,like Figure 1 As shown, the CPLD can also include a lighting module 1208. The CPLD can directly output PWM signals to drive the ACTIVE / LOCATE / ERROR three-color LEDs without the need for an intermediate controller. The BMC only needs to send "LED status control commands" to the CPLD, and the CPLD will automatically parse and drive the corresponding LEDs, reducing link latency.

[0081] In this embodiment, the Complex Programmable Logic Device (CPLD) integrates an LED module. This module receives positioning light control commands from the Base Controller (BMC) and directly controls the on / off state of the corresponding positioning light based on the command content. This design avoids the multi-level signal transmission between the BMC and the positioning lights in traditional architectures, improving control efficiency and response speed. The CPLD's LED module can quickly respond to BMC commands, achieving precise control of the ACTIVE, LOCATE, and ERROR three-color LEDs, enhancing the management function of the NVMe hard drive's intelligent backplane, simplifying hardware design, and reducing fault location time. In specific implementation, the CPLD directly outputs PWM signals to drive the LEDs based on commands sent by the BMC via the I3C bus, achieving low-latency indicator status changes and improving the real-time perception of hard drive status by maintenance personnel in high-density storage environments. Furthermore, the CPLD's local decision-making capability is also reflected in the LED control, automatically adjusting the LED display according to the hard drive's health status, further enhancing the system's intelligence level and user experience.

[0082] In one exemplary embodiment, the complex programmable logic device (CPLD) is further configured to perform at least one of the following: count the number of cyclic redundancy errors (CRC errors) in the links of the hard disk backplane, and send a reset request to the controller if the number exceeds a preset threshold, wherein the reset request is used to request a link reset; receive a firmware upgrade package sent by the controller via a first bus, and send the firmware upgrade package to the hard disk to upgrade the firmware of the hard disk. In this embodiment, the CPLD can also count the CRC error count of the PCIe link between the CPLD and the hard disk in real time, and when the error rate exceeds 1... At that time, a "link reset request" is automatically sent to the CPU.

[0083] In this embodiment, the CPLD can also receive commands from the controller. For example, if the CPU sends a "firmware upgrade request" via the I3C bus, the BMC will release bus control after detecting a high-priority request. The CPU will then send firmware upgrade packages, such as Retimer firmware packages (each CPLD is responsible for multiple Retimers), to the two CPLDs in batches via the I3C bus. The I3C broadcast transmission function supports sending the firmware once and receiving it from multiple CPLDs simultaneously, avoiding device-by-device transmission. After receiving the firmware, the CPLDs will write it to the hard drive chip via the local PCIe link. The upgrade progress will be fed back to the CPU in real time via the I3C. After the upgrade is complete, the CPU will release the bus, and the BMC will regain control and resume daily monitoring. The controller uses the higher-speed, more error-correcting I3C bus, which shortens the firmware upgrade time.

[0084] In this embodiment, the Complex Programmable Logic Device (CPLD) not only handles the local management and control of the NVMe hard drive but also performs additional critical functions. These include counting the number of CRC errors in the link and automatically sending a reset request to the CPU when the number of errors exceeds a preset threshold. This resets the affected link, ensuring link stability and data transmission accuracy. Furthermore, the CPLD receives firmware upgrade packages from the CPU via the I3C bus and forwards them to the corresponding hard drive to update its firmware. This mechanism significantly improves the efficiency and controllability of firmware upgrades, reduces CPU intervention, thereby lowering CPU load and accelerating fault recovery, ultimately enhancing the overall management efficiency and reliability of the NVMe hard drive system.

[0085] This application provides a circuit board including a controller and the aforementioned hard disk backplane, wherein the complex programmable logic device (CPLD) of the hard disk backplane is connected to the controller via a first bus (I3C bus). The technical principle lies in employing a distributed management structure for the CPLD, enabling localized management functions. The controller can efficiently obtain data aggregated by the CPLD via the I3C bus without directly intervening in the underlying control of the hard disk, thereby reducing the controller's load and improving system response efficiency. Furthermore, the I3C bus, as a communication link in a multi-master management mode, supports inter-device collaborative scheduling, optimizes high-speed data interaction, and improves the efficiency and flexibility of the management link. This design overcomes the problem of excessive resource consumption caused by centralized control of the BMC in existing technologies, achieving a higher level of hardware link simplification and convenient fault location, enhancing the overall performance and reliability of the circuit board.

[0086] In this embodiment, by implementing local CPLD management and I3C bus optimization, the management tasks of the controller are effectively distributed, reducing fault location time and bus conflict risks caused by complex hardware links, and improving the management efficiency and platform compatibility of the circuit board. In high-density NVMe hard drive deployment scenarios, it solves the needs for rapid maintenance, link stability, and platform versatility in data center environments, achieving more efficient, flexible, and reliable hard drive management.

[0087] In one exemplary embodiment, the controller includes a central processing unit (CPU) and a baseboard management controller (BMC). Both the CPU and the BMC are connected to a complex programmable logic device (CPLD) via a first bus. The CPU transmits data via the first bus with higher priority than the BMC. In this embodiment, the controller includes a CPU and a BMC, both connected to the CPLD via the first bus, i.e., the I3C bus. In bus communication, the CPU transmits data with higher priority than the BMC. This design ensures efficient execution of business instructions and allows for flexible scheduling of bus resources when needed for maintenance instructions. Specifically, when the CPU executes high-priority tasks such as firmware upgrades, the BMC automatically releases bus control, thus avoiding communication bottlenecks that may occur in single-host mode and ensuring business continuity and maintenance efficiency. This multi-host management mode not only optimizes data transmission rate and link stability but also achieves more efficient parallel processing of tasks between the CPU and BMC through dynamic resource allocation, further improving the management performance and system response speed of the NVMe hard drive intelligent backplane in high-density storage environments.

[0088] The hard drive backplane is described below with reference to specific implementation methods.

[0089] Figure 3 This is a structural diagram of a hard disk backplane according to a specific embodiment of this application, such as... Figure 3 As shown, the controller may include a BMC, and the status sensors may include a pressure current sensor, a temperature sensor, and a board FRU, etc. The first bus is an I3C bus, and the second bus is an I2C bus. The hard drive inserted into the hard drive slot can be an NVMe hard drive. Each CPLD directly undertakes the following local management tasks without the need for BMC intervention in low-level control: When the hard drive is powered on, the CPLD automatically sends a PCIe enumeration command to complete hard drive identification and speed negotiation (PCIe 4.0 x4), and stores the initialization results (success / failure, hard drive model, SN number) in the local register; The CPLD connects to the SMART chip of each hard drive through the I2C interface to collect the hard drive health status (number of bad sectors, write volume), and reads INA230 (current) and LM75A (temperature) data, updating the local status database every 100ms; The CPLD receives control commands from the BMC / CPU (such as "light up the LOCATE light" and "trigger hard drive reset"), and directly drives the hardware to execute (such as outputting a 3.3V drive signal to control the LOCATE light to light up, and sending a PCIe reset signal to restart the faulty hard drive). The CPLD directly outputs PWM signals to drive the ACTIVE / LOCATE / ERROR tri-color LEDs, eliminating the need for an intermediate controller. The BMC only needs to send "LED status control commands" to the CPLD, which automatically parses and drives the corresponding LEDs, reducing link latency. In addition to hard drive management, the CPLD can manage backplane health. It can acquire the backplane's 12V supply voltage (accuracy ±1%) via an ADC interface using a voltage sensor. When the voltage is below 11.4V or above 12.6V, a local alarm is triggered. It also monitors the PCIe link: real-time statistics of the CRC error count of the PCIe link between the CPLD and the hard drive are displayed. When the error rate exceeds 1... When a hard drive is inserted, the CPLD automatically sends a "link reset request" to the CPU. The CPLD can also collect the "present signal" of the hard drive slot. When a hard drive is detected to be inserted, the CPLD first controls the power supply to start slowly (to avoid instantaneous impact), and then completes the PCIe enumeration. The whole process does not require BMC intervention.

[0090] The CPLD has built-in threshold judgment logic. For example, when the hard drive temperature exceeds 70°C, it directly drives the fan speed to increase (controlling the backplane fan through PWM signal) and sends a "temperature over-limit alarm" to the BMC. If the temperature continues to exceed 75°C, the CPLD automatically triggers hard drive power-off protection to avoid hardware damage.

[0091] The CPLD integrates data such as "hard drive status + backplane voltage + link error + fan speed" into a summary message of "1 frame of 32 bytes", and reports it to the BMC once every 1 second via I3C. The BMC does not need to collect data module by module, but only needs to parse the summary message to complete the operation and maintenance monitoring, thus improving management efficiency.

[0092] The BMC only interacts with the CPLD via the I3C bus for "summary data exchange" and does not directly access the hard drives. For example, when the BMC queries the temperature of 24 hard drives, it only needs to send one "I3C read temperature summary" command to each of the two CPLDs. The CPLDs directly return the maximum and minimum temperature values ​​of 12 hard drives and the abnormal hard drive numbers (without the BMC querying each drive individually). The BMC obtains key status (temperature, current, hard drive online status) from the CPLD every 1 second and a complete health report every 10 seconds, reducing the BMC's CPU utilization and response latency.

[0093] Embodiments of this application also provide an electronic device, including the circuit board as described above. In this embodiment, the electronic device may be a server, a processor, etc.

[0094] In this embodiment, the electronic device can use a CPLD as the local management core, enabling efficient data interaction with the BMC via the I3C bus, thus achieving distributed management of NVMe hard drives. The CPLD directly handles local management tasks such as NVMe hard drive initialization, status acquisition, hot-swapping control, and LED driving, without direct intervention from the BMC. This effectively offloads the BMC's management load, avoids excessive resource consumption, and improves system response efficiency and management flexibility. Simultaneously, communication between the CPU and BMC via the I3C bus supports multi-host management, optimizing the communication link and ensuring high-speed data transmission and high stability of the control link in high-density NVMe deployment scenarios. Furthermore, the CPLD integrates backplane health monitoring functions, enabling monitoring of voltage, temperature, and link status, and allowing for local intelligent decision-making, such as fan speed adjustment and hard drive power-down protection, further enhancing system reliability and management efficiency. This technical solution simplifies hardware communication links and interfaces, reduces design complexity and wiring difficulty, and improves link stability. It meets the real-time and reliability requirements of NVMe hard drive management in high-density storage scenarios, achieving the beneficial effects of lower CPU load, simpler hardware design, higher management efficiency, and stronger system reliability.

[0095] For example, in a data center server, the electronic equipment provided in this application, including the circuit board design, is used. This server is equipped with 24 NVMe hard drives, which communicate with the CPLD via an optimized I3C bus. The CPLD is responsible for local management and control, including tasks such as hard drive initialization, real-time status acquisition, and low-level control execution. Simultaneously, the CPLD also directly controls LED lighting and performs backplane health management, such as voltage monitoring, PCIe link monitoring, hot-swap protection, and fan speed control. The interaction logic between the BMC and CPLD is simplified, exchanging aggregated data only through the I3C bus, reducing the BMC's CPU utilization and response latency. Furthermore, communication between the CPU and BMC is also optimized via the I3C bus, supporting multi-host management mode and improving data transmission efficiency and flexibility. This design allows the server to better adapt to high-density storage environments, improving system response efficiency, stability, and compatibility.

[0096] The specific application environment architecture or specific hardware architecture on which the execution of the hard disk management method depends is described here.

[0097] The methods and embodiments provided in this application can be executed on mobile terminals, computer terminals, or similar computing devices. Taking running on a server device as an example, Figure 4 This is a hardware structure block diagram of the hard disk management method according to an embodiment of this application. Figure 4 As shown, the server device may include one or more ( Figure 4 Only one is shown in the image. A processor 402 (which may include, but is not limited to, a central processing unit (CPU), microprocessor (MCU), or programmable logic device (FPGA), etc.) and a memory 404 for storing data are also shown. The server device may further include a transmission device 406 for communication functions and an input / output device 408. Those skilled in the art will understand that... Figure 4 The structure shown is for illustrative purposes only and does not limit the structure of the server equipment described above. For example, the server equipment may also include components that are more... Figure 4 The more or fewer components shown, or having the same Figure 4 The different configurations shown.

[0098] The memory 404 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the hard disk management method in this embodiment. The processor 402 executes various functional applications and data processing by running the computer program stored in the memory 404, thus implementing the aforementioned method. The memory 404 may include high-speed random access memory and non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 404 may further include memory remotely located relative to the processor 402, and these remote memories can be connected to the mobile terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0099] Transmission device 406 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by the mobile terminal's communication provider. In one example, transmission device 406 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, transmission device 406 may be a Radio Frequency (RF) module used for wireless communication with the Internet.

[0100] The embodiments of this application provide a hard disk management method that can be applied to a hard disk backplane, such as a CPLD in the hard disk backplane. The method is described in detail below in conjunction with the execution flow of the hard disk management method.

[0101] Figure 5 This is a flowchart of a hard disk management method according to an embodiment of this application, such as... Figure 5 As shown, the process includes:

[0102] Step S502: Obtain the hard drive status information of the hard drive inserted in the hard drive slot;

[0103] Step S504: Send the hard disk status information to the controller.

[0104] In this embodiment, the CPLD can acquire hard drive status information of the hard drives inserted into the hard drive slots via the second bus. This hard drive status information can include hard drive health status (such as bad sector count, write volume), temperature, current, and other data, collected by the CPLD and periodically reported to the BMC via the I3C bus. For example, the CPLD can connect to the SMART chip of each hard drive via the I2C interface to collect hard drive health status (bad sector count, write volume) and simultaneously read INA230 (current) and LM75A (temperature) data, updating the local status database every 100ms. The CPLD can also report hard drive status information to the controller at predetermined time intervals. Specifically, the CPLD can aggregate and report data, integrating data such as "hard drive status + backplane voltage + link error + fan speed" into a 32-byte summary message, which is reported to the controller via the first bus at predetermined time intervals. For example, reporting to the BMC once per second via I3C eliminates the need for module-by-module data collection by the BMC; it only needs to parse the summary message to complete operation and maintenance monitoring, improving management efficiency.

[0105] In this embodiment, the Complex Programmable Logic Device (CPLD) on the hard drive backplane connects to the hard drive slot via a second bus and is responsible for collecting the hard drive's status information. Although the transmission rate of the second bus is lower than that of the first bus, this configuration does not affect the efficiency of data transmission since it mainly carries status data. The CPLD, acting as the acquisition and processing center for hard drive status, sends this information to the controller via the first bus, enabling real-time monitoring of the hard drive status. This design effectively alleviates the load bottleneck of the Baseboard Management Controller (BMC) in high-density NVMe hard drive deployment scenarios in related technologies, because the BMC no longer directly connects to and manages each hard drive, but instead indirectly aggregates and monitors information through the CPLD, greatly reducing the number of direct interventions and workload of the BMC.

[0106] Furthermore, the introduction of CPLDs and the application of a second bus solved the problems caused by insufficient bandwidth and addressing limitations of the I2C bus. Since CPLDs can directly handle multiple hard drives without needing to allocate a separate I2C bus for each drive, this significantly improves the backplane's management capabilities and efficiency, allowing a single backplane to support a larger number of hard drives. Simultaneously, the design of the second bus overcomes, to some extent, the addressing limitations of the I2C bus, enabling the backplane to manage and address even more hard drive devices.

[0107] Furthermore, this application simplifies the hardware chain and reduces the difficulty of fault location. Due to the adoption of CPLD distributed management, the complex wiring between the backplane and motherboard is reduced, lowering the risk of failure and making fault location faster and more accurate. The CPLD not only manages the hard drive status but also monitors the backplane health, improving the overall management efficiency and reliability of the hard drive backplane through real-time data processing and feedback.

[0108] By using CPLD and a two-bus configuration, key technical issues in high-density NVMe hard drive deployment scenarios are solved, improving the management performance and reliability of the hard drive backplane, and providing data centers with a more efficient, stable and easy-to-maintain storage solution.

[0109] In one exemplary embodiment, the hard disk management method further includes: upon detecting that the hard disk is powered on, sending an enumeration command to the hard disk slot to determine the hard disk's initialization information and storing the initialization information. In this embodiment, when the hard disk is powered on, the CPLD can automatically send a PCIe enumeration command to complete hard disk identification and speed negotiation (PCIe 4.0 x4), and store initialization information, such as the initialization result (success / failure, hard disk model, serial number), in a local register. The enumeration command is used to identify and configure the hardware device, and is automatically sent by the CPLD when the hard disk is powered on to complete the hard disk's initialization and identification. The initialization information can be basic device information obtained through the enumeration command after the hard disk is powered on, including the hard disk model, serial number, etc., which is collected and stored by the CPLD for querying by the BMC or CPU.

[0110] In one exemplary embodiment, the hard disk management method further includes: receiving a control command sent by a controller; and driving the target hard disk indicated by the control command to execute the control command. In this embodiment, the control command may include a hard disk reset command, a LOCATE light ignition command, a LOCATE light deactivation command, a hard disk restart command, etc. The control command may be a command sent by the BMC or a command sent by the CPU.

[0111] In this embodiment, the CPLD can receive control commands from the BMC / CPU (such as "turn on the LOCATE light" or "trigger hard disk reset") and directly drive the hardware to execute (such as outputting a 3.3V drive signal to control the LOCATE light to turn on, or sending a PCIe reset signal to restart the faulty hard disk).

[0112] In this embodiment, the CPLD is not only responsible for hard drive initialization but also continuously performs real-time status acquisition. This includes connecting to the SMART chip of each hard drive via the I2C interface to collect information about the hard drive's health status, such as the number of bad sectors and total write volume. Simultaneously, it reads data from the INA230 (for current monitoring) and LM75A (for temperature monitoring) to update the local status database, at a frequency of once every 100 milliseconds. Furthermore, the CPLD can directly respond to low-level control execution commands from the BMC or CPU, such as lighting up indicator lights or triggering a hard drive reset. This makes the CPLD the local management core of the NVMe hard drive, optimizing the execution path of management tasks, shortening response time, and enhancing the overall operational stability of the system.

[0113] In one exemplary embodiment, the hard disk management method further includes: receiving an acquisition instruction sent by a controller, and sending information to the controller based on the acquisition instruction to indicate the acquisition. In this embodiment, the controller can perform "aggregated data interaction" with the CPLD via the I3C bus, without directly accessing the hard disk. The acquisition instruction may include hard disk temperature acquisition instructions, hard disk current acquisition instructions, hard disk online status acquisition instructions, etc. The controller can acquire key indicator data of the hard disk, such as hard disk status data, at a first time interval, and acquire a complete report at a second time interval.

[0114] For example, when the BMC queries the temperature of 24 hard drives, it only needs to send one "I3C read temperature summary" command to each of the two CPLDs. The CPLDs directly return the maximum and minimum temperature values ​​of 12 hard drives, as well as the abnormal hard drive numbers (without requiring the BMC to query each drive individually). The BMC can obtain critical status (temperature, current, hard drive online status) from the CPLDs every second and a complete health report every 10 seconds, reducing the BMC's CPU utilization and response latency.

[0115] In one exemplary embodiment, the hard disk management method further includes: receiving backplane status information of the hard disk backplane acquired by a status sensor included in the hard disk backplane; and, if it is determined that there is abnormal information in the backplane status information, performing a target operation based on the abnormal information and performing an alarm operation. In this embodiment, determining the target operation based on the abnormal information may include determining the abnormality level of the abnormal information and performing the target operation based on the abnormality level. Different abnormality levels correspond to different operations.

[0116] In this embodiment, determining the target operation based on abnormal information may further include: the CPLD can acquire the power supply voltage of the hard disk backplane (accuracy ±1%) through the ADC interface, and trigger an interrupt locally when the voltage is lower than a first voltage threshold or higher than a second voltage threshold. For example, the CPLD can acquire the 12V power supply voltage of the backplane (accuracy ±1%) through the ADC interface, and trigger an interrupt locally when the voltage is lower than 11.4V or higher than 12.6V.

[0117] In this embodiment, the hard drive backplane integrates a status sensor, which is connected to the monitoring and management module in the Complex Programmable Logic Device (CPLD). The status sensor is responsible for collecting backplane status information, including but not limited to key parameters such as voltage, temperature, and link error counts, and sending this information to the CPLD's monitoring and management module in real time. Upon receiving the status information, the monitoring and management module can quickly analyze and determine if any abnormalities exist. Once an anomaly is detected, such as voltage fluctuations exceeding safe limits, excessively high temperatures, or frequent link errors, it will automatically execute corresponding recovery operations based on a preset anomaly level, such as controlling voltage stabilization, triggering temperature protection mechanisms, or resetting the link. Simultaneously, it sends an alarm signal to the BMC to ensure that abnormal situations are responded to and handled promptly. This design, through the CPLD's local intelligent decision-making, improves the system's adaptability and fault response efficiency, reduces reliance on the BMC, and achieves more efficient and reliable data center storage management. In other embodiments, the CPLD can further integrate lightweight AI algorithms to perform trend analysis on sensor data, predict potential hardware failures, and take preventative measures in advance, further enhancing system stability and operational efficiency.

[0118] In an exemplary embodiment, when the abnormal information includes temperature, performing a target operation based on the abnormal information includes: when the temperature is greater than a first threshold and less than or equal to a second threshold, controlling the fan included in the hard disk backplane to rotate at a target speed, and marking the state of the abnormal hard disk corresponding to the abnormal information as the target state, wherein the target speed is greater than the current speed of the fan; sending a first notification message to the controller, wherein the first notification message is used to notify the controller that the abnormal hard disk is in an abnormal state and the fan has rotated at the target speed; when the temperature is greater than the second threshold, turning on the indicator light of the abnormal hard disk and controlling the abnormal hard disk to power down; sending a second notification message to the controller, wherein the second notification message is used to notify the controller that the abnormal hard disk is in an abnormal state and the abnormal hard disk has been powered down. In this embodiment, the CPLD can have built-in threshold judgment logic, such as when the hard disk temperature exceeds 70°C, directly driving the fan speed to increase (controlling the backplane fan through a PWM signal), and simultaneously sending a "temperature over-limit alarm" to the BMC; if the temperature continues to exceed 75°C, the CPLD can automatically trigger hard disk power-down protection to avoid hardware damage.

[0119] In one exemplary embodiment, the hard disk management method further includes: upon detecting that a hard disk has been inserted into a target slot included in the hard disk slot, sending a soft-start signal to the power supply in the hard disk backplane to instruct the power supply to soft-start powering the target slot. In this embodiment, the CPLD can also acquire the "present signal" of the hard disk slot. When a hard disk insertion is detected, the CPLD first controls the power supply to soft-start (to avoid instantaneous impact), and then completes the PCIe enumeration. The entire process does not require BMC intervention.

[0120] In this embodiment, the Complex Programmable Logic Device (CPLD) in the hard drive backplane integrates a hot-swap management module, which is directly connected to the hard drive slot. When the hot-swap management module detects that a hard drive has been inserted into the target hard drive slot, it automatically sends a soft-start signal to the power supply in the backplane, instructing the power supply to use a soft-start method to supply power to the target hard drive slot. This design ensures that the hard drive can be powered on smoothly when inserted, avoiding potential damage to the hard drive and backplane hardware from instantaneous high current surges, thus improving system stability and hard drive lifespan. Through the intelligent control of the CPLD, the entire process does not require the intervention of the BMC, reducing management latency, simplifying the hot-swap operation process, and enhancing the system's real-time response capability and reliability.

[0121] In one exemplary embodiment, the hard disk management method further includes: receiving a positioning light control command sent by the controller; and turning on or off the positioning light corresponding to the positioning light control command based on the positioning light control command. In this embodiment, the CPLD can directly output a PWM signal to drive the ACTIVE / LOCATE / ERROR three-color LED without an intermediate controller; the BMC only needs to send an "LED status control command" to the CPLD, and the CPLD automatically parses and drives the corresponding LED, reducing link latency.

[0122] In an exemplary embodiment, the hard disk management method further includes: counting the number of cyclic redundancy errors (CRC errors) in the links of the hard disk backplane; and sending a reset request to the controller when the number exceeds a preset threshold, wherein the reset request is used to request the reset of the links. In this embodiment, the CPLD can also count the CRC error count of the PCIe link between the CPLD and the hard disk in real time. When the error rate exceeds 1... At that time, a "link reset request" is automatically sent to the CPU.

[0123] In one exemplary embodiment, the hard disk management method further includes: receiving a firmware upgrade package sent by the controller via a first bus; and sending the firmware upgrade package to the hard disk to upgrade the firmware of the hard disk. In this embodiment, the CPLD can receive a "firmware upgrade request" sent by the controller, such as the CPU, via the I3C bus. After the BMC detects a high-priority request, it releases bus control. The CPU sends firmware upgrade packages, such as Retimer firmware packages (each CPLD is responsible for 12 Retimers), to two CPLDs in batches via the I3C bus. The I3C broadcast transmission function supports one-time transmission, with multiple CPLDs receiving simultaneously, avoiding device-by-device transmission. After receiving the firmware, the CPLD writes the firmware to the hard disk chip via a local PCIe link, and the upgrade progress is fed back to the CPU in real time via I3C. After the upgrade is completed, the CPU releases the bus, the BMC regains control, and daily monitoring resumes.

[0124] In the aforementioned embodiments, the use of a higher-speed, more error-correcting I3C bus shortens firmware upgrade time, supports ≥64 NVMe disks for management, and overcomes the I2C bus bottleneck; simplifies hardware links and fault location by replacing multiple I2C / VPPs with a single bus, reducing the number of management links and shortening fault location time; eliminates the VPP bus and achieves compatibility with different CPU platforms such as Intel and AMD through dynamic address configuration, improving platform compatibility; and decomposes the centralized control of BMC into "CPLD + BMC overall scheduling", reducing CPU load and optimizing the management architecture.

[0125] By adopting a distributed management architecture for NVMe hard drives, the limitations of the traditional BMC centralized management of NVMe hard drives are overcome. The distributed management mode of the backplane CPLD is adopted, in which the backplane CPLD directly undertakes the local management function of NVMe hard drives. The BMC only needs to obtain management data such as hard drive status and configuration parameters from the backplane CPLD through the I3C bus, without directly intervening in the underlying control of the hard drives. This effectively reduces the management load of the BMC, avoids the problem of excessive resource consumption under centralized management, and improves system response efficiency.

[0126] The I3C bus communication between the CPU and BMC is optimized by using the I3C bus to build a communication link between the CPU and BMC, replacing the traditional bus solution. This link supports multi-master management mode and enables the CPU and BMC to coordinate the scheduling of bus resources, avoiding single-master bottlenecks. At the same time, the transmission bandwidth and data throughput efficiency of the I3C bus are significantly better than I2C, which can meet the high-speed data interaction requirements in firmware upgrades and device management, and improve the efficiency and flexibility of the overall management link.

[0127] The hardware communication links and interfaces are simplified. In response to the complexity of traditional designs that require the deployment of a large number of I2C buses to interconnect the motherboard and backplane modules, and the additional design of VPP buses to support backplane hot-swap control and indicator light management, this application greatly simplifies the communication interfaces and hardware links through architectural integration: reducing the types of buses (no need for independent VPP buses) and the number of buses (replacing multiple sets of I2C buses), reducing the wiring difficulty and hardware design complexity between the motherboard and backplane, and improving link stability (reducing the risk of bus conflicts).

[0128] The CPLD's multi-functional integration and management mode decentralization expand the functional boundaries of the backplane CPLD. It not only serves as the local management core of NVMe hard drives, but also simultaneously undertakes backplane health status monitoring and management functions (such as voltage, temperature, link status monitoring, etc.). At the same time, the traditional BMC centralized management mode is "decentralized" to each intelligent backplane. After completing local management tasks, the CPLD reports the summarized data to the BMC, realizing the distributed offloading of management tasks, avoiding the overload of single-point management pressure on the BMC, and further improving the overall management efficiency and reliability of the system.

[0129] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above embodiments of the hard disk management method.

[0130] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described embodiments of the hard disk management method when it is run.

[0131] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0132] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described embodiments of the hard disk management method.

[0133] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described hard disk management method embodiments.

[0134] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0135] The above provides a detailed description of a hard drive backplane, circuit board, and electronic device provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only intended to help understand the methods and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A hard drive backplane, characterized in that, include: At least one complex programmable logic device and a hard disk slot; At least one of the complex programmable logic devices is configured to be connected to the controller via a first bus; At least one of the complex programmable logic devices is further configured to be connected to the hard disk slot via a second bus, wherein the data transmission rate of the second bus is less than the data transmission rate of the first bus, and different complex programmable logic devices are connected to different hard disk slots; The hard drive slot is configured to be connected to a hard drive; The complex programmable logic device is used to acquire the hard disk status information of the hard disk inserted in the hard disk slot and send the hard disk status information to the controller.

2. The hard disk backplane according to claim 1, characterized in that, The complex programmable logic device includes a hard disk management module; the hard disk management module is configured to perform at least one of the following: Upon detecting that the hard drive is powered on, an enumeration command is sent to the hard drive slot of the hard drive to determine the initialization information of the hard drive and store the initialization information; The controller receives control commands sent by the controller and drives the target hard disk indicated by the control commands to execute the control commands.

3. The hard disk backplane according to claim 1, characterized in that, The hard disk backplane also includes a status sensor, and the complex programmable logic device also includes a monitoring and management module, which is connected to the status sensor. The status sensor is used to collect the backplane status information of the hard disk backplane and send the backplane status information to the monitoring and management module; The monitoring and management module is used to perform target operations and alarm operations based on the abnormal information when it is determined that there is abnormal information in the backplane status information.

4. The hard disk backplane according to claim 3, characterized in that, When the abnormal information includes temperature, performing the target operation based on the abnormal information includes: When the temperature is greater than a first threshold and less than or equal to a second threshold, the fan included in the hard disk backplane is controlled to rotate at a target speed, and the state of the abnormal hard disk corresponding to the abnormal information is marked as the target state, wherein the target speed is greater than the current speed of the fan; Send a first notification message to the controller, wherein the first notification message is used to notify the controller that the abnormal hard drive is in an abnormal state and that the fan is rotating at the target speed; If the temperature exceeds the second threshold, turn on the indicator light of the abnormal hard drive and power down the abnormal hard drive. A second notification message is sent to the controller, wherein the second notification message is used to notify the controller that the abnormal hard drive is in an abnormal state and that the abnormal hard drive has been powered off.

5. The hard disk backplane according to claim 1, characterized in that, The complex programmable logic device further includes a hot-swap management module, which is connected to the hard disk slot; The hot-swap management module is used to send a soft-start signal to the power supply in the hard drive backplane when a hard drive is detected inserted into a target slot included in the hard drive slot, to instruct the power supply to soft-start power supply to the target slot; and / or The complex programmable logic device also includes a lighting module, which is used to receive positioning light control commands sent by the controller, and to turn on or off the positioning light corresponding to the positioning light control command based on the positioning light control command.

6. The hard disk backplane according to claim 1, characterized in that, The complex programmable logic device is also used to perform at least one of the following: The number of cyclic redundancy errors occurring in the links of the hard disk backplane is counted, and if the number exceeds a preset threshold, a reset request is sent to the controller, wherein the reset request is used to request the reset of the links; The system receives a firmware upgrade package sent by the controller via the first bus and sends the firmware upgrade package to the hard disk to upgrade the firmware of the hard disk.

7. A circuit board, characterized in that, The device includes a controller and a hard disk backplane as described in any one of claims 1 to 6, wherein the controller is connected to the complex programmable logic device included in the hard disk backplane via the first bus.

8. The circuit board according to claim 7, characterized in that, The controller includes a central processing unit and a baseboard management controller; Both the central processing unit (CPU) and the baseboard management controller (BMC) are connected to the complex programmable logic device (CPLD) via the first bus. The CPU sends data via the first bus with a higher priority than the BMC sends data via the first bus.

9. An electronic device, characterized in that, Includes the circuit board as described in claim 7 or 8.

10. A hard disk management method, characterized in that, Applied in a hard disk backplane as described in any one of claims 1 to 6, comprising: Obtain the hard drive status information of the hard drive inserted in the hard drive slot; The hard drive status information is sent to the controller.

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